TS825CX5ARF [TSC]

Microprocessor Supervisory Circuit with Watchdog Timer & Manual Reset; 微处理器监控电路,带有看门狗定时器和手动复位
TS825CX5ARF
型号: TS825CX5ARF
厂家: TAIWAN SEMICONDUCTOR COMPANY, LTD    TAIWAN SEMICONDUCTOR COMPANY, LTD
描述:

Microprocessor Supervisory Circuit with Watchdog Timer & Manual Reset
微处理器监控电路,带有看门狗定时器和手动复位

微处理器 光电二极管 监控
文件: 总8页 (文件大小:315K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
TS823/824/825 Series  
Microprocessor Supervisory Circuit  
with Watchdog Timer & Manual Reset  
SOT-25  
General Description  
The TS823/824/825 family allows the user to customize the CPU monitoring function without any external  
components. The user has a large choice of reset voltage thresholds and output driver configurations, all of which are  
present ant the factory. Each wafer is trimmed to the customer’s specifications.  
These circuits will ignore fast negative going transients on Vdd. The state of the reset output is guaranteed to be  
correct down to 1V. After Vdd crosses above a factory present threshold, the TS823/824/825 assert a reset signal.  
After a predetermined time (the “reset” interval) the reset is deasserted. If Vdd ever drops below the threshold voltage  
a reset is asserted immediately. In addition to a supply monitoring function the TS823/824/825 also monitor transitions  
at the watchdog (WDI) input. If a logic transition does not occur at the WDI pin within a certain time interval (the  
“watchdog” interval) then a reset is asserted. The reset deasserts after the reset interval, as explained earlier.  
The TS823/824/825 can both assert a reset manually by pulling the MR input to ground, and the micro-power  
quiescent current make this family a natural for portable battery powered equipment.  
Features  
Ordering Information  
Precision monitoring of +3V, +3.3V and +5V power  
Part No.  
Package  
Packing  
supply voltage  
TS823CX5x RF  
TS824CX5x RF  
TS825CX5x RF  
SOT-25  
SOT-25  
SOT-25  
3Kpcs / 7” Reel  
3Kpcs / 7” Reel  
3Kpcs / 7” Reel  
Tight voltage threshold tolerance +/-1.5%  
Fully specified over temperature  
210mS min. power-on reset pulse width  
3uA(typ) supply current  
Note: x is the threshold voltage type, option as  
A : 4.63V  
F : 2.63V  
B : 4.38V D : 3.08V E : 2.93V  
G : 2.32V H : 2.19V  
Guaranteed reset valid to Vdd = +1V  
Power supply transient immunity  
No external components  
Contact factory for additional voltage option  
Pin Descriptions  
Applications  
Function  
RESET (Active-Low)  
Ground  
TS823 TS824 TS825  
Computers and Controllers  
1
2
3
-
1
2
-
1
2
4
3
-
Embedded Controllers  
Intelligent instruments  
Manual Reset  
Critical uP monitoring  
(RESET) (Active-High)  
Watchdog Input  
Supply Voltage (Vdd)  
3
4
5
Portable / Battery powered equipment  
Automotive Systems  
4
5
5
Absolute Maximum Rating  
Parameter  
Symbol  
Vdd  
Maximum  
6.0  
Unit  
V
Supply Voltage  
Supply Voltage - Recommended  
Operating Junction Temperature Range  
Storage Temperature Range  
Thermal Resistance  
Vdd  
0.9 ~ 5  
-40 ~ +125  
-65 ~ +150  
256  
V
oC  
oC  
oC/W  
TOP  
TSTG  
Θjc  
Maximum Lead Temperature (260oC)  
TLEAD  
10  
S
Notes: Stress above the listed absolute rating may cause permanent damage to the device.  
1/8  
Version: B07  
TS823/824/825 Series  
Microprocessor Supervisory Circuit  
with Watchdog Timer & Manual Reset  
Electrical Specifications (Ta = 25oC, unless otherwise noted)  
Parameter  
Conditions  
Symbol  
Vdd  
Min  
1.0  
Typ  
--  
Max  
5.5  
10  
Unit  
V
Input Supply Voltage  
Supply Current  
WDI and MRB unconnected  
TS823/824/825CX5A  
TS823/824/825CX5B  
TS823/824/825CX5D  
TS823/824/825CX5E  
TS823/824/825CX5F  
TS823/824/825CX5G  
TS823/824/825CX5H  
Vdd<VTH(MIN), ISINK =1.2mA,  
Vdd>VTH(MAX), ISOURCE=0.5mA  
Vdd =VTH - 100mV  
Idd  
--  
3
uA  
4.56  
4.31  
3.03  
2.89  
2.59  
2.28  
2.15  
--  
4.63  
4.38  
3.08  
2.93  
2.63  
2.32  
2.19  
--  
4.7  
4.45  
3.13  
2.97  
2.67  
2.36  
2.23  
0.5  
--  
VTH  
V
Reset Threshold  
RESET Output Voltage Low  
(RESET) Output Voltage High  
Vdd to Reset Delay  
VOL  
VOH  
TD1  
V
V
0.8 Vdd  
--  
--  
40  
--  
uS  
mS  
mS  
nS  
V
Reset Active Timeout Period  
Watchdog Timeout Period  
WDI Pulse Width  
Ta=-40oC ~+85oC  
TD2  
140  
1120  
50  
210  
1760  
--  
280  
2400  
--  
TWD  
TWDI  
WDIIL  
WDIIH  
IIL  
--  
--  
0.7  
--  
WDI Input Threshold  
WDI Input Current  
MR Input Threshold  
Vdd = VTH x 1.2  
0.8 Vdd  
-15  
--  
--  
V
WDI =0V  
-8  
0.7  
15  
uA  
uA  
V
WDI =Vdd = 5V  
IIH  
8
MRIL  
MRIH  
TWMR  
--  
--  
0.7  
--  
Vdd=VTH x 1.2  
0.8 Vdd  
1
--  
V
MR Pulse Width  
--  
--  
uS  
nS  
nS  
KΩ  
V
MR Noise Immunity  
MR to Reset Delay  
MR Pull Up Resistance  
Input Supply Voltage  
Pulse width with no reset  
Vdd = VTH - 100mV  
--  
100  
500  
--  
--  
TDMR  
VCC  
--  
--  
80  
120  
5.5  
Ta=-40oC~+85oC  
1.0  
--  
Detail Description  
Pin Function  
Pin Name  
Reset  
Pin Description  
Active Low  
Ground  
GND  
(Reset)  
Active High  
This pin is active low. Pulling this pin low to forces a reset. After a low to high transition reset remains  
asserted for exactly one reset timeout period. This pin is internally pulled high. If this function is unused  
then float this pin or tie it to Vdd.  
MR  
Watch Dog Input. Any transition on this pin will reset the Watch Dog timer. If this pin remains high or  
low for longer than the Watch Dog interval then a reset is asserted. Float or tri-state this pin to disable  
the Watch Dog feature.  
WDI  
Vdd  
Positive power supply. A reset is asserted after this voltage drops below a predetermined level. After  
Vdd rises above that level reset remains asserted until the end of the reset timeout period.  
2/8  
Version: B07  
TS823/824/825 Series  
Microprocessor Supervisory Circuit  
with Watchdog Timer & Manual Reset  
Application Information  
The TS823/824/825 are designed to interface with the reset input of a microprocessor and to prevent CPU execution  
errors due to power up, power down, and other power supply errors. The TS823/824 also monitor the CPU health by  
checking for signal transitions form the CPU at the WDI input.  
Reset Output  
Active low reset outputs are denoted as RESET, Active high reset output are denoted as (RESET),  
A reset will be asserted if any of three things happen:  
1. Vdd drops below the threshold (Vth)  
2. The MR pin is pulled low.  
3. The WDI pin does not detect a transition within the Watch Dog interval (TWD)  
The reset will remain asserted for the prescribed reset interval after:  
1. Vdd rises above the threshold (Vth)  
2. MR goes high  
3. The Watch Dog timer have timed out causing the reset to assert.  
Manual Reset Input  
The TS823 and TS825 feature a manual reset feature (MR). A logic low on the MR pin asserts a reset. The reset  
remains asserted a long as the MR pin remains low. After the MR pin transitions to a high state the reset remains  
asserted for the prescribed reset interval (TD2). The MR pin is internally pulled up to Vdd by a 100KΩ resistor. It is  
internally de-bounced to reject switching transients.  
The MR pin is ESD protected by diodes connected to Vdd and Gnd. So the MR pin should never be driven higher than  
Vdd or lower than Gnd.  
Watchdog Input  
The TS823 and TS824 are equipped with a watchdog input (WDI). If the microprocessor does not produce a valid logic  
edge at the watchdog input (WDI) within the prescribed watchdog interval (TWD) then a reset asserts. The reset  
remains asserted for the required reset interval (TD2). Ata the end of the reset interval the reset is deasserted and the  
watchdog interval timer starts again from zero.  
If the watchdog input is left unconnected or is connected to a tri-stated buffer the watchdog function is disabled. As  
soon as the WDI input is driven either low or high the watchdog function resumes with the watchdog timer set to zero.  
Watchdog Input Current  
The watchdog input pin (WDI) typically sources/sinks 8uA when driven high or low. So from a power dissipation point  
of view the duty cycle of the waveform at WDI is unimportant. When the WDI pin is floating or tri-stated the power  
supply current fall to less than 3uA.  
Glitch Rejection  
The TS823/824/825 family will reject negative going transients on the Vdd line to some extent. The smaller the  
duration of the transient the larger its amplitude may be without triggering a reset. The “Glitch Rejection” chart in the  
graphs section of this datasheet shows the relation between glitch amplitude and allowable glitch duration to avoid  
unintended resets.  
Accurate Output State at Low Vdd  
With Vdd voltage on the order of the MOS transistor threshold (<1V) the outputs of the TS823/824/825 may become  
undefined. For parts with active low output RESET a resistor placed between RESET and Gnd on the order of 100KΩ  
will ensure that the RESET output stays low when Vdd is lower than the threshold voltage of the part. In a like manner  
a resistor on the order of 100KΩ when placed between (RESET) and Vdd will ensure parts with active high output  
(RESET) will remain high when Vdd is lower than the threshold voltage of the parts.  
3/8  
Version: B07  
TS823/824/825 Series  
Microprocessor Supervisory Circuit  
with Watchdog Timer & Manual Reset  
Reset Timing Diagram  
Reset Timing Diagram  
4/8  
Version: B07  
TS823/824/825 Series  
Microprocessor Supervisory Circuit  
with Watchdog Timer & Manual Reset  
Electrical Characteristics Curve  
Figure 1. Glitch Rejection  
Figure 2. Reset Time vs. Temperature  
Figure 4. Reset Vth vs. Temperature  
Figure 3. Iin vs. Temperature  
Figure 5. Reset VOL vs. Temperature  
5/8  
Version: B07  
TS823/824/825 Series  
Microprocessor Supervisory Circuit  
with Watchdog Timer & Manual Reset  
Marking Information  
Identification  
Identification  
Code  
Identification  
Part No.  
Code  
Part No.  
Part No.  
Code  
BAE  
--  
TS823CX5A  
TS823CX5B  
TS823CX5D  
TS823CX5E  
TS823CX5F  
TS823CX5G  
TS823CX5B  
BAC  
-
TS824CX5A  
TS824CX5B  
TS824CX5D  
TS824CX5E  
TS824CX5F  
TS824CX5G  
TS824CX5B  
BAD  
ATW  
ATL  
ATV  
ATC  
--  
TS825CX5A  
TS825CX5B  
TS825CX5D  
TS825CX5E  
TS825CX5F  
TS825CX5G  
TS825CX5B  
ASM  
ATX  
ATG  
BCW  
AWY  
ATN  
AUS  
AWW  
--  
AWS  
--  
Year Code definition  
Identification  
Week Code  
Year  
xxx0  
Code  
X
X
X
X
X
W
W
W
X
X
X
X
X
X
X
X
X
W
xxx1  
xxx2  
xxx3  
xxx4  
xxx5  
xxx6  
xxx7  
xxx8  
xxx9  
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
6/8  
Version: B07  
TS823/824/825 Series  
Microprocessor Supervisory Circuit  
with Watchdog Timer & Manual Reset  
SOT-25 Mechanical Drawing  
SOT-25 DIMENSION  
MILLIMETERS  
INCHES  
MIN  
DIM  
MIN  
0.09  
0.30  
0.09  
2.70  
1.40  
MAX  
1.25  
0.50  
0.25  
3.10  
1.80  
MAX.  
0.0492  
0.0197  
0.0098  
0.1220  
0.0709  
A+A1  
B
C
D
E
0.0354  
0.0118  
0.0035  
0.1063  
0.0551  
E
1.90 BSC  
0.0748 BSC  
H
2.40  
3.00  
0.09449  
0.1181  
L
0.35 BSC  
0.0138 BSC  
Ө1  
S1  
0º  
10º  
0º  
10º  
0.95 BSC  
0.0374 BSC  
7/8  
Version: B07  
TS823/824/825 Series  
Microprocessor Supervisory Circuit  
with Watchdog Timer & Manual Reset  
Notice  
Specifications of the products displayed herein are subject to change without notice. TSC or anyone on its behalf,  
assumes no responsibility or liability for any errors or inaccuracies.  
Information contained herein is intended to provide a product description only. No license, express or implied, to any  
intellectual property rights is granted by this document. Except as provided in TSC’s terms and conditions of sale for  
such products, TSC assumes no liability whatsoever, and disclaims any express or implied warranty, relating to sale  
and/or use of TSC products including liability or warranties relating to fitness for a particular purpose, merchantability,  
or infringement of any patent, copyright, or other intellectual property right.  
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications. Customers  
using or selling these products for use in such applications do so at their own risk and agree to fully indemnify TSC for  
any damages resulting from such improper use or sale.  
8/8  
Version: B07  

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