TE0720-03-1CF [TRENZ]

Evenly spread supply pins for good signal integrity;
TE0720-03-1CF
型号: TE0720-03-1CF
厂家: Trenz Electronic    Trenz Electronic
描述:

Evenly spread supply pins for good signal integrity

文件: 总32页 (文件大小:2304K)
中文:  中文翻译
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TE0720 TRM  
Revision: v.85  
Exported on: 11/14/2017  
TE0720 TRM  
v.85  
1 Table of Contents  
1
2
Table of Contents................................................................................................. 2  
Overview............................................................................................................... 4  
2.1 Key Features............................................................................................................................... 4  
2.2 Block Diagram ............................................................................................................................ 5  
2.3 Main Components...................................................................................................................... 6  
2.4 Initial Delivery State................................................................................................................... 7  
3
4
Boot Process......................................................................................................... 8  
Signals, Interfaces and Pins................................................................................. 9  
4.1 Board to Board (B2B) I/Os ......................................................................................................... 9  
4.2 JTAG Interface.......................................................................................................................... 10  
4.3 System Controller CPLD I/O Pins............................................................................................. 10  
4.4 Quad SPI Interface ................................................................................................................... 11  
4.5 eMMC Interface......................................................................................................................... 11  
4.6 Ethernet Interface .................................................................................................................... 12  
4.7 USB Interface............................................................................................................................ 13  
4.8 I2C Interface ............................................................................................................................. 14  
5
On-board Peripherals ........................................................................................ 16  
5.1 System Controller CPLD .......................................................................................................... 16  
5.2 DDR Memory............................................................................................................................. 16  
5.3 Quad SPI Flash Memory........................................................................................................... 16  
5.4 eMMC Flash Memory ................................................................................................................ 16  
5.5 Gigabit Ethernet PHY ............................................................................................................... 17  
5.6 High-speed USB ULPI PHY ....................................................................................................... 17  
5.7 RTC - Real Time Clock .............................................................................................................. 17  
5.8 MAC-Address EEPROM ............................................................................................................. 18  
5.9 Atmel CryptoAuthentication Chip........................................................................................... 18  
5.10 eCompass module ................................................................................................................... 18  
5.11 Oscillators................................................................................................................................. 18  
5.12 On-board LEDs ......................................................................................................................... 19  
6
Power and Power-On Sequence ....................................................................... 20  
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6.1 Power Supply ........................................................................................................................... 20  
6.2 Power-On Sequence ................................................................................................................ 20  
6.3 Power Rails............................................................................................................................... 21  
6.4 Bank Voltages........................................................................................................................... 22  
7
Board to Board Connectors............................................................................... 24  
7.1 Connector Mating height ......................................................................................................... 24  
7.2 Connector Speed Ratings ........................................................................................................ 24  
7.3 Current Rating.......................................................................................................................... 25  
7.4 Connector Mechanical Ratings................................................................................................ 25  
7.5 Manufacturer Documentation................................................................................................. 25  
8
9
Variants Currently in Production....................................................................... 26  
Technical Specifications.................................................................................... 27  
9.1 Absolute Maximum Ratings..................................................................................................... 27  
9.2 Recommended Operating Conditions .................................................................................... 28  
9.3 Operating Temperature Ranges.............................................................................................. 28  
9.4 Physical Dimensions ................................................................................................................ 28  
10 Revision History ................................................................................................. 30  
10.1 Hardware Revision History...................................................................................................... 30  
10.2 Document Change History....................................................................................................... 30  
11 Disclaimer........................................................................................................... 31  
11.1 Document Warranty................................................................................................................. 31  
11.2 Limitation of Liability............................................................................................................... 31  
11.3 Copyright Notice ...................................................................................................................... 31  
11.4 Technology Licenses................................................................................................................ 31  
11.5 Environmental Protection ....................................................................................................... 31  
11.6 REACH, RoHS and WEEE .......................................................................................................... 32  
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2 Overview  
Refer to https://wiki.trenz-electronic.de/display/PD/TE0720+TRM for online version of this  
manual and additional technical documentation of the product.  
The Trenz Electronic TE0720 is an industrial-grade SoM (System on Module) based on Xilinx  
Zynq-7000 SoC (XC7Z020 or XC7Z014S) with up to 1 GB of DDR3/L SDRAM, 32MB of SPI flash  
memory, Gigabit Ethernet PHY transceiver, a USB PHY transceiver and powerful switching-mode  
power supplies for all on-board voltages. A large number of configurable I/Os is provided via  
rugged high-speed stacking strips. See also Variants Currently in Production section.  
2.1 Key Features  
Xilinx XC7Z SoC (XC7Z020 or XC7Z014S)  
Processing system (PS):  
XC7Z020: Dual-core ARM Cortex-A9 MPCorewith CoreSight™  
XC7Z014S: Single-core ARM Cortex-A9 MPCorewith CoreSight™  
L1 cache: 32 KByte instruction, 32 KByte data per processor  
L2 cache: Unified 512 KByte  
Programmable logic (PL): Artix-7 FPGA  
Programmable logic cells: 85K (XC7Z020), 65K (XC7Z014S)  
Block RAM: 4.9 MByte (XC7Z020), 3.8 MByte (XC7Z014S)  
• DSP slices: 220 (XC7Z020), 170 (XC7Z014S)  
Peak DSP performance: 276 GMACs (XC7Z020), 187 GMACs (XC7Z014S)  
2x 12 bit, MSPS ADCs with up to 17 differential inputs  
54 multiuse I/O (MIO) pins  
152 High-Range (HR) I/O pins (SelectIO interfaces)  
System Controller CPLD (Lattice LCMXO2-1200HC)  
Up to 1 GByte DDR3/L SDRAM memory (2 x 256 Mbit x 16, 32-bit wide data bus).  
32 MByte Quad SPI Flash memory  
Gigabit Ethernet transceiver PHY (Marvell 88E1512)  
MAC address serial EEPROM with EUI-48node identity (11AA02E48)  
Highly integrated full-featured hi-speed USB 2.0 ULPI transceiver (Microchip USB3320C-  
EZK)  
3-axis accelerometer and 3-axis magnetometer (ST Microelectronics LSM303DTR)  
(Optional!)  
Real time clock with embedded crystal (Intersil ISL12020M): ±5ppm accuracy  
Atmel CryptoAuthentication element (Atmel ATSHA204A)  
Up to 32 GByte eMMC, usually 4 GByte, depends on module variant and assembly option  
User LED 1 (Green), user LED 2 (Red), user LED 3 - FPGA DONE (Green)  
On-board high-efficiency DC-DC converters for all voltages used  
Trenz 4 x 5 module socket connectors (3 x Samtec LSHM series connectors)  
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Evenly spread supply pins for good signal integrity  
Rugged for shock and high vibration  
Additional assembly options are available for cost or performance optimization upon request.  
2.2 Block Diagram  
Figure 1: TE0720-03 block diagram.  
Components and connections marked with dashed lines are optional or may be missing on  
some module variants, please contact us for additional information.  
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2.3 Main Components  
Figure 2: Main components of the module.  
1. Xilinx Zynq XC7Z SoC, U5  
2. 4 Gbit DDR3/L SDRAM, U13  
3. 4 Gbit DDR3/L SDRAM, U12  
4. Low-power RTC with battery backed SRAM, U20  
5. 32 MByte Quad SPI Flash memory, U7  
6. Red LED (LED1), D5  
7. Green LED (LED2), D2  
8. System Controller CPLD, U19  
9. eMMC NAND Flash, U15  
10. 4A high-efficiency PowerSoC DC-DC step-down converter (1V), U1  
11. Green LED (DONE), D4  
12. B2B connector Samtec Razor BeamLSHM-130, JM3  
13. B2B connector Samtec Razor BeamLSHM-150, JM1  
14. B2B connector Samtec Razor BeamLSHM-150, JM2  
15. Hi-speed USB 2.0 ULPI transceiver, U18  
16. Gigabit Ethernet (GbE) transceiver, U8  
17. Low-power programmable oscillator @ 52.000000 MHz (OTG-RCLK), U14  
18. Low-power programmable oscillator @ 33.333333 MHz (PS-CLK), U6  
19. Low-dropout regulator (VBATT), U24  
20. DDR termination regulator, U4  
21. 1.5A PowerSoC DC-DC step-down converter with integrated inductor (1.5V), U2  
22. Atmel CryptoAuthentication chip, U10  
23. 2Kbit UNI/O® serial EEPROM with EUI-48node identity, U17  
24. Low-power programmable oscillator @ 25.000000 MHz (ETH-CLK), U9  
25. 1.5A PowerSoC DC-DC step-down converter with integrated inductor (1.8V), U3  
26. 3A PFET load switch with configurable slew rate (3.3V), Q1  
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2.4 Initial Delivery State  
Storage device name  
Content  
Notes  
IC  
Quad SPI Flash  
Empty  
U
7
-
eMMC NAND Flash  
U
15  
Empty  
-
-
Pre-programmed globally  
unique, 48-bit node address  
(MAC)  
11AA02E48T EEPROM  
U
17  
System Controller  
CPLD  
U
19  
Standard firmware.  
Download firmware  
Table 1: Initial state of programmable devices on delivery of the module.  
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3 Boot Process  
By default the TE-0720 supports QSPI and SD Card boot modes which is controlled by the MODE  
input signal from the B2B JM1 connector.  
MODE Signal State  
Boot Mode  
High or open  
QSPI  
Low or connected to the ground SD Card  
Table 14: Boot modes.  
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4 Signals, Interfaces and Pins  
4.1 Board to Board (B2B) I/Os  
PL I/O signal connections between Zynq SoC's I/O banks and B2B connectors, 152 HR GPIOs  
total.  
Bank Type  
Voltage  
HR GPIO VCCIO13 JM2 48  
HR GPIO VCCIO13 JM2  
B2B I/O Count Notes  
13  
13  
33  
34  
35  
24 LVDS pairs  
2
B13_IO0 and B13_IO25  
9 LVDS pairs  
HR GPIO VCCIO33 JM2 18  
HR GPIO VCCIO34 JM3 36  
HR GPIO VCCIO35 JM1 48  
18 LVDS pairs  
24 LVDS pairs  
Table 2: General PL I/O to B2B connectors information.  
PS MIO bank 500 and 501 signal connections to B2B JM1 connector, 14 PS MIOs total.  
MIO  
0
B2B Pin  
JM1-87  
JM1-91  
JM1-95  
JM1-93  
JM1-99  
JM1-97  
JM1-92  
JM1-85  
JM1-27  
JM1-25  
JM1-23  
JM1-21  
Bank  
500  
500  
500  
500  
500  
500  
500  
500  
501  
501  
501  
501  
Voltage  
3.3V  
3.3V  
3.3V  
3.3V  
3.3V  
3.3V  
3.3V  
3.3V  
1.8V  
1.8V  
1.8V  
1.8V  
Notes  
9
10  
11  
12  
13  
14  
15  
40  
41  
42  
43  
Also wired to U19-M4  
Also wired to U19-N4  
Zynq SoC SD0  
Zynq SoC SD0  
Zynq SoC SD0  
Zynq SoC SD0  
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44  
45  
JM1-19  
JM1-17  
501  
501  
1.8V  
1.8V  
Zynq SoC SD0  
Zynq SoC SD0  
Table 3: General PS MIO connections information.  
For detailed information about the pin-out, please refer to the Pin-out tables.  
4.2 JTAG Interface  
JTAG access to the Zynq SoC and System Controller CPLD is provided through B2B connector  
JM2.  
JTAG Signal B2B Connector Pin  
TMS  
TDI  
JM2-93  
JM2-95  
JM2-97  
JM2-99  
TDO  
TCK  
Table 4: JTAG pins connection.  
JTAGMODE pin 89 in B2B connector JM1 is used to switch access between devices, low  
selects Zynq SoC, high selects System Controller CPLD.  
4.3 System Controller CPLD I/O Pins  
Special purpose pins are connected to System Controller CPLD and have following default  
configuration:  
Pin  
Mode  
Function  
Default Configuration  
Name  
RESIN  
Input  
Reset input Active low reset input, default mapping forces POR_B  
reset to Zynq PS.  
PGOO  
D
Output Power  
good  
Active high when all on-module power supplies are  
working properly.  
MODE  
Input  
Boot mode  
Force low for boot from the SD card. Latched at power-on  
only, not during soft reset!  
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EN1  
Input  
Input  
Input  
Power  
enable  
High enables the DC-DC converters and on-board  
supplies. Not used if NOSEQ is high.  
NOSE  
Q
Power  
Forces the 1.0V and 1.8V DC-DC converters always ON  
sequencing when high.  
JTAG  
JTAG select Keep low for FPGA JTAG access.  
MODE  
MIO7  
Input/  
Output  
GPIO  
Connected to System Controller CPLD pin P11, function  
depends on firmware  
Table 5: System Controller CPLD special purpose pins description.  
4.4 Quad SPI Interface  
Quad SPI Flash (U7) is connected to the Zynq PS QSPI0 interface via PS MIO bank 500, pins  
MIO1..6.  
MIO Signal Name U7 Pin  
1
2
3
4
5
6
SPI-CS  
C2  
D3  
D2  
C4  
D4  
B2  
SPI-DQ0/M0  
SPI-DQ1/M1  
SPI-DQ2/M2  
SPI-DQ3/M3  
SPI-SCK/M4  
Table 6: Quad SPI interface MIOs and pins.  
4.5 eMMC Interface  
The TE0720 has on-board eMMC memory device (U15) except TE0720-03-1CR variant. At least  
three different eMMC devices have been used, please contact Trenz Electronic for more specific  
information.  
MIO Signal Name U15 Pin  
46  
47  
MMC-D0  
H3  
MMC-CMD  
W5  
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48  
49  
50  
51  
MMC-CLK  
MMC-D1  
MMC-D2  
MMC-D3  
W6  
H4  
H5  
J2  
Table 7: eMMC interface MIOs and pins.  
4.6 Ethernet Interface  
The Marvell Alaska 88E1512 (U8) is a physical layer device containing a single Gigabit Ethernet  
transceiver and three separate major electrical interfaces: MDI interface to copper cable,  
SERDES/SGMII interface and RGMII interface. RGMII interface is connected to the Zynq SoC PS  
bank 501 MIO pins, see tables below.  
SGMII (SFP copper or fiber) pins are routed to the B2B connector JM3 and MDI pins are routed to  
the B2B connector JM1 (see table below).  
Ethernet PHY to B2B connections  
PHY Signal  
SOUT_N  
SOUT_P  
SIN_N  
B2B Pin  
JM3-1  
JM3-3  
JM3-2  
JM3-4  
PHY Signal  
B2B Pin  
PHY_MDI1_P JM1-10  
PHY_MDI1_N JM1-12  
PHY_MDI2_P JM1-16  
PHY_MDI2_N JM1-18  
PHY_MDI3_P JM1-22  
PHY_MDI3_N JM1-24  
SIN_P  
PHY_MDI0_P JM1-4  
PHY_MDI0_N JM1-6  
Table 8: Ethernet PHY to B2B connections.  
Ethernet PHY to Zynq SoC PS MIO ETH0 connections  
PHY Signal SoC MIO  
PHY Signal SoC MIO  
ETH-TXCK  
ETH-TXD0  
ETH-TXD1  
16  
17  
ETH-RXCK  
ETH-RXD0  
ETH-RXD1  
22  
23  
24  
18  
ETH-TXD2  
19  
ETH-RXD2  
25  
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TE0720 TRM  
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ETH-TXD3  
ETH-TXCTL  
ETH-MDC  
20  
21  
52  
ETH-RXCTL  
ETH-MDIO  
27  
53  
Table 9: Ethernet PHY to Zynq SoC connections.  
4.7 USB Interface  
Hi-speed USB ULPI PHY is provided by USB3320 from Microchip (U18). The ULPI interface is  
connected to the Zynq SoC PS USB0 via MIO28..39, bank 501.  
USB PHY Signal Wired to SoC MIO  
OTG-DATA4  
OTG-DIR  
U18-7  
28  
29  
U18-31  
OTG-STP  
U18-29  
U18-2  
U18-3  
U18-4  
U18-5  
U18-6  
U18-1  
U18-9  
U18-10  
U18-13  
30  
31  
32  
33  
34  
35  
36  
37  
38  
39  
OTG-NXT  
OTG-DATA0  
OTG-DATA1  
OTG-DATA2  
OTG-DATA3  
OTG-CLK  
OTG-DATA5  
OTG-DATA6  
OTG-DATA7  
Table 10: USB ULPI PHY to Zynq SoC connections.  
USB PHY connection  
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USB PHY  
Pin  
SC CPLD  
Pin  
B2B  
Name  
Notes  
REFSEL0..  
2
-
-
-
-
Reference clock frequency select, all set to GND =  
52.000000 MHz.  
RESETB  
B14, bank  
1
Active low reset.  
CLKOUT  
DP, DM  
-
ULPI output clock connected to Zynq PS MIO36.  
USB data lines.  
OTG-  
D_P,  
OTG-D_N  
CPEN  
VBUS  
ID  
VBUS_V_  
EN  
External USB power switch active high enable  
signal.  
-
-
USB-  
VBUS  
Connect to USB VBUS via a series of resistors, see  
reference schematic.  
OTG-ID  
For A-device connect to the ground, for B-device  
leave floating.  
SPK_L  
SPK_R  
M5, bank  
2
-
-
In USB audio mode a switch connects the DM pin to  
the SPK_L.  
M8, bank  
2
In USB audio mode a switch connects the DP pin to  
the SPK_R.  
Table 11: USB ULPI PHY connections.  
4.8 I2C Interface  
2
2
On-board I C devices are connected to the System Controller CPLD which acts as a I C bus  
repeater for the Zynq SoC. System Controller CPLD signals X1, X3 and X7 are routed to Zynq SoC  
bank 34. Exact functionality depends on the System Controller CPLD firmware.  
Signal Name SC CPLD Pin SoC Pin Notes  
X1  
X5  
X7  
F1  
J1  
M1  
L16  
P22  
N22  
SCL, I2C clock.  
SDA, I2C data out.  
SDA, I2C data in.  
2
Table 12: Zynq SoC to System Controller CPLD I C bus.  
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2
2
IC  
Notes  
I C Device  
I C Address  
ISL12020M RTC  
ISL12020M SRAM  
LSM303D  
0x6F  
0x57  
0x1D  
U20 RTC registers.  
U20 Battery backed RAM in RTC IC.  
U22 Optional, not soldered on current production  
variants.  
2
Table 13: I C slave device addresses.  
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5 On-board Peripherals  
5.1 System Controller CPLD  
The System Controller CPLD (U19) is provided by Lattice Semiconductor LCMXO2-1200HC  
(MachXO2 product family). The System Controller CPLD is the central system management unit  
where essential control signals are logically linked by the implemented logic in System  
Controller CPLD firmware, which generates output signals to control the system, the on-board  
2
peripherals and the interfaces. Also interfaces like JTAG and I C between the on-board  
peripherals and to the Zynq SoC are by-passed, forwarded and controlled.  
Other tasks of the System Controller CPLD are monitoring of the power-on sequence and to  
indicate the programming state of the Zynq SoC FPGA.  
For more detailed information, refer to the TE0720 System Controller CPLD firmware page.  
5.2 DDR Memory  
By default TE0720 module has two DDR3/L SDRAM chips arranged into 32-bit wide memory bus  
providing total on-board memory size up to 1 GBytes. Size of memory depends on the module  
variant, refer to the variants table.  
5.3 Quad SPI Flash Memory  
On-board 32-MByte QSPI flash memory S25FL256S (U7) is used to store initial FPGA  
configuration. Besides FPGA configuration, remaining free flash memory can be used for user  
application and data storage. All four SPI data lines are connected to the FPGA allowing x1, x2 or  
x4 data bus widths. Maximum data rate depends on the selected bus width and clock frequency  
used.  
SPI Flash QE (Quad Enable) bit must be set to high or FPGA is unable to load its  
configuration from flash during power-on. By default this bit is set to high at the  
manufacturing plant.  
5.4 eMMC Flash Memory  
eMMC Flash memory device(U15) is connected to the Zynq PS MIO bank 501 pins MIO46..MIO51  
(see also Variants Currently in Production for options). Depending on the module variant,  
different make and model of eMMC chips are available.  
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5.5 Gigabit Ethernet PHY  
On-board Gigabit Ethernet PHY is provided with Marvell Alaska 88E1512 IC (U8). The Ethernet  
PHY RGMII interface is connected to the Zynq Ethernet0 PS GEM0. I/O voltage is fixed at 1.8V for  
HSTL signalling. The reference clock input of the PHY is supplied from an on-board 25.000000  
MHz oscillator (U9), the 125MHz output clock signal CLK_125MHZ is connected to the pin G13 of  
the System Controller CPLD chip (U19).  
PHY Signal  
ETH-MDC  
SC CPLD Pin  
L14  
ETH-MDIO  
PHY_LED0  
PHY_LED1  
PHY_LED2  
PHY_CONFIG  
ETH-RST  
K14  
F14  
D12  
C13  
C14  
E14  
CLK_125MHZ  
G13  
Table 15: Ethernet PHY to SC CPLD connections.  
5.6 High-speed USB ULPI PHY  
Hi-speed USB ULPI PHY is provided with USB3320 from Microchip. The ULPI interface is  
connected to the Zynq PS USB0 via MIO28..39, bank 501 (see also section. The I/O voltage is  
fixed at 1.8V and PHY reference clock input is supplied from the on-board 52.000000 MHz  
oscillator (U14).  
5.7 RTC - Real Time Clock  
Temperature compensated Intersil ISL12020M IC is used for Real Time Clock (U20). Battery  
voltage must be supplied to the module VBAT_IN pin from the carrier board to use battery  
2
backed functionality. Battery backed registers can be accessed over I C bus at slave address of  
2
0x6F. General purpose RAM is at I C slave address 0x57. RTC IC is supported by Linux so it can be  
used as hwclock device.  
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5.8 MAC-Address EEPROM  
A Microchip 2Kbit 11AA02E48 serial EEPROM (U17) is connected to the System Controller CPLD  
pin M14 via single-I/O UNI/O serial interface and contains pre-programmed globally unique 48-  
TM  
bit node address compatible with EUI-48 specification. Chip is programmed at the factory  
with a globally unique node address stored in the upper 1/4 of the memory array and write-  
protected through the STATUS register. The remaining 1,536 bits are available for application  
use.  
5.9 Atmel CryptoAuthentication Chip  
TM  
The ATSHA204A Atmel CryptoAuthentication chip (U10) is connected to the System Controller  
CPLD pin N14 via single-wire interface providing various security functions and features such as  
anti-counterfeiting, firmware/media protection, password validation, secure session key  
exchanging, secure data storage and more. Refer to the product datasheet for more  
information.  
5.10 eCompass module  
Optionally TE0720 module can be fitted with ultra-compact high-performance eCompass device  
(LSM303D, U22) featuring 3D accelerometer and 3D magnetometer.  
5.11 Oscillators  
Sourc  
e
Signal  
Frequency  
Destinatio Pin Name  
n
Notes  
PS-CLK  
33.333333  
MHz  
U5  
PS_CLK_50 Zynq SoC PS subsystem  
U6  
0
main clock.  
OTG-  
RCLK  
52.000000  
MHz  
REFCLK  
USB3320C PHY reference  
clock.  
U14  
U9  
U18  
U8  
ETH-  
CLK  
25.000000  
MHz  
XTAL_IN  
88E1512 PHY reference  
clock.  
Table 16: Oscillators.  
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5.12 On-board LEDs  
LED Color Connected to Description and Notes  
D2  
D4  
D5  
Green LED1  
Green DONE  
Controlled by System Controller CPLD firmware.  
Red  
LED2  
Controlled by System Controller CPLD firmware.  
Table 17: On-board LEDs.  
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6 Power and Power-On Sequence  
6.1 Power Supply  
Power supply with minimum current capability of 3A for system startup is recommended.  
Power Consumption  
Power Input Pin Typical Current  
VIN  
TBD*  
TBD*  
3.3VIN  
Table 18: Power Consumption.  
* TBD - To Be Determined.  
Power Distribution Diagram  
Figure 3: Power distribution diagram.  
Current rating of Samtec Razor BeamLSHM B2B connectors is 2.0A per pin (2 adjacent  
pins powered).  
6.2 Power-On Sequence  
For highest efficiency of the on-board DC-DC regulators, it is recommended to use single 3.3V  
power source for both VIN and 3.3VIN power rails. Although VIN and 3.3VIN can be powered up in  
any order, it is recommended to power them up simultaneously.  
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It is important that all carrier board I/Os are 3-stated at power-on until System Controller CPLD  
sets PGOOD signal high (B2B connector JM1, pin 30), or 3.3V is present on B2B connector JM2  
pins 10 and 12, meaning that all on-module voltages have become stable and module is  
properly powered up.  
See also Xilinx datasheet DS187 for additional information. User should also check related  
carrier board documentation when choosing carrier board design for TE0720 module.  
NOSEQ input signal  
NOSEQ input signal from the carrier board can be used to control output of the two DC-DC  
converters U1 and U3. It works in conjunction with the System Controller CPLD firmware  
controlled ON_1V0 and ON_1V8 input signals of the U21 and U25 gate ICs.  
If NOSEQ input signal from the carrier board  
is low (logical 0), signals ON_1V0 and  
ON_1V8 can be driven by System Controller  
CPLD to control outputs of the U1 and U3  
DC-DC converters.  
If NOSEQ input signal from the carrier board  
is high (logical 1), state of the ON_1V0 and  
ON_1V8 signals is irrelevant and DC-DC  
converters U1 and U3 outputs are always  
enabled.  
Figure 4: Power sequencing.  
Initial state of the ON_1V0 and ON_1V8 signals and therefore also functionality of the  
NOSEQ signal depend on the System Controller CPLD firmware.  
6.3 Power Rails  
B2B  
Name  
B2B JM1  
Pins  
B2B JM2  
Pins  
Direct  
ion  
Note  
VIN  
1, 3, 5  
2, 4, 6, 8  
Input  
Supply voltage from carrier board.  
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3.3VIN  
13, 15  
91  
Input  
Input  
Input  
Input  
Input  
Input  
Supply voltage from carrier board. JM2-91  
is VREF_JTAG.  
VCCIO3  
5
9, 11  
-
High range bank voltage from carrier  
board.  
VCCIO3  
3
-
5
High range bank voltage from carrier  
board.  
VCCIO1  
3
-
7, 9  
1, 3  
-
High range bank voltage from carrier  
board.  
VCCIO3  
4
-
High range bank voltage from carrier  
board.  
VBAT_I  
N
79  
-
RTC battery-buffer supply voltage.  
Internal 3.3V voltage level.  
Internal 1.8V voltage level.  
Internal 1.5V voltage level.  
3.3V  
10, 12  
-
Outpu  
t
1.8V  
39  
-
Outpu  
t
1)  
19  
Outpu  
t
1.5V  
Table 19: Module power rails.  
1)  
In case of module variant of TE0720-03-L1IF which uses Xilinx Zynq XC7Z020-L1CLG484I chip  
with lower power consumption, power rails named 1.5V and VCCO_DDR_502 voltage is actually  
1.35V. To achieve this, a resistor with different value is used for R4 (see schematic of the  
TE0720-03-L1IF for more information).  
6.4 Bank Voltages  
Bank  
Voltage  
Schematic Name  
Notes  
500  
3.3V, VCCO_MIO0_500  
1.8V, VCCO_MIO1_501  
1.5V, VCCO_DDR_502  
3.3V  
3.3V  
1.8V  
1.5V  
3.3V  
501  
502  
0 Config  
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Bank  
Voltage  
Schematic Name  
Notes  
13 HR  
33 HR  
34 HR  
35 HR  
VCCO13  
VCCIO33  
VCCIO34  
VCCIO35  
1.2V to 3.3V  
Supplied by the carrier board.  
Supplied by the carrier board.  
Supplied by the carrier board.  
Supplied by the carrier board.  
1.2V to 3.3V  
1.2V to 3.3V  
1.2V to 3.3V  
Table 20: Zynq SoC bank voltages.  
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7 Board to Board Connectors  
These connectors are hermaphroditic. Odd pin numbers on the module are connected to  
even pin numbers on the baseboard and vice versa.  
4 x 5 modules use two or three Samtec Razor Beam LSHM connectors on the bottom side.  
2 x REF-189016-02 (compatible to LSHM-150-04.0-L-DV-A-S-K-TR), (100 pins, "50" per row)  
1 x REF-189017-02 (compatible to LSHM-130-04.0-L-DV-A-S-K-TR), (60 pins, "30" per row)  
(depending on module)  
7.1 Connector Mating height  
When using the same type on baseboard, the mating height is 8mm. Other mating heights are  
possible by using connectors with a different height  
Connector on baseboard  
compatible to  
Mating height  
6.5 mm  
REF-189016-01  
LSHM-150-02.5-L-DV-A-S-K-TR  
LSHM-150-03.0-L-DV-A-S-K-TR LSHM-150-03.0-L-DV-A-S-K-TR  
REF-189016-02 LSHM-150-04.0-L-DV-A-S-K-TR  
LSHM-150-06.0-L-DV-A-S-K-TR LSHM-150-06.0-L-DV-A-S-K-TR  
REF-189017-01 LSHM-130-02.5-L-DV-A-S-K-TR  
LSHM-130-03.0-L-DV-A-S-K-TR LSHM-130-03.0-L-DV-A-S-K-TR  
REF-189017-02 LSHM-130-04.0-L-DV-A-S-K-TR  
LSHM-130-06.0-L-DV-A-S-K-TR LSHM-130-06.0-L-DV-A-S-K-TR  
7.0 mm  
8.0 mm  
10.0mm  
6.5 mm  
7.0 mm  
8.0 mm  
10.0mm  
The module can be manufactured using other connectors upon request.  
7.2 Connector Speed Ratings  
The LSHM connector speed rating depends on the stacking height; please see the following  
table:  
Stacking height  
Speed rating  
12 mm, Single-Ended 7.5 GHz / 15 Gbps  
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6.5 GHz / 13 Gbps  
12 mm, Differential  
5 mm, Single-Ended  
5 mm, Differential  
11.5 GHz / 23 Gbps  
7.0 GHz / 14 Gbps  
7.3 Current Rating  
Current rating of Samtec Razor BeamLSHM B2B connectors is 2.0A per pin (2 adjacent pins  
powered).  
7.4 Connector Mechanical Ratings  
Shock: 100G, 6 ms Sine  
Vibration: 7.5G random, 2 hours per axis, 3 axes total  
7.5 Manufacturer Documentation  
Geändert  
07 04, 2016 by Thorsten Trenz  
07 04, 2016 by Thorsten Trenz  
07 04, 2016 by Thorsten Trenz  
07 04, 2016 by Thorsten Trenz  
07 04, 2016 by Thorsten Trenz  
07 04, 2016 by Thorsten Trenz  
07 04, 2016 by Thorsten Trenz  
07 04, 2016 by Thorsten Trenz  
07 04, 2016 by Thorsten Trenz  
07 04, 2016 by Thorsten Trenz  
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8 Variants Currently in Production  
RAM  
eMMC  
Size  
Temperatur B2B  
Module Variant  
Zynq SoC  
e
Connector  
Range  
Height  
TE0720-03-2IF  
XC7Z020-2CLG4  
84I  
1 GByte  
1 GByte  
1 GByte  
4 GByte Industrial  
4 GByte Industrial  
4.0 mm  
TE0720-03-2IF  
C3  
XC7Z020-2CLG4  
84I  
2.5 mm  
4.0 mm  
4.0 mm  
4.0 mm  
4.0 mm  
4.0 mm  
4.0 mm  
TE0720-03-2IF  
C8  
XC7Z020-2CLG4  
84I  
32  
Industrial  
GByte  
TE0720-03-  
L1IF  
XC7Z020-  
L1CLG484I  
512  
MByte  
4 GByte Industrial  
TE0720-03-1CF XC7Z020-1CLG4  
1 GByte  
4 GByte Commercial  
84C  
TE0720-03-1CR XC7Z020-1CLG4  
256  
MByte  
-
Commercial  
84C  
TE0720-03-14S  
-1C  
XC7Z014S-1CLG  
484C  
1 GByte  
1 GByte  
4 GByte Commercial  
4 GByte Automotive  
TE0720-03-1QF XA7Z020-1CLG4  
84Q  
Table 21: Module variants currently in production.  
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9 Technical Specifications  
9.1 Absolute Maximum Ratings  
Parameter  
U
ni  
ts  
Reference Document  
Mi  
n
Max  
VIN supply voltage  
V
V
V
V
-0.  
3
6.5  
3.75  
3.6  
EP53F8QI datasheet.  
TPS27082L and  
3.3VIN supply voltage  
-0.  
1
LCMXO2-1200HC datasheets.  
Supply voltage for PS MIO  
banks  
-0.  
5
See Xilinx DS187 datasheet.  
See Xilinx DS187 datasheet.  
I/O input voltage for MIO  
banks  
-0.  
4
VCCO_MIO +  
0.55  
(VCCO_MIO0_500,  
VCCO_MIO1_501)  
See Xilinx DS187 datasheet.  
Supply voltage for HR I/Os  
banks  
-0.  
5
3.6  
V
(VCCIO13, VCCIO33, VCCIO34,  
VCCIO35)  
I/O input voltage for HR I/O  
banks  
-0.  
4
VCCIO + 0.55  
V
See Xilinx DS187 datasheet.  
-
Storage temperature  
-40 +85  
-55  
°C  
Storage temperature without  
the ISL12020MIRZ, eMMC Flash  
and 88E1512 PHY installed  
+100  
°C NB! Module variants using  
Nanya SDRAM chips, max  
temperature limit is +125 °C.  
Table 22: Module absolute maximum ratings.  
Assembly variants for higher storage temperature range are available on request.  
Please check Xilinx datasheet DS187 for complete list of absolute maximum and  
recommended operating ratings.  
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9.2 Recommended Operating Conditions  
Parameter  
Min  
Max  
Un Reference Document  
its  
VIN supply voltage  
3.3VIN supply voltage  
2.5  
5.5  
V
V
V
V
V
V
EN6347QI and EP53F8QI  
datasheets.  
3.13  
5
3.465  
3.465  
3.3V +/- 5%.  
Supply voltage for PS  
MIO banks  
1.71  
See Xilinx DS187 datasheet.  
See Xilinx DS187 datasheet.  
See Xilinx DS187 datasheet.  
See Xilinx DS187 datasheet.  
I/O input voltage for PS  
MIO banks  
-0.2  
0
VCCO_MIO +  
0.20  
Supply voltage for HR I/  
Os banks  
1.14  
3.465  
I/O input voltage for HR  
I/O banks  
-0.2  
0
VCCIO + 0.20  
Table 23: Recommended operating conditions.  
9.3 Operating Temperature Ranges  
Commercial grade: 0°C to +70°C.  
Industrial and automotive grade: -40°C to +85°C.  
Operating temperature range depends also on customer design and cooling solution. Please  
contact us for options.  
9.4 Physical Dimensions  
• Module size: 50 mm × 40 mm. Please download the assembly diagram for exact numbers.  
Mating height with standard connectors: 8 mm.  
PCB thickness: 1.6 mm.  
Highest part on PCB: approx. 2.5 mm. Please download the step model for exact numbers.  
All dimensions are given in millimeters.  
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Figure 5: TE0720 module physical dimensions.  
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TE0720 TRM  
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10 Revision History  
10.1 Hardware Revision History  
Notes  
Date  
Revision  
PCN Documentation Link  
2015-10-12  
03  
02  
TE0720-03  
TE0720-02  
-
-
01  
Prototypes  
Table 24: Hardware revision history table.  
There is no hardware revision number marking on the module PCB.  
10.2 Document Change History  
Date  
2017-11-10  
Revision Contributors Description  
Replace B2B connector section  
Correction of Boot Mode section  
Initial document.  
v.85  
John Hartfiel  
John Hartfiel  
Jan Kumann  
v.84  
v.83  
2017-09-07  
2017-08-31  
Table 25: Document change history table.  
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11 Disclaimer  
11.1 Document Warranty  
The material contained in this document is provided “as is” and is subject to being changed at  
any time without notice. Trenz Electronic does not warrant the accuracy and completeness of  
the materials in this document. Further, to the maximum extent permitted by applicable law,  
Trenz Electronic disclaims all warranties, either express or implied, with regard to this  
document and any information contained herein, including but not limited to the implied  
warranties of merchantability, fitness for a particular purpose or non infringement of  
intellectual property. Trenz Electronic shall not be liable for errors or for incidental or  
consequential damages in connection with the furnishing, use, or performance of this document  
or of any information contained herein.  
11.2 Limitation of Liability  
In no event will Trenz Electronic, its suppliers, or other third parties mentioned in this document  
be liable for any damages whatsoever (including, without limitation, those resulting from lost  
profits, lost data or business interruption) arising out of the use, inability to use, or the results of  
use of this document, any documents linked to this document, or the materials or information  
contained at any or all such documents. If your use of the materials or information from this  
document results in the need for servicing, repair or correction of equipment or data, you  
assume all costs thereof.  
11.3 Copyright Notice  
No part of this manual may be reproduced in any form or by any means (including electronic  
storage and retrieval or translation into a foreign language) without prior agreement and  
written consent from Trenz Electronic.  
11.4 Technology Licenses  
The hardware / firmware / software described in this document are furnished under a license  
and may be used /modified / copied only in accordance with the terms of such license.  
11.5 Environmental Protection  
To confront directly with the responsibility toward the environment, the global community and  
eventually also oneself. Such a resolution should be integral part not only of everybody's life.  
Also enterprises shall be conscious of their social responsibility and contribute to the  
preservation of our common living space. That is why Trenz Electronic invests in the protection  
of our Environment.  
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11.6 REACH, RoHS and WEEE  
REACH  
Trenz Electronic is a manufacturer and a distributor of electronic products. It is therefore a so  
called downstream user in the sense of REACH. The products we supply to you are solely non-  
chemical products (goods). Moreover and under normal and reasonably foreseeable  
circumstances of application, the goods supplied to you shall not release any substance. For  
that, Trenz Electronic is obliged to neither register nor to provide safety data sheet. According to  
present knowledge and to best of our knowledge, no SVHC (Substances of Very High Concern)  
on the Candidate List are contained in our products. Furthermore, we will immediately and  
unsolicited inform our customers in compliance with REACH - Article 33 if any substance present  
in our goods (above a concentration of 0,1 % weight by weight) will be classified as SVHC by the  
European Chemicals Agency (ECHA).  
RoHS  
Trenz Electronic GmbH herewith declares that all its products are developed, manufactured and  
distributed RoHS compliant.  
WEEE  
Information for users within the European Union in accordance with Directive 2002/96/EC of the  
European Parliament and of the Council of 27 January 2003 on waste electrical and electronic  
equipment (WEEE).  
Users of electrical and electronic equipment in private households are required not to dispose  
of waste electrical and electronic equipment as unsorted municipal waste and to collect such  
waste electrical and electronic equipment separately. By the 13 August 2005, Member States  
shall have ensured that systems are set up allowing final holders and distributors to return  
waste electrical and electronic equipment at least free of charge. Member States shall ensure  
the availability and accessibility of the necessary collection facilities. Separate collection is the  
precondition to ensure specific treatment and recycling of waste electrical and electronic  
equipment and is necessary to achieve the chosen level of protection of human health and the  
environment in the European Union. Consumers have to actively contribute to the success of  
such collection and the return of waste electrical and electronic equipment. Presence of  
hazardous substances in electrical and electronic equipment results in potential effects on the  
environment and human health. The symbol consisting of the crossed-out wheeled bin  
indicates separate collection for waste electrical and electronic equipment.  
Trenz Electronic is registered under WEEE-Reg.-Nr. DE97922676.  
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