TS1102-200EG5TP [TOUCHSTONE]

A 1μA, 200μVOS SOT23 Precision Current-Sense Amplifier; 一个1μA , 200μVOS SOT23高精度电流检测放大器
TS1102-200EG5TP
型号: TS1102-200EG5TP
厂家: TOUCHSTONE SEMICONDUCTOR INC    TOUCHSTONE SEMICONDUCTOR INC
描述:

A 1μA, 200μVOS SOT23 Precision Current-Sense Amplifier
一个1μA , 200μVOS SOT23高精度电流检测放大器

放大器
文件: 总11页 (文件大小:787K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
TS1102  
A 1µA, 200µVOS SOT23 Precision Current-Sense Amplifier  
FEATURES  
DESCRIPTION  
Improved Electrical Performance over the  
MAX9938 and the MAX9634  
Ultra-Low Supply Current: 1μA  
Wide Input Common Mode Range: +2V to +25V  
Low Input Offset Voltage: 200μV (max)  
Low Gain Error: 0.5% (max)  
Voltage Output  
The voltage-output TS1102 current-sense amplifiers  
are form-factor identical and electrical improvements  
to the MAX9938 and the MAX9634 current-sense  
amplifiers. The TS1102 is the latest addition to the  
TS1100  
family  
of  
current-sense  
amplifiers.  
Consuming a very low 1μA supply current, the  
TS1102 high-side current-sense amplifiers combine a  
200-µV (max) VOS and a 0.5% (max) gain error for  
cost-sensitive applications. For all high-side current-  
sensing applications, the TS1102 features a wide  
input common-mode voltage range from 2V to 25V.  
Four Gain Options Available:  
TS1102-25: Gain = 25V/V  
TS1102-50: Gain = 50V/V  
TS1102-100: Gain = 100V/V  
TS1102-200: Gain = 200V/V  
5-Pin SOT23 Packaging  
The SOT23 package makes the TS1102 an ideal  
choice for pcb-area-critical, low-current, high-  
accuracy current-sense applications in all battery-  
powered, remote or hand-held portable instruments.  
APPLICATIONS  
Notebook Computers  
Current-Shunt Measurement  
Power Management Systems  
Battery Monitoring  
All TS1102s are specified for operation over the  
-40°C to +105°C extended temperature range.  
Motor Control  
Load Protection  
Smart Battery Packs/Chargers  
TYPICAL APPLICATION CIRCUIT  
Input Offset Voltage Histogram  
35  
30  
25  
20  
15  
10  
5
0
10  
20  
30  
40  
0
50  
INPUT OFFSET VOLTAGE - µV  
PART  
GAIN OPTION  
25 V/V  
TS1102-25  
TS1102-50  
TS1102-100  
TS1102-200  
50 V/V  
100 V/V  
200 V/V  
The Touchstone Semiconductor logo is a registered  
trademark of Touchstone Semiconductor, Incorporated.  
Page 1  
© 2011 Touchstone Semiconductor, Inc. All rights reserved.  
TS1102  
ABSOLUTE MAXIMUM RATINGS  
RS+, RS- to GND..............................................-0.3V to +27V  
OUT to GND........................................................-0.3V to +6V  
RS+ to RS-..................................................................... ±27V  
Short-Circuit Duration: OUT to GND .................... Continuous  
Continuous Input Current (Any Pin) ............................ ±20mA  
Continuous Power Dissipation (TA = +70°C)  
Operating Temperature Range .................... -40°C to +105°C  
Junction Temperature ................................................ +150°C  
Storage Temperature Range ....................... -65°C to +150°C  
Lead Temperature (Soldering, 10s) ........................... +300°C  
Soldering Temperature (Reflow) ............................ +260°C  
5-Pin SOT23 (Derate at 3.9mW/°C above +70°C).. 312mW  
Electrical and thermal stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These  
are stress ratings only and functional operation of the device at these or any other condition beyond those indicated in the operational sections  
of the specifications is not implied. Exposure to any absolute maximum rating conditions for extended periods may affect device reliability and  
lifetime.  
PACKAGE/ORDERING INFORMATION  
ORDER NUMBER PART MARKING CARRIER QUANTITY  
TS1102-25EG5TP  
TS1102-25EG5T  
TS1102-50EG5TP  
TS1102-50EG5T  
TS1102-100EG5TP  
TS1102-100EG5T  
TS1102-200EG5TP  
TS1102-200EG5T  
Tape & Reel  
Tape & Reel 3000  
Tape & Reel -----  
Tape & Reel 3000  
Tape & Reel -----  
Tape & Reel 3000  
Tape & Reel -----  
Tape & Reel 3000  
-----  
TADS  
TADT  
TADU  
TADV  
Lead-free Program: Touchstone Semiconductor supplies only lead-free packaging.  
Consult Touchstone Semiconductor for products specified with wider operating temperature ranges.  
Page 2  
TS1102DS r1p0  
RTFDS  
TS1102  
ELECTRICAL CHARACTERISTICS  
VRS+ = VRS- = 3.6V; VSENSE = (VRS+ - VRS-) = 0V; COUT = 47nF; TA = -40°C to +105°C, unless otherwise noted.  
Typical values are at TA = +25°C. See Note 1  
PARAMETER  
SYMBOL  
CONDITIONS  
TA = +25°C  
MIN  
TYP  
0.68  
MAX  
0.85  
1.0  
1.0  
1.2  
UNITS  
Supply Current (Note 2)  
ICC  
μA  
TA = +25°C  
VRS+ = 25V  
Common-Mode Input Range  
Common-Mode Rejection  
Ratio  
VCM  
Guaranteed by CMRR  
2V < VRS+ < 25V  
TA = +25°C  
2
25  
V
CMRR  
120  
150  
±30  
dB  
±200  
±300  
Input Offset Voltage (Note 3)  
VOS  
G
μV  
TS1102-25  
TS1102-50  
TS1102-100  
TS1102-200  
TA = +25°C  
25  
50  
100  
200  
±0.1  
Gain  
V/V  
%
±0.5  
±0.6  
13.2  
26.4  
5
Gain Error (Note 4)  
GE  
TS1102-25/50/100  
TS1102-200  
7.0  
14.0  
10  
20  
Output Resistance (Note 5)  
ROUT  
kΩ  
Gain = 25  
Gain = 50  
Gain = 100  
10  
20  
OUT Low Voltage  
VOL  
mV  
Gain = 200  
40  
OUT High Voltage (Note 6)  
Output Settling Time  
VOH  
tS  
VOH = VRS- - VOUT  
TS1102-25/50/100  
TS1102-200  
0.05  
2.2  
4.3  
0.2  
V
ms  
ms  
1% final value, VOUT = 3V  
Note 1: All devices are 100% production tested at TA = +25°C. All temperature limits are guaranteed by product  
characterization.  
Note 2: Extrapolated to VOUT = 0. ICC is the total current into the RS+ and the RS- pins.  
Note 3: Input offset voltage VOS is extrapolated from VOUT with VSENSE set to 1mV.  
Note 4: Gain error is calculated by applying two values for VSENSE and then calculating the error of the actual slope vs. the  
ideal transfer characteristic:  
For GAIN = 25, the applied VSENSE is 20mV and 120mV.  
For GAIN = 50, the applied VSENSE is 10mV and 60mV.  
For GAIN = 100, the applied VSENSE is 5mV and 30mV.  
For GAIN = 200, the applied VSENSE is 2.5mV and 15mV.  
Note 5: The device is stable for any capacitive load at VOUT  
.
Note 6: VOH is the voltage from VRS- to VOUT with VSENSE = 3.6V/GAIN.  
TS1102DS r1p0  
Page 3  
RTFDS  
TS1102  
TYPICAL PERFORMANCE CHARACTERISTICS  
VRS+ = VRS- = 3.6V; TA = +25°C, unless otherwise noted.  
Gain Error Histogram  
Input Offset Voltage Histogram  
35  
30  
30  
25  
20  
15  
10  
25  
20  
15  
10  
5
5
0
0
-0.4  
-0.2  
0
0.2  
0.4  
10  
20  
30  
40  
50  
0
GAIN ERROR - %  
INPUT OFFSET VOLTAGE - µV  
Input Offset Voltage vs Common-Mode Voltage  
Supply Current vs Temperature  
40  
1
0.8  
0.6  
0.4  
0.2  
0
35  
30  
25  
20  
25V  
2V  
3.6V  
-40 -15  
10  
35  
60  
85  
20  
25  
30  
110  
0
5
10  
15  
TEMPERATURE - °C  
SUPPLY VOLTAGE - Volt  
Supply Current vs Common-Mode Voltage  
Input Offset Voltage vs Temperature  
80  
60  
40  
20  
0
1
0.8  
0.6  
0.4  
0.2  
0
-20  
-40  
10  
110  
0
5
10  
20  
25  
30  
-40 -15  
35  
60  
85  
15  
SUPPLY VOLTAGE - Volt  
TEMPERATURE - °C  
Page 4  
TS1102DS r1p0  
RTFDS  
TS1102  
TYPICAL PERFORMANCE CHARACTERISTICS  
VRS+ = VRS- = 3.6V; TA = +25°C, unless otherwise noted.  
Gain Error vs Common-Mode Voltage  
Gain Error vs. Temperature  
0.5  
0.4  
0.3  
0.2  
0.1  
0
0.3  
0.2  
0.1  
0
-0.1  
110  
-40 -15  
10  
35  
60  
85  
0
5
10  
15  
25  
30  
20  
SUPPLY VOLTAGE - Volt  
TEMPERATURE - °C  
VOUT vs VSENSE @ Supply = 2V  
VOUT vs VSENSE @ Supply = 3.6V  
2
4
3.5  
3
G = 100  
1.8  
1.6  
1.4  
1.2  
G = 50  
G = 100  
G = 50  
2.5  
2
G = 25  
1.0  
0.8  
0.6  
0.4  
0.2  
0
G = 25  
1.5  
1
0.5  
0
0
20  
60  
80  
0
50  
100  
VSENSE- mV  
150  
40  
100  
VSENSE- mV  
Common-Mode Rejection vs Frequency  
Small-Signal Gain vs Frequency  
5
0
0
-20  
G = 50  
G = 50, 100  
-5  
-40  
-60  
G = 100  
G = 25  
-10  
-15  
-20  
-25  
G = 25  
-80  
-100  
-120  
-140  
-30  
-35  
0.001 0.01 0.1  
1
10  
100 1000  
0.001 0.01 0.1  
10  
100 1000  
1
FREQUENCY - kHz  
FREQUENCY - kHz  
TS1102DS r1p0  
Page 5  
RTFDS  
TS1102  
TYPICAL PERFORMANCE CHARACTERISTICS  
VRS+ = VRS- = 3.6V; TA = +25°C, unless otherwise noted.  
Large-Signal Pulse Response, Gain = 50  
Small-Signal Pulse Response, Gain = 50  
200µs/DIV  
200µs/DIV  
Large-Signal Pulse Response, Gain = 25  
Small-Signal Pulse Response, Gain = 25  
200µs/DIV  
200µs/DIV  
Small-Signal Pulse Response, Gain = 100  
Large-Signal Pulse Response, Gain = 100  
200µs/DIV  
200µs/DIV  
Page 6  
TS1102DS r1p0  
RTFDS  
TS1102  
PIN FUNCTIONS  
PIN  
SOT23  
LABEL  
FUNCTION  
5
4
1, 2  
3
RS+  
RS-  
GND  
OUT  
External Sense Resistor Power-Side Connection  
External Sense Resistor Load-Side Connection  
Ground. Connect these pins to analog ground.  
Output Voltage. VOUT is proportional to VSENSE = VRS+ - VRS-  
BLOCK DIAGRAM  
DESCRIPTION OF OPERATION  
The internal configuration of the TS1102 a  
unidirectional high-side, current-sense amplifier - is  
based on a commonly-used operational amplifier (op  
amp) circuit for measuring load currents (in one  
direction) in the presence of high-common-mode  
voltages. In the general case, a current-sense  
amplifier monitors the voltage caused by a load  
current through an external sense resistor and  
generates an output voltage as a function of that load  
current. Referring to the typical application circuit on  
Page 1, the inputs of the op-amp-based circuit are  
connected across an external RSENSE resistor that  
is used to measure load current. At the non-inverting  
input of the TS1102 (the RS+ terminal), the applied  
voltage is ILOAD x RSENSE. Since the RS- terminal is  
the non-inverting input of the internal op amp, op-amp  
feedback action forces the inverting input of the  
internal  
op  
amp  
to  
the  
same  
potential  
(ILOAD x RSENSE). Therefore, the voltage drop across  
RSENSE (VSENSE) and the voltage drop across RGAIN  
(at the RS+ terminal) are equal. To minimize any  
additional error because of op-amp input bias current  
mismatch, both RGAINs are the same value.  
Since the internal p-channel FET’s source is  
connected to the inverting input of the internal op  
amp and since the voltage drop across RGAIN is the  
same as the external VSENSE, op amp feedback action  
drives the gate of the FET such that the FET’s drain-  
source current is equal to:  
VSEꢃSE  
ꢁS  
RꢄAꢀꢃ  
TS1102DS r1p0  
Page 7  
RTFDS  
TS1102  
or  
Table 1: Internal Gain Setting Resistors (Typical  
Values)  
LꢅAꢁ x RSEꢃSE  
ꢁS  
RꢄAꢀꢃ  
GAIN (V/V) RGAIN (Ω) ROUT (Ω) Part Number  
25  
50  
100  
200  
400  
200  
100  
100  
10k  
10k  
10k  
20k  
TS1102-25  
TS1102-50  
TS1102-100  
TS1102-200  
Since the FET’s drain terminal is connected to ROUT  
the output voltage of the TS1102 at the OUT  
terminal is, therefore;  
,
RꢅꢆT  
VꢅꢆT ꢂ ꢀLꢅAꢁ x RSEꢃSE  
x
To achieve its very-low input offset voltage  
performance over temperature, VSENSE voltage,  
and power supply voltage, the design of the  
RꢄAꢀꢃ  
The current-sense amplifier’s gain accuracy is  
therefore the ratio match of ROUT to RGAIN. For each  
of the four gain options available, Table 1 lists the  
values for ROUT and RGAIN. The TS1102’s output  
stage is protected against input overdrive by use of  
an output current-limiting circuit of 3mA (typical) and  
a 7V internal clamp protection circuit.  
TS1102’s amplifier is chopper-stabilized,  
a
commonly-used technique to reduce significantly the  
input offset voltage of amplifiers. This method,  
however, does employ the use of sampling  
techniques and therefore residue of the TS1102’s  
10kHz internal clock is contained in the TS1102’s  
output voltage spectrum.  
APPLICATIONS INFORMATION  
Therefore,  
Choosing the Sense Resistor  
VOUT(max) = VRS+(min) - VSENSE(max) VOH(max)  
Selecting the optimal value for the external RSENSE  
is based on the following criteria and for each  
commentary follows:  
and  
VꢅꢆT maxꢁ  
RSEꢃSE  
1) RSENSE Voltage Loss  
2) VOUT Swing vs. Applied Input Voltage at VRS+  
and Desired VSENSE  
ꢄAꢀꢃ ꢇ ꢀLꢅAmaxꢁ  
where the full-scale VSENSE should be less than  
VOUT(MAX)/ꢄAꢀꢃ at the application’s minimum RS+  
terminal voltage. For best performance with a 3.6V  
power supply, RSENSE should be chosen to  
generate a VSENSE of: a) 120mV (for the 25V/V GAIN  
option), b) 60mV (for the 50V/V GAIN option), c)  
30mV (for the 100V/V GAIN option), or d) 15mV (for  
the 200V/V GAIN option) at the full-scale ILOAD(MAX)  
current in each application. For the case where the  
minimum power supply voltage is higher than 3.6V,  
each of the four full-scale VSENSEs above can be  
increased.  
3) Total ILOAD Accuracy  
4) Circuit Efficiency and Power Dissipation  
5) RSENSE Kelvin Connections  
6) Sense Resistor Composition  
1) RSENSE Voltage Loss  
For lowest IR voltage loss in RSENSE, the smallest  
usable value for RSENSE should be selected.  
2) VOUT Swing vs. Applied Input Voltage at VRS+  
and Desired VSENSE  
3) Total ILOAD Accuracy  
As there is no separate power supply pin for the  
TS1102, the circuit draws its power from the applied  
voltage at both its RS+ and RS- terminals.  
Therefore, the signal voltage at the OUT terminal is  
bounded by the minimum supply voltage applied to  
the TS1102.  
In  
the  
TS1102’s  
linear  
region  
where  
VOUT < VOUT(MAX), there are two specifications related  
to the circuit’s accuracy: a) the TS1102’s input offset  
voltage (VOS = 200μV, max) and b) its gain error  
(GE(max) = 0.5%).  
Page 8  
TS1102DS r1p0  
RTFDS  
TS1102  
An expression for the TS1102’s total output voltage  
6) RSENSE Composition  
(+ error) is given by:  
Current-shunt resistors are made available in metal  
film, metal strip, and wire-wound constructions.  
Wire-wound current-shunt resistors are constructed  
with wire spirally wound onto a core. As a result,  
these types of current shunt resistors exhibit the  
largest self inductance. In applications where the  
load current contains high-frequency transients,  
metal film or metal strip current sense resistors are  
recommended.  
VOUT = [GAIN x (1 ± GE) x VSENSE] ± (GAIN x VOS)  
A large value for RSENSE permits the use of smaller  
load currents to be measured more accurately  
because the effects of offset voltages are less  
significant when compared to larger VSENSE  
voltages. Due care though should be exercised as  
previously mentioned with large values of RSENSE.  
4) Circuit Efficiency and Power Dissipation  
Internal Noise Filter  
IR losses in RSENSE can be large especially at high  
load currents. It is important to select the smallest,  
usable RSENSE value to minimize power dissipation  
and to keep the physical size of RSENSE small. If  
the external RSENSE is allowed to dissipate  
significant power, then its inherent temperature  
coefficient may alter its design center value, thereby  
reducing load current measurement accuracy.  
Precisely because the TS1102’s input stage was  
designed to exhibit a very low input offset voltage,  
small RSENSE values can be used to reduce power  
dissipation and minimize local hot spots on the pcb.  
In power management and motor control  
applications, current-sense amplifiers are required to  
measure load currents accurately in the presence of  
both externally-generated differential and common-  
mode noise. An example of differential-mode noise  
that can appear at the inputs of a current-sense  
amplifier is high-frequency ripple. High-frequency  
ripple whether injected into the circuit inductively  
or capacitively - can produce a differential-mode  
voltage drop across the external current-shunt  
resistor (RSENSE). An example of externally-  
generated, common-mode noise is the high-  
frequency output ripple of a switching regulator that  
can result in common-mode noise injection into both  
inputs of a current-sense amplifier.  
5) RSENSE Kelvin Connections  
For optimal VSENSE accuracy in the presence of large  
load currents, parasitic pcb track resistance should  
be minimized. Kelvin-sense pcb connections  
Even though the load current signal bandwidth is  
DC, the input stage of any current-sense amplifier  
can rectify unwanted, out-of-band noise that can  
result in an apparent error voltage at its output. This  
rectification of noise signals occurs because all  
amplifier input stages are constructed with  
transistors that can behave as high-frequency signal  
detectors in the same way pn-junction diodes were  
used as RF envelope detectors in early radio  
designs. Against common-mode injected noise, the  
amplifier’s internal common-mode rejection is  
usually sufficient.  
Figure 1: Making PCB Connections to the Sense  
To counter the effects of externally-injected noise, it  
has always been good engineering practice to add  
external low-pass filters in series with the inputs of a  
current-sense amplifier. In the design of discrete  
current-sense amplifiers, resistors used in the  
external low-pass filters were incorporated into the  
circuit’s overall design so errors because of any  
input-bias current-generated offset voltage errors  
and gain errors were compensated.  
Resistor.  
between RSENSE and the TS1102’s RS+ and RS-  
terminals are strongly recommended. The drawing in  
Figure 1 illustrates the connections between the  
current-sense amplifier and the current-sense  
resistor. The pcb layout should be balanced and  
symmetrical to minimize wiring-induced errors. In  
addition, the pcb layout for RSENSE should include  
good thermal management techniques for optimal  
RSENSE power dissipation.  
With the advent of monolithic current-sense  
amplifiers, like the TS1102, the addition of external  
TS1102DS r1p0  
Page 9  
RTFDS  
TS1102  
low-pass filters in series with the current-sense  
amplifier’s inputs only introduces additional offset  
voltage and gain errors. To minimize or eliminate  
altogether the need for external low-pass filters and  
to maintain low input offset voltage and gain errors,  
the TS1102 incorporates a 50-kHz (typ), 2nd-order  
differential low-pass filter as shown in the TS1102’s  
Block Diagram.  
the RS+ and the RS- input terminals of the TS1102  
should be short and symmetric. Also recommended  
are a ground plane and surface mount resistors and  
capacitors.  
Using the TS1102 in Bidirectional Load Current  
Applications  
In many battery-powered systems, it is oftentimes  
necessary to monitor a battery’s discharge and  
Optional Output Filter Capacitor  
charge currents. To perform this function,  
a
bidirectional current-sense amplifier is required. The  
circuit illustrated in Figure 2 shows how two  
TS1102s can be configured as a bidirectional  
current-sense amplifier. As shown in the figure, the  
RS+/RS- input pair of TS1102 #2 is wired opposite  
in polarity with respect to the RS+/RS- connections  
of TS1102 #1. Current-sense amplifier #1 therefore  
measures the discharge current and current-sense  
amplifier #2 measures the charge current. Note that  
both output voltages are measured with respect to  
GND. When the discharge current is being  
measured, VOUT1 is active and VOUT2 is zero; for the  
case where charge current is being measured, VOUT1  
is zero, and VOUT2 is active.  
If the TS1102 is part of a signal acquisition system  
where its OUT terminal is connected to the input of  
an ADC with an internal, switched-capacitor track-  
and-hold circuit, the internal track-and-hold’s  
sampling capacitor can cause voltage droop at VOUT  
.
A 22nF to 100nF good-quality ceramic capacitor  
from the OUT terminal to GND forms a low-pass  
filters with the TS1102’s ROUT and should be used to  
minimize voltage droop (holding VOUT constant  
during the sample interval. Using a capacitor on the  
OUT terminal will also reduce the TS1102’s small-  
signal bandwidth as well as band-limiting amplifier  
noise.  
PC Board Layout and Power-Supply Bypassing  
For optimal circuit performance, the TS1102 should  
be in very close proximity to the external current-  
sense resistor and the pcb tracks from RSENSE to  
Figure 2: Using Two TS1102s for Bidirectional Load Current Detection  
Page 10  
TS1102DS r1p0  
RTFDS  
TS1102  
PACKAGE OUTLINE DRAWING  
5-Pin SOT23 Package Outline Drawing  
(N.B., Drawings are not to scale)  
NOTES:  
1. Dimensions and tolerances are as per ANSI Y14.5M, 1982.  
2. Package surface to be matte finish VDI 11~13.  
5
2.80 - 3.00  
3. Die is facing up mold and facing down for trim/form,  
ie, reverse trim/form.  
0.950  
0.95  
TYP  
TYP  
4. The foot length measuring is based on the gauge plane method.  
5.Dimensions are exclusive of mold flash and gate burr.  
6. Dimensions are exclusive of solder plating.  
7. All dimensions are in mm.  
8. This part is compliant with EIAJ spec. and JEDEC MO-178 AA  
0.30 - 0.50  
9. Lead span/stand off height/coplanarity are considered as special  
characteristic.  
1.90 Max  
10º TYP  
1.50 1.75  
10º TYP  
0.09 1.45  
0.60 0.80  
0.90 - 1.30  
0º- 8º  
0.25  
0.00 - 0.15  
0.09 - 0.20  
5
0.30 - 0.55  
Gauge Plane  
10º TYP  
10º TYP  
0.10 Max  
0.50 0.70  
0.50 Max  
0.30 Min  
0.20 Max  
0.09 Min  
Information furnished by Touchstone Semiconductor is believed to be accurate and reliable. However, Touchstone Semiconductor does not  
assume any responsibility for its use nor for any infringements of patents or other rights of third parties that may result from its use, and all  
information provided by Touchstone Semiconductor and its suppliers is provided on an AS IS basis, WITHOUT WARRANTY OF ANY KIND.  
Touchstone Semiconductor reserves the right to change product specifications and product descriptions at any time without any advance  
notice. No license is granted by implication or otherwise under any patent or patent rights of Touchstone Semiconductor. Touchstone  
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TS1102DS r1p0  
RTFDS  

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