TMP90C041AN [TOSHIBA]
CMOS 8-Bit Microcontrollers; 8位CMOS微控制器
| 型号： | TMP90C041AN |
| 厂家： | 
TOSHIBA |
| 描述： | CMOS 8-Bit Microcontrollers |
| 文件： | 总12页 (文件大小：365K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TMP90C041A
2.1 Pin Assignment
Figure 2.1 (1) shows pin assignment of the TMP90C041AN.
2. Pin Assignment and Functions
The assignment of input/output pins, their names and functions
are described below.
.
Figure 2.1-(1). Pin Assignment
(Shrink Dual Inline Package)
TOSHIBA CORPORATION
3/12
TMP90C041A
Figure 2.1 (2) shows pin assignment of the TMP90CM40F.
Figure 2.1 (2). Pin Assignment (Flat Package)
2.2 Pin Names and Functions
The names of input/output pins and their functions are summarized
in Table 2.2.
Table 2.2 Pin Names and Functions (1/2)
I/O 3 states
Pin Name
No. of pins
Function
D0 ~ D7
A0 ~ A7
A8 ~ A15
8
8
8
3 states
Output
Output
Data bus: Also functions as 8-bit bidirectional data bus for external memory
Address bus: The lower 8 bits address bus for external memory
Address bus: The upper 8 bits address bus for external memory
Port 30: 1-bit input port
P30
/RxD
1
1
Input
Input
Receiver Serial Data
Port 31: 1-bit input port
P31
/RxD
Receiver Serial Data
Port 32: 1-bit input port
P32
/TxD
/RTS
/SCLK
Transmitter Serial Data
1
Output
Request to send Serial Data
Serial clock output
Port 33: 1-bit output port
P33
/TxD
1
1
Output
Input
Transmitter Serial Data
Port 34: 1-bit input port
P34
/CTS
Clear to send Serial Data
RD
1
1
Output
Output
Read: Generates strobe signal for reading external memory
Write: Generates strobe signal for writing into external memory
Port 37: 1-bit input port
WR
P37
/WAIT
1
Input
Wait: Input pin for connecting slow speed memory or peripheral LSI
4/12
TOSHIBA CORPORATION
TMP90C041A
Table 2.2 Pin Names and Functions (2/2)
Pin Name
No. of Pins
I/O 3 states
Function
Port 4: 4-bit output port that allows selection of Port/Address Bus on bit basis
P40 ~ P43
/A16 ~ A19
4
Output
Address bus: Also functions as address bus for external memory
(4 bits of bank address)
Port 5: 6-bit input port
P50 ~ P55
/AN0 ~ AN5
6
Input
Analog input: 6 analog input to A/D converter
Input of reference voltage to A/D converter
Ground pin for A/D converter
VREF
1
1
–
AGND
–
I/O
Port 6: 4-bit I/O port that allows I/O selection on bit basis
Stepping motor control port 0
P60 ~ P63
/M00 ~ M03
/TO1
4
4
Output
Output
I/O
Timer output 1: Output of Timer 0 or 1
Port 7: 4-bit I/O port that allows I/O selection on bit basis
Stepping motor control port 1
P70 ~ P73
/M10 ~ M13
/TO3
Output
Output
Timer output 3: Output of Timer 2 or 3
Port 80: 1-bit input port
Interrupt request pin 0: Interrupt request pin (Level/rising edge is
programmable)
P80
/INTO
1
1
Input
Port 81: 1-bit input port
Interrupt request pin 1: Interrupt request pin (Rising/falling edge is
programmable)
P81
/INT1
/TI4
Input
Timer input 4: Counter/capture trigger signal for Timer 4
Port 82: 1-bit input port
P82
/INT2
/TI5
1
1
Input
Interrupt request pin 2: rising edge interrupt request pin
Timer input 5: capture trigger signal for Timer 4
Port 83: 1-bit output port
P83
/TO3/T04
Output
Timer output 3/4: Output of Timer 2, 3 or 4
Non-maskable interrupt request pin: Falling edge interrupt request pin
NMI
CLK
1
1
Input
Clock output: Generates clock pulse at 1/4 frequency of clock oscillation. It is
Pulled up internally during resetting.
Output
External access: Connects with GND pin in the TMP90C041A with no internal
ROM.
EA
1
1
2
Input
Input
RESET
X1/X2
Reset: Initializes the TMP90C041A. (Built-in pull-up resister)
Pin for quartz crystal or ceramic resonator
Input/
Output
V
1
1
–
–
Power supply (+5V)
Ground (0V)
CC
V
(GND)
SS
TOSHIBA CORPORATION
5/12
TMP90C041A
3.2 Memory Map
3. Operation
The following explains the TMP90C041A functions and basic
operations.
The CPU functions and internal I/O functions of the
TMP90C041A are the same as the TMP90C840A.
Refer to the “TMP90C840A” section concerning functions
which are not explained the following.
The TMP90C041A supports a program memory of up to 64K
bytes and a data memory of maximum 1M bytes.
The program memory may be assigned to the address
space from 00000H to 0FFFFH, while the data memory can
be allocated to any address from 00000H to FFFFFH.
(1)
Internal I/O
3.1 CPU
The TMP90C041A has an internal high-performance 8-bit
CPU.
Refer to the book TLCS Series CPU Core Architecture
concerning CPU operation.
The TMP90C041A provides a 48 byte address space
as an internal I/O area, whose addresses range from
FFC0H to FFEFH. This I/O area can be accessed by
the CPU using a short opcode in the “direct addressing
mode”.
Figure 3.1 is a memory map indicating the areas
accessible by the CPU in the respective addressing
mode.
Figure 3.2. Memory Map
6/12
TOSHIBA CORPORATION
TMP90C041A
4. Electrical Characteristics
TMP90C041AN/TMP90C041AF
4.1 Absolute Maximum Ratings
Symbol
Parameter
Rating
Unit
V
Supply voltage
Input voltage
-0.5 ~ + 6.5
V
V
CC
V
-0.5 ~ V + 0.5
IN
CC
F 500
N 600
P
Power dissipation (Ta = 70°C)
mW
D
T
Soldering temperature (10s)
Storage temperature
260
°C
°C
°C
SOLDER
T
T
-65 ~ 150
-20 ~ 70
STG
Operating temperature
OPR
4.2 DC Characteristics
TA = -20 ~ 70°C VCC = 5V ± 10%
Typical Values are for TA = 25°C and VCC = 5V.
Symbol
Parameter
Min
Max
Unit
Test Conditions
V
Input Low Voltage (D0 ~ D7)
-0.3
-0.3
-0.3
-0.3
2.2
0.8
V
V
V
V
V
V
V
V
V
–
–
–
–
–
–
–
–
IL
V
V
V
P3, P5, P6, P7, P8
RESET, INT0, NMI
X1
0.3V
CC
IL1
IL2
IL4
0.25V
0.2V
CC
CC
Input Low Voltage (D0 ~ D7)
P3, P5, P6, P7, P8
RESET, INT0, NMI
X1
V
V
V
V
+ 0.3
V
CC
CC
CC
CC
IH
0.7V
+ 0.3
+ 0.3
+ 0.3
V
CC
IH1
IH2
IH4
0.75V
0.8V
V
V
CC
CC
Output Low Voltage
–
0.45
I
= 1.6mA
V
V
OL
OL
2.4
V
V
V
I
I
I
= -400µA
= -100µA
= -20µA
OH
OH
OH
OH
Output High Voltage
0.75V
–
V
V
CC
CC
OH1
OH2
0.9V
Darlington Drive Current
(8 I/O pins)
V
R
= 1.5V
= 1.1kΩ
EXT
EXT
I
-1.0
-3.5
mA
DAR
Input Leakage Current
Output Leakage Current
0.02 (Typ)
0.05 (Typ)
±5
µA
µA
0.0 ≤ Vin ≤ V
CC
I
LI
±10
0.2 ≤ Vin ≤ V - 0.2
I
CC
LO
Operating Current (RUN)
Idle 1
Idle 2
19 (Typ)
1.6 (Typ)
30
6
15
mA
mA
mA
tosc = 16MHz
9
(Typ)
I
CC
STOP (TA = -20 ~ 70°C)
STOP (TA = 0 ~ 50°C)
50
10
µA
µA
0.2 (Typ)
0.2 ≤ Vin ≤ V - 0.2
CC
R
RESET Pull Up Register
Pin Capacitance
50
–
150
10
KΩ
pF
V
–
testfreq = 1MHz
–
RST
CIO
V
Schmitt width RESET, NMI, INT0
0.4
1.0 (Typ)
TH
Note: I
is guaranteed for a total of up to 8 optional ports.
DAR
TOSHIBA CORPORATION
7/12
TMP90C041A
4.3 AC Characteristics
TA = -20 ~ 70°C VCC = 5V ± 10%
CL = 50pF
Variable
10MHz Clock
16MHz Clock
Unit
Symbol
Parameter
Min
Max
Min
Max
Min
Max
t
t
OSC. Period = x
CLK Period
80
4x
1000
4x
–
100
400
160
160
55
–
–
82.5
250
85
85
17
115
5
–
–
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
OSC
CYC
t
CLK Low width
CLK High width
2x - 40
2x - 40
x - 45
2.5x - 40
0.5x - 30
–
–
–
WL
WH
t
–
–
–
Address Setup to RD, WR
RD Low width
–
–
–
t
AC
–
210
20
–
–
t
RR
CA
AD
RD
HR
Address Hold Time After RD, WR
Address to Valid Data In
RD to Valid Data In
–
–
–
t
3.5x - 95
–
255
170
–
–
124
77
–
t
t
t
–
2.5x - 80
–
–
Input Data Hold After RD
WR Low width
0
–
0
0
2.5x - 40
2x - 50
20
–
210
150
20
–
115
75
20
–
–
t
WW
Data Setup to WR
–
–
–
t
DW
WD
Data Hold After WR
70
70
70
120
–
70
14
27
–
t
RD, WR to Valid WAIT
Address to Valid WAIT
WAIT Setup to CLK
–
1.5x - 80
–
t
CWA
–
2.5x - 130
–
–
t
AWA
WAS
WAH
50
–
50
50
0
t
WAIT Hold After CLK
RD/WR Recovery Time
CLK to Port Data Output
Port Data Setup to CLK
Port Data Hold After CLK
RD/WR Hold After CLK
RD/WR Setup to CLK
Address Hold After CLK
Address Setup to CLK
Data Setup to CLK
0
–
0
–
–
t
t
1.5x - 35
–
–
115
–
–
58
–
–
t
RV
x + 200
300
–
263
–
CPW
200
–
–
–
–
–
–
–
200
100
40
200
100
10
68
13
76
12
t
PRC
CPR
100
–
–
t
x - 60
1.5x - 25
1.5x - 80
2.5x - 80
x - 50
–
–
t
CHCL
125
70
–
–
t
CLC
–
–
t
CLHA
170
50
–
–
t
ACL
–
–
t
CLD
• AC output level High 2.2V/Low 0.8V
• AC input level High 2.4V/Low 0.45V (D0 – D7)
High 0.8V /Low 0.2V (excluding D0 – D7)
CC
CC
8/12
TOSHIBA CORPORATION
TMP90C041A
4.4 A/D Conversion Characteristics
Symbol Parameter
Min
- 1.5
Typ
Max
Unit
V
Analog reference voltage
Analog reference voltage
Allowable analog input voltage
Supply current for analog reference voltage
Total error
V
V
V
CC
REF
CC
CC
V
A
V
V
V
V
V
GND
SS
SS
SS
SS
–
0.5
–
V
CC
AIN
REF
I
–
–
1.0
mA
1.0
2.5
2.0
3.5
Error
(TA = 25°C, V = V = 5.0V)
CC
REF
LSB
(1M ≤ fc ≤ 12.5MHz)
Total error
–
–
–
–
Total error
(TA = 25°C, V = V = 5.0V)
Error
CC
REF
LSB
(12.5M ≤ fc ≤ 16MHz)
Total error
–
–
4.5 Zero-Cross Characteristics
TA = -20 ~ 70°C VCC = 5V ± 10%
Symbol
Parameter
Zero-cross detection input
Condition
Min
Max
Unit
V
A
AC coupling C = 0.1µF
1
–
1.8
135
1
VAC p - p
mV
ZX
ZX
ZX
Zero-cross accuracy
50/60Hz sine wave
–
F
Zero-cross detection input frequency
0.04
KHz
4.6 Serial Channel Timing-I/O Interface Mode
TA = –20 ~ 70°C VCC = 5V ± 10%
CL = 50pF
Variable
Max
10MHz Clock
16MHz Clock
Unit
Symbol
Parameter
Serial Port Clock Cycle Time
Min
Min
Max
Min
Max
t
t
8x
6x - 150
2x - 120
0
–
800
450
80
0
–
–
500
225
45
0
–
–
ns
ns
ns
ns
ns
SCY
OSS
OHS
Output Data Setup SCLK Rising Edge
Output Data Hold After SCLK Rising Edge
Input Data Hold After SCLK Rising Edge
SCLK Rising Edge to Input DATA Valid
–
t
–
–
–
–
t
–
–
HSR
SRD
–
6x - 150
–
450
–
225
t
4.7 16-bit Event Counter
TA = –20 ~ 70°C VCC = 5V ± 10%
Variable
Max
10MHz Clock
16MHz Clock
Unit
Symbol
Parameter
Min
Min
Max
Min
Max
t
TI 4 clock cycle
8x + 100
4x + 40
4x + 40
–
–
–
900
440
440
–
–
–
600
290
290
–
–
–
ns
ns
ns
VCK
t
TI4 Low clock pulse width
TI4 High clock pulse width
VCKL
VCKH
t
TOSHIBA CORPORATION
9/12
TMP90C041A
4.8 Interrupt Operation
TA = -20 ~ 70°C VCC = 5V ± 10%
Variable
10MHz Clock
16MHz Clock
Unit
Symbol
Parameter
Min
Max
Min
Max
Min
Max
NMI, INT0 Low level pulse width
NMI, INT0 High level pulse width
INT1, INT2 Low level pulse width
t
4x
–
400
400
–
250
–
ns
ns
INTAL
t
4x
–
–
–
–
250
600
–
–
INTAH
t
8x + 100
900
900
ns
ns
INTBL
INT1, INT2 High level pulse width
t
8x + 100
–
–
600
–
INTBH
(Reference) Definition of I
DAR
4.9 I/O Interface Mode Timing Chart
10/12
TOSHIBA CORPORATION
TMP90C041A
4.10 Timing Chart
TOSHIBA CORPORATION
11/12
TMP90C041A
internal I/O functions as shown below, can be substituted by
TMP90C041A system. To substitute the TMP90C841A sys-
tem using the internal RAM by the TMP90C041A system, it is
necessary to attach the external RAM to the address corre-
sponded to the internal address.
5. Differences Between TMP90C841A and
TMP90C041A
Specifications of TMP90C841A and TMP90C041A are the
same except below.
TMP90C841A system, not using internal RAM and
Name
TMP90C841A
TMP90C041A
RAM
256 bytes of internal RAM are provided. (0FEC0H ~ 0FFBFH)
High-Impedance state during reset
External memory area.
A0 ~ A15
Driving state during reset.
P0 (0FFC1H)
P1 (0FFC1H)
P2 (0FFC4H)
Provided
(same chip as TMP90C840A)
R/W function is not provided.
P01CR (0FFC2H)
P2CR (0FFC5H)
Provided
Provided
EXT, P1C, P0C is not provided.
P2XC register is not provided
* Note: Connect EA pin with GND pin.
6.Typical Characteristics
VCC = 5V, Ta 25°C, unless otherwise noted
12/12
TOSHIBA CORPORATION
相关型号：
TMP90C141N
IC 8-BIT, MICROCONTROLLER, PDIP64, 0.750 INCH, SHRINK, PLASTIC, DIP-64, Microcontroller
TOSHIBA
TMP90C400N
IC 8-BIT, MICROCONTROLLER, PDIP64, 0.750 INCH, SHRINK, PLASTIC, DIP-64, Microcontroller
TOSHIBA
©2020 ICPDF网 联系我们和版权申明