TC74VHC161FK [TOSHIBA]

Synchronous Presettable 4-Bit Counter; 同步可预置4位计数器
TC74VHC161FK
型号: TC74VHC161FK
厂家: TOSHIBA    TOSHIBA
描述:

Synchronous Presettable 4-Bit Counter
同步可预置4位计数器

计数器
文件: 总15页 (文件大小:329K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
TC74VHC161,163F/FN/FT/FK  
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic  
TC74VHC161F, TC74VHC161FN, TC74VHC161FT,TC74VHC161FK  
TC74VHC163F, TC74VHC163FN, TC74VHC163FT,TC74VHC163FK  
Synchronous Presettable 4-Bit Counter  
TC74VHC161F/FN/FT/FK Binary,  
Note: xxxFN (JEDEC SOP) is not available in  
Asynchronous Clear  
Japan.  
TC74VHC163F/FN/FT/FK Binary,  
TC74VHC161F, TC74VHC163F  
Synchronous Clear  
The TC74VHC 161 and 163 are advanced high speed CMOS  
SYNCHRONOUS PRESETTABLE 4 BIT BINARY COUNTERs  
fabricated with silicon gate C2MOS technology.  
They achieve the high speed operation similar to equivalent  
Bipolar Schottky TTL while maintaining the CMOS low power  
dissipation.  
TC74VHC161FN, TC74VHC163FN  
The CK input is active on the rising edge. Both LOAD and  
CLR inputs are active on low logic level.  
Presetting of each IC’s is synchronous to the rising edge of CK.  
The clear function of the TC74VHC163 is synchronous to CK,  
while the TC74VHC161 are cleared asynchronously.  
Two enable inputs (ENP and ENT) and CARRY OUTPUT are  
provided to enable easy cascading of counters, which facilitates  
easy implementation of n-bit counters without using external  
gates.  
An input protection circuit ensures that 0 to 5.5 V can be  
applied to the input pins without regard to the supply voltage.  
This device can be used to interface 5 V to 3 V systems and two  
supply systems such as battery back up. This circuit prevents  
device destruction due to mismatched supply and input voltages.  
TC74VHC161FT, TC74VHC163FT  
Features  
High speed: f  
= 185 MHz (typ.) at V  
= 5 V  
max  
CC  
Low power dissipation: I  
= 4 μA (max) at Ta = 25°C  
CC  
TC74VHC161FK, TC74VHC163FK  
High noise immunity: V  
= V  
= 28% V  
(min)  
NIH  
NIL  
CC  
Power down protection is provided on all inputs.  
Balanced propagation delays: t  
t
pHL  
pLH  
Wide operating voltage range: V  
(opr) = 2 to 5.5 V  
CC  
Low noise: V  
= 0.8 V (max)  
OLP  
Pin and function compatible with 74ALS161/163  
Weight  
SOP16-P-300-1.27A  
SOL16-P-150-1.27  
: 0.18 g (typ.)  
: 0.13 g (typ.)  
TSSOP16-P-0044-0.65A : 0.06 g (typ.)  
VSSOP16-P-0030-0.50  
: 0.02 g (typ.)  
1
2007-10-01  
TC74VHC161,163F/FN/FT/FK  
Pin Assignment  
1
2
3
4
5
6
7
8
16  
V
CC  
CLR  
CK  
15 CARRY OUTPUT  
14 QA  
A
B
13 QB  
C
12 QC  
D
11 QD  
ENP  
GND  
10 ENT  
9
LOAD  
(top view)  
IEC Logic Symbol  
TC74VHC161  
CTRDIV 16  
CT = 0  
TC74VHC163  
CTRDIV 16  
5CT = 0  
(1)  
(9)  
(1)  
CLR  
CLR  
(9)  
LOAD  
M1  
M2  
G3  
G4  
LOAD  
M1  
M2  
(15)  
(15)  
3CT = 15  
3CT = 15  
CARRY OUTPUT  
CARRY OUTPUT  
(10)  
(7)  
(10)  
(7)  
G3  
G4  
ENT  
ENP  
CK  
ENT  
ENP  
CK  
(2)  
(2)  
C5/2, 3, 4+  
C5/2, 3, 4+  
(3)  
(4)  
(5)  
(6)  
(14)  
(13)  
(12)  
(11)  
(3)  
(4)  
(5)  
(6)  
(14)  
(13)  
(12)  
(11)  
A
B
C
D
QA  
QB  
QC  
QD  
A
B
C
D
QA  
QB  
QC  
QD  
1, 5D  
[1]  
[2]  
[4]  
[8]  
1, 5D  
[1]  
[2]  
[4]  
[8]  
Truth Table (Note)  
TC74VHC161  
Inputs  
TC74VHC163  
Inputs  
Outputs  
Function  
ENP  
X
ENT  
X
CK  
X
ENP  
X
ENT  
CK  
QA  
QB  
QC  
L
QD  
L
CLR  
L
LD  
X
CLR  
LD  
X
L
H
H
H
H
X
X
X
L
L
L
Reset to “0”  
H
L
X
X
L
X
Preset Data  
No Count  
No Count  
Count  
A
B
C
D
H
H
H
H
X
X
L
H
H
H
X
X
No Change  
No Change  
Count Up  
H
L
X
L
X
H
X
H
H
H
H
H
X
X
X
No Change  
No Count  
Note:  
X: Don’t care  
A, B, C, D: Logic level of data inputs  
Carry: CARRY = ENTQAQBQCQD  
2
2007-10-01  
TC74VHC161,163F/FN/FT/FK  
Timing Chart  
CLR  
LOAD  
A
DON’T CARE UNTIL LOAD GOES LOW  
B
Data  
Inputs  
C
D
CK  
ENP  
ENT  
QA  
QB  
QC  
QD  
CARRY  
Outputs  
12  
13  
14  
15  
0
1
2
COUNT  
INHIBIT  
ASYNC SYNC PRESET  
CLEAR CLEAR  
(161) (163)  
3
2007-10-01  
TC74VHC161,163F/FN/FT/FK  
System Diagram  
1
7
CLR  
ENP  
ENT  
E
10  
9
E
LOAD  
L
L
15  
CARRY  
OUT  
3
A
(Note)  
D
L
R
Q
L
E
E
14  
CK  
QA  
Q
4
B
(Note)  
L
L
L
L
E
E
R
D
Q
13  
12  
11  
CK  
QB  
QC  
QD  
Q
5
C
(Note)  
L
E
E
R
D
Q
CK  
Q
6
D
(Note)  
L
E
E
R
D
Q
CK  
Q
2
CK  
Note:  
Truth table of internal F/F  
TC74VHC161  
TC74VHC163  
D
X
L
CK  
X
R
H
L
Q
L
Q
H
H
L
D
X
L
CK  
R
H
L
Q
L
Q
H
H
L
L
L
H
X
L
H
H
X
L
H
L
No Change  
X
No Change  
X: Don’t care  
4
2007-10-01  
TC74VHC161,163F/FN/FT/FK  
Absolute Maximum Ratings (Note)  
Characteristics  
Supply voltage range  
Symbol  
Rating  
Unit  
V
0.5 to 7.0  
0.5 to 7.0  
V
V
CC  
DC input voltage  
V
IN  
DC output voltage  
Input diode current  
Output diode current  
DC output current  
V
0.5 to V  
CC  
+ 0.5  
V
OUT  
I
20  
mA  
mA  
mA  
mA  
mW  
°C  
IK  
I
±20  
±25  
OK  
I
OUT  
DC V /ground current  
CC  
I
±50  
CC  
Power dissipation  
P
180  
D
Storage temperature  
T
65 to 150  
stg  
Note:  
Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or  
even destruction.  
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the  
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly  
even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute  
maximum ratings and the operating ranges.  
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook  
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test  
report and estimated failure rate, etc).  
Operating Range (Note)  
Characteristics  
Symbol  
Rating  
Unit  
Supply voltage  
Input voltage  
V
2.0 to 5.5  
0 to 5.5  
V
V
CC  
V
IN  
Output voltage  
V
0 to V  
V
OUT  
CC  
40 to 85  
0 to 100 (V = 3.3 ± 0.3 V)  
Operating temperature  
T
°C  
opr  
CC  
0 to 20 (V  
Input rise and fall time  
dt/dv  
ns/V  
= 5 ± 0.5 V)  
CC  
Note:  
The operating ranges must be maintained to ensure the normal operation of the device.  
Unused inputs must be tied to either VCC or GND.  
5
2007-10-01  
TC74VHC161,163F/FN/FT/FK  
Electrical Characteristics  
DC Characteristics  
Ta =  
Test Condition  
Ta = 25°C  
40 to 85°C  
Unit  
Characteristics  
Symbol  
V
(V)  
CC  
Min  
Typ.  
Max  
Min  
Max  
2.0  
1.50  
1.50  
High-level input  
voltage  
3.0  
to  
5.5  
V
V
V
IH  
V
CC  
0.7  
×
V
CC  
0.7  
×
2.0  
0.50  
0.50  
Low-level input  
voltage  
3.0  
to  
5.5  
V
IL  
V
CC  
0.3  
×
V
×
CC  
0.3  
2.0  
3.0  
4.5  
3.0  
4.5  
2.0  
3.0  
4.5  
3.0  
4.5  
1.9  
2.9  
4.4  
2.58  
3.94  
2.0  
3.0  
4.5  
1.9  
2.9  
4.4  
2.48  
3.80  
I
= 50 μA  
OH  
V
IN  
= V or  
IL  
High-level output  
voltage  
V
V
V
OH  
IH  
V
I
I
= 4 mA  
= 8 mA  
OH  
OH  
0.0  
0.0  
0.0  
0.1  
0.1  
0.1  
0.36  
0.36  
0.1  
0.1  
0.1  
0.44  
0.44  
I
= 50 μA  
OL  
V
IN  
IH  
IL  
Low-level output  
voltage  
V
I
= V or  
V
OL  
I
I
= 4 mA  
= 8 mA  
OL  
OL  
Input leakage  
current  
0 to  
5.5  
V
V
= 5.5 or GND  
±0.1  
4.0  
±1.0  
40.0  
μA  
μA  
IN  
IN  
IN  
Quiescent supply  
current  
I
= V  
or GND  
CC  
5.5  
CC  
6
2007-10-01  
TC74VHC161,163F/FN/FT/FK  
Timing Requirements (input: t = t = 3 ns)  
r
f
Ta =  
Ta =  
40 to  
Test Condition  
25°C  
Characteristics  
Symbol  
Unit  
85°C  
V
(V)  
Limit  
5.0  
5.0  
5.0  
5.0  
5.5  
4.5  
8.0  
5.0  
7.5  
5.0  
4.0  
3.5  
1.0  
1.0  
1.0  
1.5  
2.5  
1.5  
Limit  
5.0  
5.0  
5.0  
5.0  
6.5  
4.5  
9.5  
6.0  
9.0  
6.0  
4.0  
3.5  
1.0  
1.0  
1.0  
1.5  
2.5  
1.5  
CC  
Minimum pulse width  
(CK)  
t
3.3 ± 0.3  
5.0 ± 0.5  
3.3 ± 0.3  
5.0 ± 0.5  
3.3 ± 0.3  
5.0 ± 0.5  
3.3 ± 0.3  
5.0 ± 0.5  
3.3 ± 0.3  
5.0 ± 0.5  
3.3 ± 0.3  
5.0 ± 0.5  
3.3 ± 0.3  
5.0 ± 0.5  
3.3 ± 0.3  
5.0 ± 0.5  
3.3 ± 0.3  
5.0 ± 0.5  
w (L)  
Figure 1  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
t
w (H)  
Minimum pulse width  
( CLR )  
t
Figure 4  
w (L)  
(Note1)  
Minimum set-up time  
(A, B, C, D)  
t
t
t
t
Figure 2  
s
s
s
s
h
h
Minimum set-up time  
( LOAD )  
Figure 2  
Minimum set-up time  
(ENT, ENP)  
Figure 3  
Minimum set-up time  
( CLR )  
Figure 5  
(Note 2)  
Minimum hold time  
t
t
Figure 2, Figure 3  
Figure 5  
Minimum hold time  
( CLR )  
(Note 2)  
(Note 1)  
Minimum removal time  
( CLR )  
t
Figure 4  
rem  
Note 1: For TC74VHC161 only  
Note 2: For TC74VHC163 only  
7
2007-10-01  
TC74VHC161,163F/FN/FT/FK  
AC Characteristics (input: t = t = 3 ns)  
r
f
Ta =  
40 to 85°C  
Test Condition  
(V)  
Ta = 25°C  
Characteristics  
Symbol  
Unit  
V
C (pF)  
L
Min  
80  
55  
135  
95  
Typ.  
8.3  
10.8  
4.9  
6.4  
8.7  
11.2  
4.9  
6.4  
11.0  
13.5  
6.2  
7.7  
7.5  
10.5  
4.9  
6.4  
8.9  
11.2  
5.5  
7.0  
8.4  
10.9  
5.0  
6.5  
130  
85  
Max  
12.8  
16.3  
8.1  
Min  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
70  
Max  
15.0  
18.5  
9.5  
CC  
15  
50  
15  
50  
15  
50  
15  
50  
15  
50  
15  
50  
15  
50  
15  
50  
15  
50  
15  
50  
15  
50  
15  
50  
15  
50  
15  
50  
3.3 ± 0.3  
5.0 ± 0.5  
3.3 ± 0.3  
5.0 ± 0.5  
3.3 ± 0.3  
5.0 ± 0.5  
3.3 ± 0.3  
5.0 ± 0.5  
3.3 ± 0.3  
5.0 ± 0.5  
3.3 ± 0.3  
5.0 ± 0.5  
3.3 ± 0.3  
Propagation delay  
time  
t
pLH  
Figure 1,  
Figure 2  
ns  
ns  
t
pHL  
(CK-Q)  
10.1  
13.6  
17.1  
8.1  
11.5  
16.0  
19.5  
9.5  
Propagation delay  
time  
t
t
pLH  
Figure 1  
Figure 2  
Figure 6  
Figure 4  
Figure 4  
(CK-CARRY,  
count-mode)  
pHL  
10.1  
17.2  
20.7  
10.3  
12.3  
12.3  
15.8  
8.1  
11.5  
20.0  
23.5  
12.0  
14.0  
14.5  
18.0  
9.5  
Propagation delay  
time  
t
t
pLH  
ns  
(CK-CARRY,  
preset-mode)  
pHL  
Propagation delay  
time  
t
t
pLH  
ns  
pHL  
(ENT-CARRY)  
10.1  
13.6  
17.1  
9.0  
11.5  
16.0  
19.5  
10.5  
12.5  
15.5  
19.0  
10.0  
12.0  
Propagation delay  
time  
t
ns  
pHL  
pHL  
max  
( CLR -Q)  
(Note 2)  
11.0  
13.2  
16.7  
8.6  
Propagation delay  
time  
t
ns  
( CLR -CARRY)  
(Note 2)  
10.6  
50  
Maximum clock  
frequency  
f
MHz  
185  
125  
4
115  
85  
5.0 ± 0.5  
Input capacitance  
C
10  
10  
pF  
pF  
IN  
Power dissipation  
capacitance  
C
PD  
(Note 1)  
23  
Note 1:  
C
PD  
is defined as the value of the internal equivalent capacitance which is calculated from the operating  
current consumption without load.  
Average operating current can be obtained by the equation:  
I
= C V f + I  
PD CC IN CC  
CC (opr)  
When the outputs drive a capacitive load, total current consumption is the sum of C , and ΔI  
which is  
CC  
PD  
obtained from the following formula:  
C
CQB CQC CQD  
CCO  
16  
QA  
ΔICC = fCK VCC  
+
+
+
+
2
4
8
16  
C
QA  
to C  
and C  
are the capacitances at QA to QD and CARRY OUT, respectively.  
QD  
CO  
f
is the input frequency of the CK.  
CK  
Note 2: For TC74VHC161 only  
8
2007-10-01  
TC74VHC161,163F/FN/FT/FK  
Switching Characteristics Test Waveform  
V
CC  
50  
CLR  
CK  
t
t
wL  
wH  
GND  
t
wL  
V
CC  
CK  
50%  
50%  
V
CC  
GND  
50%  
GND  
t
rem  
V
OH  
Q,  
CARRY  
50%  
50%  
V
V
OH  
OL  
Q,  
CARRY  
VO  
50%  
L
t
t
t
pHL  
pLH  
pHL  
Figure 1 Count Mode  
Figure 4 Clear Mode (TC74VHC161)  
V
CC  
LOAD  
A to D  
CK  
50%  
50%  
GND  
t
s
t
t
h
t
s
t
h
V
CC  
50%  
50%  
50%  
CLR  
CK  
GND  
t
s
t
s
t
h
h
V
V
CC  
CC  
50%  
50%  
50%  
G
ND  
GND  
t
, t  
pLH pHL  
V
V
V
V
OH  
OH  
OL  
Q,  
CARRY  
Q,  
CARRY  
50%  
OL  
Figure 2 Preset Mode  
Figure 5 Clear Mode (TC74VHC163)  
V
CC  
ENP  
ENT  
50%  
50%  
GND  
t
s
t
h
t
s
t
h
V
CC  
V
CC  
ENT  
50%  
50%  
CK  
Q
50%  
50%  
GND  
GND  
V
V
OH  
OL  
V
OH  
OL  
CARRY  
50%  
50%  
t
t
pHL  
pLH  
V
Figure 3 Count Enable Mode  
Figure 6 Cascade Mode  
(fix maximum count)  
9
2007-10-01  
TC74VHC161,163F/FN/FT/FK  
Noise Characteristics (input: t = t = 3 ns)  
r
f
Test Condition  
Ta = 25°C  
Characteristics  
Symbol  
Unit  
V
(V)  
Typ.  
Max  
0.8  
CC  
Quiet output maximum dynamic V  
V
V
C
L
C
L
C
L
C
L
= 50 pF  
= 50 pF  
= 50 pF  
= 50 pF  
5.0  
0.4  
0.4  
V
V
V
V
OL  
OLP  
OLV  
Quiet output minimum dynamic V  
5.0  
5.0  
5.0  
0.8  
3.5  
OL  
Minimum high level dynamic input voltage  
Maximum low level dynamic input voltage  
V
IHD  
V
1.5  
ILD  
Input Equivalent Circuit  
INPUT  
Typical Application  
Parallel Carry N-Bit Counter  
H: COUNT  
L: DISABLE  
INPUTS  
INPUTS  
INPUTS  
LD  
A
B
C
D
LD A  
B
C
D
LD A  
ENP  
B
C
D
ENP  
ENP  
ENT  
CK  
NEXT  
STAGE  
H: COUNT  
L: DISABLE  
ENT  
CK  
CARRY  
CARRY  
ENT  
CK  
CARRY  
CLR QA QB QC QD  
CLR QA QB QC QD  
CLR QA QB QC QD  
OUTPUTS  
OUTPUTS  
OUTPUTS  
CLR  
CK  
10  
2007-10-01  
TC74VHC161,163F/FN/FT/FK  
Package Dimensions  
Weight: 0.18 g (typ.)  
11  
2007-10-01  
TC74VHC161,163F/FN/FT/FK  
Package Dimensions (Note)  
Note:  
This package is not available in Japan.  
Weight: 0.13 g (typ.)  
12  
2007-10-01  
TC74VHC161,163F/FN/FT/FK  
Package Dimensions  
Weight: 0.06 g (typ.)  
13  
2007-10-01  
TC74VHC161,163F/FN/FT/FK  
Package Dimensions  
Weight: 0.02 g (typ.)  
14  
2007-10-01  
TC74VHC161,163F/FN/FT/FK  
RESTRICTIONS ON PRODUCT USE  
20070701-EN GENERAL  
The information contained herein is subject to change without notice.  
TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor  
devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical  
stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of  
safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of  
such TOSHIBA products could cause loss of human life, bodily injury or damage to property.  
In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as  
set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and  
conditions set forth in the “Handling Guide for Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability  
Handbook” etc.  
The TOSHIBA products listed in this document are intended for usage in general electronics applications  
(computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances,  
etc.).These TOSHIBA products are neither intended nor warranted for usage in equipment that requires  
extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or  
bodily injury (“Unintended Usage”). Unintended Usage include atomic energy control instruments, airplane or  
spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments,  
medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in his  
document shall be made at the customer’s own risk.  
The products described in this document shall not be used or embedded to any downstream products of which  
manufacture, use and/or sale are prohibited under any applicable laws and regulations.  
The information contained herein is presented only as a guide for the applications of our products. No  
responsibility is assumed by TOSHIBA for any infringements of patents or other rights of the third parties which  
may result from its use. No license is granted by implication or otherwise under any patents or other rights of  
TOSHIBA or the third parties.  
Please contact your sales representative for product-by-product details in this document regarding RoHS  
compatibility. Please use these products in this document in compliance with all applicable laws and regulations  
that regulate the inclusion or use of controlled substances. Toshiba assumes no liability for damage or losses  
occurring as a result of noncompliance with applicable laws and regulations.  
15  
2007-10-01  

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