TB62269FTG [TOSHIBA]
IC STEPPER MOTOR CONTROLLER, Motion Control Electronics;
| 型号： | TB62269FTG |
| 厂家： | 
TOSHIBA |
| 描述： | IC STEPPER MOTOR CONTROLLER, Motion Control Electronics 电动机控制 CD |
| 文件： | 总27页 (文件大小：967K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TB62269FTG
TOSHIBA BiCD Integrated Circuit Silicon Monolithic
TB62269FTG
PWM method CLK-IN bipolar stepping motor driver
The TB62269FTG is a two-phase bipolar stepping motor driver using a PWM chopper.
Fabricated with the BiCD process, the TB62269FTG is rated at 40 V/1.8 A .
The internal voltage regulator allows control of the motor with a single
VM power supply.
Features
• Drive control is possible in a bipolar stepping motor at 1 chip.
•
PWM controlled constant-current drive
P-WQFN48-0707-0.50-003
• Allows full, half and quarter ,1/8,1/16,1/32 step resolutions.
•
•
Low on-resistance of output stage transistor is low by using BiCD process.
High Voltage and current (For specification, please refer to absolute
Weight:0.14g(Typ.)
maximum ratings and operation ranges)
•
•
•
•
•
Thermal shutdown (TSD)、over-current shutdown (ISD),
and power-on reset of VM power supply (POR)
Built-in regulator allows the TB62269FTG to function with only VM power supply.
Able to customize PWM signal frequency by external resistance/capacitor.
Packages TB62269FTG : (P-WQFN48-0707-0.50-003)
Note) Please be careful about thermal conditions during use.
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2014-3-18
TB62269FTG
Pin assignment
(Top View)
34
31
28
27
29
33
30
32
26 25
36 35
24
NC
37
38
39
NC
23 NC
L_OUT
22 GND
D_MODE0
21 OUT_B1-
40
41
42
GND
VREF_B
VREF_A
20
OUT_B2-
19 GND
18
TB62269FTG
GND
OSCM 43
17 OUT_A2-
16 OUT_A1-
44
45
46
47
48
CW/CCW
MO_OUT
15
GND
14 NC
13
D_MODE1
D_MODE2
NC
NC
3
6
9 12
10
11
1
4
7
2
5
8
※ Please mount the four corner pins of the QFN package and the exposed pad to the GND area of the PCB.
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2014-3-18
TB62269FTG
Block Diagram
L_OUT
D_MODE0
CW/CCW
VMR Detect
D_MODE1
VCC
VCC Voltage
Regulator
Step Decoder
(Input Logic)
D_MODE2
CLK_IN
ENABLE
Chopper OSC
OSC
RESET
OSCM
MO_OUT
Current Level Set
5bit D/A
(Angle Control)
VREF
VM
Torque Control
CR-CLK
Converter
Current Feedback (×2)
VRS1
RS COMP1
Output Control
(Mixed Decay Control)
RS
ISD
TSD
Output
(H-Bridge×2)
ENABLE
VMR
Detect
VM
Detection Circuit
Stepping Motor
Functional blocks/circuits/constants in the block chart etc. may be omitted or simplified for
explanatory purposes.
Application Notes
All the grounding wires of the TB62269FTG must run on the solder mask on the PCB and be externally
terminated at only one point. Also, a grounding method should be considered for efficient heat dissipation.
Careful attention should be paid to the layout of the output, VDD (VM) and GND traces, to avoid short circuits
across output pins or to the power supply or ground. If such a short circuit occurs, the TB62269FTG may be
permanently damaged.
Also, the utmost care should be taken for pattern designing and implementation of the TB62269FTG since it has
power supply pins (VM, RS, OUT, GND) through which a particularly large current may run. If these pins are
wired incorrectly, an operation error may occur or the TB62269FTG may be destroyed.
The logic input pins must also be wired correctly. Otherwise, the TB62269FTG may be damaged owing to a
current running through the IC that is larger than the specified current.
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TB62269FTG
Pin Function
TB62269FTG (QFN48)
Function explanation of terminal number 1 to 48
Pin
Pin
No.
Pin Name
NC
Function
Pin Name
NC
Function
No.
1
No-connect
An electrical angle leads on the rising edge of
25
No-connect
2
CLK_IN
the clock input. A motor rotation count depends 26
on the input frequency.
OUT_B2*
Bch positive driver output
3
4
5
6
7
8
9
ENABLE A/B channel output enable
27
28
29
30
31
32
33
OUT_B1*
NC
RESET
GND
Electric angle reset
Logic ground
No-connect
RS_B2*
RS_B1*
NC
Motor Bch current sense pin
NC
No-connect
RS_A1*
RS_A2*
NC
No-connect
Motor Ach current sense pin
No-connect
VM
Motor Power supply
No-connect
NC
Internal VCC regulator monitor pin
10 OUT_A1*
11 OUT_A2*
34
VCC
Ach positive driver output
35
36
37
38
39
40
41
42
43
44
45
46
47
48
NC
NC
No-connect
12
13
14
15
NC
NC
No-connect
No-connect
No-connect
NC
No-connect
NC
No-connect
L_OUT
Error detect signal output
GND
Motor power ground
D_MODE0 Step resolution mode control 0
16 OUT_A1-*
17 OUT_A2-*
GND
Logic ground
Ach negative driver output
VREF_B
VREF_A
OSCM
Tunes the current level for Bch motor drive.
Tunes the current level for Ach motor drive.
Oscillator pin for PWM chopper
Motor rotation: forward/reverse
Electric angle monitor
18
19
GND
GND
Motor power ground
Motor power ground
20 OUT_B2-*
21 OUT_B1-*
CW/CCW
MO_OUT
Bch negative driver output
22
23
24
GND
NC
Motor power ground
No-connect
D_MODE1 Step resolution mode control 1
D_MODE2 Step resolution mode control 2
NC
No-connect
NC
No-connect
・Please use the pin of NC with Open.
*Please connect the pins with the same names, at the nearest point of the device.
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TB62269FTG
CLK Function
The electrical angle leads one by one in the manner of the clocks. The clock signal is reflected to the electrical angle
on the rising edge.
CLK Input
Function
Rise
Fall
The electrical angle leads one by one on the rising edge.
Remains at the same position.
ENABLE Function
The ENABLE pin controls whether the current is allowed to flow through a given phase for a stepper motor drive.
This pin selects whether the motor is stopped in Off mode or activated. The pin must be fixed to Low at power-on or
power-down of the TB62269FTG.
ENABLE Input
Function
H
L
Output transistors are enabled (normal operation mode).
Output transistors are disabled (high impedance state).
CW/CCW Function
The CW/CCW pin controls the rotation direction of the motor. When set to ‘Clockwise’, the current of OUTA is
output first, with a phase difference of 90°. When set to ‘Counter clockwise”, the current of OUTB is output first with
a phase difference of 90°.
CW/CCW Input
Function
OUT (+)
OUT (-)
H
L
Clock-wise
H
L
L
Counter clock-wise
H
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TB62269FTG
Step resolution Mode Select Function
D_MODE0 D_MODE1 D_MODE2 Function
STANDBY MODE
OSCM, output transistors are disabled,full step setting
L
L
L
L
L
L
H
H
H
H
L
H
L
H
L
H
L
H
Full step
H
H
L
L
H
H
Half step(a)
Quarter step
Half step(b)
1/8 step
1/16 step
1/32 step
Change of D_MODE0, D_MODE1 and D_MODE2 recommends changing, after setting RESET to Low in the state of
an initial(MO_OUT = Low).
RESET Function
RESET Input Function
H
L
The electrical angle is reset.
Normal operation mode
Phase currents when RESET is applied are as follows:
In this case, the terminal MO_OUT becomes Low.
Step resolution A aspect
current
B aspect
current
Electric
Angle
Full step
Half step
Quarter step
1/8 step
100%
100%
71%
71%
71%
71%
100%
100%
71%
71%
71%
71%
45°
45°
45°
45°
45°
45°
1/16 step
1/32 step
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TB62269FTG
Output function of reset signal
The L_OUT pin will show “Low” level when an error occation(TSD/ISD) is detected.
VCC level
10kΩ
L_OUT
The LO is an open-drain output pin. LO pin needs to be pulled up to 3.3V/5.0V level for proper function. During regular operation,
the LO pin level will stay High(VCC level). When error detection (TSD, ISD) is applied, the LO pin will show Low (GND) level.
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TB62269FTG
Absolute Maximum Ratings (Ta = 25°C)
Characteristics
Symbol
Rating
Unit
Remarks
Motor power supply
Motor output voltage
-
-
VM
40
40
V
V
VOUT
Motor output current
Logic power supply
IOUT
1.8
A
(Note 1)
When
applied.
externally
VCC
VIN
6.0
6.0
V
V
Digital input voltage
-
MO,L_OUT output voltage
-
VMO,VL_OUT 6.0
V
MO,L_OUT Inflow current IMO,IL_OUT 30.0
mA
-
Power dissipation
PD
1.3
W
(Note 2)
-
Operating temperature
Storage temperature
Junction temperature
Topr
Tstr
-20 to 85
°C
-
-
-55 to 150 °C
150 °C
Tj(Max)
Note 1: As a guide, the maximum output current should be kept below 1.4 A per phase. The maximum output current
may be further limited in view of thermal considerations, depending on ambient temperature and board
conditions.
Note 2: Stand-alone (Ta =25°C)
When Ta exceeds 25°C, it is necessary to do the deleting with 10.4mW/°C.
Ta: Ambient temperature
Topr: Ambient temperature while the TB62269FTG is active
Tj: Junction temperature while the TB62269FTG is active. The maximum junction temperature is limited by the
thermal shutdown (TSD) circuitry. It is advisable to keep the maximum current below a certain level so that
the maximum junction temperature, Tj (MAX), will not exceed 120°C.
Caution）Absolute maximum ratings
The absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded, even
for a moment. Do not exceed any of these ratings.
Exceeding the rating (s) may cause device breakdown, damage or deterioration, and may result in injury by
explosion or combustion.
The value of even one parameter of the absolute maximum ratings should not be exceeded under any
circumstances. The TB62269FTG does not have overvoltage detection circuit. Therefore, the device is damaged
if a voltage exceeding its rated maximum is applied.
All voltage ratings, including supply voltages, must always be followed. The other notes and considerations
described later should also be referred to.
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TB62269FTG
Operation Ranges（Ta=0 to 85°C）
Characteristics
Symbol
VM
Min
Typ.
Max
Unit
Remarks
Motor power supply
Motor output current
10.0
-
24.0
1.4
38.0
1.8
V
A
1 phase, (Note 1)
IOUT
Logic input High Level
VIN(Ｈ)
VIN(Ｌ)
2.0
-
-
5.5
1.0
V
V
Digital input voltage
-0.4
Logic input Low Level
Pull-up Voltage
MO,L_OUT
voltage
output
pin
VMO,VL_OUT
-
3.3
5.5
V
Clock input frequency
Chopper frequency
Vref reference voltage
fCLK
fchop
Vref
-
-
100
-
100
150
3.6
kHz
kHz
V
40
GND
Sensing resistance contact
button voltage
VM terminal standard,
VRS
0.0
±1.0
±1.5
V
（Note 2）
Note 1: Maximum current for actual usage may be limited by the operating circumstances such as operating conditions
(exciting mode, operating time, and so on), ambient temperature, and heat conditions (board condition and so on).
Note 2: Maximum voltage of VRS must not be exceeded the absolute maximum rating.
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TB62269FTG
Electrical Characteristics 1 (Ta = 25°C, VM = 24V, unless otherwise specified)
Characteristics
Symbol
Test Condition
Min
Typ.
Max
Unit
V
VIH
VIL
2.0
0
3.3
-
5.5
0.8
300
Digital input voltage
Digital input pins (Note)
Input hysteresis voltage VIN(HYS) Digital input pins
(Note)
100
200
mV
µA
VIN = 5 V at the digital input pins
High
Low
IIN(H)
35
-
50
-
75
under test
Digital input
current
V IN = 0 V at the digital input pins
IIN(L)
1.0
µA
under test
IOH = -24 mA when the output is
High
VOH(MO)
High
Low
2.4
-
-
-
-
V
V
MO output
voltage
IOL = 24 mA when the output is Low
0.5
VOL(MO)
IM1
Outputs open, In standby mode
Outputs open, ENABLE = Low
Outputs open (full step)
-
-
-
2.5
4.0
5
3.5
5.5
7
mA
mA
mA
IM2
Supply current
IM3
High-side
Low-side
IOH
IOL
-
-
-
1
-
µA
µA
Output
leakage
current
VRS = VM = 40 V, VOUT = 0 V
VRS = VM = VOUT = 40 V
1
Channel-to-channel
differential
ΔIOUT1 Channel-to-channel error
-5
-5
0
0
5
5
%
%
Output current error
relative to the
predetermined value
ΔIOUT2 IOUT = 1.0A
VRS = VM = 24V,
RS pin current
IRS
DMODE_0,1,2 = L
ENABLE = L
0
-
-
27.0
1.2
µA
Drain-source
ON-resistance of the
output transistors
(upper and lower sum)
IOUT =2.0A,
Tj = 25°C
0.8
RON(D-S)
Ω
Note: VIN (H) is defined as the VIN voltage that causes the outputs (OUTA,OUTB) to change when a pin under test
is gradually raised from 0 V. V IN (L) is defined as the V IN voltage that causes the outputs (OUTA, OUTB) to
change when the pin is then gradually lowered from 5V. The difference between V IN (H) and V IN (L) is
defined as the V IN (HYS).
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TB62269FTG
Electrical Characteristics 2 (Ta = 25°C, VM = 24V, unless otherwise specified)
Characteristics
Vref input current
Symbol
Iref
Test Condition
Vref = 3.0 V
Vref = 2.0 V
Min
-
Typ.
0
Max
1.0
Unit
μA
－
Vref
(GAIN)
Vref decay rate
TSD threshold
1/4.8
140
1/5.0
150
1/5.2
170
(Note 1))
TjTSD
-
°C
Modes other than STANDBY
MODE
VM recovery voltage
VMR
ISD
7.0
2.0
8.0
3.0
9.0
4.0
V
A
V
Overcurrent trip threshold(Note 2)
-
Power-supply voltage for internal
circuit operation
VCC
ICC=5.0mA
4.75
5.00
5.25
Note 1: Thermal shutdown (TSD) circuitry
When the junction temperature of the device reaches the threshold, the TSD circuitry is tripped, causing the
internal reset circuitry to turn off the output transistors.The TSD circuitry is tripped at a temperature between
140°C (min) and 170°C (max). Once tripped, the TSD circuitry keeps the output transistors off until the TSD
circuitry is released. The TSD status is released once the TB62269FTG is rebooted or all the
D_MODEpins(D_MODE0,1,2) are switched to Low(set to STANDBY status). The TSD circuitry does not
necessarily guarantee the complete safety of the device; therefore do not use the TSD circuitry actively.
Note 2: Overcurrent shutdown (ISD) circuitry
When the output current reaches the threshold, the ISD circuitry is tripped, causing the internal reset circuitry
to turn off the output transistors.To prevent the ISD circuitry from being tripped owing to switching noise, it has
a masking time of four CR oscillator cycles. Once tripped, it takes a maximum of four cycles to exit ISD mode
and resume normal operation.The ISD circuitry remains active until all the D_MODE(DMODE_0,1,2) pins are
switched to Low or the TB62269FTG is rebooted. The TB62269FTG remains in Standby mode while in ISD
mode.
Note 3: When the power supply voltage (VCC) for operating internal circuit is divided by the external resistor and used
as Vref input voltage, the accuracy of the output current setting value becomes ±8% together with the VCC
output voltage accuracy and the Vref decay ratio accuracy.
Note 4: Even when the logic input signal is input under the condition that the VM voltage is not supplied, the
electromotive force and the leakage current by the signal input are not generated. However, before VM is
rebooted, logic input signal should be controlled not to let the motor operating by rebooting VM.
Back-EMF
While a motor is rotating, there is a timing at which power is fed back to the power supply. At that timing, the
motor current is fed back to the power supply owing to the effect of the motor back-EMF.
If the power supply does not have enough sink capability, the power supply and output pins of the device might
rise above the rated voltages. The magnitude of the motor back-EMF varies with usage conditions and motor
characteristics. It must be fully verified that there is no risk that the TB62269FTG or other components will be
damaged or fail owing to the motor back-EMF.
Cautions on Overcurrent Shutdown (ISD) and Thermal Shutdown (TSD)
The ISD and TSD circuits are only intended to provide temporary protection against irregular conditions such as
an output short circuit; they do not necessarily guarantee complete IC safety.
If the device is used beyond the specified operating ranges, these circuits may not operate properly: then the
device may be damaged owing to an output short circuit.
The ISD circuit is only intended to provide temporary protection against an output short circuit. If such a
condition persists for a long time, the device may be damaged owing to overstress. Overcurrent conditions must
be removed immediately by external hardware.
IC Mounting
Do not insert devices in the wrong orientation or incorrectly. Otherwise, it may cause device breakdown, damage
and/or deterioration.
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TB62269FTG
AC Electrical Characteristics (Ta = 25°C, VM = 24V, 6.8 mH/5.7Ω)
Characteristics
Symbol
fCLK
Test Condition
fOSC=1600kHz
Min
1.0
Typ.
Max
100
-
Unit
kHz
Logic input frequency
-
-
The input High period which
carries out a High output
High
Low
300
TCLK(H)
TCLK(L)
Width of minimum
clock pulse
ns
The input Low period which
carries out a Low output
250
-
-
tr
-
150
200
150
250
ns
ns
ns
ns
tf
-
100
200
Output transistor
Switching characteristic
tpLH(CLK)
tpHL(CLK)
CLK Signal to OUT
CLK Signal to OUT
-
-
1000
1500
-
-
Blanking time for current
spike prevention
tBLANK
fosc
Iout = 1.0A
450
700
950
ns
Cosc = 270 pF,
Rosc = 3.6 kΩ
OSC_M oscillation
frequency
1200
1600
2000
kHz
Chopper frequency range
Chopper setting frequency
ISD masking time
fchop(RANGE) Output operation (Iout = 1.0A)
30
-
100
100
4
150
kHz
kHz
Output operation (Iout = 1.0A)
fchop
-
-
fOSC = 1600kHz
tISD(Mask)
tISD
After ISD threshold is
exceeded owing to an output
short circuit to power or
ground
Mask time is counted by CLK
of OSCM.
-
-
ISD on-time
-
-
8
Timing Charts of Output Transistors Switching
90%
1/fCLK
CLK
50%
10%
50%
tpLH
tpHL
VM
90%
90%
Output voltage
50%
50%
10%
10%
GND
tr
tf
Timing charts may be simplified for explanatory purposes.
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TB62269FTG
Mixed Decay Mode /Detecting zero point
CR pin
f
chop
Internal CLK
waveform
DECAY MODE 1
Setting current
NF
37.5%
MIXED
DECAY
MODE
MDT
CHARGE MODE → NF: Reach setting current → SLOW MODE
→ MIXED DECAY TIMMING → FAST MODE → Monitoring
current → (In case setting current > Outputting current) CHARGE
MODE
RNF
Fast
Charge
Slow
Charge
Slow
Fast
Note
Iout=0
Hi-Z
Note: When the motor current reaches the 0A level, the output transistor will turn to “Hi-Z” status.
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TB62269FTG
V
V
S
V
M
Output TransiMstor Operating Modes
M
R
RS
R
R
RS
RS
R
Pin
R
Pin
R Pin
S
S
U1
U2
U1
U2
U1
U2
OFF
OFF
OFF
OFF
ON
ON
Load
Load
Load
L1
L2
L1
L2
L1
L2
OFF
ON
ON
ON
ON
OFF
PGND
PGND
PGND
Charge Mode
A current flows into the motor
coil.
Slow-Decay Mode
Fast-Decay Mode
The energy of the motor coil
is fed back to the power
A current circulates around
the motor coil and this device.
Output transistor function
U2
CLK
U1
L1
L2
Charge
ON
OFF
OFF
OFF
OFF
ON
OFF
ON
ON
ON
Slow-decay Mode
Fast-decay Mode
ON
OFF
Note: This table shows an example of when the current flows as indicated by the arrows in the figures shown above.
If the current flows in the opposite direction, refer to the following table.
U2
CLK
U1
L1
L2
Charge
OFF
OFF
ON
ON
OFF
OFF
ON
ON
OFF
ON
Slow-decay Mode
Fast-decay Mode
OFF
ON
The TB62269FTG switches among Charge, Slow-Decay and Fast-Decay modes automatically for constant-current
control.
The equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes.
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TB62269FTG
Calculation of the Setting Output Current
For PWM constant-current control, the TB62269FTG uses a clock generated by the CR oscillator. The peak output current
can be set via the current-sensing resistor (RRS) and the reference voltage (Vref), as follows:
Vref(V)
Iout(Max) = Vref(gain) x
RRS(Ω)
Vref(gain): Vref decay ratio is 1 / 5.0 (typ.).
Ex.): In case of 100% setting,
When Vref = 3.0 V, Torque = 100%, and RS = 0.51Ω,
constant current output of the motor (peak current) is calculated as follows;
Iout = 3.0V / 5.0 / 0.51Ω= 1.18 A.
Calculation of the OSCM oscillation frequency (chopper reference frequency)
OSCM oscillation frequency (fOSCM) and chopper frequency (fchop) are computable in the following expressions.
fOSCM=1/[0.56x{Cx(R1+500)}]
fchop = fOSCM / 16
………C, R1: External constant for OSCM (C=270pF, R1=3.6kΩ)
Because the loss of the gate in IC rises, generation of heat grows though wavy reproducibility goes up because the
pulsating flow of the current decreases when the chopper frequency is raised.
There is a possibility of the current pulsating flow increasing though a decrease in generation of heat can be
expected by lowering the chopper frequency.
The thing set within the range of the frequency from 50 to about 100 kHz based on the frequency generally of about
70 kHz is recommended.
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2014-3-18
TB62269FTG
IC Power Consumption
The power consumed by the TB62269FTG is approximately the sum of the following; 1) the power consumed by the
output transistors, and 2) the power consumed by the digital logic portion.
1. Power consumption of output transistors using the Ron (upper + lower) value of 1.0 Ω
The power of the output transistors is consumed by upper and lower H-bridge.
The power consumed by each H-bridge is given by:
P (out) = Iout (A) × VDS (V) = Iout (A)^2 × Ron (Ω)...............................................................................(1)
In full step mode (in which two phases have a phase difference of 90°), the average power consumption in the output
transistors is calculated as follows:
Ron = 1.0Ω, Iout (peak: Max) = 1.0 A, VM = 24 V
P (out) = 2 (Tr) × 1.0 (A)^2 × 1.0(Ω).......................................................................................................(2)
= 2.0 (W)
2. Power consumption of logic portion and IM domain
The power consumption of logic portion and the IM domain is calculated separately for normal operation and standby
modes.
I (IM3) = 5 mA (typ.)
I (IM2) = 3.5 mA (typ.)
: Normal operation mode/1axis
: Standby mode
The output domain is connected to VM (24V). It consists of the digital logic connected to VM (24 V) and the network
affected by the switching of the output transistors.
The total power consumed by IM can be estimated as:
P (IM) = 24 (V) × 0.005 (A) ....................................................................................................................(3)
= 0.12 (W)
3. Power consumption
Hence, the total power consumption of the TB62269FTG is:
P = P (out) + P (IM) = 2.12 (W)
The standby power consumption per axis is given by:
P (Standby) = 24 (V) × 0.0035 (A) = 0.084 (W)
Board design should be fully verified, taking thermal dissipation into consideration.
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2014-3-18
TB62269FTG
Timing Charts of CLK, Output Current and MO Output
Timing charts may be simplified for explanatory purposes.
Clock input
A phase
Full step
B phase
MO output
A phase
Half step
B phase
MO output
A phase
Quarter step
B phase
MO output
MO output shown in the timing chart is when the MO pin is pulled up.
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Phase Sequences
Full step resolution
150
100
50
CW
Initialize position
MO output: Low
0
−150 −100
−50
0
50
100
150
−50
−100
−150
CCW
A Phase
Half Step resolution
150
100
50
CW
Initialize position
MO output: Low
0
0
−150 −100
−50
50
100
150
−50
CCW
−100
−150
A Phase
Quarter Step resolution
150
100
50
CW
0
Initialize position
MO output: Low
−150 −100
−50
0
50
100
150
−50
−100
−150
CCW
A Phase
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Half Step resolution（ｂ）
CLK
A Phase
100％
B Phase
71％
0％
-71％
-100％
MO
100
71
IB(%)
100
71
0
IA(%)
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1/8 Step resolution
CLK
100%
98%
92%
83%
71%
56%
38%
20%
0%
-20%
-38%
-56%
-71%
-83%
-92%
-98%
-100%
MO
100
71
IB(%)
100
71
0
IA(%)
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1/16 Step resolution
CLK
100％
71％
0％
-71％
-100％
MO
100
98
96
92
88
83
77
71
63
56
IB(%)
47
38
29
20
10
0
10
20
29
38
47
56
63
71 77 83 88 92 96 100
98
IA(%)
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1/32 Step resolution
CLK
100%
0％
-100%
MO
100
98
96
92
88
83
77
71
63
56
IB(%)
47
38
29
20
10
0
10
20
29
38
47
56
63
71 77 83 88 92 96 100
98
IA(%)
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Example Application Circuits
The values shown in the following figure are typical values. For input conditions, see the Operating Ranges.
L_OUT
5V
D_MODE0
0V
GND
GND
OUT_B1-
VREF_B
VREF_A
OSCM
OUT_B2-
GND
M
GND
5V
OUT_A2-
CW/CCW
MO_OUT
0V
OUT_A1-
5V
5V
5V
D_MODE1
D_MODE2
GND
0V
0V
5V
5V
5V
0V
0V
0V
Note: I will recommend the addition of a capacitor if necessary. The GND wiring must become one point as much as
possible-earth.
The example of an applied circuit is for reference, and enough evaluation should be done before the
mass-production design.
Moreover, it is not the one to permit the use of the industrial property.
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Package Dimensions
P-WQFN48-0707-0.50-003
Unit: mm
.
Foot Pattern Example (double-sided board)
Surface
Bottom
White dots: 0.2mm through holes
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Notes on Contents
Block Diagrams
Some of the functional blocks, circuits, or constants in the block diagram may be omitted or simplified for
explanatory purposes.
Equivalent Circuits
The equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes.
Timing Charts
Timing charts may be simplified for explanatory purposes.
Application Circuits
The application circuits shown in this document are provided for reference purposes only. Thorough evaluation is
required, especially at the mass-production design stage.
Toshiba does not grant any license to any industrial property rights by providing these examples of application
circuits.
Test Circuits
Components in the test circuits are used only to obtain and confirm the device characteristics. These components
and circuits are not guaranteed to prevent malfunction or failure from occurring in the application equipment.
IC Usage Considerations
Notes on handling of ICs
(1) The absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded,
even for a moment. Do not exceed any of these ratings.Exceeding the rating(s) may cause device
breakdown, damage or deterioration, and may result in injury by explosion or combustion.
(2)
Use an appropriate power supply fuse to ensure that a large current does not continuously flow in the
case of overcurrent and/or IC failure. The IC will fully break down when used under conditions that
exceed its absolute maximum ratings, when the wiring is routed improperly or when an abnormal
pulse noise occurs from the wiring or load, causing a large current to continuously flow and the
breakdown can lead to smoke or ignition. To minimize the effects of the flow of a large current in the
case of breakdown, appropriate settings, such as fuse capacity, fusing time and insertion circuit
location, are required.
(3) If your design includes an inductive load such as a motor coil, incorporate a protection circuit into the
design to prevent device malfunction or breakdown caused by the current resulting from the inrush
current at power ON or the negative current resulting from the back electromotive force at power OFF.
IC breakdown may cause injury, smoke or ignition. Use a stable power supply with ICs with built-in
protection functions. If the power supply is unstable, the protection function may not operate, causing
IC breakdown. IC breakdown may cause injury, smoke or ignition.
(4) Do not insert devices in the wrong orientation or incorrectly. Make sure that the positive and negative
terminals of power supplies are connected properly.
Otherwise, the current or power consumption may exceed the absolute maximum rating, and
exceeding the rating(s) may cause device breakdown, damage or deterioration, and may result in
injury by explosion or combustion.
In addition, do not use any device inserted in the wrong orientation or incorrectly to which current is
applied even just once.
(5) Carefully select external components (such as inputs and negative feedback capacitors) and load
components (such as speakers), for example, power amp and regulator.
If there is a large amount of leakage current such as from input or negative feedback condenser, the IC
output DC voltage will increase. If this output voltage is connected to a speaker with low input
withstand voltage, overcurrent or IC failure may cause smoke or ignition. (The overcurrent may cause
smoke or ignition from the IC itself.) In particular, please pay attention when using a Bridge Tied Load
(BTL) connection-type IC that inputs output DC voltage to a speaker directly.
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Points to remember on handling of ICs
Overcurrent detection Circuit
Overcurrent detection circuits (referred to as current limiter circuits) do not necessarily protect ICs under all
circumstances. If the overcurrent detection circuits operate against the overcurrent, clear the overcurrent status
immediately.
Depending on the method of use and usage conditions, exceeding absolute maximum ratings may cause the
overcurrent detection circuit to operate improperly or IC breakdown may occur before operation. In addition,
depending on the method of use and usage conditions, if overcurrent continues to flow for a long time after operation,
the IC may generate heat resulting in breakdown.
Thermal Shutdown Circuit
Thermal shutdown circuits do not necessarily protect ICs under all circumstances. If the thermal shutdown circuits
operate against the over-temperature, clear the heat generation status immediately.
Depending on the method of use and usage conditions, exceeding absolute maximum ratings may cause the thermal
shutdown circuit to operate improperly or IC breakdown to occur before operation.
Heat Radiation Design
When using an IC with large current flow such as power amp, regulator or driver, design the device so that heat is
appropriately radiated, in order not to exceed the specified junction temperature (TJ) at any time or under any
condition. These ICs generate heat even during normal use. An inadequate IC heat radiation design can lead to
decrease in IC life, deterioration of IC characteristics or IC breakdown. In addition, when designing the device, take
into consideration the effect of IC heat radiation with peripheral components.
Back-EMF
When a motor rotates in the reverse direction, stops or slows abruptly, current flows back to the motor’s power
supply owing to the effect of back-EMF. If the current sink capability of the power supply is small, the device’s motor
power supply and output pins might be exposed to conditions beyond the absolute maximum ratings. To avoid this
problem, take the effect of back-EMF into consideration in system design.
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RESTRICTIONS ON PRODUCT USE
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in this document, and related hardware, software and systems (collectively "Product") without notice.
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Though TOSHIBA works continually to improve Product's quality and reliability, Product can malfunction or fail. Customers are
responsible for complying with safety standards and for providing adequate designs and safeguards for their hardware, software and
systems which minimize risk and avoid situations in which a malfunction or failure of Product could cause loss of human life, bodily
injury or damage to property, including data loss or corruption. Before customers use the Product, create designs including the Product,
or incorporate the Product into their own applications, customers must also refer to and comply with (a) the latest versions of all
relevant TOSHIBA information, including without limitation, this document, the specifications, the data sheets and application notes for
Product and the precautions and conditions set forth in the "TOSHIBA Semiconductor Reliability Handbook" and (b) the instructions for
the application with which the Product will be used with or for. Customers are solely responsible for all aspects of their own product
design or applications, including but not limited to (a) determining the appropriateness of the use of this Product in such design or
applications; (b) evaluating and determining the applicability of any information contained in this document, or in charts, diagrams,
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such designs and applications. TOSHIBA ASSUMES NO LIABILITY FOR CUSTOMERS' PRODUCT DESIGN OR APPLICATIONS.
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