UC3847N [TI]
Current Mode PWM Controller; 电流模式PWM控制器型号: | UC3847N |
厂家: | TEXAS INSTRUMENTS |
描述: | Current Mode PWM Controller |
文件: | 总10页 (文件大小:644K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
application
INFO
UC1846/7
UC2846/7
UC3846/7
available
Current Mode PWM Controller
FEATURES
DESCRIPTION
•
Automatic Feed Forward Compensation
The UC1846/7 family of control ICs provides all of the necessary
features to implement fixed frequency, current mode control
schemes while maintaining a minimum external parts count. The
superior performance of this technique can be measured in im-
proved line regulation, enhanced load response characteristics, and
a simpler, easier-to-design control loop. Topological advantages in-
clude inherent pulse-by-pulse current limiting capability, automatic
symmetry correction for push-pull converters, and the ability to par-
allel “power modules" while maintaining equal current sharing.
•
Programmable Pulse-by-Pulse Current
Limiting
•
Automatic Symmetry Correction in Push-pull
Configuration
•
•
Enhanced Load Response Characteristics
Parallel Operation Capability for Modular
Power Systems
Protection circuitry includes built-in under-voltage lockout and pro-
grammable current limit in addition to soft start capability. A shut-
down function is also available which can initiate either a complete
shutdown with automatic restart or latch the supply off.
•
Differential Current Sense Amplifier with
Wide Common Mode Range
•
•
•
•
•
•
•
Double Pulse Suppression
500mA (Peak) Totem-pole Outputs
1% Bandgap Reference
Under-voltage Lockout
Soft Start Capability
Other features include fully latched operation, double pulse sup-
pression, deadline adjust capability, and a 1% trimmed bandgap
reference.
The UC1846 features low outputs in the OFF state, while the
UC1847 features high outputs in the OFF state.
Shutdown Terminal
500kHZ Operation
BLOCK DIAGRAM
5.1 V
VIN 15
REFERENCE
REGULATOR
2
VREF
13 VC
SYNC 10
UVLO
LOCKOUT
F/F
RT
CT
9
8
Q
11 A OUT
T
OSC
Q
UC1846
Output Stage
C/S-
3
4
COMP
0.5 V
X3
UC1847
Output Inverted
S
S
R
Q
C/S+
14 B OUT
+
0.5 mA
12 GND
NI
5
6
E/A
INV
CURRENT
LIMIT ADJUST
1
16 SHUTDOWN
COMP
7
350 mV
6 k
UDG-02057
SLUS352A - JANUARY 1997 - REVISED MARCH 2002
UC1846/7
UC2846/7
UC3846/7
ABSOLUTE MAXIMUM RATINGS (Note 1)
Supply Voltage (Pin 15) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +40V
Collector Supply Voltage (Pin 13) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +40V
Output Current, Source or Sink (Pins 11, 14) . . . . . . . . . . . . . . . . . . . . . . . 500mA
Analog Inputs (Pins 3, 4, 5, 6, 16). . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +VIN
Reference Output Current (Pin 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -30mA
Sync Output Current (Pin 10). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -5mA
Error Amplifier Output Current (Pin 7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -5mA
Soft Start Sink Current (Pin 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50mA
Oscillator Charging Current (Pin 9) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA
Power Dissipation at TA=25°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000mW
Power Dissipation at TC=25°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2000mW
Storage Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65°C to +150°C
Lead Temperature (soldering, 10 seconds) . . . . . . . . . . . . . . . . . . . . . . . . +300°C
Note 1. All voltages are with respect to Ground, Pin 13. Currents are positive into,
negative out of the speficied terminal. Consult Packaging Section of Databook for
thermal limitations and considerations of packages. Pin numbers refer to DIL and
SOIC packages only.
CONNECTION DIAGRAMS
DIL-16, SOIC-16
PLCC-20, LCC-20
(TOP VIEW)
Q, L Packages
PACKAGE PIN FUNCTION
(TOP VIEW)
FUNCTION
PIN
J or N Package, DW Package
N/C
1
C/L SS
VREF
C/S-
C/S+
N/C
2
3
4
5
6
E/A+
E/A-
Comp
CT
N/C
RT
Sync
A Out
Gnd
N/C
VC
7
8
9
10
11
12
13
14
15
16
17
18
19
20
B Out
VIN
Shutdown
(Unless otherwise stated, these specifications apply for TA=-55°C to +125°C for
UC1846/7; -40°C to +85°C for the UC2846/7; and 0°C to +70°C for the UC3846/7;
VIN=15V, RT=10k, CT=4.7nF, TA=TJ.)
ELECTRICAL CHARACTERISTICS
UC1846/UC1847
UC3846/UC3847
PARAMETER
TEST CONDITIONS
UC2846/UC2847
MIN. TYP. MAX. MIN. TYP. MAX. UNITS
Reference Section
Output Voltage
TJ=25°C, IO=1mA
5.05
5.10
5
5.15
20
5.00
5.10
5
5.20
20
V
mV
mV
mV/°C
V
Line Regulation
VIN=8V to 40V
Load Regulation
IL=1mA to 10mA
3
15
3
15
Temperature Stability
Total Output Variation
Output Noise Voltage
Long Term Stability
Over Operating Range, (Note 2)
Line, Load, and Temperature (Note 2)
10Hz ≤ f ≤10kHz, TJ=25°C (Note 2)
TJ=125°C, 1000 Hrs. (Note 2)
0.4
0.4
5.00
-10
5.20
4.95
-10
5.25
100
5
100
5
µV
mV
mA
Short Circuit Output Current VREF=0V
-45
-45
2
UC1846/7
UC2846/7
UC3846/7
(Unless otherwise stated, these specifications apply for TA=-55°C to +125°C for UC1846/7;
-40°C to +85°C for the UC2846/7; and 0°C to +70°C for the UC3846/7; VIN=15V, RT=10k,
CT=4.7nF, TA=TJ.)
ELECTRICAL
CHARACTERISTICS (cont.)
UC1846/UC1847
UC3846/UC3847
PARAMETER
TEST CONDITIONS
UC2846/UC2847
MIN. TYP. MAX. MIN. TYP. MAX. UNITS
Oscillator Section
Initial Accuracy
TJ=25°C
VIN=8V to 40V
39
43
-1
47
2
39
43
-1
47
2
kHz
%
%
V
Voltage Stability
Temperature Stability
Sync Output High Level
Sync Output Low Level
Sync Input High Level
Sync Input Low Level
Sync Input Current
Error Amp Section
Input Offset Voltage
Input Bias Current
Input Offset Current
Common Mode Range
Open Loop Voltage Gain
Unity Gain Bandwidth
CMRR
Over Operating Range (Note 2)
-1
-1
3.9
3.9
4.35
2.3
3.9
3.9
4.35
2.3
2.5
2.5
V
Pin 8=0V
V
Pin 8=0V
2.5
1.5
2.5
1.5
V
Sync Voltage=3.9V, Pin 8=0V
1.3
1.3
mA
0.5
-0.6
40
5
-1
0.5
-0.6
40
10
-2
mV
µA
nA
V
250
VIN-2V
250
VIN=8V to 40V
0
80
0.7
75
80
2
0
80
0.7
75
80
2
VIN-2V
∆VO=1.2 to 3V, VCM=2V
TJ=25°C (Note 2)
105
1.0
100
105
6
105
1.0
100
105
6
dB
MHz
dB
dB
mA
mA
V
VCM=0V to 38V, VIN=40V
VIN=8V to 40V
PSRR
Output Sink Current
Output Source Current
VID=-15mV to -5V, VPIN 7=1.2V
VID=15mV to 5V, VPIN 7=2.5V
-0.4
4.3
-0.5
4.6
0.7
-0.4
4.3
-0.5
4.6
0.7
High Level Output Voltage RL=(Pin 7) 15kΩ
Low Level Output Voltage
1
1
V
Current Sense Amplifier Section
Amplifier Gain
VPIN 3=0V, Pin 1 Open (Notes 3 & 4)
2.5
1.1
2.75
3.0
2.5
1.1
2.75
3.0
V
Maximum Differential Input Pin 1 Open (Note 3)
Signal (VPIN 4-VPIN 3)
Input Offset Voltage
CMRR
RL (Pin 7)=15kW
1.2
5
1.2
5
V
mV
dB
dB
µA
µA
V
VPIN 1=0.5V, Pin 7 Open (Note 3)
VCM=1V to 12V
25
25
60
60
83
60
60
83
PSRR
VIN=8V to 40V
84
84
Input Bias Current
Input Offset Current
Input Common Mode Range
Delay to Outputs
VPIN 1=0.5V, Pin 7 Open (Note 3)
VPIN 1=0.5V, Pin 7 Open (Note 3)
-2.5
0.08
-10
1
-2.5
0.08
-10
1
0
VIN-3
500
0
VIN-3
500
TJ=25°C, (Note 2)
200
200
ns
Current Limit Adjust Section
Current Limit Offset
VPIN 3=0V, VPIN 4=0V, Pin 7 Open
(Note 3)
0.45
0.5
-10
0.55
-30
0.45
0.5
-10
0.55
-30
V
Input Bias Current
Shutdown Terminal Section
Threshold Voltage
VPIN 5=VREF, VPIN 6=0V
µA
250
0
350
1.5
400
VIN
250
0
350
1.5
400
VIN
mV
V
Input Voltage Range
Minimum Latching Current (Note 6)
(IPIN 1)
3.0
3.0
mA
3
UC1846/7
UC2846/7
UC3846/7
(Unless otherwise stated, these specifications apply for TA=-55°C to +125°C for UC1846/7;
-40°C to +85°C for the UC2846/7; and 0°C to +70°C for the UC3846/7; VIN=15V, RT=10k,
CT=4.7nF, TA=TJ.)
ELECTRICAL
CHARACTERISTICS (cont.)
UC1846/UC1847
UC3846/UC3847
PARAMETER
TEST CONDITIONS
UC2846/UC2847
MIN. TYP. MAX. MIN. TYP. MAX. UNITS
Shutdown Terminal Section (cont.)
Maximum Non-Latching
Current (IPIN 1)
(Note 7)
1.5
0.8
1.5
0.8
mA
ns
Delay to Outputs
TJ=25°C (Note 2)
300
600
300
600
Output Section
Collector-Emitter Voltage
40
40
V
µA
V
Collector Leakage Current VC=40V (Note 5)
200
0.4
2.1
200
0.4
2.1
Output Low Level
ISINK=20mA
0.1
0.4
0.1
0.4
ISINK=100mA
V
Output High Level
ISOURCE=20mA
13
12
13.5
13.5
50
13
12
13.5
13.5
50
V
ISOURCE=100mA
V
Rise Time
Fall Time
CL=1nF, TJ=25°C (Note 2)
CL=1nF, TJ=25°C (Note 2)
300
300
300
300
ns
ns
50
50
Under-Voltage Lockout Section
Start-Up Threshold
7.7
8.0
7.7
8.0
V
V
Threshold Hysteresis
Total Standby Current
Supply Current
0.75
0.75
17
21
17
21
mA
Note 2. These parameters, although guaranteed over the recommended operating conditions, are not 100% tested in production.
Note 3. Parameter measured at trip point of latch with VPIN 5 = VREF, VPIN 6 = 0V.
∆VPIN 7
∆VPIN 4
Note 4. Amplifier gain defined as: G =
;
VPIN4 = 0 to 1.0V
Note 5. Applies to UC1846/UC2846/UC3846 only due to polarity of outputs.
Note 6. Current into Pin 1 guaranteed to latch circuit in shutdown state.
Note 7. Current into Pin 1 guaranteed not to latch circuit in shutdown state.
APPLICATIONS DATA
Oscillator Circuit
ID
3.6
RT (kΩ)
Output deadtime is determined by the external capacitor, CT, according to the formula: τd (µs) =145CT (µf )
.
ID -
ID = Oscillator discharge current at 25°C is typically 7.5.
For large values of RT: τd (µs) ≈145CT (µf ).
2.2
Oscillator frequency is approximated by the formula:fT (kHz) ≈
.
RT (kΩ) •CT (µf )
4
UC1846/7
UC2846/7
UC3846/7
APPLICATIONS DATA (cont.)
Error Amp Gain and Phase vs Frequency
Error Amp Output Configuration
Error Amp Open-Logic D.C. Gain vs Load Resistance
Parallel Operation
5
UC1846/7
UC2846/7
UC3846/7
APPLICATIONS DATA (cont.)
Pulse by Pulse Current Limiting
R2 VREF
−0.5
R1 + R2
Peak Current (IS) is determined by the formula:IS =
3RS
Soft Start and Shutdown /Restart Functions
6
UC1846/7
UC2846/7
UC3846/7
APPLICATIONS DATA (cont.)
Current Sense Amp Connection
A small RC filter may be required in some applications to reduce switch transients.
Differential input allows remote, noise free sensing.
UC1846 Open Loop Test Circuit
7
PACKAGE OPTION ADDENDUM
www.ti.com
2-May-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
LCCC
CDIP
LCCC
CDIP
CDIP
CDIP
CDIP
CDIP
CDIP
CDIP
LCCC
LCCC
CDIP
CDIP
LCCC
LCCC
SOIC
SOIC
CDIP
PDIP
PLCC
PLCC
SOIC
SOIC
PDIP
SOIC
SOIC
CDIP
PDIP
PLCC
PLCC
SOIC
SOIC
CDIP
PDIP
Drawing
FK
J
5962-86806012A
5962-8680601EA
5962-8680601V2A
5962-8680601VEA
UC1846J
ACTIVE
ACTIVE
20
16
20
16
16
16
16
16
16
16
20
20
16
16
20
20
16
16
16
16
20
20
16
16
16
16
16
16
16
20
20
16
16
16
16
1
1
1
1
1
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
POST-PLATE Level-NC-NC-NC
A42 SNPB
Call TI
Level-NC-NC-NC
Level-NC-NC-NC
Level-NC-NC-NC
Level-NC-NC-NC
Call TI
ACTIVE
FK
J
ACTIVE
Call TI
ACTIVE
J
A42 SNPB
Call TI
UC1846J/80257
UC1846J/80364
UC1846J/80619
UC1846J883B
UC1846JQMLV
UC1846L883B
UC1846LQMLV
UC1847J
OBSOLETE
OBSOLETE
OBSOLETE
ACTIVE
J
J
Call TI
Call TI
J
Call TI
Call TI
J
1
1
A42 SNPB
Call TI
Level-NC-NC-NC
Call TI
ACTIVE
J
ACTIVE
FK
FK
J
POST-PLATE Level-NC-NC-NC
ACTIVE
Call TI
Call TI
Call TI
Call TI
Call TI
Call TI
Call TI
Call TI
Call TI
Call TI
OBSOLETE
OBSOLETE
OBSOLETE
OBSOLETE
ACTIVE
UC1847J883B
UC1847L
J
FK
FK
DW
DW
J
UC1847L883B
UC2846DW
40
2000
1
CU NIPDAU Level-2-220C-1 YEAR
CU NIPDAU Level-2-220C-1 YEAR
UC2846DWTR
UC2846J
ACTIVE
ACTIVE
A42 SNPB
Level-NC-NC-NC
UC2846N
ACTIVE
N
25
CU NIPDAU Level-NA-NA-NA
UC2846Q
ACTIVE
FN
FN
DW
DW
N
46
Call TI
Call TI
Level-2-220C-1 YEAR
Level-2-220C-1 YEAR
UC2846QTR
UC2847DW
ACTIVE
1000
40
ACTIVE
CU NIPDAU Level-2-220C-1 YEAR
CU NIPDAU Level-2-220C-1 YEAR
CU NIPDAU Level-NA-NA-NA
UC2847DWTR
UC2847N
ACTIVE
2000
25
ACTIVE
UC3846DW
ACTIVE
DW
DW
J
40
CU NIPDAU Level-2-220C-1 YEAR
CU NIPDAU Level-2-220C-1 YEAR
UC3846DWTR
UC3846J
ACTIVE
2000
1
ACTIVE
A42 SNPB
Level-NC-NC-NC
UC3846N
ACTIVE
N
25
CU NIPDAU Level-NA-NA-NA
UC3846Q
ACTIVE
FN
FN
DW
DW
J
46
Call TI
Call TI
Level-2-220C-1 YEAR
Level-2-220C-1 YEAR
UC3846QTR
UC3847DW
ACTIVE
1000
40
ACTIVE
CU NIPDAU Level-2-220C-1 YEAR
CU NIPDAU Level-2-220C-1 YEAR
UC3847DWTR
UC3847J
ACTIVE
2000
OBSOLETE
ACTIVE
Call TI
Call TI
UC3847N
N
25
CU NIPDAU Level-NA-NA-NA
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
Eco Plan
2-May-2005
(2)
-
The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS
&
no Sb/Br)
-
please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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Addendum-Page 2
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