UC3844ADTR [TI]
Current Mode PWM Controller; 电流模式PWM控制器
| 型号： | UC3844ADTR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | Current Mode PWM Controller |
| 文件： | 总11页 (文件大小：659K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
application
INFO
UC1842A/3A/4A/5A
UC2842A/3A/4A/5A
UC3842A/3A/4A/5A
available
Current Mode PWM Controller
FEATURES
DESCRIPTION
•
Optimized for Off-line and DC to DC
The UC1842A/3A/4A/5A family of control ICs is a pin for pin compati-
ble improved version of the UC3842/3/4/5 family. Providing the nec-
essary features to control current mode switched mode power
supplies, this family has the following improved features. Start up cur-
rent is guaranteed to be less than 0.5mA. Oscillator discharge is
trimmed to 8.3mA. During under voltage lockout, the output stage
can sink at least 10mA at less than 1.2V for VCC over 5V.
Converters
•
•
•
•
•
•
•
•
•
•
•
Low Start Up Current (<0.5mA)
Trimmed Oscillator Discharge Current
Automatic Feed Forward Compensation
Pulse-by-Pulse Current Limiting
Enhanced Load Response Characteristics
Under-Voltage Lockout With Hysteresis
Double Pulse Suppression
The difference between members of this family are shown in the table
below.
Maximum Duty
Part #
UVLO On
UVLO Off
Cycle
<100%
<100%
<50%
High Current Totem Pole Output
Internally Trimmed Bandgap Reference
500kHz Operation
UC1842A
UC1843A
UC1844A
UC1845A
16.0V
8.5V
10.0V
7.9V
16.0V
8.5V
10.0V
7.9V
<50%
Low RO Error Amp
BLOCK DIAGRAM
A/B
Note 1:
A = DIL-8 Pin Number. B = SO-14 Pin Number.
Note 2: Toggle flip flop used only in 1844A and 1845A.
SLUS224A - SEPTEMBER 1994 - REVISED APRIL 2002
UC1842A/3A/4A/5A
UC2842A/3A/4A/5A
UC3842A/3A/4A/5A
CONNECTION DIAGRAMS
ABSOLUTE MAXIMUM RATINGS (Note 1)
PLCC-20, LCC-20
(TOP VIEW)
Q, L Packages
Supply Voltage (Low Impedance Source) . . . . . . . . . . . . . . 30V
Supply Voltage (ICC mA) . . . . . . . . . . . . . . . . . . . . Self Limiting
Output Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1A
Output Energy (Capacitive Load). . . . . . . . . . . . . . . . . . . . . 5µJ
Analog Inputs (Pins 2, 3). . . . . . . . . . . . . . . . . . . -0.3V to +6.3V
Error Amp Output Sink Current . . . . . . . . . . . . . . . . . . . . 10mA
Power Dissipation at TA ≤ 25°C (DIL-8) . . . . . . . . . . . . . . . . 1W
Storage Temperature Range. . . . . . . . . . . . . . -65°C to +150°C
Lead Temperature (Soldering, 10 Seconds) . . . . . . . . . . 300°C
PACKAGE PIN FUNCTION
FUNCTION
PIN
N/C
1
Comp
N/C
VFB
2
3-4
5
N/C
ISENSE
N/C
RT/CT
N/C
Pwr Gnd
Gnd
N/C
Output
N/C
VC
VCC
N/C
6
7
Note 1. All voltages are with respect to Ground, Pin 5. Currents
are positive into, negative out of the specified terminal. Consult
Packaging Section of Databook for thermal limitations and con-
siderations of packages. Pin numbers refer to DIL package only.
8-9
10
11
12
13
14
15
16
17
18
19
20
SOIC-14 (TOP VIEW)
D Package
VREF
DIL-8, SOIC-8 (TOP VIEW)
J or N, D8 Package
SOIC-WIDE16 (TOP VIEW)
DW Package
N/C
N/C
16 N/C
1
2
3
4
5
6
7
8
15 VREF
14 VCC
COMP
VFB
13 VCC
ISENSE
RT/CT
N/C
12 OUTPUT
11 GND
10 PWRGND
N/C
9 N/C
2
UC1842A/3A/4A/5A
UC2842A/3A/4A/5A
UC3842A/3A/4A/5A
ELECTRICAL CHARACTERISTICS Unless otherwise stated, these specifications apply for –55°C ≤ TA ≤ 125°C for the
UC184xA; –40°C ≤ TA ≤ 125°C for the UC284xAQ; –40°C ≤ TA ≤ 85°C for the UC284xA; 0 ≤ TA ≤ 70°C for the UC384xA; VCC = 15V
(Note 5); RT = 10k; CT = 3.3nF; TA = TJ; Pin numbers refer to DIL-8.
UC184xA\UC284xA
UC384xA
PARAMETER
Reference Section
TEST CONDITIONS
UNITS
MIN. TYP. MAX. MIN. TYP. MAX.
Output Voltage
TJ = 25°C, IO = 1mA
4.95
4.9
5.00
6
5.05
20
4.90
4.82
5.00
6
5.10
20
V
mV
Line Regulation
12 ≤ VIN 25V
1 ≤ IO ≤ 20mA
(Note 2, Note 7)
Load Regulation
Temp. Stability
6
25
6
25
mV
0.2
0.4
5.1
0.2
0.4
5.18
mV/°C
V
Total Output Variation
Output Noise Voltage
Line, Load, Temp.
10Hz ≤ f ≤ 10kHz
TJ = 25°C (Note 2)
TA = 125°C, 1000Hrs. (Note 2)
50
5
50
5
µV
mV
mA
Long Term Stability
Output Short Circuit
Oscillator Section
Initial Accuracy
25
25
-30
47
-100
-180
-30
47
-100
-180
TJ = 25°C (Note 6)
52
0.2
5
57
1
52
0.2
5
57
1
kHz
%
Voltage Stability
Temp. Stability
12 ≤ VCC ≤ 25V
TMIN ≤ TA ≤ TMAX (Note 2)
VPIN 4 peak to peak (Note 2)
TJ = 25°C, VPIN 4 = 2V (Note 8)
VPIN 4 = 2V (Note 8)
%
Amplitude
1.7
8.3
1.7
8.3
V
Discharge Current
7.8
7.5
8.8
8.8
7.8
7.6
8.8
8.8
mA
mA
Error Amp Section
Input Voltage
VPIN 1 = 2.5V
2.45
2.50
-0.3
90
1
2.55
-1
2.42
2.50
-0.3
90
1
2.58
-2
V
µA
dB
MHz
dB
mA
mA
V
Input Bias Current
AVOL
2 ≤ VO ≤ 4V
TJ = 25°C (Note 2)
65
0.7
60
2
65
0.7
60
2
Unity Gain Bandwidth
PSRR
12 ≤ VCC ≤ 25V
70
6
70
6
Output Sink Current
Output Source Current
VOUT High
VPIN 2 = 2.7V, VPIN 1 = 1.1V
VPIN 2 = 2.3V, VPIN 1 = 5V
VPIN 2 = 2.3V, RL = 15k to ground
VPIN 2 = 2.7V, RL = 15k to Pin 8
-0.5
5
-0.8
6
-0.5
5
-0.8
6
VOUT Low
0.7
1.1
0.7
1.1
V
Current Sense Section
Gain
(Note 3, Note 4)
2.85
0.9
3
1
3.15
1.1
2.85
0.9
3
1
3.15
1.1
V/V
V
Maximum Input Signal
PSRR
VPIN 1 = 5V (Note 3)
12 ≤ VCC ≤ 25V (Note 3)
70
-2
70
-2
dB
µA
ns
Input Bias Current
Delay to Output
Output Section
Output Low Level
-10
-10
VPIN 3 = 0 to 2V (Note 2)
150
300
150
300
ISINK = 20mA
0.1
15
0.4
2.2
0.1
15
0.4
2.2
V
V
ISINK = 200mA
Output High Level
ISOURCE = 20mA
13
12
13.5
13.5
50
13
12
13.5
13.5
50
V
ISOURCE = 200mA
V
Rise Time
TJ = 25°C, CL = 1nF (Note 2)
TJ = 25°C, CL = 1nF (Note 2)
VCC = 5V, ISINK = 10mA
150
150
1.2
150
150
1.2
ns
ns
V
Fall Time
50
50
UVLO Saturation
0.7
0.7
3
UC1842A/3A/4A/5A
UC2842A/3A/4A/5A
UC3842A/3A/4A/5A
ELECTRICAL CHARACTERISTICS Unless otherwise stated, these specifications apply for –55°C ≤ TA ≤ 125°C for the
UC184xA; –40°C ≤ TA ≤ 125°C for the UC284xAQ; –40°C ≤ TA ≤ 85°C for the UC284xA; 0 ≤ TA ≤ 70°C for the UC384xA; VCC = 15V
(Note 5); RT = 10k; CT = 3.3nF; TA = TJ; Pin numbers refer to DIL-8.
UC184xA\UC284xA
UC384xA
PARAMETER
TEST CONDITIONS
UNITS
MIN. TYP. MAX. MIN. TYP. MAX.
Under-Voltage Lockout Section
Start Threshold
x842A/4A
15
7.8
9
16
8.4
10
17
9.0
11
14.5
7.8
8.5
7.0
16
8.4
10
17.5
9.0
V
V
V
V
x843A/5A
x842A/4A
x843A/5A
Min. Operation Voltage After
Turn On
11.5
8.2
7.0
7.6
8.2
7.6
PWM Section
Maximum Duty Cycle
x842A/3A
x844A/5A
94
47
96
48
100
50
0
94
47
96
48
100
50
0
%
%
%
Minimum Duty Cycle
Total Standby Current
Start-Up Current
0.3
11
34
0.5
17
0.3
11
34
0.5
17
mA
mA
V
Operating Supply Current
VCC Zener Voltage
VPIN 2 = VPIN 3 = 0V
ICC = 25mA
30
30
Note 2: Ensured by design, but not 100% production tested.
Note 3: Parameter measured at trip point of latch with VPIN2 = 0.
∆VPIN 1
Note 4: Gain defined as: A =
; 0 VPIN 3 0.8V.
∆VPIN 3
Note 5: Adjust VCC above the start threshold before setting at 15V.
Note 6: Output frequency equals oscillator frequency for the UC1842A and UC1843A. Output frequency is one half oscillator fre-
quency for the UC1844A and UC1845A.
Note 7: “Temperature stability, sometimes referred to as average temperature coefficient, is described by the equation:
VREF (max ) −VREF (min)
Temp Stability =
.VREF (max) and VREF (min) are the maximum & minimum reference volt-
TJ (max ) −TJ (min)
age measured over the appropriate temperature range. Note that the extremes in voltage do not necessarily occur at the extremes
in temperature.”
Note 8: This parameter is measured with RT = 10k to VREF.This contributes approximately 300 A of current to the measurement.
The total current flowing into the RT/C pin will be approximately 300 A higher than the measured value.
Error Amp Configuration
Error Amp can Source and Sink up to 0.5mA, and Sink up to 2mA.
4
UC1842A/3A/4A/5A
UC2842A/3A/4A/5A
UC3842A/3A/4A/5A
Under-Voltage Lockout
During UVLO, the Output is low.
Current Sense Circuit
Peak Current (IS) is Determined By The Formula
1.0V
RS
ISMAX ′
A small RC filter may be required to suppress switch transients.
Output Saturation Characteristics
Error Amplifier Open-Loop Frequency Response
5
UC1842A/3A/4A/5A
UC2842A/3A/4A/5A
APPLICATIONS DATA (cont.)
Oscillator Section
Oscillator Frequency vs Timing Resistance
Maximum Duty Cycle vs Timing Resistor
Open-Loop Laboratory Test Fixture
High peak currents associated with capacitive loads necessi-
tate careful grounding techniques. Timing and bypass capaci-
tors should be connected close to pin 5 in a single point
ground. The transistor and 5k potentiometer are used to sam-
ple the oscillator waveform and apply an adjustable ramp to
pin 3.
Slope Compensation
A fraction of the oscillator ramp can be resistively
summed with the current sense signal to provide slope
compensation for converters requiring duty cycles over
50%.
Note that capacitor, C, forms a filter with R2 to suppress
the leading edge switch spikes.
6
UC1842A/3A/4A/5A
UC2842A/3A/4A/5A
UC3842A/3A/4A/5A
APPLICATIONS DATA (cont.)
Off-line Flyback Regulator
5. Output Voltage:
Power Supply Specifications
A. +5V, 5%; 1A to 4A load
Ripple voltage: 50mV P-P Max
B. +12V, 3%; 0.1A to 0.3A load
Ripple voltage: 100mV P-P Max
C. -12V , 3%; 0.1A to 0.3A load
Ripple voltage: 100mV P-P Max
1. Input Voltage
95VAC to 130VA
(50 Hz/60Hz)
3750V
40kHz
70%
2. Line Isolation
3. Switching Frequency
4. Efficiency
Full Load
7
PACKAGE OPTION ADDENDUM
www.ti.com
10-Mar-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
CDIP
CDIP
LCCC
LCCC
CDIP
CDIP
LCCC
LCCC
CDIP
CDIP
LCCC
LCCC
CDIP
CDIP
LCCC
LCCC
CDIP
CDIP
CDIP
LCCC
LCCC
CDIP
CDIP
CDIP
LCCC
LCCC
CDIP
CDIP
CDIP
LCCC
LCCC
CDIP
CDIP
CDIP
LCCC
LCCC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
Drawing
JG
JG
FK
FK
JG
JG
FK
FK
JG
JG
FK
FK
JG
JG
FK
FK
JG
JG
JG
FK
FK
JG
JG
JG
FK
FK
JG
JG
JG
FK
FK
JG
JG
JG
FK
FK
D
5962-8670405PA
5962-8670405VPA
5962-8670405VXA
5962-8670405XA
5962-8670406PA
5962-8670406VPA
5962-8670406VXA
5962-8670406XA
5962-8670407PA
5962-8670407VPA
5962-8670407VXA
5962-8670407XA
5962-8670408PA
5962-8670408VPA
5962-8670408VXA
5962-8670408XA
UC1842AJ
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
8
8
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
A42 SNPB
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Level-NC-NC-NC
Level-NC-NC-NC
Level-NC-NC-NC
20
20
8
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A42 SNPB
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Level-NC-NC-NC
8
20
20
8
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A42 SNPB
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Level-NC-NC-NC
Level-NC-NC-NC
8
20
20
8
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A42 SNPB
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Level-NC-NC-NC
Level-NC-NC-NC
8
20
20
8
Call TI
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A42 SNPB
A42 SNPB
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Level-NC-NC-NC
Call TI
UC1842AJ883B
UC1842AJQMLV
UC1842AL883B
UC1842ALQMLV
UC1843AJ
8
8
20
20
8
1
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A42 SNPB
A42 SNPB
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1
1
Level-NC-NC-NC
Level-NC-NC-NC
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UC1843AJ883B
UC1843AJQMLV
UC1843AL883B
UC1843ALQMLV
UC1844AJ
8
8
20
20
8
1
POST-PLATE Level-NC-NC-NC
Call TI
A42 SNPB
A42 SNPB
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1
1
Level-NC-NC-NC
Level-NC-NC-NC
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UC1844AJ883B
UC1844AJQMLV
UC1844AL883B
UC1844ALQMLV
UC1845AJ
8
8
20
20
8
1
POST-PLATE Level-NC-NC-NC
Call TI
A42 SNPB
A42 SNPB
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1
1
Level-NC-NC-NC
Level-NC-NC-NC
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UC1845AJ883B
UC1845AJQMLV
UC1845AL883B
UC1845ALQMLV
UC2842AD
8
8
20
20
14
8
1
POST-PLATE Level-NC-NC-NC
Call TI Call TI
50
75
CU NIPDAU Level-1-220C-UNLIM
CU NIPDAU Level-1-220C-UNLIM
CU NIPDAU Level-1-220C-UNLIM
UC2842AD8
D
UC2842AD8TR
UC2842AD8TRG4
UC2842ADTR
D
8
2500
2500
2500
40
D
8
Call TI
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D
14
16
CU NIPDAU Level-1-220C-UNLIM
CU NIPDAU Level-2-220C-1 YEAR
UC2842ADW
DW
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Mar-2005
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
SOIC
CDIP
PDIP
Drawing
UC2842ADWTR
UC2842AJ
ACTIVE
OBSOLETE
ACTIVE
DW
JG
P
16
8
2000
None
None
CU NIPDAU Level-2-220C-1 YEAR
Call TI
Call TI
UC2842AN
8
50
Pb-Free
(RoHS)
CU SNPB
Level-NC-NC-NC
UC2843AD
UC2843AD8
UC2843AD8TR
UC2843ADTR
UC2843ADW
UC2843ADWTR
UC2843AJ
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
OBSOLETE
ACTIVE
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
CDIP
PDIP
D
D
14
8
50
75
None
None
None
None
None
None
None
CU NIPDAU Level-1-220C-UNLIM
CU NIPDAU Level-1-220C-UNLIM
CU NIPDAU Level-1-220C-UNLIM
CU NIPDAU Level-1-220C-UNLIM
CU NIPDAU Level-2-220C-1 YEAR
CU NIPDAU Level-2-220C-1 YEAR
D
8
2500
2500
40
D
14
16
16
8
DW
DW
JG
P
2000
Call TI
Call TI
UC2843AN
8
50
Pb-Free
(RoHS)
CU SNPB
Level-NC-NC-NC
UC2843AQ
UC2844AD
ACTIVE
ACTIVE
ACTIVE
ACTIVE
PREVIEW
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
PLCC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
CDIP
PDIP
FN
D
20
14
8
46
50
None
None
None
None
None
None
None
None
None
CU SNPB
Level-2-220C-1 YEAR
CU NIPDAU Level-1-220C-UNLIM
CU NIPDAU Level-1-220C-UNLIM
CU NIPDAU Level-1-220C-UNLIM
UC2844AD8
D
75
UC2844AD8TR
UC2844AD8TRG4
UC2844ADTR
UC2844ADW
UC2844ADWTR
UC2844AJ
D
8
2500
2500
2500
40
D
8
Call TI
Call TI
D
14
16
16
8
CU NIPDAU Level-1-220C-UNLIM
CU NIPDAU Level-2-220C-1 YEAR
CU NIPDAU Level-2-220C-1 YEAR
DW
DW
JG
P
2000
1
A42 SNPB
CU SNPB
Level-NC-NC-NC
Level-NC-NC-NC
UC2844AN
8
50
Pb-Free
(RoHS)
UC2844AQD
UC2844AQD8
UC2844AQD8R
UC2844AQDR
UC2845AD
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
PREVIEW
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
PDIP
D
D
14
8
50
75
None
None
None
None
None
None
None
None
None
None
Call TI
Call TI
Call TI
Call TI
Level-1-220C-UNLIM
Level-1-220C-UNLIM
Level-1-220C-UNLIM
Level-1-220C-UNLIM
D
8
2500
2500
50
D
14
14
8
D
CU NIPDAU Level-1-220C-UNLIM
CU NIPDAU Level-1-220C-UNLIM
CU NIPDAU Level-1-220C-UNLIM
UC2845AD8
D
75
UC2845AD8TR
UC2845AD8TRG4
UC2845ADTR
UC2845ADW
UC2845AN
D
8
2500
2500
2500
40
D
8
Call TI
Call TI
D
14
16
8
CU NIPDAU Level-1-220C-UNLIM
CU NIPDAU Level-2-220C-1 YEAR
DW
P
50
Pb-Free
(RoHS)
CU SNPB
Level-NC-NC-NC
UC3842AD
UC3842AD8
UC3842AD8TR
UC3842ADTR
UC3842ADW
UC3842ADWTR
UC3842AJ
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
CDIP
PDIP
D
D
14
8
50
75
None
None
None
None
None
None
None
CU NIPDAU Level-1-220C-UNLIM
CU NIPDAU Level-1-220C-UNLIM
CU NIPDAU Level-1-220C-UNLIM
CU NIPDAU Level-1-220C-UNLIM
CU NIPDAU Level-2-220C-1 YEAR
CU NIPDAU Level-2-220C-1 YEAR
D
8
2500
2500
40
D
14
16
16
8
DW
DW
JG
P
2000
1
A42 SNPB
CU SNPB
Level-NC-NC-NC
Level-NC-NC-NC
UC3842AN
8
50
Pb-Free
(RoHS)
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
10-Mar-2005
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
UC3842ANG4
ACTIVE
PDIP
P
8
50 Green (RoHS & CU NIPDAU Level-NA-NA-NA
no Sb/Br)
UC3843AD
UC3843AD8
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
SOIC
SOIC
D
D
D
D
D
14
8
50
75
None
None
None
None
CU NIPDAU Level-1-220C-UNLIM
CU NIPDAU Level-1-220C-UNLIM
UC3843AD8G4
UC3843AD8TR
UC3843AD8TRG4
8
75
Call TI
Call TI
8
2500
CU NIPDAU Level-1-220C-UNLIM
8
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
UC3843ADG4
ACTIVE
SOIC
D
14
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
UC3843ADTR
UC3843AJ
ACTIVE
ACTIVE
ACTIVE
SOIC
CDIP
PDIP
D
JG
P
14
8
2500
1
None
None
CU NIPDAU Level-1-220C-UNLIM
A42 SNPB
CU SNPB
Level-NC-NC-NC
Level-NC-NC-NC
UC3843AN
8
50
Pb-Free
(RoHS)
UC3843ANG4
ACTIVE
PDIP
P
8
50 Green (RoHS & CU NIPDAU Level-NA-NA-NA
no Sb/Br)
UC3844AD
UC3844AD8
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
SOIC
D
D
D
D
14
8
50
75
None
None
None
CU NIPDAU Level-1-220C-UNLIM
CU NIPDAU Level-1-220C-UNLIM
CU NIPDAU Level-1-220C-UNLIM
UC3844AD8TR
UC3844AD8TRG4
8
2500
8
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
UC3844ADTR
UC3844ADW
UC3844ADWTR
UC3844AN
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
PDIP
D
DW
DW
P
14
16
16
8
2500
40
None
None
None
CU NIPDAU Level-1-220C-UNLIM
CU NIPDAU Level-2-220C-1 YEAR
CU NIPDAU Level-2-220C-1 YEAR
2000
50
Pb-Free
(RoHS)
CU SNPB
Level-NC-NC-NC
UC3845AD
UC3845AD8
UC3845AD8TR
UC3845ADTR
UC3845ADW
UC3845ADWTR
UC3845AJ
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
CDIP
PDIP
D
D
14
8
50
75
None
None
None
None
None
None
None
CU NIPDAU Level-1-220C-UNLIM
CU NIPDAU Level-1-220C-UNLIM
CU NIPDAU Level-1-220C-UNLIM
CU NIPDAU Level-1-220C-UNLIM
CU NIPDAU Level-2-220C-1 YEAR
CU NIPDAU Level-2-220C-1 YEAR
D
8
2500
2500
40
D
14
16
16
8
DW
DW
JG
P
2000
1
A42 SNPB
CU SNPB
Level-NC-NC-NC
Level-NC-NC-NC
UC3845AN
8
50
Pb-Free
(RoHS)
UC3845ANG4
ACTIVE
PDIP
P
8
50 Green (RoHS & CU NIPDAU Level-NA-NA-NA
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional
product content details.
None: Not yet available Lead (Pb-Free).
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
Addendum-Page 3
PACKAGE OPTION ADDENDUM
www.ti.com
10-Mar-2005
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens,
including bromine (Br) or antimony (Sb) above 0.1% of total product weight.
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 4
相关型号：
UC3844ADTRG4
Current Mode PWM ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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TI
UC3844ADW
Current Mode PWM ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
TI
UC3844ADWTR
Current Mode PWM ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
TI
UC3844AM
CURRENT MODE PWM CONTROLLERWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
MICROSEMI
UC3844AN
Current Mode PWM ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
TI
UC3844AN
HIGH PERFORMANCE CURRENT MODE PWM CONTROLLERWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
STMICROELECTR
UC3844ANG4
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-
TI
UC3844AQ
Current-Mode SMPS ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
ETC
UC3844AQTR
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TI
UC3844AY
Analog ICWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
ETC
UC3844B
HIGH PERFORMANCE CURRENT MODE CONTROLLERSWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
MOTOROLA
UC3844B
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STMICROELECTR
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