UC3717AN [TI]
Stepper Motor Drive Circuit; 步进电机驱动电路![UC3717AN](http://pdffile.icpdf.com/pdf2/p00204/img/icpdf/UC3717_1152405_icpdf.jpg)
型号: | UC3717AN |
厂家: | ![]() |
描述: | Stepper Motor Drive Circuit |
文件: | 总12页 (文件大小:648K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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UC3717A
Stepper Motor Drive Circuit
FEATURES
DESCRIPTION
•
Full-Step, Half-Step and Micro-Step
Capability
The UC3717A is an improved version of the UC3717, used to switch
drive the current in one winding of a bipolar stepper motor. The
UC3717A has been modified to supply higher winding current, more
reliable thermal protection, and improved efficiency by providing inte-
grated bootstrap circuitry to lower recirculation saturation voltages.
The diagram shown below presents the building blocks of the
UC3717A. Included are an LS-TTL compatible logic input, a current
sensor, a monostable, a thermal shutdown network, and an H-bridge
output stage. The output stage features built-in fast recovery com-
mutating diodes and integrated bootstrap pull up. Two UC3717As
and a few external components form a complete control and drive
unit for LS-TTL or micro-processor controlled stepper motor systems.
•
•
Bipolar Output Current up to 1A
Wide Range of Motor Supply Voltage
10-46V
•
•
•
•
Low Saturation Voltage with Integrated
Bootstrap
Built-In Fast Recovery Commutating
Diodes
Current Levels Selected in Steps or Varied
Continuously
The UC3717A is characterized for operation over the temperature
range of 0°C to +70°C.
Thermal Protection with Soft Intervention
ABSOLUTE MAXIMUM RATINGS (Note 1)
Voltage
Logic Supply, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V
Output Supply, Vm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50V
Input Voltage
Note 1: All voltages are with respect to ground, Pins 4,
5, 12, 13. Currents are positive into, negative out of the
specified terminal. Pin numbers refer to DIL-16 pack-
age.
Consult Packaging Section of Databook for thermal limi-
tations and considerations of package.
Logic Inputs (Pins 7, 8, 9) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6V
Analog Input (Pin 10). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VCC
Reference Input (Pin 11) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15V
Input Current
Logic Inputs (Pins 7, 8, 9) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -10mA
Analog Inputs (Pins 10, 11). . . . . . . . . . . . . . . . . . . . . . . . . . . . -10mA
±
Output Current (Pins 1, 15) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2A
Junction Temperature, TJ. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +150°C
Storage Temperature Range, TS . . . . . . . . . . . . . . . . . . -55°C to +150°C
BLOCK DIAGRAM
4/97
1
UC3717A
CONNECTION DIAGRAMS
PACKAGE PIN FUNCTION
DIL-16 (TOP VIEW)
J or N Package
PLCC-20 (TOP VIEW)
Q Package
FUNCTION
PIN
N/C
1
BOUT
Timing
Vm
2
3
4
Gnd
N/C
5
6
Gnd
VCC
7
8
I1
9
Phase
N/C
I0
Current
VR
Gnd
N/C
Gnd
Vm
AOUT
Emitters
10
11
12
13
14
15
16
17
18
19
20
(Refer to the test circuit, Figure 6. Vm = 36V, VCC = 5V, VR = 5V, TA = 0°C to 70°C,
unless otherwise stated, TA = TJ.)
ELECTRICAL CHARACTERISTICS
PARAMETERS
Supply Voltage, Vm (Pins 3, 14)
Logic Supply Voltage, VCC (Pin 6)
Logic Supply Current, ICC (Pin 6)
Thermal Shutdown Temperature
Logic Inputs
TEST CONDITIONS
MIN
10
TYP
MAX UNITS
46
V
V
4.75
5.25
15
IO = I1 = 0
7
mA
°C
+160
2
+180
Input Low Voltage, (Pins 7, 8, 9)
Input High Voltage, (Pins 7, 8, 9)
Low Voltage Input Current, (Pins 7, 8, 9)
0.8
VCC
-100
-400
10
V
V
VI = 0.4V, Pin 8
VI = 0.4V, Pins 7 and 9
VI = 2.4V
µA
mA
µA
High Voltage Input Current, (Pins 7, 8, 9)
Comparators
Comparator Low, Threshold Voltage (Pin 10)
VR = 5V; IO = L; I1 = H
66
80
90
266
436
±20
35
mV
mV
mV
µA
µs
Comparator Medium, Threshold Voltage (Pin 10) VR = 5V; IO = H; I1 = L
236
396
250
420
Comparator High, Threshold Voltage (Pin 10)
Comparator Input, Current (Pin 10)
Cutoff Time, tOFF
VR = 5V; IO = L; I1 = L
RT = 56kΩ, CT = 820pF
25
Turn Off Delay, tD
(See Figure 5)
2
µs
Source Diode-Transistor Pair
Saturation Voltage, VSAT (Pins 1, 15)
(See Figure 5)
Im = -0.5A,
Im = -0.5A,
Im = -1A,
Im = -1A,
Vm = 40V
Im = -0.5A
Im = -1A
Conduction Period
1.7
1.1
2.1
1.7
2.1
1.35
2.8
V
V
Recirculation Period
Conduction Period
Recirculation Period
Saturation Voltage, VSAT (Pins 1, 15)
(See Figure 5)
V
2.5
V
Leakage Current
300
1.25
1.7
µA
V
Diode Forward Voltage, VF
1
1.3
V
2
UC3717A
(Refer to the test circuit, Figure 6. VM = 36V, VCC = 5V, VR = 5V, TA = 0°C to 70°C, unless
otherwise stated, TA = TJ.)
ELECTRICAL
CHARACTERISTICS (cont.)
PARAMETERS
TEST CONDITIONS
MIN
TYP
MAX UNITS
Sink Diode-Transistor Pair
Saturation Voltage, VSAT (Pins 1, 15)
Im = 0.5A
Im = 1A
0.8
1.1
1.6
1.35
2.3
300
1.5
2
V
V
Leakage Current
Vm = 40V
Im = 0.5A
Im = 1A
µA
V
Diode Forward Voltage, VF
1.1
1.4
V
Figure 1. Typical Source Saturation Voltage
vs Output Current (Recirculation Period)
Figure 2. Typical Source Saturation Voltage
vs Output Current (Conduction Period)
Figure 3. Typical Sink Saturation
Voltage vs Output Current
Figure 5. Typical Waveforms with MA Regulating
(phase = 0)
Figure 4. Typical Power Dissipation
vs Output Current
3
UC3717A
Figure 6. UC3717A Test Circuit
FUNCTIONAL DESCRIPTION
The UC3717A’s drive circuit shown in the block diagram
includes the following components.
saturation voltage of source transistor Q2 during recircu-
lation, thus improving efficiency by reducing power dissi-
pation.
(1) H-bridge output stage
(2) Phase polarity logic
(3) Voltage divider coupled with current sensing compa-
rators
(4) Two-bit D/A current level select
(5) Monostable generating fixed off-time
(6) Thermal protection
OUTPUT STAGE
The UC3717A’s output stage consists of four Darlington
power transistors and associated recirculating power di-
odes in a full H-bridge configuration as shown in Figure
7. Also presented, is the new added feature of inte-
grated bootstrap pull up, which improves device per-
formance during switched mode operation. While in
switched mode, with a low level phase polarity input, Q2
is on and Q3 is being switched. At the moment Q3 turns
off, winding current begins to decay through the commu-
tating diode pulling the collector of Q3 above the supply
voltage. Meanwhile, Q6 turns on pulling the base of Q2
higher than its previous value. The net effect lowers the
Note: Dashed lines indicate current decay paths.
Figure 7. Simplified Schematic of Output Stage
4
UC3717A
FUNCTIONAL DESCRIPTION (cont.)
PHASE POLARITY INPUT
ture to a maximum of 180C by reducing the winding cur-
rent.
The UC3717A phase polarity input controls current direc-
tion in the motor winding. Built-in hysteresis insures im-
munity to noise, something frequently present in
switched drive environments. A low level phase polarity
input enables Q2 and Q3 as shown in Figure 7. During
phase reversal, the active transistors are both turned off
while winding current delays through the commutating di-
odes shown. As winding current decays to zero, the inac-
tive transistors Q1 and Q4 turn on and charge the
winding with current of the reverse direction. This delay
insures noise immunity and freedom from power supply
current spikes caused by overlapping drive signals.
PERFORMANCE CONSIDERATIONS
In order to achieve optimum performance from the
UC3717A careful attention should be given to the follow-
ing items.
External Components: The UC3717A requires a mini-
mal number of external components to form a complete
control and switch drive unit. However, proper selection
of external components is necessary for optimum per-
formance. The timing pin, (pin 2) is normally connected
to an RC network which sets the off-time for the sink
power transistor during switched mode. As shown in Fig-
ure 8, prior to switched mode, the winding current in-
creases exponentially to a peak value. Once peak
current is attained the monostable is triggered which
turns off the lower sink drivers for a fixed off-time. During
off-time winding current decays through the appropriate
diode and source transistor. The moment off-time times
out, the motor current again rises exponentially produc-
ing the ripple waveform shown. The magnitude of wind-
ing ripple is a direct function of off-time. For a given
off-time TOFF, the values of RT and CT can be calculated
from the expression:
PHASE INPUT
LOW
Q1, Q4
OFF
Q2, Q3
ON
HIGH
ON
OFF
CURRENT CONTROL
The voltage divider, comparators, monostable, and two-
bit D/A provide a means to sense winding peak current,
select winding peak current, and disable the winding sink
transistors.
The UC3717A switched driver accomplishes current con-
trol using an algorithm referred to as "fixed off-time."
When a voltage is applied across the motor winding, the
current through the winding increases exponentially. The
current can be sensed across an external resistor as an
analog voltage proportional to instantaneous current.
This voltage is normally filtered with a simple RC low-
pass network to remove high frequency transients, and
then compared to one of the three selectable thresholds.
The two bit D/A input signal determines which one of the
three thresholds is selected, corresponding to a desired
winding peak current level. At the moment the sense volt-
age rises above the selected threshold, the UC3717A’s
monostable is triggered and disables both output sink
drivers for a fixed off-time. The winding current then cir-
culates through the source transistor and appropriate di-
ode. The reference terminal of the UC3717A provides a
means of continuously adjusting the current threshold to
allow microstepping. Table 1 presents the relationship
between the two-bit D/A input signal and selectable cur-
rent level.
TOFF = 0.69RTCT
with the restriction that RT should be in the range of 10-
100k. As shown in Figure 5, the switch frequency FS is a
function of TOFF and TON. Since TON is a function of the
reference voltage, sense resistor, motor supply, and
winding electrical characteristics, it generally varies dur-
ing different modes of operation. Thus, FS may be ap-
proximated nominally as:
1
FS = ⁄
(TOFF).
1.5
Normally, Switch Frequency Is Selected Greater than
TABLE 1
IO
0
I1
0
0
1
1
CURRENT LEVEL
100%
1
60%
Figure 8. A typical winding current waveform. Wind-
ing current rises exponentially to a selected peak
value. The peak value is limited by switched mode
operation producing a ripple in winding current. A
phase polarity reversal command is given and wind-
ing current decays to zero, then increases exponen-
tially.
0
19%
1
Current Inhibit
OVERLOAD PROTECTION
The UC3717A is equipped with a new, more reliable ther-
mal shutdown circuit which limits the junction tempera-
5
UC3717A
FUNCTIONAL DESCRIPTION (cont.)
Low-pass filter components RC CC should be selected so
that all switching transients from the power transistors
and commutating diodes are well smoothed, but the pri-
mary signal, which can be in the range of 1/TOFF or
higher must be passed. Figure 5A shows the waveform
which must be smoothed, Figure 5B presents the desired
waveform that just smoothes out overshoot without radi-
cal distortion.
current is excessive and must be prevented. This is ac-
complished with switch drive by repetitively switching the
sink drivers on and off, so as to maintain an average
value of current equal to the rated value. This results in a
small amount of ripple in the controlled current, but the
increase in step rate and performance may be consider-
able.
Interference: Electrical noise generated by the chopping
action can cause interference problems, particularly in
the vicinity of magnetic storage media. With this in mind,
printed circuit layouts, wire runs and decoupling must be
considered. 0.01 to 0.1µF ceramic capacitors for high fre-
quency bypass located near the drive package across
V+ and ground might be very helpful. The connection
and ground leads of the current sensing components
should be kept as short as possible.
The sense resistor should be chosen as small as practi-
cal to allow as much of the winding supply voltage to be
used as overdrive to the motor winding. V , the voltage
RS
across the sense resistor, should not exceed 1.5V.
Voltage Overdrive: In many applications, maximum
speed or step rate is a desirable performance charac-
teristic. Maximum step rate is a direct function of the time
necessary to reverse winding current with each step. In
response to a constant motor supply voltage, the winding
current changes exponentially with time, whose shape is
determined by the winding time constant and expressed
as:
Half-Stepping: In half step sequence the power input to
the motor alternates between one or two phases being
energized. In a two phase motor the electrical phase shift
between the windings is 90°. The torque developed is the
vector sum of the two windings energized. Therefore
when only one winding is energized the torque of the mo-
tor is reduced by approximately 30%. This causes a
torque ripple and if it is necessary to compensate for this,
the VR input can be used to boost the current of the sin-
gle energized winding.
Vm
Im =
−RT
R [1−EXP ( ⁄ ]
L)
as presented in Figure 9. With rated voltage applied, the
time required to reach rated current is excessive when
compared with the time required with over-voltage ap-
plied, even though the time constant L/R remains con-
stant. With over-voltage however, the final value of
Figure 9. With rated voltage applied, winding current does not exceed rated value, but takes L/R seconds to
reach 63% of its final value - probably too long. Increased performance requires an increase in applied volt-
age, of overdrive, and therefore a means to limit current. The UC3717A motor driver performs this task effi-
ciently.
6
UC3717A
MOUNTING INSTRUCTIONS
12. The input can be controlled by a microprocessor,
TTL, LS, or CMOS logic.
The θJA of the UC3717AN plastic package can be re-
duced by soldering the GND pins to a suitable copper
area of the printed circuit board or to an external heat
sink. Due to different lead frame design, θJA of the ce-
ramic J package cannot be similarly reduced.
The diagram of Figure 11 shows the maximum package
power PTOT and the θJA as a function of the side " l " of
two equal square copper areas having a thickness of 35µ
(see Figure 10).
The timing diagram in Figure 13 shows the required sig-
nal input for a two phase, full step stepping sequence.
Figure 14 shows the required input signal for a one
phase-two phase stepping sequence called half-step-
ping.
The circuit of Figure 15 provides the signal shown in Fig-
ure 13, and in conjunction with the circuit shown in Fig-
ure 12 will implement a pulse-to-step two phase, full
step, bi-directional motor drive.
Figure 10. Example of P.C. Board Copper
Area which is used as Heatsink.
During soldering the pins’ temperature must not exceed
260°C and the soldering time must not be longer than 12
seconds.
The printed circuit copper area must be connected to
electrical ground.
Figure 12. Typical Chopper Drive for a Two
Phase Permanent Magnet Motor.
The schematic of Figure 16 shows a pulse to half step
circuit generating the signal shown in Figure 14. Care
has been taken to change the phase signal the same
time the current inhibit is applied. This will allow the cur-
rent to decay faster and therefore enhance the motor
performance at high step rates.
Figure 11. Maximum Package Power and Junction
to Ambient Thermal Resistance vs Side "l".
APPLICATIONS
A typical chopper drive for a two phase bipolar perma-
nent magnet or hybrid stepping motor is shown in Figure
7
UC3717A
Figure 13. Phase Input Signal for Two Phase Full Step Drive (4 Step Sequence)
Figure 14. Phase and Current-Inhibit Signal for Half-Stepping (8 Step Sequence)
Figure 15. Full Step, Bi-directional Two Phase Drive Logic
Figure 16. Half-Step, Bi-directional Drive Logic
UNITRODE CORPORATION
7 CONTINENTAL BLVD. • MERRIMACK, NH 03054
TEL. (603) 424-2410 • FAX (603) 424-3460
8
PACKAGE OPTION ADDENDUM
www.ti.com
6-May-2009
PACKAGING INFORMATION
Orderable Device
UC3717AN
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
PDIP
N
16
16
20
20
20
20
25 Green (RoHS & CU NIPDAU N / A for Pkg Type
no Sb/Br)
UC3717ANG4
UC3717AQ
PDIP
PLCC
PLCC
PLCC
PLCC
N
25 Green (RoHS & CU NIPDAU N / A for Pkg Type
no Sb/Br)
FN
FN
FN
FN
46 Green (RoHS &
no Sb/Br)
CU SN
CU SN
CU SN
CU SN
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
UC3717AQG3
UC3717AQTR
UC3717AQTRG3
46 Green (RoHS &
no Sb/Br)
1000 Green (RoHS &
no Sb/Br)
1000 Green (RoHS &
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
6-Oct-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) W1 (mm)
(mm) (mm) Quadrant
UC3717AQTR
PLCC
FN
20
1000
330.0
16.4
10.3
10.3
4.9
12.0
16.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
6-Oct-2008
*All dimensions are nominal
Device
Package Type Package Drawing Pins
PLCC FN 20
SPQ
Length (mm) Width (mm) Height (mm)
346.0 346.0 33.0
UC3717AQTR
1000
Pack Materials-Page 2
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