UC3178QPTR [TI]

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UC3178QPTR
型号: UC3178QPTR
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
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UC3178  
Full Bridge Power Amplifier  
FEATURES  
DESCRIPTION  
Precision Current Control  
The UC3178 full-bridge power amplifier, rated for continuous output current  
of 0.45 Amperes, is intended for use in demanding servo applications. This  
device includes a precision current sense amplifier that senses load current  
with a single resistor in series with the load. The UC3178 is optimized to con-  
sume a minimum of supply current, and is designed to operate in both 5V  
and 12V systems. The power output stages have a low saturation voltage  
and are protected with current limiting and thermal shutdown. When inhibited,  
the device will draw less than 1.5mA of total supply current.  
±
450mA Load Current  
1.2V Typical Total Vsat at  
450mA  
Programmable Over-Current  
Control  
Range Control for 4:1 Gain  
Change  
Auxiliary functions on this device include a load current sensing and rectifica-  
tion function that can be configured with the device’s over-current comparator  
to provide tight control on the maximum commanded load current. The closed  
loop transconductance of the configured power amplifier can be switched be-  
tween a high and low range with a single logic input. The 4:1 change in gain  
can be used to extend the dynamic range of the servo loop. Bandwidth vari-  
ations that would otherwise result with the gain change can be controlled with  
a compensation adjust pin.  
Compensation Adjust Pin for  
Range Bandwidth Control  
Inhibit Input and UVLO  
3V to 15V Operation  
12mA Quiescent Supply  
Current  
This device is packaged a power PLCC, "QP" package which maintains a  
standard 28-pin outline, but with 7 pins along one edge directly tied to the die  
substrate for improved thermal performance.  
BLOCK DIAGRAM  
UDG-92010  
5/93  
UC3178  
ABSOLUTE MAXIMUM RATINGS  
CONNECTION DIAGRAM  
Input Supply Voltage, (VIN(+), VC(+)). . . . . . . . . . . . . . . . . . 20V  
O/C Sense, Logic Inputs, and REF Input  
PACKAGE PIN FUNCTION  
PLCC - 28 (Top View)  
QP Package  
FUNCTION  
PIN  
Maximum forced voltage . . . . . . . . . . . . . . . . . -0.3V to 10V  
Inhibit  
1
2
3
4
±
Maximum forced current . . . . . . . . . . . . . . . . . . . . . . 10mA  
O/C Force  
O/C Sense  
Range  
A & B Amplifier Inputs . . . . . . . . . . . . . -0.3V to (VIN(+) + 1.0V)  
O/C Indicate Open Collector Output Voltage . . . . . . . . . . . . 20V  
A and B Output Currents(continuous)  
C/S(+)  
5
Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . Internally Limited  
Sink . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.6A  
Output Diode Current (pulsed)* . . . . . . . . . . . . . . . . . . . . . 0.5A  
O/C Ind Output Current(continuous) . . . . . . . . . . . . . . . . 20mA  
Operating Junction Temperature . . . . . . . . . . . . . . . . . . +150°C  
Storage Temperature . . . . . . . . . . . . . . . . . . . -65°C to +150°C  
Comp Adj  
O/C Ind  
AIN(+)  
6
7
8
9
AIN(-)  
VC(+) Supply  
A Output  
Pwr Gnd  
Pwr Gnd  
Pwr Gnd  
Pwr Gnd  
Pwr Gnd  
Pwr Gnd  
Pwr Gnd  
B Output  
VIN(+)  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
*Notes: Unless otherwise indicated, voltages are referenced to  
ground and currents are positive into, negative out of, the speci-  
fied terminals, "Pulsed" is defined as a less than 10% duty cy-  
cle pulse with a maximum duration of 500µs.  
THERMAL DATA  
QP package: (see packaging section of UICC data book for more  
details on thermal performance)  
BIN(-)  
BIN(+)  
Thermal Resistance Junction to Leads, θjl . . . . . . . . 15°C/W  
Thermal Resistance Junction to Ambient, θja . . . 30-40°C/W  
REF Input  
C/S(+)  
C/S Out  
IDIF Out  
IDIF REF  
Ground  
Note: The above numbers for θjl are maximums for the limiting  
thermal resistance of the package in a standard mounting con-  
figuration. The θja numbers are meant to be guidelines for the  
thermal performance of the device/pc-board system. All of the  
above numbers assume no ambient airflow.  
Unless otherwise stated specifications hold for TA = 0°C to 70°C, VC(+) = VIN(+) =  
12V, REF Input = VIN(+)/2, O/C Input & Inhibit Input = 0V.  
ELECTRICAL CHARACTERISTICS:  
PARAMETER  
Input Supply  
TEST CONDITIONS  
MIN  
TYP  
MAX UNITS  
VIN (+)Supply Current  
12  
1.2  
12  
16  
2.0  
16  
mA  
mA  
mA  
mA  
V
VC(+) Supply Current  
Total Supply Current  
IOUT = OA  
Supplies = 5V,IOUT = OA  
Supplies = 12V,IOUT = OA  
low to high  
13  
18  
VIN(+) UVLO Threshold  
UVLO Threshold Hysterisis  
Over-Current (O/C) Comparator  
Input Bias Current  
2.6  
300  
2.8  
mV  
V input = 0.8V  
low to high  
-1.0  
0.97  
85  
-.01  
1.0  
µA  
V
Thresholds  
1.03  
115  
0.45  
5.0  
Threshold Hysterisis  
O/C IND Vsat  
100  
0.2  
mV  
V
IOUT = 5mA, V input low  
VOUT = 20V  
O/C IND Leakage  
µA  
Power Amplifiers A and B  
Input Offset Voltage  
A Amplifier, VCM = 6V  
4.0  
mV  
mV  
µΑ  
dB  
B Amplifier, VCM = 6V  
12.0  
Input Bias Current  
CMRR  
VCM = 6V  
-500  
70  
-50  
90  
VCM = 0.5 to 13V, Supplies = 15V  
VIN(+) = 4 to 15V, VCM = 1.5V  
Supplies = 12V, VOUT = 1V, IOUT = 300mA  
to VOUT = 10.5V, IOUT = -300mA  
PSRR  
70  
90  
dB  
Large Signal Voltage Gain  
3.0  
15.0  
V/mV  
2
UC3178  
Unless otherwise stated specifications hold for TA = 0°C to 70°C , VC(+) = VIN(+) = 12V,  
REF Input = VIN(+)/2, O/C Input & Inhibit Input = 0V.  
ELECTRICAL  
CHARACTERISTICS (cont.):  
PARAMETER  
Power Amplifiers A & B (cont.)  
Gain Bandwith Product  
TEST CONDITIONS  
MIN  
TYP  
MAX UNITS  
A Amplifier  
B Amplifier  
2.0  
1.0  
MHz  
MHz  
V/µs  
A
Slew Rate  
1.0  
High-Side Current Limit  
Output Saturation Voltage  
0.45  
0.65  
0.75  
0.85  
0.9  
High-Side, IOUT = -100mA  
High-Side, IOUT = -300mA  
High-Side, IOUT = -450mA  
Low-Side, IOUT = 100mA  
Low-Side, IOUT = 300mA  
Low-Side, IOUT = 450mA  
Total Vsat, IOUT = 100mA  
Total Vsat, IOUT = 300mA  
Total Vsat, IOUT = 450mA  
ID = 450mA  
V
V
V
0.2  
V
0.25  
0.30  
0.95  
1.05  
1.25  
1.30  
V
V
1.2  
1.4  
1.6  
V
V
V
V
High-Side Diode, Vf  
Current Sense Amplifier  
Input Offset Voltage  
VCM = 6V, Low range mode  
2.0  
4.0  
mV  
mV  
High range mode  
Input Offset Change  
with Common Mode Input  
Voltage Gain  
VCM = -1V to 13V, Supplies = 12V, Low Range Mode  
VCM = -1V to 13V, Supplies = 12V, High Range Mode  
VDIFF = +1.0 to -1.0V, Vcm = 6V, High Range Mode  
VDIFF = +1.0 to -1.0V, Vcm = 6V, Low Range Mode  
Low-Side, IOUT = 1mA  
2000 µV/V  
4000 µV/V  
0.485 0.50 0.515  
V/V  
V/V  
V
1.95  
2.0  
0.1  
0.1  
21  
2.05  
0.3  
0.3  
27  
Saturation Voltage  
High-Side, IOUT = -1mA, Referenced to = VIN(+)  
(REF Input - C/S(+))/48kohms, Tj = 25°C  
V
Input Bias Current at Ref. Input  
15  
µA/V  
Load Current Sense and Rectification  
Sense Buffer Offset Voltage  
Sense Buffer CMRR  
±
REF Input to IDIF REF, IOUT = 1mA  
10  
mV  
dB  
±1mA, REF Input = 2V to 10V  
IOUT =  
70  
90  
± 100  
µA, IDIF Out = 1V  
IDIF REF to IDIF Out Current  
Ratio  
IDIF =  
0.95  
0.94  
1.0  
1.0  
1.0  
1.05  
1.06  
5.0  
A/A  
A/A  
µA/V  
±1mA, IDIF Out = 1V  
IDIF =  
± 1mA, VIN  
(+)  
= 4V to 15V,REF Input = 2V  
IDIF Out Supply Sensitivity  
IDIF Out Common Mode Sensitivity  
(delta IDIF Out/delta REF Input)  
Auxiliary Functions  
IDIF Out =  
±1mA, REF Input = 2V to10V, IDIF Out = 1V  
IOUT =  
1.0  
5.0  
1.7  
µA/V  
Inhibit Input Threshold  
Inhibit Input Current  
0.6  
-1.0  
0.6  
1.1  
-0.5  
1.1  
50  
V
µA  
V
Inhibit Input = 1.7V  
O/C Force Input Threshold  
O/C Force Input Current  
Range Input Threshold  
Range Input Current  
1.7  
100  
1.7  
O/C Force Input = 1.7V  
µA  
V
0.6  
1.1  
50  
Range Input = 1.7V  
Range Input = 0V, Pin Current =  
to AOUT  
100  
µA  
±500µA, Referenced  
COMP ADJ Pin Saturation  
Voltage  
0.02  
0.1  
V
COMP ADJ Leakage Current  
Range Input = 1.7V, Supplies = 12V  
AOUT  
-VComp Adj = ±6V  
5.0  
1.5  
µA  
mA  
°C  
Total Supply Current When Inhibited VIN(+) and VC(+) currents  
Thermal Shutdown Temperature  
1.0  
165  
3
UC3178  
PIN DESCRIPTIONS:  
A & B OUT: Outputs for the A & B power amplifiers, IDIF REF: Output of the IDIF sense buffer. Voltage on this  
providing differential drive to the load during normal op- pin will track the applied voltage on the REF Input pin.  
eration. During a UVLO, Inhibit, or O/C condition both of Current through this pin is full wave rectified and appears  
these outputs will be in a high, source only state. High- as a current sourced from the IDIF OUT pin.  
side diodes are included to catch inductive load currents  
flowing into these pins, inductive kicks on the low-side are  
caught by the high-side output transistors.  
Inhibit : A high impedance logic input that disables the A  
and B power amplifiers, the IDIF sense buffer, and the  
Current Sense amplifier. This input has an internal pull-up  
AIN(+): Non-inverting input to the A amplifier. Normally tied that will inhibit the device if the input is left open.  
to the REF Input when the current sense amplifier is used.  
O/C Force: Logic input that forces the O/C condition.  
AIN(-): Inverting input to the A amplifier. Used as the sum-  
O/C IND: Open collector ouput that indicates, with an ac-  
ming node to close the loop on the overall power  
tive low state, an O/C condition.  
amplifier.  
O/C Sense: Input to the Over Current Comparator. When  
this input is above its 1V threshold the low-side devices of  
both the A & B power amplifiers will be disabled forcing a  
high, source only, state at both outputs.  
BIN(+): Non-inverting input to the B amplifier. This pin nor-  
mally sets the reference point for the differential voltage  
swing at the load.  
BIN(-): Inverting input to the B amplifier. Used to program  
the gain of the B amplifier.  
PWR GND: Current return for all high level circuitry, this  
pin should be connected to the same potential as GND.  
COMP ADJ: The compensation adjust pin allows the user  
Range: When this pin is open or at a logic low potential,  
to provide an auxiliary compensation network for the A am-  
the current sense amplifier will be in its low range mode.  
plifier that is only active when the current sense amplifier is  
In this mode the voltage gain of the amplifier will be 2. If  
in the low range. With this option, the user can control the  
this pin is brought to a logic high, the gain of the current  
change in bandwidth that would otherwise result from the  
sense amplifier will change into its high range value of  
0.5. This factor of four change in gain will vary the overall  
gain change in the feedback loop.  
C/S(+): The non-inverting input to the current sense ampli- transconductance of the power amplifier by the same ra-  
fier is typically tied to the load side of the series current tio, with the transconductance being the highest in the  
sense resistor. This pin can be pulled below ground during high mode. This feature allows improved dynamic range  
an abrupt load current change with an inductive load. of load current control for a given control input range and  
Proper operation of the current sense amplifier will result if resolution.  
this pin does not go below ground by an amount greater  
than:  
REF Input: Sets the Reference level at the C/S Output,  
and is normally tied to the system reference level for in-  
puts to the power amplifier.  
(REF Input / 2 ) - 0.3V.  
C/S(-): The inverting input to the current sense amplifier is  
VIN(+): Provides bias supply to the device. The High-Side  
typically tied to the connection between the B amplifier  
drive to the power stages on both the A and B amplifiers  
output and the current sense resistor that is in series with  
is referenced to this pin. The High-side saturation volt-  
ages, and UVLO are specified and measured with respect  
the load.  
C/S Output: The output of the current sense amplifier has to this supply pin.  
a 1.5mA current source pull-up and an active NPN pull-  
down. The output will pull to within 0.3V of either rail with  
a load current of less than 1mA.  
VC(+): This supply pin is the high current supply to the  
collectors of the high-side NPN output devices on the A  
and B amplifiers. This supply should be powered when-  
GND: Reference point for the internal reference, O/C ever the A or B amplifiers are to be activated. This pin can  
comparator, and other low-level circuitry.  
operate approximately 400mV below the VIN(+) supply  
without affecting the voltage available to the load.  
IDIF OUT: Current source output pin. The value of the out-  
put current is nominally equal to the magnitude of the  
current through the IDIF REF pin.  
4
UC3178  
TYPICAL APPLICATION  
UDG-92009  
Power amplifier transconductance  
where:  
Il is the load current  
Il RB  
Vs RA  
1
Go =  
=
Vs is the input command voltage  
AVCS is the current sense amplifier gain  
= 2.0 in low range mode  
= 0.5 in high range mode  
VO/C is the 1.0V over-current comparator threshold  
AV RS  
CS  
Peak commanded load current  
RD  
IlMAX = Vo/c  
RS AVCS RE  
UNITRODE INTEGRATED CIRCUITS  
7 CONTINENTAL BLVD.MERRIMACK, NH 03054  
TEL (603) 424-2410 FAX (603) 424-3460  
5
IMPORTANT NOTICE  
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue  
any product or service without notice, and advise customers to obtain the latest version of relevant information  
to verify, before placing orders, that information being relied on is current and complete. All products are sold  
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those  
pertaining to warranty, patent infringement, and limitation of liability.  
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in  
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent  
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily  
performed, except those mandated by government requirements.  
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF  
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL  
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR  
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER  
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO  
BE FULLY AT THE CUSTOMER’S RISK.  
In order to minimize risks associated with the customer’s applications, adequate design and operating  
safeguards must be provided by the customer to minimize inherent or procedural hazards.  
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent  
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other  
intellectual property right of TI covering or relating to any combination, machine, or process in which such  
semiconductor products or services might be or are used. TI’s publication of information regarding any third  
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.  
Copyright 1999, Texas Instruments Incorporated  

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