TXS0104E-Q1 [TI]
汽车类用于漏极开路应用的 4 位双向电压电平转换器;
| 型号： | TXS0104E-Q1 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 汽车类用于漏极开路应用的 4 位双向电压电平转换器 转换器 电平转换器 |
| 文件： | 总28页 (文件大小：1627K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TXS0104E-Q1
ZHCSCI1D –NOVEMBER 2013 –REVISED JUNE 2023
TXS0104E-Q1 用于开漏和推挽应用的
汽车类4 位双向电压电平转换器
1 特性
3 说明
• 符合汽车应用要求
• 具有符合AEC-Q100 标准的下列特性：
– 器件温度等级1：–40°C 至+125°C 环境工作
温度范围
– 器件HBM ESD 分类等级2
– 器件CDM ESD 分类等级C6
• 无需方向控制信号
由于电压不匹配，TXS0104E-Q1 器件连接芯片与芯片
间的非兼容逻辑通信。这款自动导向转换器可方便地用
来在无需主机方向控制的情况下缩小之间的差距。在无
需主机干预的情况下，每个通道可混合使用，并且可以
与不同的输出类型（开漏或推挽）和混合数据流（发送
或接收）相匹配。这个 4 位非反向转换器使用两个独
立的可配置电源轨。A 和 B 端口被设计用来分别跟踪
V
CCA 和 VCCB。VCCB 引脚在 VCCA 引脚接受 1.65V 至
• 最大数据速率：
3.6V 之间的任一电源电压的同时，接受 2.3V 至 5.5V
之间的任何电源电压，这样的话，VCCA 小于或等于
VCCB。这个跟踪功能可实现 1.8V，2.5V，3.3V 和 5V
电压节点之间的低电压双向转换。
– 最大值24Mbps（推挽）
– 2Mbps（开漏）
• A 端口支持1.65V 至3.6V 的电压，B 端口支持
2.3V 至5.5V 的电压(VCCA ≤VCCB
)
• 无需电源时序控制—VCCA 或VCCB 均可优先斜升
• 静电放电(ESD) 保护性能超过JESD 22 规范要
求：
当输出使能端 (OE) 输入为低电平时，所有输出都被置
于高阻抗状态。
TXS0104E-Q1 器件被设计成 OE 输入电路由 VCCA 供
电。
– A 端口
• 2000V 人体放电模型(A114-B)
• 1000V 充电器件模型(C101)
– B 端口
为了在加电或断电期间处于高阻抗状态，OE 引脚必须
通过一个下拉电阻接到 GND 引脚；此电阻的最小值由
驱动器的拉电流能力决定。
• 15kV 人体放电模型(A114-B)
• 1000V 充电器件模型(C101)
• IEC 61000-4-2 ESD（B 端口）
封装信息
封装(1)
封装尺寸(2)
器件型号
PW（TSSOP，14） 5mm × 6.4mm
BQA（WQFN，14）
– ±8kV 接触放电
– ±10kV 气隙放电
TXS0104E-Q1
3mm × 2.5mm
(3)
2 应用
(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附
录。
(2) 封装尺寸（长× 宽）为标称值，并包括引脚（如适用）。
(3) 预发布封装
• 汽车信息娱乐系统，高级驾驶辅助系统(ADAS)
• 在主处理器和外设模块间进行隔离和电平转换
• I2C 或1 线制电压电平转换
3.4
3.2
3
VGATE = 4.3 V
VGATE = 3.5 V
2.8
2.6
2.4
2.2
2
V=2.8V
GATE
V
= 2.5 V
GATE
VGATE = 2.2 V
1.8
1.6
1.4
1.2
1
0.8
0.6
0.4
0.2
0
0
1
2
3
4
5
Input Voltage (V)
C001
N 沟道晶体管的传输特征
本文档旨在为方便起见，提供有关TI 产品中文版本的信息，以确认产品的概要。有关适用的官方英文版本的最新信息，请访问
www.ti.com，其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前，请务必参考最新版本的英文版本。
English Data Sheet: SCES853
TXS0104E-Q1
ZHCSCI1D –NOVEMBER 2013 –REVISED JUNE 2023
www.ti.com.cn
Table of Contents
7.2 Voltage Waveforms...................................................14
8 Detailed Description......................................................15
8.1 Overview...................................................................15
8.2 Functional Block Diagram.........................................15
8.3 Feature Description...................................................16
8.4 Device Functional Modes..........................................16
9 Application and Implementation..................................17
9.1 Application Information............................................. 17
9.2 Typical Application.................................................... 17
9.3 Power Supply Recommendations.............................18
9.4 Layout....................................................................... 19
10 Device and Documentation Support..........................20
10.1 Documentation Support.......................................... 20
10.2 接收文档更新通知................................................... 20
10.3 支持资源..................................................................20
10.4 Trademarks.............................................................20
11 静电放电警告................................................................. 20
12 术语表............................................................................20
13 Mechanical, Packaging, and Orderable
1 特性................................................................................... 1
2 应用................................................................................... 1
3 说明................................................................................... 1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 4
6.1 Absolute Maximum Ratings........................................ 4
6.2 ESD Ratings............................................................... 4
6.3 Recommended Operating Conditions.........................4
6.4 Thermal Information....................................................5
6.5 Electrical Characteristics.............................................5
6.6 Timing Requirements—VCCA = 1.8 V ± 0.15 V........... 6
6.7 Timing Requirements—VCCA = 2.5 V ± 0.2 V............. 6
6.8 Timing Requirements—VCCA = 3.3 V ± 0.3 V............. 6
6.9 Switching Characteristics—VCCA = 1.8 V ± 0.15 V..... 7
6.10 Switching Characteristics—VCCA = 2.5 V ± 0.2 V..... 9
6.11 Switching Characteristics—VCCA = 3.3 V ± 0.3 V....11
6.12 Typical Characteristics............................................12
7 Parameter Measurement Information..........................13
7.1 Load Circuits.............................................................13
Information.................................................................... 20
4 Revision History
注：以前版本的页码可能与当前版本的页码不同
Changes from Revision C (January 2017) to Revision D (June 2023)
Page
• 更新了整个文档中的表格、图和交叉参考的编号格式.........................................................................................1
• 向数据表添加了 BQA 封装信息.......................................................................................................................... 1
Changes from Revision B (May 2014) to Revision C (January 2017)
Page
• Changed the type of the OE pin from output (O) to input (I) in the Pin Functions table..................................... 3
• Moved Tstg back to the Absolute Maximum Ratings table and changed the Handling Ratings table to ESD
Ratings ...............................................................................................................................................................4
Changes from Revision A (April 2014) to Revision B (May 2014)
Page
• 将器件状态从产品预发布 更改为量产数据 .........................................................................................................1
Copyright © 2023 Texas Instruments Incorporated
English Data Sheet: SCES853
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5 Pin Configuration and Functions
VCCA
VCCB
B1
1
2
3
4
5
6
7
14
13
12
11
10
9
A1
A2
A3
A4
B2
B3
B4
NC
NC
OE
GND
8
NC - No internal connection
图5-1. PW Package, 14-Pin TSSOP (Top View)
表5-1. Pin Functions
PIN
TYPE(1)
DESCRIPTION
NAME
NO.
2
A1
A2
A3
A4
B1
B2
B3
B4
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
—
Input-output 1 for the A port. This pin is referenced to VCCA
Input-output 2 for the A port. This pin is referenced to VCCA
Input-output 3 for the A port. This pin is referenced to VCCA
Input-output 4 for the A port. This pin is referenced to VCCA
Input-output 1 for the B port. This pin is referenced to VCCB
Input-output 2 for the B port. This pin is referenced to VCCB
Input-output 3 for the B port. This pin is referenced to VCCB
Input-output 4 for the B port. This pin is referenced to VCCB
Ground
.
.
.
.
.
.
.
.
3
4
5
13
12
11
10
7
6
NC
OE
No connection
—
9
Tri-state output-mode enable. Pull the OE pin low to place all outputs in tri-state mode. This
pin is referenced to VCCA
8
I
.
VCCA
VCCB
1
I
I
A-port supply voltage. 1.65 V ≤VCCA ≤3.6 V and VCCA ≤VCCB
B-port supply voltage. 2.3 V ≤VCCB ≤5.5 V.
.
14
(1) I = input, O = output
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English Data Sheet: SCES853
TXS0104E-Q1
ZHCSCI1D –NOVEMBER 2013 –REVISED JUNE 2023
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
MAX
UNIT
VCCA
4.6
6.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
Supply voltage
VCCB
V
A1, A2, A3, A4
A port
B port
A port
B port
A port
B port
VI < 0
VO < 0
4.6
(2)
Input-output pin voltage, VIO
V
V
V
B1, B2, B3, B4
6.5
4.6
Voltage range applied to any output in the high-
impedance or power-off state(2)
6.5
Output voltage, VO
VCCA + 0.5
VCCB + 0.5
Voltage range applied to any output in the high or
low state(2) (3)
mA
mA
mA
mA
°C
Input clamp current, IIK
–50
–50
±50
Output clamp current, IOK
Continuous output current, IO
Continuous current through each VCCA, VCCB, or GND
Storage temperature range, Tstg
±100
150
–65
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
(3) The value of VCCA and VCCB are provided in the recommended operating conditions table.
6.2 ESD Ratings
VALUE
±2500
±1500
UNIT
Human-body model (HBM), per AEC Q100-002(1)
Charged-device model (CDM), per AEC Q100-011
V(ESD)
Electrostatic discharge
V
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
VCCA
VCCB
MIN
MAX UNIT
VCCA
VCCB
Supply voltage(1)
Supply voltage(1)
1.65
3.6
V
5.5
2.3
1.65 to 1.95 V
2.3 to 3.6 V
VCCA
VCCA –0.2
VIH(Ax)
High-level input voltage
A-port I/Os
2.3 to 5.5 V
2.3 to 5.5 V
VCCA
VCCA –0.4
V
VIH(Bx)
VIH(OE)
VIL(Ax)
VIL(Bx)
VIL(OE)
High-level input voltage
High-level input voltage
Low-level input voltage
Low-level input voltage
Low-level input voltage
B-port I/Os
OE input
VCCB
VCCB –0.4
1.65 to 3.6 V
1.65 to 3.6 V
VCCA × 0.65
5.5
A-port I/Os
B-port I/Os
OE input
0
0
0
0.15
2.3 to 5.5 V
2.3 to 5.5 V
0.15
V
VCCA × 0.35
A-port I/Os,
push-pull driving
Input transition rise or fall rate
10
Δt/Δv(Ax)
B-port I/Os,
push-pull driving
1.65 to 3.6 V
ns/V
Input transition rise or fall rate
Input transition rise or fall rate
10
10
Δt/Δv(Bx)
Δt/Δv(OE)
OE input
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over operating free-air temperature range (unless otherwise noted)
VCCA
VCCB
MIN
MAX UNIT
125 °C
TA
Operating free-air temperature
–40
(1) VCCA must be less than or equal to VCCB, and VCCA must not exceed 3.6 V.
6.4 Thermal Information
over operating free-air temperature range (unless otherwise noted)
TXS0104E-Q1
PW (TSSOP)
14 PINS
120.1
THERMAL METRIC(1)
UNIT
RθJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJC(top)
RθJB
49.1
61.8
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
6.2
ψJT
61.2
ψJB
RθJC(bot)
—
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report (SPRA953).
6.5 Electrical Characteristics
over recommended operating free-air temperature range (unless otherwise noted) (1)
PARAMETER
TEST CONDITIONS
VCCA
VCCB
MIN
TYP
MAX
UNIT
High-level output voltage,
A port
IOH = –20 μA,
VI(Bx) ≥VCCB –0.4 V
VOH(Ax)
VOL(Ax)
VOH(Bx)
VOL(Bx)
1.65 to 3.6 V
2.3 to 5.5 V
VCCA × 0.75
V
IOL = 1 mA,
VI(Bx) ≤0.15 V
Low-level output voltage,
A port
1.65 to 3.6 V
1.65 to 3.6 V
1.65 to 3.6 V
2.3 to 5.5 V
2.3 to 5.5 V
2.3 to 5.5 V
0.4
V
V
V
High-level output voltage,
B port
IOH = –20 μA,
VI(Ax) ≥VCCA –0.2 V
VCCB × 0.75
IOL = 1 mA,
VI(Ax) ≤0.15 V
Low-level output voltage,
B port
0.4
±2
±1
±3
±1
VI = VCCI or GND
II(OE)
Input current, OE
1.65 to 3.6 V
1.65 to 3.6 V
2.3 to 5.5 V
2.3 to 5.5 V
μA
μA
VI = VCCI or GND,
TA = 25°C
OE = VIL
Off-state output current, A or
B port
IOZ
OE = VIL,
TA = 25°C
1.65 to VCCB
2.3 to 5.5 V
4
2.2
–1
21
VI = VO = Open,
IO = 0
3.6 V
0
5.5 V
ICCA
Supply current, A port
Supply current, B port
μA
μA
0
1.65 to VCCB
3.6 V
2.3 to 5.5 V
0
VI = VO = Open,
IO = 0
ICCB
–1
5
0
5.5 V
Supply current, A port plus B VI = VO = Open,
ICCA+ICCB
1.65 V to VCCB
3.3 V
2.3 to 5.5 V
3.3 V
25
4
μA
port supply current
IO = 0
CI(OE)
Input capacitance, OE
pF
TA = 25°C
TA = 25°C
TA = 25°C
2.5
5
6.5
Input-output capacitance, A
port
CIO(Ax)
3.3 V
3.3 V
pF
16.5
Input-output capacitance, B
port
CIO(Bx)
12
(1) VCCA must be less than or equal to VCCB, and VCCA must not exceed 3.6 V.
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ZHCSCI1D –NOVEMBER 2013 –REVISED JUNE 2023
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6.6 Timing Requirements—VCCA = 1.8 V ± 0.15 V
over recommended operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
VCCB = 2.5 V ± 0.2 V
18
21
23
2
Push-pull driving
Open-drain driving
Push-pull driving
Open-drain driving
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
Data rate
Mbps
2
2
55
47
Pulse duration, data
inputs
See 图7-4
43
tw
ns
500
500
500
6.7 Timing Requirements—VCCA = 2.5 V ± 0.2 V
over recommended operating free-air temperature range (unless otherwise noted)
MIN
MAX
20
22
24
2
UNIT
VCCB = 2.5 V ± 0.2 V
Push-pull driving
Open-drain driving
Push-pull driving
Open-drain driving
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
Data rate
Mbps
2
2
50
45
Pulse duration, data
inputs
See 图7-4
41
tw
ns
500
500
500
6.8 Timing Requirements—VCCA = 3.3 V ± 0.3 V
over recommended operating free-air temperature range (unless otherwise noted)
MIN
MAX
22
24
2
UNIT
VCCB = 3.3 V ± 0.3 V
Push-pull driving
VCCB = 5 V ± 0.5 V
Data rate
Mbps
VCCB = 3.3 V ± 0.3 V
Open-drain driving
VCCB = 5 V ± 0.5 V
2
VCCB = 3.3 V ± 0.3 V
45
41
Push-pull driving
Pulse duration, Data
inputs
VCCB = 5 V ± 0.5 V
tw
ns
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
500
500
See 图7-4
Open-drain driving
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6.9 Switching Characteristics—VCCA = 1.8 V ± 0.15 V
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
MAX
6
UNIT
VCCB = 2.5 V ± 0.2 V
Push-pull driving
Open-drain driving
Push-pull driving
Open-drain driving
Push-pull driving
Open-drain driving
Push-pull driving
Open-drain driving
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
5.8
5.8
8.8
9.6
10
Propagation delay time (high to low), from
A (input) to B (output)
See 图7-5
tPHL(A-B)
tPHL(B-A)
tPLH(A-B)
tPLH(B-A)
ns
4.4
4.5
4.7
5.3
4.4
4
Propagation delay time (high to low), from
B (input) to A (output)
See 图7-5
7.7
6.8
7
Propagation delay time (low to high), from
A (input) to B (output)
See 图7-5
50
26
33
ns
5.3
4.5
0.5
36
Propagation delay time (low to high), from
B (input) to A (output)
See 图7-5
16
20
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
200
200
200
200
200
200
9.5
9.3
15
ten(OE-A) Enable time, from OE (input) to A
ten(OE-B) or B (output)
ns
ns
tdis(OE-A) Disable time, from OE (input) to A
tdis(OE-B) or B (output)
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
Push-pull driving
Open-drain driving
Push-pull driving
Open-drain driving
tr(Ax)
Rise time, A port
ns
38
30
22
199
150
109
10.8
9.1
7.6
186
112
58
tr(Bx)
Rise time, B port
ns
34
23
10
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6.9 Switching Characteristics—VCCA = 1.8 V ± 0.15 V (continued)
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
MAX
UNIT
VCCB = 2.5 V ± 0.2 V
5.9
6
Push-pull driving
Open-drain driving
Push-pull driving
Open-drain driving
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
13.3
6.9
6.4
6.1
7.6
7.5
8.8
13.8
16.2
16.2
1
tf(Ax)
Fall time, A port
ns
tf(Bx)
Fall time, B port
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
tsk
Channel-to-channel skew
Maximum data rate
1
ns
1
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
18
21
23
2
Push-pull driving
Mbps
Open-drain driving
2
2
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6.10 Switching Characteristics—VCCA = 2.5 V ± 0.2 V
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
MAX
3.2
3.3
3.4
6.3
6
UNIT
VCCB = 2.5 V ± 0.2 V
Push-pull driving
Open-drain driving
Push-pull driving
Open-drain driving
Push-pull driving
Open-drain driving
Push-pull driving
Open-drain driving
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
Propagation delay time (high to low), from
A (input) to B (output)
See 图7-5
tPHL(A-B)
tPHL(B-A)
tPLH(A-B)
tPLH(B-A)
5.8
3
ns
3.6
4.3
4.7
4.2
4
Propagation delay time (high to low), from
B (input) to A (output)
See 图7-5
3.5
4.1
4.4
3.5
4.1
4.4
2.5
1.6
0.7
2.5
1.6
1
Propagation delay time (low to high), from
A (input) to B (output)
See 图7-5
ns
Propagation delay time (low to high), from
B (input) to A (output)
See 图7-5
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
200
200
200
200
200
200
7.4
6.6
5.6
180
150
105
8.3
7.2
6.1
170
120
64
ten(OE-A) Enable time, from OE (input) to A or B
ten(OE-B) (output)
ns
ns
tdis(OE-A) Disable time, from OE (input) to A or B
tdis(OE-B) (output)
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
Push-pull driving
Open-drain driving
Push-pull driving
Open-drain driving
tr(Ax)
Rise time, A port
ns
34
28
24
tr(Bx)
Rise time, B port
ns
35
24
12
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6.10 Switching Characteristics—VCCA = 2.5 V ± 0.2 V (continued)
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
MAX
UNIT
VCCB = 2.5 V ± 0.2 V
5.7
5.5
5.3
Push-pull driving
Open-drain driving
Push-pull driving
Open-drain driving
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
tf(Ax)
Fall time, A port
ns
5.8
7.8
6.7
6.6
8.8
9.4
10.4
1
tf(Bx)
Fall time, B port
ns
ns
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
tsk
Channel-to-channel skew
Maximum data rate
1
1
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
20
22
24
2
Push-pull driving
Mbps
Open-drain driving
2
2
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6.11 Switching Characteristics—VCCA = 3.3 V ± 0.3 V
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
MAX
2.4
3.1
4.2
4.6
2.5
3.3
124
97
UNIT
VCCB = 3.3 V ± 0.3 V
Push-pull driving
Open-drain driving
Push-pull driving
Open-drain driving
Push-pull driving
Open-drain driving
Push-pull driving
Open-drain driving
Propagation delay time (high to low),
from A (input) to B (output)
See 图7-5
VCCB = 5 V ± 0.5 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
tPHL(A-B)
tPHL(B-A)
tPLH(A-B)
tPLH(B-A)
ns
Propagation delay time (high to low),
from B (input) to A (output)
See 图7-5
4.2
4.4
4.2
4.4
2.5
2.6
2.5
3.3
200
200
200
200
5.6
5
Propagation delay time (low to high),
from A (input) to B (output)
See 图7-5
ns
Propagation delay time (low to high),
from B (input) to A (output)
See 图7-5
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
ten(OE-A) Enable time, from OE (input) to A or B
ns
ns
ten(OE-B) (output)
tdis(OE-A) Disable time,from OE (input) to A or B
tdis(OE-B) (output)
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
Push-pull driving
Open-drain driving
Push-pull driving
Open-drain driving
Push-pull driving
Open-drain driving
Push-pull driving
Open-drain driving
tr(Ax)
tr(Bx)
tf(Ax)
Rise time, A port
Rise time, B port
Fall time, A port
ns
ns
ns
25
19
140
102
6.4
7.4
130
75
26
14
5.4
5
6.1
5.7
7.4
7.6
7.6
8.3
1
tf(Bx)
Fall time, B port
ns
ns
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
tsk
Channel-to-channel skew
Maximum data rate
1
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
22
24
2
Push-pull driving
Mbps
Open-drain driving
2
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6.12 Typical Characteristics
700
600
500
400
300
200
100
0
700
600
500
400
300
200
100
0
VCCB = 2.7 V
VCCB = 3.3 V
VCCB = 5 V
VCCB = 3.3 V
VCCB = 5 V
0
2
4
6
8
10
12
Low-Level Current (mA)
14
16
18
20
0
2
4
6
8
10
12
Low-Level Current (mA)
14
16
18
20
D003
D001
VCCA = 2.7 V
VIL(A) = 150 mV
VCCA = 1.8 V
VIL(A) = 150 mV
图6-2. Low-Level Output Voltage (VOL(Ax)
)
图6-1. Low-Level Output Voltage (VOL(Ax)
)
vs Low-Level Current (IOL(Ax)
)
vs Low-Level Current (IOL(Ax)
)
700
600
500
400
300
200
100
0
VCCB = 3.3 V
0
2
4
6
8
10
12
Low-Level Current (mA)
14
16
18
20
D002
VCCA = 3.3 V
VIL(A) = 150 mV
图6-3. Low-Level Output Voltage (VOL(Ax)) vs Low-Level Current (IOL(Ax)
)
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7 Parameter Measurement Information
7.1 Load Circuits
VCCI
VCCI
VCCO
VCCO
DUT
DUT
IN
IN
OUT
OUT
1 Mꢀ
15 pF
1 Mꢀ
15 pF
图7-2. Data Rate, Pulse Duration, Propagation
Delay, Output Rise-Time and Fall-Time
Measurement Using an Open-Drain Driver
图7-1. Data Rate, Pulse Duration, Propagation
Delay, Output Rise-Time and Fall-Time
Measurement Using a Push-Pull Driver
2 × VCCO
S1
Open
50 kꢀ
From Output
Under Test
15 pF
50 kꢀ
TEST
S1
tPZL / tPLZ
2 × VCCO
(tdis
tPHZ / tPZH
(ten
)
Open
)
图7-3. Load Circuit for Enable-Time and Disable-Time Measurement
1. tPLZ and tPHZ are the same as tdis.
2. tPZL and tPZH are the same as ten.
3. VCCI is the VCC associated with the input port.
4. VCCO is the VCC associated with the output port.
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7.2 Voltage Waveforms
VCCI
tw
Input
VCCI / 2
VCCI / 2
VCCI
0 V
Input
VCCI / 2
VCCI / 2
tPLH
tPHL
0 V
VOH
图7-4. Pulse Duration
0.9 × VCCO
0.1 × VCCO
VCCO / 2
tr
Output
VCCO / 2
VOL
tf
图7-5. Propagation Delay Times
VCCA
VCCA / 2
VCCA / 2
OE input
0 V
tPLZ
tPZL
VOH
Output
Waveform 1
VCCO / 2
S1 at 2 × VCCO
V
× 0.1
OH
VOL
(see Note 2)
tPHZ
tPZH
VOH
0 V
Output
Waveform 2
S1 at GND
V
× 0.9
OH
VCCO / 2
(see Note 2)
1. CL includes probe and jig capacitance.
2. Waveform 1 in 图7-6 is for an output with internal such that the output is high, except when OE is high (see 图7-3). Waveform 2
in 图7-6 is for an output with conditions such that the output is low, except when OE is high.
3. All input pulses are supplied by generators having the following characteristics: PRR≤10 MHz, ZO = 50 Ω, dv/dt ≥1 V/ns.
4. The outputs are measured one at a time, with one transition per measurement.
5. tPLZ and tPHZ are the same as tdis
.
6. tPZL and tPZH are the same as ten
.
7. tPLH and tPHL are the same as tpd
.
8. VCCI is the VCC associated with the input port.
9. VCCO is the VCC associated with the output port.
图7-6. Enable and Disable Times
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8 Detailed Description
8.1 Overview
The TXS0104E-Q1 device is a directionless voltage-level translator specifically designed for translating logic
voltage levels. The A port is able to accept I/O voltages ranging from 1.65 V to 3.6 V, while the B port can accept
I/O voltages from 2.3 V to 5.5 V. The device is a pass gate architecture with edge rate accelerators (one shots)
to improve the overall data rate. 10-kΩ pullup resistors, commonly used in open drain applications, have been
conveniently integrated so that an external resistor is not needed. While this device is designed for open drain
applications, the device can also translate push-pull CMOS logic outputs.
8.2 Functional Block Diagram
V
CCA
V
CCB
OE
One-Shot
Accelerator
One-Shot
Accelerator
Gate Bias
Gate Bias
Gate Bias
Gate Bias
10 kꢀ
10 kꢀ
A
B
B
B
B
One-Shot
Accelerator
One-Shot
Accelerator
10 kꢀ
10 kꢀ
10 kꢀ
10 kꢀ
A
A
A
One-Shot
Accelerator
One-Shot
Accelerator
10 kꢀ
One-Shot
Accelerator
One-Shot
Accelerator
10 kꢀ
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8.3 Feature Description
8.3.1 Architecture
The TXS0104E-Q1 architecture (see 图 8-1) does not require a direction-control signal in order to control the
direction of data flow from A to B or from B to A.
VCCB
VCCA
One-shot
One-shot
T1
T2
10 kΩ
10 kΩ
Gate Bias
A
B
图8-1. Architecture of a TXS01xx Cell
Each A-port I/O has an internal 10-kΩ pullup resistor to VCCA, and each B-port I/O has an internal 10-kΩ pullup
resistor to VCCB. The output one-shots detect rising edges on the A or B ports. During a rising edge, the one-shot
turns on the PMOS transistors (T1, T2) for a short duration which speeds up the low-to-high transition.
8.3.2 Input Driver Requirements
The fall time (tfA, tfB) of a signal depends on the output impedance of the external device driving the data I/Os of
the TXS0104E-Q1 device. Similarly, the tPHL and maximum data rates also depend on the output impedance of
the external driver. The values for tfA, tfB, tPHL, and maximum data rates in the data sheet assume that the output
impedance of the external driver is less than 50 Ω.
8.3.3 Power Up
During operation, ensure that VCCA ≤ VCCB at all times. During power-up sequencing, VCCA ≥ VCCB does not
damage the device, so any power supply can be ramped up first.
8.3.4 Enable and Disable
The TXS0104E-Q1 device has an OE input that disables the device by setting OE low, which places all I/Os in
the high-impedance state. The disable time (tdis) indicates the delay between the time when the OE pin goes low
and when the outputs actually enter the high-impedance state. The enable time (ten) indicates the amount of
time the user must allow for the one-shot circuitry to become operational after the OE pin is taken high.
8.3.5 Pull Up and Pull Down Resistors on I/O Lines
Each A-port I/O has an internal 10-kΩ pullup resistor to VCCA, and each B-port I/O has an internal 10-kΩ pullup
resistor to VCCB. If a smaller value of pullup resistor is required, an external resistor must be added from the I/O
to VCCA or VCCB (in parallel with the internal 10-kΩ resistors).
8.4 Device Functional Modes
The TXS0104E-Q1 device has two functional modes, enabled and disabled. To disable the device set the OE
input low, which places all I/Os in a high impedance state. Setting the OE input high will enable the device.
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9 Application and Implementation
备注
以下应用部分中的信息不属于TI 器件规格的范围，TI 不担保其准确性和完整性。TI 的客 户应负责确定
器件是否适用于其应用。客户应验证并测试其设计，以确保系统功能。
9.1 Application Information
The TXS0104E-Q1 device can be used in level-translation applications for interfacing devices or systems
operating at different interface voltages with one another. The TXS0104E-Q1 device is optimal for use in
applications where an open-drain driver is connected to the data I/Os. The TXS0104E-Q1 device can also be
used in applications where a push-pull driver is connected to the data I/Os, but the TXB0104-Q1 device might be
a better option for such push-pull applications.
9.2 Typical Application
1.8 V
3.3 V
0.1 µF
0.1 µF
V
V
CCB
CCA
OE
1.8-V
System
Controller
3.3-V
System
TXS0104E-Q1
A1
A2
A3
A4
B1
B2
B3
B4
Data
Data
GND
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图9-1. Application Schematic
9.2.1 Design Requirements
For this design example, use the parameters listed in 表9-1.
表9-1. Design Parameters
DESIGN PARAMETER
EXAMPLE VALUE
1.65 to 3.6 V
Input voltage range
Output voltage range
2.3 to 5.5 V
9.2.2 Detailed Design Procedure
To begin the design process, determine the following:
• Input voltage range
– Use the supply voltage of the device that is driving the TXS0104E-Q1 device to determine the input
voltage range. For a valid logic high the value must exceed the VIH of the input port. For a valid logic low
the value must be less than the VIL of the input port.
• Output voltage range
– Use the supply voltage of the device that the TXS0104E-Q1 device is driving to determine the output
voltage range.
– The TXS0104E-Q1 device has 10-kΩinternal pullup resistors. External pullup resistors can be added to
reduce the total RC of a signal trace if necessary.
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• An external pull down resistor decreases the output VOH and VOL. Use 方程式1 to calculate the VOH as a
result of an external pull down resistor.
V
= V
× R / R + 10 kΩ
PD
(1)
OH
CCx
PD
where
• VCCx is the supply voltage on either VCCA or VCCB
• RPD is the value of the external pull down resistor
9.2.3 Application Curve
5 V
2 V
10 ns/div
VCCA = 1.8 V
VCCB = 5 V
图9-2. Level-Translation of a 2.5-MHz Signal
9.3 Power Supply Recommendations
The TXS0104E-Q1 device uses two separate configurable power-supply rails, VCCA and VCCB. VCCB accepts any
supply voltage from 2.3 V to 5.5 V and VCCA accepts any supply voltage from 1.65 V to 3.6 V as long as Vs is
less than or equal to VCCB. The A port and B port are designed to track VCCA and VCCB respectively allowing for
low-voltage bidirectional translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes.
The TXS0104E-Q1 device does not require power sequencing between VCCA and VCCB during power-up so the
power-supply rails can be ramped in any order. A VCCA value greater than or equal to VCCB (VCCA ≥VCCB) does
not damage the device, but during operation, VCCA must be less than or equal to VCCB (VCCA ≤ VCCB) at all
times.
The output-enable (OE) input circuit is designed so that it is supplied by VCCA and when the (OE) input is low, all
outputs are placed in the high-impedance state. To enable the high-impedance state of the outputs during power
up or power down, the OE input pin must be tied to GND through a pull down resistor and must not be enabled
until VCCA and VCCB are fully ramped and stable. The minimum value of the pull down resistor to ground is
determined by the current-sourcing capability of the driver.
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TXS0104E-Q1
ZHCSCI1D –NOVEMBER 2013 –REVISED JUNE 2023
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9.4 Layout
9.4.1 Layout Guidelines
For reliability of the device, following common printed-circuit board layout guidelines is recommended.
• Bypass capacitors should be used on power supplies.
• Short trace lengths should be used to avoid excessive loading.
• PCB signal trace-lengths must be kept short enough so that the round-trip delay of any reflection is less than
the one shot duration, approximately 30 ns, ensuring that any reflection encounters low impedance at the
source driver.
• Placing pads on the signal paths for loading capacitors or pullup resistors to help adjust rise and fall times of
signals depending on the system requirements
9.4.2 Layout Example
LEGEND
VIA to Power Plane
Polygonal Copper Pour
VIA to GND Plane (Inner Layer)
VCCA
VCCB
Bypass Capacitors
Pads on signal paths for
potential rise and fall time
adjustments
To Controller
To System
1
2
3
4
5
6
7
14
13
12
11
10
9
VCCA
VCCB
A1
B1
To Controller
To System
A2
B2
A3
B3
To Controller
To Controller
To System
To System
A4
B4
NC
GND
NC
OE
8
Keep OE low until VCCA and
VCCB are powered up
图9-3. TXS0104E-Q1 Layout Example
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Product Folder Links: TXS0104E-Q1
English Data Sheet: SCES853
TXS0104E-Q1
ZHCSCI1D –NOVEMBER 2013 –REVISED JUNE 2023
www.ti.com.cn
10 Device and Documentation Support
10.1 Documentation Support
10.1.1 Related Documentation
For related documentation, see the following:
• Texas Instruments, Introduction to Logic application note
10.2 接收文档更新通知
要接收文档更新通知，请导航至 ti.com 上的器件产品文件夹。点击订阅更新 进行注册，即可每周接收产品信息更
改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。
10.3 支持资源
TI E2E™ 支持论坛是工程师的重要参考资料，可直接从专家获得快速、经过验证的解答和设计帮助。搜索现有解
答或提出自己的问题可获得所需的快速设计帮助。
链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范，并且不一定反映 TI 的观点；请参阅
TI 的《使用条款》。
10.4 Trademarks
TI E2E™ is a trademark of Texas Instruments.
所有商标均为其各自所有者的财产。
11 静电放电警告
静电放电(ESD) 会损坏这个集成电路。德州仪器(TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理
和安装程序，可能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级，大至整个器件故障。精密的集成电路可能更容易受到损坏，这是因为非常细微的参
数更改都可能会导致器件与其发布的规格不相符。
12 术语表
TI 术语表
本术语表列出并解释了术语、首字母缩略词和定义。
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
Copyright © 2023 Texas Instruments Incorporated
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PACKAGE OPTION ADDENDUM
www.ti.com
11-Jun-2023
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
PTXS0104EQWBQARQ1
TXS0104EQPWRQ1
ACTIVE
ACTIVE
WQFN
BQA
PW
14
14
3000
TBD
Call TI
Call TI
-40 to 125
-40 to 125
Samples
Samples
TSSOP
2000 RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
04EQ1
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
11-Jun-2023
OTHER QUALIFIED VERSIONS OF TXS0104E-Q1 :
Catalog : TXS0104E
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
6-Jun-2023
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TXS0104EQPWRQ1
TSSOP
PW
14
2000
330.0
12.4
6.9
5.6
1.6
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
6-Jun-2023
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
TSSOP PW 14
SPQ
Length (mm) Width (mm) Height (mm)
356.0 356.0 35.0
TXS0104EQPWRQ1
2000
Pack Materials-Page 2
GENERIC PACKAGE VIEW
BQA 14
2.5 x 3, 0.5 mm pitch
WQFN - 0.8 mm max height
PLASTIC QUAD FLATPACK - NO LEAD
This image is a representation of the package family, actual package may vary.
Refer to the product data sheet for package details.
4227145/A
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Copyright © 2023，德州仪器 (TI) 公司
相关型号：
TXS0104EYZTR
4-BIT BIDIRECTIONAL VOLTAGE-LEVEL TRANSLATOR FOR OPEN-DRAIN AND PUSH-PULL APPLICATIONS
TI
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