TS3USB3031RMGR [TI]
DP3T USB 2.0 高速和移动高清链路 (MHL) (6.5GHz) 开关 | RMG | 12 | -40 to 85;
| 型号： | TS3USB3031RMGR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | DP3T USB 2.0 高速和移动高清链路 (MHL) (6.5GHz) 开关 | RMG | 12 | -40 to 85 开关 PC 输出元件 |
| 文件： | 总24页 (文件大小：1634K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Support &
Community
Product
Folder
Order
Now
Tools &
Software
Technical
Documents
TS3USB3031
ZHCSBM1C –SEPTEMBER 2013–REVISED MARCH 2017
TS3USB3031 双通道、1:3、USB 2.0 高速 (480Mbps) 和移动高清链路
(MHL) 或移动显示端口 (MyDP) 开关
1 特性
3 说明
1
•
V
CC 范围：2.5V 至 4.3V
TS3USB3031 器件为双通道、1：3 多路复用器，其中
包括高速移动高清链路 (MHL)、移动显示端口 (MyDP)
开关和 USB 2.0 高速 (480Mbps) 开关。这些配置允许
系统设计人员针对 MHL/MyDP 信号和两组 USB 数据
使用通用 USB 或 Mico-USB 连接器，从而节省电路板
空间且无需再使用多个连接器。MHL/MyDP 路径支持
最新的 MHL 3.0 修订版本技术规格。
•
移动高清链路 (MHL) 或移动显示端口 (MyDP) 开
关：
–
–
–
带宽 (-3dB)：-6.5GHz
R
ON（典型值）：5.5Ω
ON（典型值）：1.3pF
C
•
USB 开关（2 组）：
–
–
–
带宽 (-3dB)：6.5GHz
TS3USB3031 的 VCC 范围为 2.5V 至 4.3V，支持过压
容限 (OVT) 功能，允许 I/O 引脚承受过压条件（最高
可达 5.5V）。断电保护特性在未加电时强制所有 I/O
引脚处于高阻抗模式，从而实现此类情况下信号线路的
完全隔离而又不产生过多的泄漏电流。TS3USB3031
的选择引脚与 1.8V 控制电压兼容，允许它们直接与移
动处理器的通用 I/O (GPIO) 相连，而无需额外的电压
电平转换电路。
R
ON（典型值）：4.5Ω
ON（典型值）：1pF
C
•
•
电流消耗：28µA（典型值）
特殊 特性：
–
IOFF 保护防止在掉电状态 (VCC = 0V) 下产生泄
漏电流
–
–
1.8V 兼容控制输入 (SEL)
所有 I/O 引脚上的过压容限 (OVT) 高达 5.5V，
而且无需使用外部组件
TS3USB3031 采用小型 12 引脚 VQFN 封装，尺寸仅
为 1.8mm × 1.8mm，是移动应用的 理想选择。
•
•
静电放电 (ESD) 性能:
–
–
2kV 人体放电模型（A114B，II 类）
1kV 带电器件模型 (C101)
器件信息(1)
器件型号
封装
VQFN (12)
封装尺寸（标称值）
封装：
12 引脚 VQFN 封装（1.8mm × 1.8mm，间距
为 0.5mm）
TS3USB3031
1.80mm × 1.80mm
–
(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附
录。
2 应用
•
•
•
智能电话、平板电脑、移动电话
便携式仪表
数码相机 USB 2.0 MHL
开关图
TS3USB3031
MHL+
D+
USB1+
USB2+
MHL-
D-
USB1-
USB2-
Control
Logic
SEL0
SEL1
Copyright © 2016, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
English Data Sheet: SCDS348
TS3USB3031
ZHCSBM1C –SEPTEMBER 2013–REVISED MARCH 2017
www.ti.com.cn
目录
8.3 Feature Description................................................. 10
8.4 Device Functional Modes........................................ 10
Application and Implementation ........................ 11
9.1 Application Information............................................ 11
9.2 Typical Application ................................................. 11
1
2
3
4
5
6
特性.......................................................................... 1
应用.......................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
Pin Configuration and Functions......................... 3
Specifications......................................................... 4
6.1 Absolute Maximum Ratings ...................................... 4
6.2 ESD Ratings.............................................................. 4
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information.................................................. 4
6.5 Electrical Characteristics........................................... 5
6.6 Dynamic Characteristics ........................................... 5
6.7 Typical Characteristics ............................................. 6
Parameter Measurement Information .................. 7
Detailed Description ............................................ 10
8.1 Overview ................................................................. 10
8.2 Functional Block Diagram ....................................... 10
9
10 Power Supply Recommendations ..................... 15
11 Layout................................................................... 15
11.1 Layout Guidelines ................................................. 15
11.2 Layout Example .................................................... 16
12 器件和文档支持 ..................................................... 17
12.1 文档支持................................................................ 17
12.2 接收文档更新通知 ................................................. 17
12.3 社区资源................................................................ 17
12.4 商标....................................................................... 17
12.5 静电放电警告......................................................... 17
12.6 Glossary................................................................ 17
13 机械、封装和可订购信息....................................... 17
7
8
4 修订历史记录
注：之前版本的页码可能与当前版本有所不同。
Changes from Revision B (December 2016) to Revision C
Page
•
•
•
将特性“1.8V 兼容控制输入（SEL、OE）”更改为“1.8V 兼容控制输入 (SEL)” ........................................................................ 1
将开关图 中的第二个引脚的 D+ 更改为 D-............................................................................................................................. 1
Changed DIGITAL CONTROL INPUTS (SEL, OE) To: DIGITAL CONTROL INPUTS (SEL) in the Electrical
Characteristics table ............................................................................................................................................................... 5
•
•
Changed second pin D+ To: D- in the Functional Block Diagram........................................................................................ 10
Deleted sentence: "The internal pulldown resistor on OE enables the switch when power is applied to VCC" from
the Design Requirements section......................................................................................................................................... 12
Changes from Revision A (September 2013) to Revision B
Page
•
已添加 应用 列表、ESD 额定值 表、特性 说明 部分、器件功能模式、应用和实施 部分、电源相关建议 部分、布局
部分、器件和文档支持 部分以及机械、封装和可订购信息 部分。......................................................................................... 1
•
•
已删除 订购信息 表；请参阅数据表末尾的封装选项附录 ....................................................................................................... 1
Moved Peak switch DC output current parameter From: Absolute Maximum Ratings To: Recommended Operating
Conditions............................................................................................................................................................................... 4
Changes from Original (June 2013) to Revision A
Page
•
Added TYPICAL CHARACTERISTICS section...................................................................................................................... 6
2
Copyright © 2013–2017, Texas Instruments Incorporated
TS3USB3031
www.ti.com.cn
ZHCSBM1C –SEPTEMBER 2013–REVISED MARCH 2017
5 Pin Configuration and Functions
RMG Package
12-Pin VQFN
Top View
RMG Package
12-Pin VQFN
Bottom View
1
2
1
2
VCC
D+
USB1+
USB1-
3
4
12
11
VCC
D+
12
11
USB1+
USB1-
3
4
USB2+
USB2-
D-
10
9
5
6
USB2+
USB2-
D-
10
9
5
6
GND
GND
7
8
7
8
Pin Functions
PIN
TYPE(1)
DESCRIPTION
NO.
1
NAME
SEL0
SEL1
USB1+
USB1–
USB2+
USB2–
MHL+
MHL–
GND
I
Digital control Input
2
I
Digital control Input
3
I/O
I/O
I/O
I/O
I/O
I/O
G
Differential signal path 1
Differential signal path 1
Differential signal path 2
Differential signal path 2
Differential signal path 3
Differential signal path 3
Ground
4
5
6
7
8
9
10
11
12
D–
I/O
I/O
P
Common Differential signal path
Common Differential signal path
Power Supply
D+
VCC
(1) G = Ground, I = Input, O = Output, P = Power
Copyright © 2013–2017, Texas Instruments Incorporated
3
TS3USB3031
ZHCSBM1C –SEPTEMBER 2013–REVISED MARCH 2017
www.ti.com.cn
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)(2)
MIN
–0.3
–0.3
–50
MAX
5.5
UNIT
V
VCC
VI/O
IK
Supply voltage(3)
Input/Output DC voltage(3)
5.5
V
Input/Output port diode current (VI/O < 0)
Digital input voltage (SEL0, SEL1)
Digital logic input clamp current (VI < 0)(3)
Continuous switch DC output current (USB and MHL)
Storage temperature
mA
VI
–0.3
–50
5.5
IIK
mA
mA
°C
II/O
Tstg
60
–65
150
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum.
(3) All voltages are with respect to ground, unless otherwise specified.
6.2 ESD Ratings
VALUE
±2000
±1000
UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
Charged-device model (CDM), per JEDEC specification JESD22-C101(2)
Electrostatic
discharge
V(ESD)
V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with
less than 500-V HBM is possible with the necessary precautions. Pins listed as ±2000 V may actually have higher performance.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with
less than 250-V CDM is possible with the necessary precautions. Pins listed as ±1000 V may actually have higher performance.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
2.5
0
MAX
4.3
UNIT
V
VCC
Supply voltage
Analog voltage
VI/O (USB)
VI/O (MHL)
,
3.6
V
VI
Digital input voltage (SEL0, SEL1)
0
VCC
1000
150
85
V
µs/V
mA
ºC
TRAMP (VCC)
II/O, PEAK
TA
Power supply ramp time requirement (VCC)
Peak switch DC output current (1-ms duration pulse at <10% duty cycle)
Operating free-air temperature
100
–40
6.4 Thermal Information
TS3USB3031
RMG (VQFN)
12 PINS
160.8
THERMAL METRIC(1)
UNIT
RθJA
RθJC(top)
RθJB
ψJT
Junction-to-ambient thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
95.5
91.2
Junction-to-top characterization parameter
Junction-to-board characterization parameter
7.4
ψJB
91.2
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
4
Copyright © 2013–2017, Texas Instruments Incorporated
TS3USB3031
www.ti.com.cn
ZHCSBM1C –SEPTEMBER 2013–REVISED MARCH 2017
6.5 Electrical Characteristics
TA = –40°C to 85°C, typical values are at VCC = 3.3 V and TA = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN TYP MAX UNIT
MHL SWITCH
RON
ON-state resistance
VCC = 2.5 V, VI/O = 1.5V, ION = –8 mA (see Figure 9)
VCC = 2.5 V, VI/O = 1.5 V, ION = –8 mA
5.5
0.1
1
7
Ω
Ω
ON-state resistance match
between + and – paths
ΔRON
RON (FLAT)
IOZ
IOFF
ION
ON-state resistance flatness
VCC = 2.5 V, VI/O = 1.5 V to 3.3 V, ION = –8 mA
Ω
VCC = 4.3 V, Switch OFF, VMHL+/MHL– = 1.5 V to 3.3 V,
VD+/D–= 0 V (see Figure 10)
OFF leakage current
–2
–10
–2
2
µA
VCC = 0 V, Power off, VMHL+/MHL– = 1.5 V to 3.3 V,
VD+/D–= NC
Power-off leakage current
ON leakage current
10 µA
VCC = 4.3 V, Switch ON, VMHL+/MHL– = 1.5 V to 3.3 V,
VD+/D–= NC
2
6
µA
USB SWITCH (USB1 and USB2)
RON
ON-state resistance
VCC = 2.5 V, VI/O = 0.4 V, ION = –8 mA (see Figure 9)
VCC = 2.5 V, VI/O = 0.4 V, ION = –8 mA
4.5
0.1
1
Ω
Ω
ON-state resistance match
between + and – paths
ΔRON
RON (FLAT)
IOZ
ON-state resistance flatness
VCC = 2.5 V, VI/O = 0 V to 0.4 V, ION = –8 mA
Ω
VCC = 4.3 V, Switch OFF, VUSB+/USB– = 0 V to 0.4 V,
VD+/D–= 0 V (see Figure 10)
OFF leakage current
–2
–10
–2
2
µA
VCC = 0 V, Switch ON or OFF,
VUSB+/USB– = 0 V to 0.4 V, VD+/D–= NC
IOFF
ION
Power-off leakage current
ON leakage current
10 µA
VCC = 4.3 V, Switch ON, VUSB+/USB– = 0 V to 0.4 V,
VD+/D–= NC
2
µA
DIGITAL CONTROL INPUTS (SEL)
VIH
VIL
IIN
Input logic high
VCC = 2.5 V to 4.3 V
1.3
V
V
Input logic low
VCC = 2.5 V to 4.3 V
0.6
Input leakage current
VCC = 4.3 V, VI/O = 0 V to 3.6 V, VIN = 0 V to 4.3 V
–10
10 µA
6.6 Dynamic Characteristics
TA = –40°C to 85°C, Typical values are at VCC = 3.3 V, TA = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN TYP MAX UNIT
RL = 50 Ω, CL = 5 pF, VCC = 2.5 V to 4.3 V,
VI/O(USB) = 0.4 V, VI/O(MHL) = 3.3 V
ps
50
tpd
Propagation delay
Switching time between USB/MHL RL = 50 Ω, CL = 5 pF, VCC = 2.5 V to 4.3 V,
ns
tswitch
tON
400
channels in active modes
VI/O(USB) = 0.4 V, VI/O(MHL) = 3.3 V
Switch turnon time (from disabled
to active mode)
RL = 50 Ω, CL = 5 pF, VCC = 2.5 V to 4.3 V,
VI/O(USB) = 0.4 V, VI/O(MHL) = 3.3 V
µs
100
Switch turnoff time (from active to
disabled mode)
RL = 50 Ω, CL = 5 pF, VCC = 2.5 V to 4.3 V,
VI/O(USB) = 0.4 V, VI/O(MHL) = 3.3 V
µs
tOFF
100
CON(MHL)
CON(USB)
COFF(MHL)
COFF(USB)
CI
MHL path, ON capacitance
VCC = 3.3 V, VI/O = 0 V or 3.3 V, f = 240 MHz, Switch ON
VCC = 3.3 V, VI/O = 0 V or 3.3 V, f = 240 MHz, Switch ON
VCC = 3.3 V, VI/O = 0 V or 3.3 V, f = 240 MHz, Switch OFF
VCC = 3.3 V, VI/O = 0 V or 3.3 V, f = 240 MHz, Switch OFF
VCC = 3.3 V, VI = 0 V or 2 V
1.3
1
pF
pF
USB1 and USB2 paths, ON
capacitance
MHL path, OFF capacitance
1
pF
pF
USB1 and USB2 paths, OFF
capacitance
0.8
2.2
–38
Digital input capacitance
pF
dB
VS = –10 dBm, VDC_BIAS = 2.4 V, RT = 50 Ω, f = 240 MHz
(see Figure 11), Switch OFF
OISO (MHL)
MHL path, OFF isolation
VS = –10 dBm, VDC_BIAS = 0.2 V RT = 50 Ω, f = 240 MHz
(see Figure 11), Switch OFF
dB
dB
OISO (USB)
USB path, OFF isolation
MHL channel crosstalk
–38
–41
VS = –10 dBm, VDC_BIAS = 2.4 V, RT = 50 Ω, f = 240 MHz
(see Figure 12), Switch ON
XTALK (MHL)
Copyright © 2013–2017, Texas Instruments Incorporated
5
TS3USB3031
ZHCSBM1C –SEPTEMBER 2013–REVISED MARCH 2017
www.ti.com.cn
Dynamic Characteristics (continued)
TA = –40°C to 85°C, Typical values are at VCC = 3.3 V, TA = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN TYP MAX UNIT
VS = –10 dBm, VDC_BIAS = 0.2 V, RT = 50 Ω, f = 240 MHz
(see Figure 12), Switch ON
dB
XTALK (USB)
BW(MHL)
USB channel crosstalk
–38
VCC = 2.5 V to 4.3 V, RL = 50 Ω (see Figure 13), Switch
ON
GHz
6.5
MHL path, –3-dB bandwidth
USB path, –3-dB bandwidth
VCC = 2.5 V to 4.3 V, RL = 50Ω (See Figure 13), Switch
ON
GHz
6.5
BW(USB)
SUPPLY
VCC
Power supply voltage
Positive supply current
2.5
4.3
V
VCC = 4.3 V, VIN = VCC or GND, VI/O = 0 V,
Switch ON or OFF
ICC
28
40 µA
6.7 Typical Characteristics
7.0
6.5
6.0
5.5
5.0
4.5
4.0
3.5
3.0
7.0
6.5
6.0
5.5
5.0
4.5
4.0
3.5
3.0
0.0 0.4 0.8 1.2 1.6 2.0 2.4 2.8 3.2 3.6 4.0
0.0 0.4 0.8 1.2 1.6 2.0 2.4 2.8 3.2 3.6 4.0
Input Voltage (V)
Input Voltage (V)
C002
C002
Figure 1. ON-Resistance vs VI/O for MHL Switch
Figure 2. ON-Resistance vs VI/O for USB Switch
Figure 3. Bandwidth for MHL Switch
Figure 4. Bandwidth for USB Switch
6
Copyright © 2013–2017, Texas Instruments Incorporated
TS3USB3031
www.ti.com.cn
ZHCSBM1C –SEPTEMBER 2013–REVISED MARCH 2017
Typical Characteristics (continued)
Figure 5. OFF Isolation vs Frequency for MHL Path
Figure 6. OFF Isolation vs Frequency for USB Path
Figure 8. Cross Talk vs Frequency for USB Path
Figure 7. Cross Talk vs Frequency for MHL Path
7 Parameter Measurement Information
VCC
TS3USB3031
VOUT1
VON
VOUT2
+
Channel ON
SEL
RON = (VON – VI/O1) / ION or (VON – VI/O2) / ION
VSEL = H or L
ION
+
VSEL
GND
Copyright © 2016, Texas Instruments Incorporated
Figure 9. ON-State Resistance (RON
)
Copyright © 2013–2017, Texas Instruments Incorporated
7
TS3USB3031
ZHCSBM1C –SEPTEMBER 2013–REVISED MARCH 2017
www.ti.com.cn
Parameter Measurement Information (continued)
VCC
TS3USB3031
VOUT1
VON
VOUT2
+
Channel OFF
VSEL = H or L
A
ION
SEL
+
VIN
+
VSEL
GND
Copyright © 2016, Texas Instruments Incorporated
Figure 10. OFF Leakage Current (IOZ
)
VCC
Network Analyzer
TS3USB3031
RS
VOUT+
RT
VS
Channel OFF
RS
VSEL = H or L
RT
VS
RS = RT = 50Ω
SEL
VS = –10dBm (200mV at 50Ω Load)
VDC_BIAS = 2.4V for OISO(MHL)
VDC_BIAS = 0.2V for OISO(USB)
GND
VOUT-
RT
RT
+
VSEL
Copyright © 2016, Texas Instruments Incorporated
Figure 11. Differential Off-Isolation (OISO
)
8
Copyright © 2013–2017, Texas Instruments Incorporated
TS3USB3031
www.ti.com.cn
ZHCSBM1C –SEPTEMBER 2013–REVISED MARCH 2017
Parameter Measurement Information (continued)
VCC
Network Analyzer
TS3USB3031
RS
RT
VS
Channel ON
VOUT
RT
NC
VSEL = H or L
RS = RT = 50Ω
RT
VS = –10dBm (200mV at 50Ω Load)
VDC_BIAS = 2.4V for Xtalk(MHL)
VDC_BIAS = 0.2V for Xtalk(USB)
GND
RT
+
VSEL
Copyright © 2016, Texas Instruments Incorporated
Figure 12. Crosstalk (Xtalk)
VCC
Network Analyzer
TS3USB3031
VOUT+
VOUT-
RT
RS
VS
Channel ON
RT
RS
VSEL = H or L
VS
RT = 50Ω
VS = –10dBm (200mV at 50Ω Load)
GND
RT
RT
Copyright © 2016, Texas Instruments Incorporated
Figure 13. Differential Bandwidth (BW)
Copyright © 2013–2017, Texas Instruments Incorporated
9
TS3USB3031
ZHCSBM1C –SEPTEMBER 2013–REVISED MARCH 2017
www.ti.com.cn
8 Detailed Description
8.1 Overview
The TS3USB3031 device is a 2-channel, 1:3 multiplexer that includes a high-speed Mobile High-Definition Link
(MHL) or Mobility Display Port (MyDP) switch and USB 2.0 High-Speed (480 Mbps) switches in the same
package. This device is used in many high-speed differential 1:3 mux applications.
8.2 Functional Block Diagram
TS3USB3031
MHL+
D+
USB1+
USB2+
MHL-
D-
USB1-
USB2-
Control
Logic
SEL0
SEL1
Copyright © 2016, Texas Instruments Incorporated
8.3 Feature Description
8.3.1 IOFF Protection
IOFF protection precents current leakage through the device when Vcc = 0 V This allows signals to be present on
the D± and USB/MHL± pins before the device is powered up without damaging the device or system.
8.3.2 1.8-V Compatible Logic
The TS3USB3031 device supports 1.8-V logic irrespective to the supply voltage applied to the IC.
8.3.3 Overvoltage Tolerant (OVT)
The D± and USB/MHL± pins of the device can support signals up to 5.5 V without damaging the device. This
protects the TS3USB3031 in case the VBUS pin of the USB connector is shorted to the signal path without
additional components added.
8.4 Device Functional Modes
Table 1 lists the functional modes of the TS3USB3031.
Table 1. Function Table
SEL1
Low
SEL0
Low
SWITCH STATUS
D+/D– connected to USB1+/USB1–
D+/D– connected to USB2+/USB2–
D+/D– connected to MHL+/MHL–
USB and MHL switches in High-Z
Low
High
High
High
Low
High
10
Copyright © 2013–2017, Texas Instruments Incorporated
TS3USB3031
www.ti.com.cn
ZHCSBM1C –SEPTEMBER 2013–REVISED MARCH 2017
9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The TS3USB3031 is a passive, bidirectional, 2-channel 1:3 switch which makes it versatile to be used in many
high speed 1:3 switching applications. This device was designed originally for USB 2.0 and Mobile High-
Definition Link applications but can be used for general signal switching applications such as I2C, UART, LVDS,
and so forth.
9.2 Typical Application
Figure 14 represents a typical application of the TS3USB3031 MHL switch. The TS3USB3031 is used to switch
signals between the 2 sets of USB paths, which go to either the baseband or application processor, and the MHL
path, which goes to the HDMI to MHL bridge. The TS3USB3031 has internal 6-MΩ pulldown resistors on SEL0
and SEL1. The pulldown on SEL0 and SEL1 ensure the USB1 channel is selected by default. The TS5A3157 is
a separate SPDT switch that is used to switch between MHL’s CBUS and the USB ID line that is required for
USB OTG (USB On-The-Go) application.
VBAT
VCC
TS3USB3031
Baseband or
USB_D+
Application
USB1+
USB_D-
Processor
USB1-
To
Battery
Charger
USB_D+
USB_D-
USB 2.0
Application
Processor
USB2+
USB2-
VBUS
D+
D+
D-
D-
ID
MHL+
MHL-
MHL+
GND
GND
HDMI to
MHL-
MHL Bridge
CBUS
HDMI
SEL1
SEL2
GND
GPO1 GPO2
MicroUSB
Connector
ID_USB
COM
TS5A3157
Copyright © 2016, Texas Instruments Incorporated
Figure 14. Typical TS3USB3031 Application
Copyright © 2013–2017, Texas Instruments Incorporated
11
TS3USB3031
ZHCSBM1C –SEPTEMBER 2013–REVISED MARCH 2017
www.ti.com.cn
Typical Application (continued)
9.2.1 Design Requirements
Design requirements of the MHL and USB 1.0,1.1, and 2.0 standards must be followed.
The TS3USB3031 has internal 6-MΩ pulldown resistors on SEL0 and SEL1 so no external resistors are required
on the logic pins. The pulldown on SEL0 and SEL1 ensure the USB1 channel is selected by default.
The TS5A3157 is a separate SPDT switch that is used to switch between the CBUS of the MHL and the USB ID
line that is required for USB OTG (USB On-The-Go) application.
9.2.2 Detailed Design Procedure
The TS3USB3031 can be properly operated without any external components. However, TI recommends that
unused signal I/O pins must be connected to ground through a 50-Ω resistor to prevent signal reflections back
into the device.
9.2.3 Application Curves
9.2.3.1 MHL Eye Pattern
Figure 16. Time Interval Error Histogram: 2.25 Gbps
With No Device
Figure 15. Eye Pattern Error Histogram: 2.25 Gbps
With No Device
Figure 18. Time Interval Error Histogram: 2.25 Gbps
With TS3USB3031 (Added Jitter = 5.04 ps)
Figure 17. Eye Pattern Error Histogram: 2.25 Gbps
With TS3USB3031 (Added Jitter = 5.04 ps)
12
Copyright © 2013–2017, Texas Instruments Incorporated
TS3USB3031
www.ti.com.cn
ZHCSBM1C –SEPTEMBER 2013–REVISED MARCH 2017
Typical Application (continued)
Figure 20. Time Interval Error Histogram: 3.0 Gbps
With No Device
Figure 19. Eye Pattern Error Histogram: 3.0 Gbps
With No Device
Figure 22. Time Interval Error Histogram: 3.0 Gbps
With TS3USB3031 (Added Jitter = 2.57 ps)
Figure 21. Eye Pattern Error Histogram: 3.0 Gbps
With TS3USB3031 (Added Jitter = 2.57 ps)
Figure 24. Time Interval Error Histogram: 4.5 Gbps
With No Device
Figure 23. Eye Pattern Error Histogram: 4.5 Gbps
With No Device
Copyright © 2013–2017, Texas Instruments Incorporated
13
TS3USB3031
ZHCSBM1C –SEPTEMBER 2013–REVISED MARCH 2017
www.ti.com.cn
Typical Application (continued)
Figure 25. Eye Pattern Error Histogram: 4.5 Gbps
With TS3USB3031 (Added Jitter = 1.13 ps)
Figure 26. Time Interval Error Histogram: 4.5 Gbps
With TS3USB3031 (Added Jitter = 1.13 ps)
9.2.3.2 USB EYE Pattern
Figure 27. 480-Mbps USB 2.0 Eye Pattern With No Device
Figure 28. 480-Mbps USB 2.0 Eye Pattern for USB Switch
14
Copyright © 2013–2017, Texas Instruments Incorporated
TS3USB3031
www.ti.com.cn
ZHCSBM1C –SEPTEMBER 2013–REVISED MARCH 2017
10 Power Supply Recommendations
Power to the device is supplied through the VCC pin. TI recommends placing a bypass capacitor as close as
possible to the supply pin VCC to help smooth out lower frequency noise to provide better load regulation across
the frequency spectrum.
This device does not require any power sequencing with respect to other devices in the system due to its power
off isolation feature which allows signals to be present on the signal path pins before the device is powered up
without damaging the device.
11 Layout
11.1 Layout Guidelines
Place supply bypass capacitors as close to VCC pin as possible and avoid placing the bypass caps near the D+
and D– traces.
The high-speed D+ and D– traces must always be of equal length and must be no more than 4 inches;
otherwise, the eye diagram performance may be degraded. A high-speed USB connection is made through a
shielded, twisted pair cable with a differential characteristic impedance. In layout, the impedance of D+ and D–
traces must match the cable characteristic differential impedance for optimal performance.
Route the high-speed USB signals using a minimum of vias and corners which reduces signal reflections and
impedance changes. When a via must be used, increase the clearance size around it to minimize its
capacitance. Each via introduces discontinuities in the transmission line of the signal and increases the chance
of picking up interference from the other layers of the board. Be careful when designing test points on twisted
pair lines; through-hole pins are not recommended.
When it becomes necessary to turn 90°, use two 45° turns or an arc instead of making a single 90° turn. This
reduces reflections on the signal traces by minimizing impedance discontinuities.
Do not route USB traces under or near crystals, oscillators, clock signal generators, switching regulators,
mounting holes, magnetic devices, or IC’s that use or duplicate clock signals.
Avoid stubs on the high-speed USB signals because they cause signal reflections. If a stub is unavoidable, then
the stub must be less than 200 mm.
Route all high-speed USB signal traces over continuous GND planes, with no interruptions.
Avoid crossing over anti-etch, commonly found with plane splits.
Due to high frequencies associated with the USB, a printed-circuit board with at least four layers is
recommended: two signal layers separated by a ground layer and a power layer. The majority of signal traces
must run on a single layer, preferably top layer. Immediately next to this layer must be the GND plane, which is
solid with no cuts. Avoid running signal traces across a split in the ground or power plane. When running across
split planes is unavoidable, sufficient decoupling must be used. Minimizing the number of signal vias reduces
EMI by reducing inductance at high frequencies. For more information on layout guidelines, see High Speed
Layout Guidelines (SCAA082) and USB 2.0 Board Design and Layout Guidelines (SPRAAR7).
Copyright © 2013–2017, Texas Instruments Incorporated
15
TS3USB3031
ZHCSBM1C –SEPTEMBER 2013–REVISED MARCH 2017
www.ti.com.cn
11.2 Layout Example
= VIA to GND Plane
0603 Cap
To device 1
USB1+
VCC
D+
To common signal path
To device 1
To device 2
To device 2
USB1-
To common signal path
USB2+
USB2-
D-
GND
Figure 29. Layout Recommendation
16
版权 © 2013–2017, Texas Instruments Incorporated
TS3USB3031
www.ti.com.cn
ZHCSBM1C –SEPTEMBER 2013–REVISED MARCH 2017
12 器件和文档支持
12.1 文档支持
12.1.1 相关文档
相关文档如下：
•
•
《高速布局指南》(SCAA082)
《USB 2.0 电路板设计和布局指南》(SPRAAR7)
12.2 接收文档更新通知
要接收文档更新通知，请导航至 ti.com 上的器件产品文件夹。请单击右上角的通知我 进行注册，即可收到任意产
品信息更改每周摘要。有关更改的详细信息，请查看任意已修订文档中包含的修订历史记录。
12.3 社区资源
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.4 商标
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.5 静电放电警告
这些装置包含有限的内置 ESD 保护。 存储或装卸时，应将导线一起截短或将装置放置于导电泡棉中，以防止 MOS 门极遭受静电损
伤。
12.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 机械、封装和可订购信息
以下页面包括机械、封装和可订购信息。这些信息是指定器件的最新可用数据。这些数据发生变化时，我们可能不
会另行通知或修订此文档。如欲获取此产品说明书的浏览器版本，请参见左侧的导航栏。
版权 © 2013–2017, Texas Instruments Incorporated
17
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TS3USB3031RMGR
ACTIVE
WQFN
RMG
12
3000 RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
DY
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
8-Jun-2019
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TS3USB3031RMGR
WQFN
RMG
12
3000
180.0
8.4
2.05
2.05
1.0
4.0
8.0
Q2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
8-Jun-2019
*All dimensions are nominal
Device
Package Type Package Drawing Pins
WQFN RMG 12
SPQ
Length (mm) Width (mm) Height (mm)
182.0 182.0 20.0
TS3USB3031RMGR
3000
Pack Materials-Page 2
PACKAGE OUTLINE
RMG0012A
VQFN - 0.8 mm max height
S
C
A
L
E
6
.
0
0
0
PLASTIC QUAD FLATPACK - NO LEAD
1.9
1.7
B
A
PIN 1 INDEX AREA
1.9
1.7
(0.1)
(0.2)
40.000
DETAIL A
ALTERNATE SIDE WALL METAL
TYPICAL
SEE DETAIL A
0.8
0.7
C
SEATING PLANE
0.05 C
0.05
0.00
0.25
12X
(0.1) TYP
(0.2) TYP
2X 1.2
SYMM
0.15
0.07
0.05
C A B
0.5
0.3
8X
3
6
2
1
7
8
SYMM
8X 0.4
9
12
0.75
0.65
PIN 1 ID
(45 X 0.1)
4X
4226797/A 05/2021
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.
www.ti.com
EXAMPLE BOARD LAYOUT
RMG0012A
VQFN - 0.8 mm max height
PLASTIC QUAD FLATPACK - NO LEAD
SYMM
4X (0.9)
12
SEE SOLDER MASK
DETAIL
9
12X (0.2)
1
8
SYMM
(1.6)
8X (0.4)
7
2
(R0.05) TYP
8X (0.6)
3
6
(1.3)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE: 30X
0.05 MIN
ALL AROUND
0.05 MAX
ALL AROUND
METAL UNDER
SOLDER MASK
METAL EDGE
EXPOSED METAL
SOLDER MASK
OPENING
EXPOSED
METAL
SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
SOLDER MASK DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4226797/A 05/2021
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown
on this view. It is recommended that vias under paste be filled, plugged or tented.
www.ti.com
EXAMPLE STENCIL DESIGN
RMG0012A
VQFN - 0.8 mm max height
PLASTIC QUAD FLATPACK - NO LEAD
4X (0.9)
12
9
12X (0.2)
8X (0.4)
1
8
SYMM
(1.6)
7
2
(R0.05) TYP
8X (0.6)
6
3
SYMM
(1.3)
SOLDER PASTE EXAMPLE
BASED ON 0.125 MM THICK STENCIL
SCALE: 30X
4226797/A 05/2021
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
www.ti.com
重要声明和免责声明
TI 提供技术和可靠性数据（包括数据表）、设计资源（包括参考设计）、应用或其他设计建议、网络工具、安全信息和其他资源，不保证没
有瑕疵且不做出任何明示或暗示的担保，包括但不限于对适销性、某特定用途方面的适用性或不侵犯任何第三方知识产权的暗示担保。
这些资源可供使用 TI 产品进行设计的熟练开发人员使用。您将自行承担以下全部责任：(1) 针对您的应用选择合适的 TI 产品，(2) 设计、验
证并测试您的应用，(3) 确保您的应用满足相应标准以及任何其他安全、安保或其他要求。这些资源如有变更，恕不另行通知。TI 授权您仅可
将这些资源用于研发本资源所述的 TI 产品的应用。严禁对这些资源进行其他复制或展示。您无权使用任何其他 TI 知识产权或任何第三方知
识产权。您应全额赔偿因在这些资源的使用中对 TI 及其代表造成的任何索赔、损害、成本、损失和债务，TI 对此概不负责。
TI 提供的产品受 TI 的销售条款 (https:www.ti.com.cn/zh-cn/legal/termsofsale.html) 或 ti.com.cn 上其他适用条款/TI 产品随附的其他适用条款
的约束。TI 提供这些资源并不会扩展或以其他方式更改 TI 针对 TI 产品发布的适用的担保或担保免责声明。IMPORTANT NOTICE
邮寄地址：上海市浦东新区世纪大道 1568 号中建大厦 32 楼，邮政编码：200122
Copyright © 2021 德州仪器半导体技术（上海）有限公司
相关型号：
TS3USB30E
ESD PROTECTED, HIGH-SPEED USB 2.0 (480-Mbps) 1:2 MULTIPLEXER/DEMULTIPLEXER SWITCH WITH SINGLE ENABLE
TI
TS3USB30EDGSR
ESD PROTECTED, HIGH-SPEED USB 2.0 (480-Mbps) 1:2 MULTIPLEXER/DEMULTIPLEXER SWITCH WITH SINGLE ENABLE
TI
TS3USB30ERSWR
ESD PROTECTED, HIGH-SPEED USB 2.0 (480-Mbps) 1:2 MULTIPLEXER/DEMULTIPLEXER SWITCH WITH SINGLE ENABLE
TI
TS3USB30E_13
ESD PROTECTED, HIGH-SPEED USB 2.0 (480-Mbps) 1:2 MULTIPLEXER/DEMULTIPLEXER SWITCH WITH SINGLE ENABLE
TI
TS3USB30RSWR
HIGH-SPEED USB 2.0 (480-Mbps) 1:2 MULTIPLEXER/DEMULTIPLEXER SWITCH WITH SINGLE ENABLE
TI
TS3USB30_08
HIGH-SPEED USB 2.0 (480-Mbps) 1:2 MULTIPLEXER/DEMULTIPLEXER SWITCH WITH SINGLE ENABLE
TI
TS3USB30_09
HIGH-SPEED USB 2.0 (480-Mbps) 1:2 MULTIPLEXER/DEMULTIPLEXER SWITCH WITH SINGLE ENABLE
TI
©2020 ICPDF网 联系我们和版权申明