TRS3122ERGER [TI]
具有逻辑电源引脚和 +/-15kV IEC-ESD 保护的 1.65V 至 5.5V 1Mbps RS-232 线路驱动器/接收器引脚 | RGE | 24 | -40 to 85;
| 型号： | TRS3122ERGER |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 具有逻辑电源引脚和 +/-15kV IEC-ESD 保护的 1.65V 至 5.5V 1Mbps RS-232 线路驱动器/接收器引脚 | RGE | 24 | -40 to 85 驱动 接口集成电路 驱动器 |
| 文件： | 总27页 (文件大小：2151K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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TRS3122E
ZHCSEZ3C –MAY 2016–REVISED MAY 2016
TRS3122E 1.8V 低功耗双路 RS-232 收发器
1 特性
3 说明
1
•
扩展 VCC 工作节点：1.8V、3.3V 或 5.0V
TRS3122E 是一款具有双驱动器、双接收器的 RS-232
接口器件，配有分离电源引脚以支持混合电压运行。使
用 IEC 61000-4-2 气隙放电方法，IEC 61000-4-2 接触
放电方法和人体放电模型分别保护全部 RS-232 输入和
输出不受 ±15kV、±8kV 和 ±15kV 电压的影响。
–
独特的三倍频器电荷泵架构，与 3.3V 和 5V 电
源保持兼容的同时实现低至 1.8V 的 VCC
•
•
集成电平转换功能，连接低电压 MCU 时无需使用
外部电源或附加电平转换器
RIN 输入和 DOUT 输出端的增强型 ESD 保护
电荷泵需要使用 5 个 0.1μF 小电容，以便器件能够在
低至 1.8V 的电源供电下运行。TRS3122E 能够以高达
1000kbps 的数据速率运行，同时保持与 RS-232 相兼
容的输出水平。
–
–
–
±15kV IEC 61000-4-2 气隙放电
±8kV IEC 61000-4-2 接触放电
±15kV 人体放电模式
•
•
•
•
•
数据速率指定为 1000Kbps
自动断电增强特性
TRS3122E 具有一个独特的 VL 引脚，可实现在混合逻
辑电压系统内运行。可通过 VL 引脚设定驱动器输入
(DIN) 和接收器输出 (ROUT) 逻辑电平。当连接低电压
微控制器或通用异步收发器 (UART) 时，不再需要使用
附加电压电平转换器。
关断电源电流低至 0.5μA
满足甚至超过 RS-232 接口的兼容性要求
对于 2.5V 单电源 应用，可以考虑选用 TRS3318E
作为优化解决方案
该器件具备“自动省电增强”(Auto Powerdown Plus) 功
能，如果连续 30 秒未收发任何数据，则自动进入低功
耗模式。该功能使得该器件备受电池供电类应用或其他
功率敏感型应用 的青睐。
2 应用
•
•
•
•
•
远程射频单元 (RRU)
基带装置 (BBU)
电子销售点 (EPOS)
诊断和数据传输
电池供电类设备
器件信息(1)
封装（引脚）
器件型号
封装尺寸（标称值）
TRS3122ERGER
RGE (24)
4.00mm x 4.00mm
(1) 如需了解所有可用封装，请见数据表末尾的可订购产品附录。
功能图
VL
Logic Supply
1.8V, 3.3V, 5V
FORCEON
POWER
AUTO-
POWERDOWN
PLUS
FORCEOFF
2
2
2
DOUT
RS232
DIN
TX
1000 kb/s
2
RIN
RS232
ROUT
RX
STATUS
INVALID
Copyright © 2016, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
English Data Sheet: SLLSET7
TRS3122E
ZHCSEZ3C –MAY 2016–REVISED MAY 2016
www.ti.com.cn
目录
8.1 Overview ................................................................. 12
8.2 Functional Block Diagram ....................................... 12
8.3 Feature Description ................................................ 13
8.4 Device Functional Modes........................................ 15
Application and Implementation ........................ 16
9.1 Application Information............................................ 16
9.2 Typical 1.8-V Application ....................................... 16
1
2
3
4
5
6
特性.......................................................................... 1
应用.......................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
Pin Configuration and Functions......................... 3
Specifications......................................................... 4
6.1 Absolute Maximum Ratings ..................................... 4
6.2 ESD Ratings.............................................................. 4
6.3 Recommended Operating Conditions....................... 5
6.4 Thermal Characteristics ............................................ 5
6.5 Power and Status Electrical Characteristics ............. 5
6.6 Driver Electrical Characteristics ................................ 6
6.7 Receiver Electrical Characteristics ........................... 6
6.8 Driver Switching Characteristics ............................... 6
6.9 Receiver Switching Characteristics .......................... 7
6.10 Power and Status Switching Characteristics ......... 7
6.11 Typical Characteristics............................................ 8
Parameter Measurement Information .................. 9
Detailed Description ............................................ 12
9
10 Power Supply Recommendations ..................... 18
11 Layout................................................................... 19
11.1 Layout Guidelines ................................................. 19
11.2 Layout Example .................................................... 19
12 器件和文档支持 ..................................................... 20
12.1 器件支持 ............................................................... 20
12.2 社区资源................................................................ 20
12.3 商标....................................................................... 20
12.4 静电放电警告......................................................... 20
12.5 Glossary................................................................ 20
13 机械、封装和可订购信息....................................... 20
7
8
4 修订历史记录
Changes from Revision B (May 2016) to Revision C
Page
•
•
•
已按优先级对特性部分的各要点进行了重新排序 .................................................................................................................... 1
已删除 首页应用部分的数据电缆，为首页图片留出空间 ........................................................................................................ 1
已更改 已更正描述文本中的 已交换的 ESD 级别 ................................................................................................................... 1
Changes from Revision A (May 2016) to Revision B
Page
•
•
•
Updated ESD ratings values to reflect current device specifications .................................................................................... 4
已添加 all Typical Characteristic graphs and schematics to the Typical Characteristics section .......................................... 8
已添加 Application Curve image to Application Curves section .......................................................................................... 18
Changes from Original (June 2014) to Revision A
Page
•
Added Pin Functions table. .................................................................................................................................................... 3
2
Copyright © 2016, Texas Instruments Incorporated
TRS3122E
www.ti.com.cn
ZHCSEZ3C –MAY 2016–REVISED MAY 2016
5 Pin Configuration and Functions
VQFN P Package
24-Pin RGE
Top View
24 23 22 21 20 19
VL
C3+
C3-
GND
C1-
RIN1
(Top View)
RIN2
FORCEON
DOUT1
DOUT2
FORCEOFF
INVALID
7
8
9
10 11 12
Pin Functions
Pin
I/O
DESCRIPTION
NAME
C1+, C2+
C3+
NO.
21, 22
1
-
-
Positive terminals of voltage-doubler charge-pump capacitors (required)
Positive terminal of voltage-tripler charge-pump capacitor (Not needed for VCC 3V to 5.5V)
Negative terminals of voltage-doubler charge-pump capacitors (required)
Negative terminal of voltage-tripler charge-pump capacitor (Not needed for VCC 3V to 5.5V)
Positive charge pump storage capacitor (required)
Negative charge pump storage capacitor (required)
Ground
C1–, C2-
C3-
16, 23
2
-
-
V+
20
-
V–
24
-
GND
17
-
VCC
19
-
1.8-V or 3-V to 5-V supply voltage
VL
18
-
Logic-level supply. All CMOS inputs (DIN) and outputs (ROUT) are referenced to this supply.
Auto Powerdown Control input (Refer to Truth Table)
Auto Powerdown Control input (Refer to Truth Table)
Invalid Output Pin
FORCEOFF
FORCEON
INVALID
DIN1, DIN2
14
I
15
I
13
O
I
10,9
Driver inputs
DOUT1,
DOUT2
5, 6
3, 4
O
I
RS-232 driver outputs
RIN1, RIN2
RS-232 receiver inputs
ROUT1,
ROUT2
12, 11
7, 8
O
I
Receiver outputs; swing between 0 and VL
Factory pins, can be unconnected or connected to GND
NC
Copyright © 2016, Texas Instruments Incorporated
3
TRS3122E
ZHCSEZ3C –MAY 2016–REVISED MAY 2016
www.ti.com.cn
6 Specifications
6.1 Absolute Maximum Ratings(1)
over operating free-air temperature range (unless otherwise noted)
MIN
–0.3
–0.3
–0.3
0.3
MAX UNIT
VCC Charge pump power supply
6
6
V
V
V
V
V
VL
V+
V–
Logic power supply
Positive storage capacitor voltage
Negative storage capacitor voltage
V+ + |V–|(2)
7
–7
13
FORCEOFF , FORCEON
–0.3
–0.3
6
DIN
VL + 0.3
±20
VI
Input voltage
V
RIN (0Ω series resistance)
RIN (≥250Ω series resistance)
DOUT
±25
±13.2
VL + 0.3
150
VO
Output voltage
V
ROUT
–0.3
–65
TJ
Junction temperature
°C
°C
Tstg
Storage temperature range
150
(1) Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
(2) V+ and V– can have maximum magnitudes of 7 V, but their absolute difference cannot exceed 13 V.
6.2 ESD Ratings
VALUE UNIT
All pins except RS-232 bus
RS-232 bus pins
±2000
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001,
all pins(1)
±15000
Electrostatic
discharge
Charged device model (CDM), per JEDEC specification
JESD22-C101, all pins(2)
V(ESD)
All pins
±500
V
IEC 61000-4-2 Air-Gap Discharge
IEC 61000-4-2 Contact Discharge
±15000
±8000
RS-232 bus pins
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
4
Copyright © 2016, Texas Instruments Incorporated
TRS3122E
www.ti.com.cn
ZHCSEZ3C –MAY 2016–REVISED MAY 2016
6.3 Recommended Operating Conditions
MIN
1.65
3
TYP MAX UNIT
Tripler Mode
1.8
3.3
5
2
3.6
5.5
VCC
15
VCC
Charge pump power supply
V
Doubler Mode
4.5
1.65
-15
-12
0
VL
Logic power supply
V
V
V
RIN
RS-232 Receiver interface
DOUT RS-232 Transmitter interface
12
VL = 5.0 V
VL = 3.3V
1.7
1.1
0.6
VL
GPIO Input logic
threshold low
VIL
DIN, FORCEOFF, FORCEON
0
V
V
VL = 1.8 V
VL = 5.0V
0
3.3
2.2
1.2
0
GPIO Input logic
threshold high
VIH
DIN, FORCEOFF, FORCEON
VL = 3.3V
VL
VL = 1.8V
VL
VOZ
ROUT disabled
FORCEOFF = 0V
VL
V
Operating temperature
–40
85
°C
6.4 Thermal Characteristics
TRS3122E
RGE
34.2
THERMAL METRIC
UNIT
RθJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
RθJCtop
RθJB
27.2
11.4
°C/W
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
0.4
ψJB
11.4
RθJC(bot)
3.6
6.5 Power and Status Electrical Characteristics
VCC = VL = (1.65 V to 2.0 V) & (3.0V to 5.5V), TA = -40°C to 85°C (unless otherwise noted). Typical data is TA = 25°C, VCC
VL = 3.3V unless otherwise noted.
=
PARAMETER
TEST CONDITIONS
MIN
TYP
1.0
0.7
0.8
0.4
MAX UNIT
DIN1 = GND or VL;
DIN2 = GND or VL,
FORCEOFF = VL
FORCEON = VL
VCC= 1.65V to 2.0V
VCC= 3.0V to 3.6V
VCC= 4.5V to 5.5V
1.9
1.4
1.9
10
Icc (Static)
No load
mA
Icc (off)
VIT+
FORCEOFF = GND
μA
RIN postive voltage
threshold for INVALID
output change
0.3
2.4
RIN1 = RIN2
V
RIN negative voltage
threshold for INVALID
output change
VIT-
-2.4
-0.3
INVALID high-level
output voltage
VOH
VOL
IOH = -1 mA, FORCEON = GND, FORCEOFF = VL
IOL = 1.6 mA, FORCEON = GND, FORCEOFF = VL
VL-0.4
0
VL-0.08
0.06
VL
V
V
INVALID low-level
output voltage
0.4
Copyright © 2016, Texas Instruments Incorporated
5
TRS3122E
ZHCSEZ3C –MAY 2016–REVISED MAY 2016
www.ti.com.cn
6.6 Driver Electrical Characteristics
VCC = VL = (1.65 V to 2.0 V) & (3.0V to 5.5V), TA = -40°C to 85°C (unless otherwise noted). Typical data is TA = 25°C, VCC
VL = 3.3V unless otherwise noted.
=
PARAMETER
TEST CONDITIONS
MIN
TYP MAX UNIT
All driver outputs loaded with 3 kΩ to ground
C3 = 100 nF, VCC= 1.8 V
±4.25
±4.7
VOUT Output voltage swing
V
All driver outputs loaded with 3 kΩ to ground
C3 = 0 F, VCC= 3.3 V or 5 V
±5
±5.4
10M
rO
Output resistance
(VCC = V+ = V– = 0); Driver output = ±2 V
300
Ω
Output short-circuit
current
IOS
IOZ
VDOUT = 0
±60
mA
Output leakage current
Driver input hysteresis
Input leakage current
VDOUT = ±12 V, FORCEOFF = GND
0
±25
1
μA
V
0.5
0
DIN = GND to VL; FORCEOFF = GND to VL; FORCEON = GND to VL
±5
μA
6.7 Receiver Electrical Characteristics
VCC = VL = (1.65 V to 2.0 V) & (3.0V to 5.5V), TA = -40°C to 85°C (unless otherwise noted). Typical data is TA = 25°C, VCC
VL = 3.3V unless otherwise noted.
=
PARAMETER
TEST CONDITIONS
ROUT, receivers disabled
MIN
TYP
±0.01
0.04
VL–0.04
1.5
MAX
±10
0.3
UNIT
Ioff
Output leakage current
Output voltage low
Output voltage high
μA
V
VOL
VOH
IOUT= 2.0 mA
IOUT= –2.0mA
VL–0.3
0.8
V
VL= 5 V
VIT–
VIT+
Vhys
Input threshold low
Input threshold high
TA=25°C
TA =25°C
VL= 3.3 V
VL= 1.8 V
VL= 5 V
0.7
1.1
V
V
0.6
0.7
2.0
2.4
2.4
1.4
VL = 3.3 V
VL= 1.8 V
VL= 5 V
1.5
0.9
0.45
0.35
0.26
5
Input hysteresis
Input resistance
TA=25°C
VL = 3.3 V
VL= 1.8 V
V
TA=-40 to 85°C
3
7
kΩ
6.8 Driver Switching Characteristics
VCC = VL = (1.65 V to 2.0 V) & (3.0V to 5.5V), TA = -40°C to 85°C (unless otherwise noted). Typical data is TA = 25°C, VCC
VL = 3.3V unless otherwise noted.
=
PARAMETER
MIN
1000
500
TYP
MAX
UNIT
RL = 3 kΩ, CL = 500 pF (one driver)
RL = 3 kΩ, CL = 1000 pF (one driver)
|VDOUT| > 3.7 V
Maximum data rate
kbps
Time-to-exit powerdown
Driver skew(1)
30
50
33
150
100
μs
|tPHL – tPLH
|
RL = 3 kΩ
0
ns
VCC = 1.8V, CL = 200 pF
VCC = 1.8V, CL = 1000
pF
25
38
28
RL = 3 kΩ to 7 kΩ,
TA = 25°C
Measured from 3 V to –3 V
or –3 V to 3 V
VCC = 3.3 V, CL = 200 pF
Transition-region slew rate
V/μs
VCC = 3.3 V, CL = 1000
pF
VCC = 5 V, CL = 200 pF
VCC = 5 V, CL = 1000 pF
41
30
(1) Driver skew is measured at the driver zero crosspoint.
6
Copyright © 2016, Texas Instruments Incorporated
TRS3122E
www.ti.com.cn
ZHCSEZ3C –MAY 2016–REVISED MAY 2016
6.9 Receiver Switching Characteristics
VCC = VL = (1.65 V to 2.0 V) & (3.0V to 5.5V), TA = -40°C to 85°C (unless otherwise noted). Typical data is TA = 25°C, VCC
=
VL = 3.3V unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
Receiver propagation delay, high to
tPHL
low
0.15
0.4
μs
Receiver input to receiver output
CL = 150 pF
Receiver propagation delay, low to
tPLH
high
0.15
50
0.4
tPHL
tPLH
–
Receiver skew
300
ns
ten
Receiver output enable time
Receiver output disable time
200
200
400
400
ns
ns
From FORCEOFF to ROUT= VL/2
CL = 150 pF, RL = 3 kΩ
tdis
6.10 Power and Status Switching Characteristics
VCC = VL = (1.65 V to 2.0 V) & (3.0V to 5.5V), TA = -40°C to 85°C (unless otherwise noted). Typical data is TA = 25°C, VCC
VL = 3.3V unless otherwise noted.
=
PARAMETER
Propagation delay time, low- to high-level output
Propagation delay time, high- to low-level output
Receiver or driver edge to auto-powerdown plus
MIN
TYP
1
MAX
UNIT
tvalid
tinvalid
tdis
μs
μs
s
30
30
15
60
版权 © 2016, Texas Instruments Incorporated
7
TRS3122E
ZHCSEZ3C –MAY 2016–REVISED MAY 2016
www.ti.com.cn
6.11 Typical Characteristics
70.0
60.0
50.0
40.0
30.0
20.0
10.0
0.0
6
5
4
3
2
1
V+
V-
0
œ1
œ2
œ3
œ4
œ5
œ6
Icc 1Mbps
Icc 500kbps
Icc 250kbps
0.0
1.0
2.0
3.0
4.0
5.0
6.0
0.0
0.5
1.0
1.5
2.0
Load Capacitance (nF)
Load Capacitance (nF)
C005
C004
图 1. Supply Current vs. Load Capacitance
VCC = 3.3 V, VL = 1.8 V, RLOAD = 3 kΩ, CH2 = 32 kbps
图 2. Driver Output vs. Load Capacitance, VCC = 3.3V
VL = 1.8V, RLOAD = 3 kΩ, CH1 = 1 Mbps, CH2 = 32 kbps
6
6
5
4
3
2
1
0
5
4
3
2
1
0
1.6
1.7
1.8
1.9
2.0
2.1
2.75
3.25
3.75
4.25
4.75
5.25
5.75
Supply Voltage (V)
Supply Voltage (V)
C002
C003
图 3. Driver Positive vs. Supply Voltage (Tripler Mode)
1 Mbps, RLOAD = 3 kΩ, CLOAD = 560 pF
图 4. Driver Positive vs. Supply Voltage (Doubler Mode)
1 Mbps, RLOAD = 3 kΩ, CLOAD = 560 pF
55
45
35
40
30
20
25
10
1Mbps
1Mbps
500kbps
500kbps
250kbps
250kbps
15
0
1.6
1.7
1.8
1.9
2.0
2.1
3
4
5
6
Supply Voltage (V)
Supply Voltage (V)
C006
C007
图 5. Supply Current vs. Supply Voltage (Tripler Mode)
VL = 1.8 V, RLOAD = 3 kΩ, CLOAD = 1 nF, CH2 = 32 kbps
图 6. Supply Current vs. Supply Voltage (Doubler Mode)
VL = 1.8 V, RLOAD = 3 kΩ, CLOAD = 1 nF, CH2 = 32 kbps
8
版权 © 2016, Texas Instruments Incorporated
TRS3122E
www.ti.com.cn
ZHCSEZ3C –MAY 2016–REVISED MAY 2016
7 Parameter Measurement Information
VL
FORCEON
VL
Input
RS-232
Output
0 V
Generator
50 Ω
t
t
(see Note B)
THL
TLH
C
L
(see Note A)
R
L
V
OH
OL
3 V
3 V
−3 V
FORCEOFF
VL
Output
−3 V
V
6 V
tTHL or t TLH
SR(tr)=
VOLTAGE WAVEFORMS
TEST CIRCUIT
A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: PRR = 1000 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf
≤
10 ns.
图 7. Driver Slew Rate
V
L
FORCEON
V
L
Input
VL /2
VL /2
RS-232
Output
0 V
Generator
50Ω
C
(see Note B)
L
(see Note A)
t
t
PLH
PHL
R
L
V
OH
FORCEOFF
V
50%
Driver Skew
tPHL-tPLH
50%
Output
L
V
I
I
OL
VOLTAGE WAVEFORMS
TEST CIRCUIT
A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: PRR = 1000 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf
≤
10 ns.
图 8. Driver Pulse Skew
VL or 0 V
3 V
FORCEON
Input
1.5V
1.5 V
−3 V
Output
Generator
t
t
PLH
PHL
50 Ω
(see Note B)
C
L
(see Note A)
VL
V
OH
FORCEOFF
50%
50%
Output
V
OL
VOLTAGE WAVEFORMS
TEST CIRCUIT
A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns.
图 9. Receiver Propagation Delay Times
版权 © 2016, Texas Instruments Incorporated
9
TRS3122E
ZHCSEZ3C –MAY 2016–REVISED MAY 2016
www.ti.com.cn
Parameter Measurement Information (接下页)
VL
Input
VL/2
VL/2
V
L
GND
VL or 0 V
FORCEON
0 V
S1
t
PHZ
(S1 at GND)
t
PZH
R
L
(RIN at 0V)
V
3 V or 0 V
RIN
Output
OH
50%
Output
C
L
(see Note A)
0.3 V
FORCEOFF
t
PLZ
(S1 at VL)
t
PZL
Generator
50 Ω
(see Note B)
(RIN at 3V)
0.3 V
VL
V
Output
50%
OL
TEST CIRCUIT
VOLTAGE WAVEFORMS
A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns.
C. tPLZ and tPHZ are the same as tdis
D. tPZL and tPZH are the same as ten
.
.
图 10. Receiver Enable and Disable Times
10
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TRS3122E
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ZHCSEZ3C –MAY 2016–REVISED MAY 2016
Parameter Measurement Information (接下页)
-
Valid RS 232 Level, INV
High
ALID
ROUT
2.7 V
0.3 V
Generator
(see Note B)
50 ꢀ
Indeterminate
If Signal RemainsWithinThis Region
For More Than30 ꢁs, INVALIDis Low
0 V
†
Þ0.3 V
Indeterminate
Auto-
powerdown
Plus
INV ALID
Þ2.7 V
C = 30 pF
L
(see Note A)
-
Valid RS 232 Level, INVALID High
†
Auto-powerdown plus disables drivers and reduces
supplycurrent to 1 ꢁA.
FORCEOFF
FORCEON
DIN
DOUT
TEST CIRCUIT
3 V
2.7 V
Receiver
Input
0 V
0 V
Þ2.7 V
Þ3 V
t
invalid
t
valid
INV ALID
Output
V
L
50%
50%
0 V
VL
Driver
Input
50%
50%
0 V
VOH
Driver
Output
VOL
t
t
dis
dis
t
t
en
en
V+
Supply
V+
V+ Þ0.3 V
Voltages
VÞ +0.3 V
VÞ
VÞ
Voltage Waveforms and Timing Diagrams
图 11. INVALID Propagation-Delay Times and Supply-Enabling Time
版权 © 2016, Texas Instruments Incorporated
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TRS3122E
ZHCSEZ3C –MAY 2016–REVISED MAY 2016
www.ti.com.cn
8 Detailed Description
8.1 Overview
The TRS3122E is an upgrade to standard RS232 transceivers, offering compatibility with modern system needs
like 1.8-V GPIO capability, enhanced ESD & ultra low stand-by current. The majority of RS-232 transceivers with
1.8-V GPIO compatibility require a logic supply pin for the I/O translation, in addition to a minimum 3.3 V VCC for
all of the other active circuitry on the chip. Unlike these transceivers, TRS3122E can operate with both VL and
VCC equal to 1.8 V. When VCC= 3.0 V to 5.5 V, the charge pump will sense VCC and switch to doubler mode. C1
& C2 are the necessary flying capacitors, C3 is not needed, and the charge pump outputs V+ & V- will regulate
to ~+/-5.4 V. When VCC= 1.65 V to 2.0 V, the charge pump will sense VCC and switch to tripler mode. C1, C2 &
C3 are all necessary, and the charge pump outputs V+ & V- will regulate to ~+/-2.65*VCC from VCC= 1.65 V to 2.0
V.
With many modern applications expanding into products that use RS232 as a backup communication protocol, it
is important for the transceiver to have efficient standby operation. In order to accommodate this, Auto
Powerdown Plus has been integrated to shut-off all active circuitry, allowing TRS3122E to achieve an Ioff of 1 uA.
In order to comply with common interface system needs and environments, the RS-232 receive and transmit I/O
pins comply with IEC 61000-4-2 ratings.
8.2 Functional Block Diagram
1.65V min
CBYPASS
1.65V min
VCC
VL
C1+
V+
V-
C1
C4
C5
C1-
Charge Pump
Outputs
C2+
C2
C3
C2-
C3+
C3
FORCEON
Auto
INVALID
Powerdown
FORCEOFF
VL
DOUT1
DOUT2
RIN1
DIN1
VL
RS232 Outputs
GPIO Inputs
DIN2
ROUT1
ROUT2
5NŸ
GPIO Outputs
RS232 Inputs
RIN2
5NŸ
GND
Copyright © 2016, Texas Instruments Incorporated
图 12. Schematic
12
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8.3 Feature Description
8.3.1 Charge Pump
The internal power supply consists of a regulated auto-sensing charge pump that provides RS-232 compatible
output voltages, over the 1.65 V to 2.0 V and 3.0 V to 5.5 V VCC ranges. The charge pump operates in two
modes to efficiently accommodate low voltage (1.8 V) and higher voltage (3.3 V & 5.0 V) supplies.
8.3.1.1 Doubler Mode
The charge pump requires two flying capacitors (C1, C2) and reservoir capacitors (C4, C5) to generate the V+
and V- supplies of approximately ±5.4 V when VCC is greater than 3 V. When VCC is >2.9V, TRS3122E will sense
the supply voltage level and switch the charge pump to a doubler. Hence, no need for a third flying capacitor.
C3+ & C3- pins can be left open for proper operation. If a capacitor is placed between C3+ & C3-, the charge
pump will ignore this capacitor and still behave as a doubler.
For capacitor choice recommendations, please refer to 表 1.
8.3.1.2 Tripler Mode
The charge pump requires three flying capacitors (C1, C2 & C3) and reservoir capacitors (C4, C5) to generate
the V+ and V- supplies of approximately ±2.65 * VCC when VCC is greater than 1.65 V. When VCC is <2.1 V,
TRS3122E will sense the supply voltage level and switch the charge pump to a tripler.
For capacitor choice recommendations, please refer to 表 1.
8.3.2 Drivers
The drivers are inverting level transmitters that convert TTL or CMOS logic levels to RS-232 levels. For VCC=3.0
V to 5.0 V, the RS-232 output voltage swing is typically ±5.4 V fully loaded and ±5 V minimum fully loaded. For
Vcc = 1.8 V, the RS-232 output voltage swing is typically ±.4.7 V fully loaded and ±4.25 V minimum fully loaded.
The driver outputs are protected against indefinite short-circuits to ground without degradation in reliability. These
drivers are compatible with RS-232 logic levels and all previous RS-232 versions. Unused driver inputs should be
connected to GND or VCC.
8.3.3 Receivers
The receivers convert EIA/TIA-232 levels to TTL or CMOS logic output levels. Receivers have an inverting output
that can be disabled by using the FORCEOFF pin. Receivers remain active when the Auto Powerdown Plus
circuitry autonomously enters a low power state. See Auto Powerdown Plus for more information on the Auto
Powerdown mode. If the FORCEOFF pin is manually set low, the receivers will be disabled and put into 3-state
mode. In either of these powerdown modes, the device will typically consume about 0.5 uA. The truth table logic
of the TRS3122E driver and receiver outputs can be found in Device Functional Modes. Since receiver input is
usually from a transmission line where long cable lengths and system interference can degrade the signal, the
inputs have a typical hysteresis margin of 300 mV. This ensures that the receiver is virtually immune to noisy
transmission lines. Should an input be left unconnected, an internal 5kΩ pull-down resistor to ground will commit
the output of the receiver to a HIGH state.
8.3.4 ESD Protection
ESD protection structures are incorporated on all pins to protect against electrostatic discharges encountered
during handling and assembly. The bus pins (driver outputs and receiver inputs) have extra protection structures,
which have been tested up to ±15 kV.
ESD protection is tested in various ways. TI uses the following standards to qualify the ESD structures designed
into TRS3122E:
•
•
•
•
•
±8 kV using IEC 61000-4-2 Contact Discharge (on RINx and DOUTx pins)
±15 kV using IEC 61000-4-2 Airgap Discharge (on RINx and DOUTx pins)
±15 kV using the Human Body Model (HBM) (on RINx and DOUTx pins)
±2 kV using the Human Body Model (HBM) (on all pins except RINx and DOUTx pins)
±0.5 kV using the Charged Device Model (CDM) (on all pins)
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Feature Description (接下页)
The IEC 61000-4-2 standard is more rigorous than HBM, resulting in lower voltage levels compared with HBM for
the same level of ESD protection. Because IEC 61000-4-2 specifies a lower series resistance, the peak current is
higher than HBM. The TRS3122E has passed both HBM and IEC 61000-4-2 testing.
8.3.5 Auto Powerdown Plus
Powerdown is engaged in two separate cases: automatically, when no activity has occurred for a period of time,
and manually, using the FORCEOFF device pin.
8.3.5.1 Automatic Powerdown
Auto Powerdown Plus is enabled when FORCEON is set LOW and FORCEOFF is set HIGH. Using TRS3122E's
integrated edge detection circuitry and timer, the device can sense when there is no activity on the driver or
receiver inputs for 30 seconds. When this condition is sensed by the device, it automatically shuts the charge
pump off, reducing supply current to 0.5 uA. When a valid transition is sensed on one of the driver or receiver
inputs, the charge pump turns back on and TRS3122E exits powerdown. The typical time to exit powerdown is
typically in 30 us, but can be as long as 150 us. As a result, the system saves power without requiring any
software control. Device Functional Modes summarizes the operating modes in truth table form.
While in the low power mode with Automatic Powerdown enabled (FORCEOFF = HIGH and FORCEON = LOW),
the receiver inputs are still enabled.
8.3.5.2 Manual Powerdown
The device can be manually powered down by externally setting FORCEOFF pin to low logic level. Both the
drivers and receivers will be powered off. Device Functional Modes summarizes the operating modes in truth
table form.
8.3.5.3 Forced On
If the FORCEOFF and FORCEON pins are both set HIGH, the device will power on with Auto Powerdown Plus
disabled. Both the drivers and receiver will be active regardless of inactivity. Because powerdown is
autonomous, FORCEON can be used ensure drivers are ready for new data transmission if the time since last
transmission (or receive data) was more than 15 seconds. Device Functional Modes summarizes the operating
modes in truth table form.
14
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TRS3122E
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ZHCSEZ3C –MAY 2016–REVISED MAY 2016
8.4 Device Functional Modes
8.4.1 Each Driver(1)
INPUTS
OUTPUT
DRIVER STATUS
TIME ELAPSED SINCE LAST
RIN OR DIN TRANSITION
DIN
FORCEON
FORCEOFF
DOUT
X
L
X
H
H
L
L
X
Z
H
L
Powered off
H
H
H
H
H
H
X
Normal operation with
auto-powerdown plus disabled
H
L
X
<30 s
<30 s
>30 s
>30 s
H
L
Normal operation with
auto-powerdown plus enabled
H
L
L
L
Z
Z
Powered off by
auto-powerdown plus feature
H
L
(1) H = high level, L = low level, X = irrelevant, Z = high impedance (off), 30s is typical inactivity time
8.4.2 Each Receiver(1)
INPUTS
OUTPUTS
ROUT
RECEIVER STATUS
TIME ELAPSED SINCE LAST
RIN OR DIN TRANSITION
RIN
FORCEOFF
X
L
L
X
X
X
X
Z
H
L
Powered off
H
H
H
Normal operation with
auto-powerdown plus
disabled/enabled
H
Open
H
(1) H = high level, L = low level, X = irrelevant, Z = high impedance (off), Open = input disconnected or connected driver off
8.4.3 INVALID Status Truth Table(1)
INPUTS
OUTPUT
INVALID
TIME ELAPSED SINCE LAST
RIN OR DIN TRANSITION
RIN1, RIN2
FORCEON
FORCEOFF
Any L or H
All Open
X
X
X
X
X
X
H
L
(1) H = high level, L = low level, X = irrelevant, Z = high impedance (off), Open = input disconnected or connected driver off
8.4.4 Capacitor Selection Table
表 1. Capacitor Selection
VCC = VL
C1 Capacitor Value C2 Capacitor Value C3 Capacitor Value C4 Capacitor Value C5 Capacitor Value
1.65 V to 2 V(1)
3.0 V to 3.6 V(1)
4.5 V to 5.5 V(1)
3 V to 5.5 V(2)
100 nF
100 nF
100 nF or open
100 nF or open
100 nF or open
100 nF
330 nF
470 nF
47 nF
47 nF
330 nF
470 nF
(1) For optimized performance, we recommend using these configurations.
(2) For applications where the Vcc variation is larger, this configuration is acceptable.
版权 © 2016, Texas Instruments Incorporated
15
TRS3122E
ZHCSEZ3C –MAY 2016–REVISED MAY 2016
www.ti.com.cn
9 Application and Implementation
注
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
RS232 is used to communicate between two electrical units on separate PCBs across cables <40 ft. Common
RS232 cables are RJ45, DB9 & DB25.
9.2 Typical 1.8-V Application
1.65ë min
1.65ë min
PCB1
PCB2
100nC
100nC
VCC
VCC
VL
VL
C1+
C1œ
C2+
C2œ
C3+
C3œ
C1+
C1œ
C2+
C2œ
C3+
C3œ
100nC
100nC
100nC
100nC
100nC
V+
V-
V+
V-
/harge
ꢀump
/harge
ꢀump
100nC
100nC
100nC
100nC
a/ÜꢀÜ!wÇ
a/ÜꢀÜ!wÇ
TxD
RTS
100nC
Tx
TxD
RTS
DOUT1
DOUT2
DOUT1
DOUT2
DIN1
DIN2
DIN1
DIN2
8
8
1
GPIO
GPIO
GPIO
GPIO
FORCEON
FORCEOFF
INVALID
FORCEON
FORCEOFF
INVALID
!uto
ꢀowerdown
!uto
ꢀowerdown
CTS
RxD
CTS
RxD
1
RIN1
RIN1
ROUT1
ROUT2
ROUT1
ROUT2
5kΩ
5kΩ
Rx
RIN2
5kΩ
RIN2
5kΩ
GND
GND
图 13. TRS3122E Typical Application
9.2.1 Design Requirements
For this design example, use the parameters listed in 表 2 as the input parameters.
表 2. Design Parameters
DESIGN PARAMETER
MCU GPIO Supple Voltage
Transmission Voltage
EXAMPLE VALUE
1.8 V
+/-4.7 V
1 Mbps
2
Data-rate
Number of Transmitters / Receivers
Charge Pump Capacitor Values
100nF (see 表 3)
9.2.2 Detailed Design Procedure
When using TRS3122E, determine the following:
•
•
All DIN, FORCEOFF, and FORCEON inputs must be connected to valid low or high logic levels.
Select capacitor values based on VCC level for best performance. (see 表 3)
16
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TRS3122E
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ZHCSEZ3C –MAY 2016–REVISED MAY 2016
9.2.2.1 Data-Rate and Cable Length
RS-232 intended is for short range data transmission. The rise time for RS-232 driver edges is slow enough that
the data cable appears as a capacitor instead of a transmission line impedance. The elapsed time for one bit of
data far exceeds the transit time of any practical RS-232 cable length. The capacitance of the cable is the limiting
factor. Therefore the capacitance per foot (or meter) of the cable is important if long data cables are used.
Capacitance slows the rise and fall time of the signal. For low data rates, the delay is insignificant. However, high
data rates will have reduced percentage of time that the output is at VOL or VOH and more time in the transitions.
The timing of the UART (universal asynchronous receiver/transmitter) must sample the signal at the right time to
coincide with VOL and VOH plateaus. At some point data reliability will be impacted. There are no hard limits for
cable capacitance and data rate.
6
1 nF
2 nF
3 nF
4 nF
4
2
0
œ2
œ4
œ6
0
1
2
3
4
Time (ꢀs)
C001
图 14. Typical Waveform with Capacitive Load
VCC = 3.3 V, RLOAD = 3 kΩ, Date Rate = 500kbps
The maximum cable length depends on the cable used (pf/ft), data rate, timing of receiving UART, system
tolerance to data errors.
9.2.2.2 Capacitor Selection
The capacitor type used for C1–C5 is not critical for proper operation; polarized or non-polarized capacitors can
be used, though lower ESR capacitors are preferred. The charge pump requires 0.1 μF capacitors for VCC = 1.8-
V or VCC = 3.3-V operation. For other supply voltages, see 表 1 for required capacitor values. Do not use values
smaller than those listed in 表 1. Increasing the capacitor values(e.g., by a factor of 2), except for C1, reduces
ripple on the transmitter outputs and slightly reduces power consumption. C2, C3, C4 and C5 can be increased
without changing C1’s value. However, do not increase C1 without also increasing the values of C2, C3, C4, C5,
CBYPASS1, and CBYPASS2 to maintain the proper ratios (C1 to the other capacitors). When using the minimum
required capacitor values, make sure the capacitor value does not degrade excessively with temperature. If in
doubt, use capacitors with a larger nominal value. The capacitor’s equivalent series resistance (ESR) usually
increases at low temperatures.
For best charge pump efficiency locate the charge pump and bypass capacitors as close as possible to the IC.
Surface mount capacitors are best for this purpose. Using capacitors with lower equivalent series resistance
(ESR) and self-inductance, along with minimizing parasitic PCB trace inductance will optimize charge pump
operation. Designers are also advised to consider that capacitor values may shift over time and operating
temperature.
表 3. Capacitor Selection
VCC = VL
C1 Capacitor Value C2 Capacitor Value C3 Capacitor Value C4 Capacitor Value C5 Capacitor Value
1.65 V to 2 V(1)
3.0 V to 3.6 V(1)
4.5 V to 5.5 V(1)
3 V to 5.5 V(2)
100 nF
100 nF
100 nF or open
100 nF or open
100 nF or open
100 nF
330 nF
470 nF
47 nF
47 nF
330 nF
470 nF
(1) For optimized performance, we recommend using these configurations.
(2) For applications where the Vcc variation is larger, this configuration is acceptable.
版权 © 2016, Texas Instruments Incorporated
17
TRS3122E
ZHCSEZ3C –MAY 2016–REVISED MAY 2016
www.ti.com.cn
9.2.3 Application Curves
图 15. 1 Mbps Eye Diagram, 2 V/div, 200 ns/ div
VCC = 1.8 V, CLOAD = 500 pF, RLOAD = 3 kΩ
10 Power Supply Recommendations
In most circumstances, a 0.1-μF VCC bypass capacitor and a 1-μF VL bypass capacitor are adequate. In
applications that are sensitive to power-supply noise, use larger value VCC bypass capacitor. There is no
maximum limit for bypass capacitor. Place bypass capacitors as close to the IC as possible.
It is not recommended to use this device when VCC is powered and VL= 0 V or floating for an extended period of
time because operation is undefined. VCC and VL must be powered to guarantee charge pump operation.
Also, to achieve full functionality as described in Specifications, it is recommended to not use a higher voltage on
VL than VCC. Full functionality can be achieved when VCC is greater than or equal to VL.
18
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TRS3122E
www.ti.com.cn
ZHCSEZ3C –MAY 2016–REVISED MAY 2016
11 Layout
11.1 Layout Guidelines
Minimize the length of all capacitor traces to ensure the device can maintain quick rising and falling transitions.
Vias are recommended to accommodate layouts for the capacitors.
11.2 Layout Example
GND
VCC
œ
C4
+
21
VCC
VL
+
CBYP
œ
GND
+
C3
œ
Pin 21
(GND)
œ C1 +
7
8
9
10 11 12
图 16. TRS3122E Typical Layout
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TRS3122E
ZHCSEZ3C –MAY 2016–REVISED MAY 2016
www.ti.com.cn
12 器件和文档支持
12.1 器件支持
12.1.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
12.2 社区资源
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.3 商标
E2E is a trademark of Texas Instruments.
12.4 静电放电警告
这些装置包含有限的内置 ESD 保护。 存储或装卸时，应将导线一起截短或将装置放置于导电泡棉中，以防止 MOS 门极遭受静电损
伤。
12.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 机械、封装和可订购信息
以下页中包括机械、封装和可订购信息。这些信息是针对指定器件可提供的最新数据。这些数据会在无通知且不对
本文档进行修订的情况下发生改变。欲获得该数据表的浏览器版本，请查阅左侧的导航栏。
20
版权 © 2016, Texas Instruments Incorporated
PACKAGE OPTION ADDENDUM
www.ti.com
28-Sep-2021
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TRS3122ERGER
TRS3122ERGET
ACTIVE
ACTIVE
VQFN
VQFN
RGE
RGE
24
24
3000 RoHS & Green
250 RoHS & Green
NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 85
-40 to 85
TRS3122
TRS3122
NIPDAU
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
28-Sep-2021
Addendum-Page 2
GENERIC PACKAGE VIEW
RGE 24
VQFN - 1 mm max height
PLASTIC QUAD FLATPACK - NO LEAD
Images above are just a representation of the package family, actual package may vary.
Refer to the product data sheet for package details.
4204104/H
PACKAGE OUTLINE
VQFN - 1 mm max height
RGE0024H
PLASTIC QUAD FLATPACK- NO LEAD
A
4.1
3.9
B
4.1
3.9
PIN 1 INDEX AREA
1 MAX
C
SEATING PLANE
0.08 C
0.05
0.00
ꢀꢀꢀꢀꢁꢂꢃꢄꢂꢅ
(0.2) TYP
2X 2.5
12
7
20X 0.5
6
13
25
2X
SYMM
2.5
1
18
0.30
PIN 1 ID
(OPTIONAL)
24X
0.18
24
19
0.1
0.05
C A B
C
SYMM
0.48
0.28
24X
4219016 / A 08/2017
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.
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EXAMPLE BOARD LAYOUT
VQFN - 1 mm max height
RGE0024H
PLASTIC QUAD FLATPACK- NO LEAD
(3.825)
2.7)
(
24
19
24X (0.58)
24X (0.24)
1
18
20X (0.5)
25
SYMM
(3.825)
2X
(1.1)
ꢆꢄꢂꢁꢇꢀ9,$
TYP
6
13
(R0.05)
7
12
2X(1.1)
SYMM
LAND PATTERN EXAMPLE
SCALE: 20X
0.07 MIN
ALL AROUND
0.07 MAX
ALL AROUND
METAL
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4219016 / A 08/2017
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments
literature number SLUA271 (www.ti.com/lit/slua271).
5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
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EXAMPLE STENCIL DESIGN
VQFN - 1 mm max height
RGE0024H
PLASTIC QUAD FLATPACK- NO LEAD
(3.825)
4X ( 1.188)
24
19
24X (0.58)
24X (0.24)
1
18
20X (0.5)
SYMM
(3.825)
(0.694)
TYP
6
13
25
(R0.05) TYP
METAL
TYP
7
12
(0.694)
TYP
SYMM
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
EXPOSED PAD
78% PRINTED COVERAGE BY AREA
SCALE: 20X
4219016 / A 08/2017
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations..
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