TPS92630-Q1 [TI]
具有模拟和 PWM 调光功能的汽车类三通道线性 LED 驱动器;
| 型号： | TPS92630-Q1 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 具有模拟和 PWM 调光功能的汽车类三通道线性 LED 驱动器 驱动 驱动器 |
| 文件： | 总42页 (文件大小：1990K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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TPS92630-Q1
ZHCSC40E –FEBRUARY 2014–REVISED MAY 2018
具有模拟和 PWM 调光功能的 TPS92630-Q1 三通道线性 LED 驱动器
1 特性
•
用于报告开路、短路和热关断故障的故障引脚，可
通过一条总线并行连接最多 15 个器件
1
•
•
符合汽车类应用的 标准
具有符合 AEC-Q100 标准的下列结果：
•
器件可适应慢输入电压 dV/dt（0.5V/分），而不会
出现任何问题
–
器件温度 1 级：–40°C 至 125°C 的环境运行温
度范围
•
•
运行结温范围：-40°C 至 150°C
封装：16 引脚耐热增强型 PWP 封装 (HTSSOP)
–
–
器件 HBM ESD 分类等级 H2
器件 CDM ESD 分类等级 C3B
2 应用
•
•
•
3 通道 LED 驱动器（具有模拟和 PWM 调光功能）
宽输入电压范围：5V - 40V
汽车 LED 照明 应用，例如：
•
•
•
•
•
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日间行车灯
驻车灯
由基准电阻器设定的可调恒定输出电流
–
–
–
–
最大电流：每通道 150mA
雾灯
最大电流：并联运行模式下为 450mA
精度：当 I(IOUTx) > 30mA 时，每通道 ±1.5%
精度：当 I(IOUTx) > 30mA 时，每器件 ±2.5%
后灯
停车灯或尾灯
车内照明
•
•
使用多个 IC 或者单个 IC 的多个通道的并联输出，
以实现更高电流
3 说明
TPS92630-Q1 器件是一款具有模拟和 PWM 调光控制
功能的三通道线性 LED 驱动器。该器件的全面诊断和
内置保护功能使其成为可变强度 LED 照明（可达到中
等功率范围） 应用 的理想之选。
低压降电压
–
–
最大压降：电流为 60mA 时每通道 400mV
最大压降：电流为 150mA 时每通道 0.9V
•
•
•
每个通道独立进行 PWM 调光
具有抗毛刺脉冲计时器的开路和短路 LED 检测
器件信息(1)
每条通道的 LED 灯串电压反馈，用于单个 LED 短
路检测
器件号
封装（引脚）
封装尺寸（标称值）
TPS92630-Q1
HTSSOP (16)
4.40mm × 5.00mm
•
针对单个 LED 短路故障的独立故障引脚
(1) 如需了解所有可用封装，请参阅产品说明书末尾的可订购产品
附录。
典型应用原理图
VIN
IOUT1
EN
IOUT2
IOUT3
PWM1
PWM2
PWM3
VSNS3
VSNS2
VSNS1
TPS92630-Q1
MCU
FAULT
FAULT_S
V(bat)
REF
TEMP
GND
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
English Data Sheet: SLVSC76
TPS92630-Q1
ZHCSC40E –FEBRUARY 2014–REVISED MAY 2018
www.ti.com.cn
目录
9.2 Functional Block Diagram ....................................... 14
9.3 Feature Description................................................. 14
9.4 Device Functional Modes........................................ 22
10 Applications and Implementation...................... 24
10.1 Application Information.......................................... 24
10.2 Typical Applications .............................................. 24
11 Power Supply Recommendations ..................... 32
12 Layout................................................................... 33
12.1 Layout Guidelines ................................................. 33
12.2 Layout Example .................................................... 33
13 器件和文档支持 ..................................................... 34
13.1 文档支持................................................................ 34
13.2 接收文档更新通知 ................................................. 34
13.3 社区资源................................................................ 34
13.4 商标....................................................................... 34
13.5 静电放电警告......................................................... 34
13.6 术语表 ................................................................... 34
14 机械、封装和可订购信息....................................... 34
1
2
3
4
5
6
7
特性.......................................................................... 1
应用.......................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
说明 （续）.............................................................. 4
Pin Configuration and Functions......................... 4
Specifications......................................................... 6
7.1 Absolute Maximum Ratings ..................................... 6
7.2 ESD Ratings.............................................................. 6
7.3 Recommended Operating Conditions...................... 6
7.4 Thermal Information.................................................. 6
7.5 Electrical Characteristics.......................................... 7
7.6 Timing Requirements................................................ 9
7.7 Typical Characteristics............................................ 10
Parameter Measurement Information ................ 13
Detailed Description ............................................ 14
9.1 Overview ................................................................. 14
8
9
4 修订历史记录
Changes from Revision D (January 2018) to Revision E
Page
•
•
•
•
•
•
•
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•
•
•
•
在典型应用原理图上增加了输出电容器................................................................................................................................... 1
Changed VIH and VIL logic-level values for the PWMx pins.................................................................................................... 7
Changed parameter description for I(pullup) from strong to weak pullup current ...................................................................... 8
Added capacitors to the outputs on Figure 26 ..................................................................................................................... 24
Added the Input and Output Capacitors section................................................................................................................... 25
Added capacitors to the outputs on Figure 28 ..................................................................................................................... 26
Added the Input and Output Capacitors section................................................................................................................... 27
Added capacitors to the outputs on Figure 29 ..................................................................................................................... 28
Added the Input and Output Capacitors section................................................................................................................... 29
Added capacitors to the outputs on Figure 30 ..................................................................................................................... 30
Added the Input and Output Capacitors .............................................................................................................................. 31
Added capacitors to the outputs on Figure 31 ..................................................................................................................... 31
Added the Input and Output Capacitors section................................................................................................................... 32
Changes from Revision C (November 2017) to Revision D
Page
•
•
Changed pinout diagram ........................................................................................................................................................ 4
Changed text for the Thermal pad row in the DESCRIPTON column ................................................................................... 5
Changes from Revision B (January 2015) to Revision C
Page
•
•
•
•
•
在产品说明书标题中将 TPS9263x-Q1 更改成了 TPS92630-Q1 ............................................................................................ 1
从页眉中删除了 TPS92630-Q1 部件号................................................................................................................................... 1
在特性 列表中删除了“两个选项”项目 ...................................................................................................................................... 1
在器件信息 表中删除了 TPS92631-Q1 器件 .......................................................................................................................... 1
Changed pinout diagram ........................................................................................................................................................ 4
2
版权 © 2014–2018, Texas Instruments Incorporated
TPS92630-Q1
www.ti.com.cn
ZHCSC40E –FEBRUARY 2014–REVISED MAY 2018
•
•
•
•
•
Deleted the COMMENT column and moved the comment text to the DESCRIPTION column............................................. 4
Added a row for thermal pad information ............................................................................................................................... 5
Deleted specifications pertaining to the TPS92631-Q1 device .............................................................................................. 8
Changed figure reference in the FAULT Diagnostics section to Figure 19.......................................................................... 15
添加了接收文档更新通知 和社区资源 部分........................................................................................................................... 34
Changes from Revision A (December 2014) to Revision B
Page
•
Changed pin numbers for IOUT1 and IOUT3 in Pin Functions table .................................................................................... 4
Changes from Original (February 2014) to Revision A
Page
•
•
Changed pin numbers and comments in Pin Functions table for pins 14 and 16 ................................................................. 4
Changed Changed the Handling Ratings table to ESD Ratings and moved storage temperature to the Absolute
Maximum Ratings table ......................................................................................................................................................... 6
•
Changed the MAX value for the EN internal pulldown parameter from 2.5 to 5 µA in the Electrical Characteristics
table ....................................................................................................................................................................................... 7
•
•
•
•
•
Added MAX value for T(shutdown) ............................................................................................................................................. 8
Changed Figure 24 .............................................................................................................................................................. 22
Changed Figure 25 .............................................................................................................................................................. 22
Changed voltage on pullup resistor from 3 V to 3.3 V ........................................................................................................ 22
Changed board layout diagram ........................................................................................................................................... 33
版权 © 2014–2018, Texas Instruments Incorporated
3
TPS92630-Q1
ZHCSC40E –FEBRUARY 2014–REVISED MAY 2018
www.ti.com.cn
5 说明 （续）
这款器件的设计非常适合于在其功率能力范围内驱动被配置为单个灯串或多个灯串的 LED。单个器件能够驱动多达
3 个灯串（每个灯串中有 1 到 3 个 LED），每通道的总电流高达 150mA。为了提供达到 450mA 的更高电流驱动
能力，可将输出并联。
在多灯串 应用中，该器件的优势在于支持 LED 灯串进行共阴极连接。因此，此类应用仅需一条回线，无需像进行
低侧电流感应的系统那样为每个 LED 灯串都配备一条回线。
单个 LED 短路比较器可检测出发生短路故障的单个 LED。故障输出能够支持多个器件之间的总线连接拓扑结构。
该器件包含温度监控器，可在器件结温超过温度阈值时降低 LED 驱动电流。用户可通过一个外部电阻器对温度阈
值进行编程。将 TEMP 引脚接至地面可禁用热电流监视功能。该器件提供了将结温以模拟电压形式输出的出厂程序
选项。
6 Pin Configuration and Functions
PWP Package
16-Pin HTSSOP With PowerPAD™ Package
Top View
VIN
EN
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
IOUT1
IOUT2
IOUT3
VSNS3
VSNS2
VSNS1
GND
PWM1
PWM2
PWM3
FAULT
FAULT_S
TEMP
Thermal
Pad
REF
Not to scale
Pin Functions
PIN
I/O
DESCRIPTION
NAME
NO.
2
EN
I
I/O
I/O
—
O
O
O
I
Enable and shut down
Fault pin. Leave floating if not used.
FAULT
FAULT_S
GND
6
7
Single-LED short fault. Leave floating if not used.
Ground
10
16
15
14
3
IOUT1
IOUT2
IOUT3
PWM1
PWM2
PWM3
REF
Current output pin. Connect to VSNS1 if not used.
Current output pin. Connect to VSNS2 if not used.
Current output pin. Connect to VSNS3 if not used.
PWM input and channel ON or OFF. Tie to GND if this channel is not used.
PWM input and channel ON or OFF. Tie to GND if this channel is not used.
PWM input and channel ON or OFF. Tie to GND if this channel is not used.
Reference resistor pin for normal current setting
Temperature foldback threshold program. Tie to GND if not used.
Input pin – VBAT supply
4
I
5
I
9
O
I/O
—
I
TEMP
VIN
8
1
VSNS1
11
String voltage sense. Connect to IOUT1 if not used.
4
Copyright © 2014–2018, Texas Instruments Incorporated
TPS92630-Q1
www.ti.com.cn
ZHCSC40E –FEBRUARY 2014–REVISED MAY 2018
Pin Functions (continued)
PIN
I/O
DESCRIPTION
NAME
VSNS2
NO.
12
I
I
String voltage sense. Connect to IOUT2 if not used.
String voltage sense. Connect to IOUT3 if not used.
Connect to GND
VSNS3
13
Thermal pad
—
—
Copyright © 2014–2018, Texas Instruments Incorporated
5
TPS92630-Q1
ZHCSC40E –FEBRUARY 2014–REVISED MAY 2018
www.ti.com.cn
7 Specifications
7.1 Absolute Maximum Ratings(1)
MIN
MAX
UNIT
VIN, IOUTx, PWMx, EN,
VSNSx
Unregulated input(2) (3) (4)
–0.3
45
V
(2)
(2)
FAULT, FAULT_S
Others
See
See
–0.3
–0.3
–40
–40
–65
22
7
V
V
Virtual junction temperature, TJ
150
125
150
°C
°C
°C
Operating ambient temperature, TA
Storage temperature, Tstg
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to GND.
(3) Absolute maximum voltage 45 V for 200 ms
(4) VIOUTx must be less than VVIN + 0.3 V
7.2 ESD Ratings
VALUE
±2000
±750
UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1)
Corner pins (1, 8, 9, and 16)
Other pins
V(ESD)
V
Charged-device model (CDM), per AEC Q100-011
±500
(1) AEC Q100-002 indicates HBM stressing is done in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
7.3 Recommended Operating Conditions
MIN
MAX
40
UNIT
V
VIN
5
0
PWMx, EN, VSNSx
FAULT, FAULT_S
Others
40
V
0
20
V
0
5
V
TJ
Operating junction temperature range
–40
150
°C
7.4 Thermal Information
TPS92630-Q1
THERMAL METRIC(1)
PWP (HTSSOP)
UNIT
16 PINS
41.5
29.6
24
RθJA
Junction-to-ambient thermal resistance(2)
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJC(top)
RθJB
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
1
ψJB
23.8
3.4
RθJC(bot)
(1) For more information about traditional and new thermal metrics, see Semiconductor and IC Package Thermal Metrics.
(2) The thermal data is based on JEDEC standard high-K profile – JESD 51-7. The copper pad is soldered to the thermal land pattern. Also,
correct attachment procedure must be incorporated.
6
Copyright © 2014–2018, Texas Instruments Incorporated
TPS92630-Q1
www.ti.com.cn
ZHCSC40E –FEBRUARY 2014–REVISED MAY 2018
7.5 Electrical Characteristics
V(VIN) = 14 V, TJ = –40°C to 150°C (unless otherwise stated)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SUPPLY VOLTAGE AND CURRENT (VIN)
VI
Input voltage
5
40
0.85
10
V
All PWMx = high, I(IOUTx) = 100 mA,
Not including Iref
I(quiescent)
IO(sd)
Quiescent current
0.5
0.6
0.6
mA
µA
Shutdown current
V(EN) = 0 V
Shutdown current in fault mode
(device to GND)
PWM = EN = high, FAULT = low, V(VIN)
5 V–40 V, I = 100 mA
=
=
0.5
0.85
I(fault)
mA
Shutdown current in fault mode (from PWM = EN = high, FAULT = low, V(VIN)
2
V(VIN)
)
5 V–40 V, I = 100 mA
PWMx AND EN
VIL(EN)
Logic input, low level
Logic input, high level
EN internal pulldown
Logic input, low level
Logic input, high level
Hysteresis
IOUTx disabled
IOUTx enabled
V(EN) = 0 V to 40 V
IOUTx disabled
IOUTx enabled
0
2
0.7
5
V
V
VIH(EN)
I(EN-pd)
0.35
1.135
1.161
µA
V
VIL(PWMx)
VIH(PWMx)
Vhys(PWM)
I(PWM-pd)
1.195 1.255
1.222 1.283
44
V
mV
nA
PWMx internal pulldown current
V(PWMx) = 40 V
100
180
250
CURRENT REGULATION (IOUTx)
Each channel
10
30
150
450
I(IOUTx)
Regulated output current range
mA
Three channels in parallel mode
10 mA < I(IOUTx) < 30 mA, V(VIN) = 5 V–40 V
I
- I
(IOUTx) (avg)
–3%
3%
Channel accuracy =
I
(1)
(avg)
ΔIO(channel)
Channel accuracy
30 mA ≤ I(IOUTx) < 150 mA, Vin = 5 V–40 V
I
- I
(IOUTx) (avg)
–1.5%
1.5%
Channel accuracy =
I
(1)
(avg)
10 mA < I(IOUTx) < 30 mA, V(VIN) = 5 V to
20 V(2)
I
- I
–4%
4%
(IOUTx) (setting)
Device accuracy =
I
(3)
(3)
(setting)
ΔIO(device)
Device accuracy
30 mA ≤ IOUT < 150 mA, V(VIN) = 5 V to
20 V(2)
I
- I
–2.5%
1.198
2.5%
(IOUTx) (setting)
Device accuracy =
I
(setting)
Vref
K(I)
Reference voltage
1.222 1.246
100
V
V
Ratio of I(IOUTx) to reference current
At 150 mA load per channel
At 60 mA load per channel
0.6
0.9
0.4
V(DROP)
Dropout voltage
0.24
Current rising from 10% to 90% or falling
from 90% to 10% at I(IOUTx) = 60 mA.(4)
4
7
8
15
25
mA/µs
mA/µs
SR
Current rise and fall slew rates
Current rising from 10% to 90% or falling
from 90% to 10% at I(IOUTx) = 150 mA.(4)
14
(1) I(AVG) = [I(IOUT1) + I(IOUT2) + I(IOUT3)] / 3
(2) For V(VIN) voltages higher than 20 V, see Figure 2 and Figure 3.
(3) I(setting) is the target current set by Rref
(4) See Figure 17 for the load model for the slew-rate test and delay-time test.
.
Copyright © 2014–2018, Texas Instruments Incorporated
7
TPS92630-Q1
ZHCSC40E –FEBRUARY 2014–REVISED MAY 2018
www.ti.com.cn
Electrical Characteristics (continued)
V(VIN) = 14 V, TJ = –40°C to 150°C (unless otherwise stated)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
FAULT (FAULT)
VIL
Logic input low threshold
Logic input high threshold
Logic output low level
Logic output high level
Strong pulldown current
Weak pullup current
0.7
0.7
V
V
VIH
2
VOL
Tested with 500-µA external pullup
Tested with 1-µA external pulldown
V
VOH
2
500
4
V
I(pulldown)
I(pullup)
COMPARATOR (VSNSx)
Internal comparator reference (for
750
8
1000
16
µA
µA
V(VSNSx)
Ilkg
V(VIN) > V(th)
1.198
8
1.222 1.246
V
nA
V
short circuit detection)
Leakage current
V(VSNSx) = 3 V
500
Voltage at which the chip enables the
single-short alarm function
V(th)
Single-short detection enabled
9
V(th) hysteresis
145
mV
PROTECTION
V(OLV)
Open-load detection voltage
Open-load detection hysteresis
Short-detection voltage
V(OLV) = V(VIN) – V(IOUTx)
50
100
0.846
318
1
100
200
150
300
mV
mV
V
V(OL-hys)
V(SV)
0.89 0.935
Short-detection hysteresis
335
2
352
3
mV
ms
Short-detection deglitch
During PWM, count the number of
continuous cycles when V(IOUTx) < V(SV)
7
8
Cycles
R(REF_open)
R(REF_short)
REF pin resistor open detection
REF pin resistor short detection
FAULT goes low
FAULT goes low
15
23
57
kΩ
350
470
800
Ω
THERMAL MONITOR
T(shutdown) Thermal shutdown
T(hys)
155
170
15
170
°C
°C
Thermal shutdown hysteresis
Thermal foldback activation
temperature
T(th)
90% of I(IOUTx) normal (TEMP pin floating)
95
110
50%
0
125
60%
0.2
°C
I(TFCmin)
V(T-disable)
Minimum foldback current
40%
Thermal-foldback-function disable
voltage
V
8
Copyright © 2014–2018, Texas Instruments Incorporated
TPS92630-Q1
www.ti.com.cn
ZHCSC40E –FEBRUARY 2014–REVISED MAY 2018
7.6 Timing Requirements
MIN
NOM
MAX
UNIT
V(VIN) > 5 V, I(IOUTx) = 50%, I(setting)
60 mA(1)
=
t(startup)
td(on)
Start-up time
200
µs
Delay time between PWM rising
edge to 10% of I(IOUTx)
Two LEDs in series, 10-kΩ resistor in
parallel
14
30
µs
Delay time between PWM falling
edge to 90% of I(IOUTx)
Two LEDs in series, 10-kΩ resistor in
parallel
td(off)
25
2
45
3
µs
ms
1
7
1
Single-short detection deglitch
Open-load detection deglitch
Short-detection deglitch
During PWM, count the number of
continuous cycles when V(VSNSx) < 1.24 V
8
Cycles
ms
2
2
3
During PWM, count the number of
continuous cycles when V(VIN) – V(IOUTx)
V(OLV)
<
7
8
Cycles
1
7
3
8
ms
During PWM, count the number of
continuous cycles when V(IOUTx) < V(SV)
Cycles
(1) Start-up is considered complete when I(setting) increases to 30 mA.
Copyright © 2014–2018, Texas Instruments Incorporated
9
TPS92630-Q1
ZHCSC40E –FEBRUARY 2014–REVISED MAY 2018
www.ti.com.cn
7.7 Typical Characteristics
1.6
8
7
6
5
4
3
2
1
0
Channel Current Accuracy
Device Current Accuracy
1.4
1.2
1
0.8
0.6
0.4
0.2
0
IDEV CH1
IDEV CH2
IDEV CH3
0
20
40
60
80
100
120
140
160
20
25
30
35
40
LED Current (A)
Input Voltage (V)
D001
D002
TA = 25ºC
V(VIN) = 14 V
Three LEDs
V(VIN) = 20 V
I(setting) = 30 mA
Figure 1. Current Accuracy vs Current Setting
Figure 2. Device Current Accuracy vs Input Voltage
160
140
120
100
80
5
4.5
4
IOUT CH1
IOUT CH2
IOUT CH3
3.5
3
2.5
2
60
1.5
1
40
IDEV CH1
IDEV CH2
IDEV CH3
20
0.5
0
0
20
25
30
35
40
0
2
4
6
8
10
12
14
Input Voltage (V)
External Resistance (kW)
D003
D006
V(VIN) = 20 V
I(setting) = 150 mA
A
Figure 3. Device Current Accuracy vs Input Voltage
Figure 4. Output Current vs External Resistance
180
30.45
30.4
IOUT CH1
IOUT CH2
IOUT CH3
160
140
120
100
80
30.35
30.3
30.25
30.2
30.15
30.1
60
40
30.05
30
20
0
29.95
0
5
10
15
20
-40 -25 -10
5
20 35 50 65 80 95 110 125
Input Voltage (V)
Ambient Temperature (èC)
D007
D008
3 white LEDs
LEDs in series
I(setting) = 150 mA
I(setting) = 30 mA
V(VIN) = 14 V
Figure 5. Output Current vs Input Voltage
Figure 6. Output Current vs Ambient Temperature
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Typical Characteristics (continued)
1.4
1.2
1
150.5
150.4
150.3
150.2
150.1
150
IOUT CH1
IOUT CH2
IOUT CH3
0.8
0.6
0.4
0.2
0
149.9
149.8
149.7
149.6
-40 -25 -10
5
20 35 50 65 80 95 110 125
80
100
120
140
160
180
200
Ambient Temperature (èC)
Junction Temperature (èC)
D009
D010
I(setting)= 150 mA
V(VIN) = 14 V
A
Figure 7. Output Current vs Ambient Temperature
Figure 8. Reference Voltage vs Junction Temperature With
Thermal Foldback
Ch. 1 = PWM input
Ch. 2 = IOUT1
f(PWM) = 200 Hz
Ch. 3 = IOUT2
Ch. 1 = PWM input
Ch. 4 = IOUT3
Ch. 2 = IOUT1
f(PWM) = 200 Hz
Ch. 3 = IOUT2
Ch. 4 = IOUT3
Duty cycle = 10%
Duty cycle = 50%
Figure 9. PWM Dimming
Figure 10. PWM Dimming
Ch. 1 = PWM input
Ch. 4 = IOUT3
Ch. 2 = IOUT1
f(PWM) = 200 Hz
Ch. 3 = IOUT2
Ch. 1 = PWM input
Ch. 4 = IOUT3
Ch. 2 = IOUT1
Ch. 3 = IOUT2
Duty cycle = 90%
f(PWM) = 2000 Hz
Duty cycle = 10%
Figure 11. PWM Dimming
Figure 12. PWM Dimming
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Typical Characteristics (continued)
Ch. 1 = PWM input
Ch. 4 = IOUT3
Ch. 2 = IOUT1
Ch. 3 = IOUT2
Ch. 1 = PWM input
Ch. 4 = IOUT3
Ch. 2 = IOUT1
Ch. 3 = IOUT2
f(PWM) = 2000 Hz
Duty cycle = 50%
f(PWM) = 2000 Hz
Duty cycle = 90%
Figure 13. PWM Dimming
Figure 14. PWM Dimming
65
6
IOUT
IOUT
IOUT
1
2
3
60
55
50
45
40
35
30
25
20
15
10
5
5.5
5
4.5
4
VFAULT
3.5
3
2.5
2
1.5
1
0.5
0
0
-0.5
0
2
4
6
8
10
12
Input Voltage (V)
D011
I(setting) = 60 mA
V(VIN) = V(EN)
3 white LEDs
V(VIN) = 0 V to 12 V
dV/dt = 0.5 V/min
I(setting) = 60 mA
Figure 15. Fast Power-Up Waveform
Figure 16. Slow Power-Up Waveform
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8 Parameter Measurement Information
VIN
td(on)
td(off)
IOUTx
EN
0.7 V
PWMx
PWMx
10
kW
TPS92630-Q1
20 W at 60 mA
8 W at 150 mA
90%
90%
I(2)
5.5 V
IOUTx
V(bat)
10%
10%
I(1)
REF
GND TEMP
t(1) t(2) t(3)
t(4) t(5) t(6)
Figure 17. Load Model for Slew-Rate and Delay-Time Tests
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9 Detailed Description
9.1 Overview
The TPS92630-Q1 device is a three-channel constant-current regulator with individual PWM dimming, designed
for high brightness red or white LEDs in automotive lighting applications. Each channel has up to 150-mA current
capability, giving a combined 450-mA current capability when paralleled. The device provides excellent current
matching between channels and devices. A high-side current source allows LED common-cathode connections.
The advanced control loop allows high accuracy between channels, even when different numbers of LEDs are
connected on the output. Use of a separate PWM channel dims or disables each channel.
The TPS92630-Q1 device monitors fault conditions on the output and reports its status on the FAULT and
FAULT_S pins. It features single-shorted-LED detection, output short-to-ground detection, open-load detection,
and thermal shutdown. Two separate fault pins allow maximum flexibility of fault-mode reporting to the MCU in
case of an error. In case there is no MCU, one can connect multiple TPS92630-Q1 devices in a bus mode.
Integrated thermal foldback protects the devices from thermal shutdown by reducing the output current linearly
when reaching a preset threshold. Use an external resistor to program the temperature foldback threshold. Tying
the TEMP pin to ground disables this function.
9.2 Functional Block Diagram
VBAT
VIN
TEMP
REF
Current
Regulator
Thermal
Control
Voltage
Reference
IOUT1
IOUT2
IOUT3
Current
Reference
RREF
PWM1
PWM2
VREF
VSNS1
VSNS2
VSNS3
PWM3
Voltage
Comparator
Control Logic
FAULT
FAULT_S
GND
9.3 Feature Description
9.3.1 Constant LED-Current Setting
Control of the three LED output channels is through separate linear current regulators. A common external
resistor sets the current in each channel. The device also features two current levels with external circuitry,
intended for stop- and tail-light applications.
See Equation 1 on how to set the current:
14
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Feature Description (continued)
V
´K(I)
ref
I(IOUTx)
=
R(REF)
V
´K(I)
ref
R(REF)
=
I(IOUTx)
(1)
9.3.2 PWM Control
The device features a separate PWM dimming control pin for each output channel. PWM inputs also function as
shutdown pin when an output is unused. Tying PWM to ground disables the corresponding output. The PWM
signal has a precise threshold, which one can use to define the start-up voltage of LED as an undervoltage-
lockout (UVLO) function with the divider resistor from the VIN pin.
9.3.3 FAULT Diagnostics
The TPS92630-Q1 device has two fault pins, FAULT and FAULT_S. FAULT_S is a dedicated fault pin for single-
LED short failure and FAULT is for general faults, that is, short, open, and thermal shutdown. The dual pins allow
maximum flexibility based on all requirements and application conditions.
The device fault pins can be connected to an MCU for fault reporting. Both fault pins are open-drain transistors
with a weak internal pullup. See Figure 19.
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Feature Description (continued)
Fault removed
VIN/EN
FAULT
FAULT_S
LED Short
7 PWM Cycles
Single-LED Short
7 PWM Cycles
Single-
LED
LED
Short
LED
Open
2 ms
LED Open
7-PWM Cycles
IOUT1
IOUT2
IOUT3
PWM
Short
2 ms
to GND
2 ms
Figure 18. Detailed Timing Diagram
In case there is no MCU, one can connect up to 15 TPS92630-Q1 FAULT and FAULT_S pins together. When
one or more devices have errors, the respective FAULT pins go low, pulling the connected FAULT bus down and
shutting down all device outputs. Figure 19 shows the fault-line bus connection.
̅
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Feature Description (continued)
VIN
TPS92630-Q1
Internal
Pullup
FAULT
Fault
Logic
FAULT_S
GND
VIN
TPS92630-Q1
Internal
Pullup
FAULT
Fault
Logic
FAULT_S
GND
Figure 19. Fault-Line Bus Connection
The device releases the FAULT bus when external circuitry pulls the FAULT pin high, on toggling of the EN pin,
or on a power cycle of the device. In case there is no MCU, only a power cycle clears the fault. See Figure 20.
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Feature Description (continued)
Fault Removed
VIN/EN
FAULT
and
FAULT_S
Single-LED Short
7 PWM Cycles
LED Short
7 PWM Cycles
Single-
LED
LED
Short
LED
Open
2 ms
Short
2 ms
LED Open
7 PWM Cycles
to GND
2 ms
IOUT1
IOUT2
IOUT3
PWM
Figure 20. Detailed Timing Diagram
The following faults result in the FAULT or FAULT_S pin going low: thermal shutdown, open load, output short
circuit, single LED short, and REF open or shorted. For thermal shutdown or LED open, release of the FAULT
pin occurs when the thermal-shutdown or LED-open condition no longer exists. For other faults, the FAULT and
FAULT_S pins stay low even if the condition does not exist. Clearing the faults requires a power cycle of the
device.
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Feature Description (continued)
9.3.4 Short-Circuit Detection
The device includes three internal comparators for LED forward-voltage measurement. With external resistor
dividers, the device compares total LED forward voltage with the internal reference voltage. This feature enables
the detection of one or more shorted LEDs. Any LED cathode or IOUTx pin shorted to ground results in a short-
circuit condition. The external resistor dividers control the detection-threshold-voltage setting.
Figure 21 illustrates different short-circuit conditions.
VIN
IOUT1
IOUT2
IOUT3
R3a
VSNS3
C
A
R3b
B
TPS92630-Q1
R2a
R2b
VSNS2
VSNS1
FAULT
FAULT_S
R1a
R1b
GND
Figure 21. Short-Circuit Conditions
A short in one or more LEDs in a string (A and B as illustrated) registers as only a single-LED short when
V(VIN) > 9 V.
•
The device reports the failure to the MCU. The faulted channel continues sourcing current until the MCU
takes actions to turn off channels through the EN or PWMx pin.
•
No MCU: with FAULT_S floating, no action results. With FAULT_S tied to FAULT, all output channels shut
down together.
When an entire string of LEDs is shorted (C as illustrated), the device pulls FAULT low to shut down all
channels. With the FAULT pin tied high, only the faulted channel turns off.
•
•
•
•
•
VF(max) – maximum forward voltage of LED used
VF(min) – minimum forward voltage of LED used
N – Number of LEDs used in a string
R – resistor divider ratio
V(VSNSx) – internal reference voltage of comparators
When selecting R, observe the following relationship to avoid false triggering.
R = (Rxa + Rxb) / Rxb
(2)
(3)
(N – 1) × VF(max) < V(VSNSx) × R < N × VF(min)
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Feature Description (continued)
Normal operation region
N × Vf,min
Vsns × R
(N-1) × Vf,max
Short-circuit region
Figure 22. Single-LED Short-Trigger Calculation
9.3.5 Open-Load Detection
Detection of an open-load condition occurs when the voltage across the channel, V(VIN) – V(IOUTx), is less than the
open-load detection voltage, V(OLV). When this condition is present for more than the open-load-detection deglitch
(2 ms when PWM is 100% on or one PWM on-time is more than 2 ms, or seven continuous PMW duty cycles
when in PWM dimming mode), the FAULT pin goes low, keeping the open channel on and turning the other
channel off. With the FAULT pin tied high, all channels remain turned on. The channel recovers on removal of
the open condition. Note that the device can detect an open load if the sum of the forward voltages of the LEDs
in a string is close to or greater than the supply voltage on VIN.
Table 1. Fault Table(1) (2)
JUDGMENT CONDITION
FAILURE
REMOVED
SELF-
CLEARING
DIAGNOSTIC
OUTPUT PINS
FAULT AND
FAULT_S
DETECTION
VIN
VOLTAGE
FAILURE MODE
ACTION
Pulled low
Pulled low
DEVICE REACTION
(3)
CHANNEL
STATUS
DETECTION
MECHANISM
Externally
pulled high
Toggle EN,
power cycle
Failing strings turned off,
other channels on
Short circuit:
1 or several LED strings
V(IOUTx)
0.9 V
<
V(VIN) > 5 V
ON
ON
FAULT
No
No
Toggle EN,
power cycle
Floating
All strings turned OFF
All strings stay ON
All strings stay ON
All strings stay ON
Externally
pulled high
Toggle EN,
power cycle
Single-LED short
circuit:
1 or several LED strings
V(VSNSx)
<
V(VIN) > 9 V
FAULT_S
1.222 V
Toggle EN,
power cycle
Floating
Externally
pulled high
Open load:
1 or several LED strings
V(VIN) – V(IOUTx)
< 100 mV
V(VIN) > 5 V
ON
FAULT
FAULT
Pulled low
Pulled low
Yes
Yes
Failing string stays ON,
other channels turned
OFF
Floating
Externally
pulled high
All strings stay ON
Short to battery:
1 or several LED strings
V(VIN) – V(IOUTx)
< 100 mV
V(VIN) > 5 V
ON or OFF
Failing string stays ON,
other channels turned
OFF
Floating
Externally
pulled high
Temperature
> 170°C
Temperature <
155°C
Thermal shutdown
Thermal foldback
V(VIN) > 5 V
V(VIN) > 5 V
ON or OFF
ON or OFF
FAULT
N/A
Pulled low
None
All strings turned OFF
Yes
Yes
Leave open
N/A
All strings with
reduced current
Temperature
> 110°C
Temperature <
100°C
(1) With diagnostic pins FAULT and FAULT_S tied high externally, pullup must be strong enough to override internal pulldown.
(2) To achieve single-LED short circuit to turn off all strings, FAULT_S and FAULT pins must be connected together.
(3) Pulling FAULT and FAULT_S high externally changes the behavior of the device reaction. If not externally forced high, the device pulls
the pins low based on the failure mode.
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Feature Description (continued)
Table 1. Fault Table() () (continued)
JUDGMENT CONDITION
FAILURE
REMOVED
SELF-
CLEARING
DIAGNOSTIC
OUTPUT PINS
FAULT AND
FAULT_S
DETECTION
VIN
VOLTAGE
FAILURE MODE
ACTION
DEVICE REACTION
(3)
CHANNEL
STATUS
DETECTION
MECHANISM
R(REF) > 57 kΩ
or
R(REF) < 350 Ω
Toggle EN,
power cycle
Reference resistor
open or shorted
V(VIN) > 5 V
ON or OFF
FAULT
Pulled low
N/A
All strings turned OFF
No
9.3.6 Thermal Foldback
The TPS92630-Q1 device integrates thermal shutdown protection to prevent the device from overheating. In
addition, to prevent LEDs from flickering because of rapid thermal changes, the device includes a programmable
thermal current-foldback feature to reduce power dissipation at high junction temperatures.
The TPS92630-Q1 device reduces the LED current as the silicon junction temperature of the TPS92630-Q1
device increases (see Figure 23). By mounting the TPS92630-Q1 device on the same thermal substrate as the
LEDs, use of this feature can also limit the dissipation of the LEDs. As the junction temperature of the
TPS92630-Q1 device increases, the device reduces the regulated current, reducing the dissipated power in the
TPS92630-Q1 device and in the LEDs. The current reduction is from the 100% level at typically 2% of I(setting) per
ºC until the point at which the current drops to 50% of the full value.
I
(setting)
90%
2% of I
per ºC
(setting)
50%
T
+ 20°C
T
T
(shutdown)
(th)
(th)
Figure 23. Thermal Foldback
Above this temperature, the current continues to decrease at a lower rate until the temperature reaches the
overtemperature shutdown threshold temperature, T(shutdown). Changing the voltage on the TEMP pin adjusts the
temperature at which the current reduction begins. With TEMP floating, the definition of thermal monitor
activation temperature, T(th), is the temperature at which the current reduction begins. The specification of T(th) in
the characteristics table is at the 90% current level. T(th) increases as the voltage at the TEMP pin, V(TEMP)
declines and is defined as approximately:
,
T(th) = –121.7 V(TEMP) + 228.32
(4)
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2
1.8
1.6
1.4
1.2
1
0.8
0.6
0.4
0.2
0
0
25
50
75
100
125
150
Thermal Foldback Temperature (èC)
D004
Figure 24. TEMP Pin Voltage vs Temperature
A resistor connected between TEMP and GND reduces V(TEMP) and increases T(th). A resistor connected between
TEMP and a reference supply greater than 1 V increases V(TEMP) and reduces T(th)
.
100
V(res)
0 V
3.3 V
5 V
80
60
40
20
0
20
40
60
80
100
120
140
160
Thermal Foldback Temperature (ºC)
D005
Figure 25. Pullup and Pulldown Resistors vs T(th)
Figure 25 shows how the nominal value of the thermal-monitor activation temperature varies with the voltage at
TEMP and with either a pulldown resistor to GND or with a pullup resistor to 3.3 V or 5 V.
In extreme cases, if the junction temperature exceeds the overtemperature limit, T(shutdown), the device disables all
channels. Temperature monitoring continues, and channel reactivation occurs when the temperature drops below
the threshold provided by the specified hysteresis.
Note the possibility of the TPS92630-Q1 device transitioning rapidly between thermal shutdown and normal
operation. This can happen if the thermal mass attached to the exposed thermal pad is small and T(th) is
increased to close to the shutdown temperature. The period of oscillation depends on T(th), the dissipated power,
the thermal mass of any heatsink present, and the ambient temperature.
9.4 Device Functional Modes
9.4.1 Thermal Information
This device operates a thermal shutdown (TSD) circuit as a protection from overheating. For continuous normal
operation, the junction temperature should not exceed the thermal-shutdown trip point. If the junction temperature
exceeds the thermal-shutdown trip point, the output turns off. When the junction temperature falls below the
thermal-shutdown trip point, the output turns on again.
Calculate the power dissipated by the device according to the following formula:
22
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Device Functional Modes (continued)
PT = V(VIN) × I(VIN) – n1 × V(LED1) × I(LED1) – n2 × V(LED2) × I(LED2) – n3 × V(LED3) × I(LED3) – Vref 2 / R(REF)
(5)
where:
PT = Total power dissipation of the device
nx = Number of LEDs for channel x
V(LEDx) = Voltage drop across one LED for channel x
Vref = Reference voltage, typically 1.222 V
I(LEDx) = Average LED current for channel x
After determining the power dissipated by the device, calculate the junction temperature from the ambient
temperature and the device thermal impedance.
TJ = TA + RθJA × PT
(6)
9.4.2 Operation With V(VIN) < 5 V (Minimum V(VIN)
)
The devices operate with input voltages above 5 V. The devices start working when V(VIN) > 4 V, but while 4 V <
V(VIN) < 5 V, the devices shield all the fault status. With fault status shielded, if any fault occurs the devices may
not report the fault and take the correct action.
9.4.3 Operation With 5 V < V(VIN) < 9 V (Lower-Than-Normal Automotive Battery Voltage)
The devices operate with input voltages above 5 V. When the input voltage is lower than normal automotive 9 V,
the devices shield single-LED-short fault status. With fault status shielded, if a single-LED-short fault occurs the
devices do not report the fault with the FAULT_S pin.
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10 Applications and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
10.1 Application Information
The following discussion includes several applications showing how to implement the TPS92630-Q1 device for
automotive lighting such as stop lights and taillights. Some of the examples demonstrate implementation of the
fault bus function or detail use of the device for higher-current applications.
10.2 Typical Applications
10.2.1 Stoplight and Taillight Application With PWM Generator
Another easy way to achieve the different brightness is dimming by pulse-width modulation (PWM), which holds
the color spectrum of the LED over the whole brightness range. The maximum current that passes through the
LED is programmable by sense resistor RREF
.
Figure 26 shows the application circuit of the stoplight and taillight including an automotive-qualified timer,
TLC555-Q1, the duty cycle of which is programmable by two external resistors. One can see that driving the
STOP signal high pulls the PWM pin constantly high, creating 100% duty cycle. Thus the LEDs operate at full
brightness. When the TAIL signal is high, the LEDs operate at 50% brightness because the TLC555-Q1 timer is
programmed at a fixed duty cycle of 50%.
Stop
VIN
Tail
IOUT1
IOUT2
IOUT3
EN
PWM1
VSNS3
PWM2
TPS92630-Q1
PWM3
VSNS2
FAULT
TLC555-Q1
FAULT_S
VDD
OUT
VSNS1
REF
RREF
TEMP
GND
Figure 26. Two-Level Brightness Adjustment Using the TPS92630-Q1 With PWM
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Typical Applications (continued)
10.2.1.1 Design Requirements
For this design example, use the following as the input parametrers.
Table 2. Design Parameters
DESIGN PARAMETER
EXAMPLE VALUE
I(tail)
75
I(stop)
150
10.2.1.2 Detailed Design Procedure
10.2.1.2.1 Step-by-Step Design Procedure
To begin the design process, one must decide on a few parameters. The designer must know the following:
•
•
I(tail) – Taillight current
I(stop) – Stop-light current
10.2.1.2.1.1 R(REF)
R(REF) = Vref × K(I) / I(stop) = 1.222 × 100 / 0.15 = 814 Ω
(7)
(8)
10.2.1.2.1.2 Duty Cycle
Duty cycle = I(tail) / I(stop) = 75 / 150 = 50%
10.2.1.2.1.3 Input and Output Capacitors
TI recommends to add capacitors at VIN and IOUTx. TI recommends an input capacitor of at least 1 µF close to
the VIN pin, and output capacitors of 10 nF close to the IOUTx pins. Larger capacitors are helpful for EMC and
ESD; however, it takes a longer time to charge up the capacitor and could affect PWM dimming performance.
10.2.1.3 PWM Dimming Application Curve
Figure 27. PWM Dimming Application Curve
10.2.2 Simple Stop-Light and Taillight Application
For many automobiles, the same set of LEDs illuminates both taillights and stop lights. Thus, the LEDs must
operate at two different brightness levels. Figure 28 shows two-level brightness adjustment using the TPS92630-
Q1 device with minimum external components. Set the dimming level with a parallel resistor in REF through an
external MOS. See Equation 9 for details.
V
´K(I)
ref
I(IOUTx)
=
R
(REF) ´ R(Stop) / (R(REF) + R(Stop) )
(9)
25
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Tail
VIN
Stop
IOUT1
IOUT2
IOUT3
EN
PWM1
PWM2
PWM3
FAULT
FAULT_S
VSNS3
VSNS2
VSNS1
TPS92630-Q1
REF
RREF
TEMP
GND
RStop
Figure 28. Two-Level Brightness Adjustment Using the TPS92630-Q1 Device With Minimum External
Components
10.2.2.1 Design Requirements
For this design example, use the following as the input parameters.
Table 3. Design Parameters
DESIGN PARAMETER
EXAMPLE VALUE
30 mA
I(Tail)
I(Stop)
70 mA
10.2.2.2 Detailed Design Procedure
10.2.2.2.1 Step-by-Step Design Procedure
To begin the design process, one must decide on a few parameters. The designer must know the following:
•
•
I(Tail) – Taillight current
I(Stop) – Stop-light current
10.2.2.2.1.1 R(REF)
R(REF) = Vref × K(I) / I(tail) = 1.222 × 100 / 0.03 = 4.072 kΩ
(10)
(11)
10.2.2.2.1.2 R(Stop)
R(Stop) = Vref × K(I) / (I(stop) – I(tail)) 1.222 × 100 / (0.07 – 0.03) = 3.055 kΩ
26
Copyright © 2014–2018, Texas Instruments Incorporated
TPS92630-Q1
www.ti.com.cn
ZHCSC40E –FEBRUARY 2014–REVISED MAY 2018
10.2.2.2.1.3 Input and Output Capacitors
TI recommends to add capacitors at VIN and IOUTx. TI recommends an input capacitor of at least 1 µF close to
the VIN pin, and output capacitors of 10 nF close to the IOUTx pins. Larger capacitors are helpful for EMC and
ESD; however, it takes a longer time to charge up the capacitor and could affect PWM dimming performance.
10.2.3 Parallel Connection
This device can drive up to three strings with one to three LEDs in each string, at a total current up to 150 mA
per channel. Outputs can be paralleled to provide higher current drive up to 450 mA. For example, if the load
current is up to 2 times the device rating, connect the outputs of two devices in parallel as shown in Figure 29.
Copyright © 2014–2018, Texas Instruments Incorporated
27
TPS92630-Q1
ZHCSC40E –FEBRUARY 2014–REVISED MAY 2018
www.ti.com.cn
Vbat
VIN
IOUT1
IOUT2
IOUT3
EN
PWM1
VSNS3
VSNS2
PWM2
TPS92630-Q1
PWM3
FAULT
FAULT_S
VSNS1
REF
RREF
TEMP
GND
VIN
IOUT1
IOUT2
IOUT3
EN
PWM1
PWM2
PWM3
FAULT
FAULT_S
VSNS3
VSNS2
TPS92630-Q1
VSNS1
REF
RREF
TEMP
GND
Figure 29. Two TPS92630-Q1 Devices in Parallel for Large Loads
10.2.3.1 Design Requirements
For this design example, use the following as the input parameters.
28
Copyright © 2014–2018, Texas Instruments Incorporated
TPS92630-Q1
www.ti.com.cn
ZHCSC40E –FEBRUARY 2014–REVISED MAY 2018
Table 4. Design Parameters
DESIGN PARAMETER
EXAMPLE VALUE
I(LED) per string
200 mA
10.2.3.2 Detailed Design Procedure
10.2.3.2.1 Step-by-Step Design Procedure
To begin the design process, one must decide on a few parameters. The designer must know the following:
I(LED) per string
10.2.3.2.1.1 R(REF)
R(REF) = Vref × K(I) / (I(LED) / Channel) = 1.222 × 100 / (200 / 2) = 1.222 kΩ
(12)
10.2.3.2.1.2 Input and Output Capacitors
TI recommends to add capacitors at VIN and IOUTx. TI recommends an input capacitor of at least 1 µF close to
the VIN pin, and output capacitors of 10 nF close to the IOUTx pins. Larger capacitors are helpful for EMC and
ESD; however, it takes a longer time to charge up the capacitor and could affect PWM dimming performance.
10.2.4 Alternate Parallel Connection
An alternate method of connecting two devices in parallel drives six LEDs while getting better thermal
performance (see Figure 30).
Copyright © 2014–2018, Texas Instruments Incorporated
29
TPS92630-Q1
ZHCSC40E –FEBRUARY 2014–REVISED MAY 2018
www.ti.com.cn
V(bat)
VIN
IOUT1
IOUT2
IOUT3
EN
PWM1
PWM2
PWM3
FAULT
FAULT_S
VSNS3
VSNS2
VSNS1
TPS92630-Q1
REF
RREF
TEMP
GND
VIN
IOUT1
IOUT2
IOUT3
EN
PWM1
PWM2
PWM3
FAULT
FAULT_S
VSNS3
VSNS2
VSNS1
TPS92630-Q1
REF
RREF
TEMP
GND
Figure 30. Two TPS92630-Q1 Devices in Parallel for Large Loads
30
Copyright © 2014–2018, Texas Instruments Incorporated
TPS92630-Q1
www.ti.com.cn
ZHCSC40E –FEBRUARY 2014–REVISED MAY 2018
10.2.4.1 Design Requirements
For this design example, use the following as the input parameters.
Table 5. Design Parameters
DESIGN PARAMETER
EXAMPLE VALUE
I(LED) per string
300 mA
10.2.4.2 Detailed Design Procedure
10.2.4.2.1 Step-by-Step Design Procedure
To begin the design process, one must decide on a few parameters. The designer must know the following:
I(LED) per string
10.2.4.2.1.1 R(REF)
R(REF) = Vref × K(I) / (I(LED) / channel) = 1.222 × 100 / (300 / 3) = 1.222 kΩ
(13)
10.2.4.2.1.2 Input and Output Capacitors
TI recommends to add capacitors at VIN and IOUTx. TI recommends an input capacitor of at least 1 µF close to
the VIN pin, and output capacitors of 10 nF close to the IOUTx pins. Larger capacitors are helpful for EMC and
ESD; however, it takes a longer time to charge up the capacitor and could affect PWM dimming performance.
10.2.5 High-Side PWM Dimming
High-Side Dimming
VIN
R1
IOUT1
IOUT2
IOUT3
R2
EN
PWM1
VSNS3
PWM2
TPS92630-Q1
PWM3
VSNS2
FAULT
FAULT_S
VSNS1
REF
RREF
TEMP
GND
Figure 31. High-Side PWM Dimming
10.2.5.1 Design Requirements
For this design example, use the following as the input parameters.
Copyright © 2014–2018, Texas Instruments Incorporated
31
TPS92630-Q1
ZHCSC40E –FEBRUARY 2014–REVISED MAY 2018
www.ti.com.cn
Table 6. Design Parameters
DESIGN PARAMETER
EXAMPLE VALUE
V(VIN-low)
7 V
10.2.5.2 Detailed Design Procedure
If the system has no MCU or PWM, one can use the high-side driver to do the dimming directly. When using the
high-side driver to do PWM dimming, a resistor divider must be put in the PWM pin in case of current overshoot
on the PWM rising edge. The resistor divider is needed to turn off the channel before the next PWM rising edge.
10.2.5.2.1 Step-by-Step Design Procedure
To begin the design process, one must decide on a parameter. The designer must know the value for V(VIN-low)
.
10.2.5.2.1.1 Ratio of Resistors, R1 / R2
First, measure the voltage on the VIN pin when the high-side dimming voltage is at a low level. Then calculate he
ratio of R1 / R2 using the formula of Equation 14.
V
+ 0.1
R1
R2
(VIN-low)
=
1.178´0.95
(14)
Assuming that the measured voltage was 7 V, the R1 / R2 ratio would be 5.25.
10.2.5.2.1.2 R1 and R2 Selection
Select R1 = 105 kΩ and R2 = 20 kΩ.
10.2.5.2.1.3 Input and Output Capacitors
TI recommends to add capacitors at VIN and IOUTx. TI recommends an input capacitor of at least 1 µF close to
the VIN pin, and output capacitors of 10 nF close to the IOUTx pins. Larger capacitors are helpful for EMC and
ESD; however, it takes a longer time to charge up the capacitor and could affect PWM dimming performance.
11 Power Supply Recommendations
The TPS92630-Q1 device is qualified for automotive applications. The normal power supply connection is
therefore to an automobile electrical system that provides a voltage within the range specified in the
Recommended Operating Conditions.
32
Copyright © 2014–2018, Texas Instruments Incorporated
TPS92630-Q1
www.ti.com.cn
ZHCSC40E –FEBRUARY 2014–REVISED MAY 2018
12 Layout
12.1 Layout Guidelines
In order to prevent thermal shutdown, TJ must be less than 150°C. If the input voltage is very high, the power
dissipation might be large. The devices are currently available in the TSSOP-EP package, which has good
thermal impedance. However, the PCB layout is also very important. Good PCB design can optimize heat
transfer, which is absolutely essential for the long-term reliability of the device.
•
Maximize the copper coverage on the PCB to increase the thermal conductivity of the board, because the
major heat-flow path from the package to the ambient is through the copper on the PCB. Maximum copper is
extremely important when the design does not include heat sinks attached to the PCB on the other side of the
package.
•
•
Add as many thermal vias as possible directly under the package ground pad to optimize the thermal
conductivity of the board.
All thermal vias should be either plated shut or plugged and capped on both sides of the board to prevent
solder voids. To ensure reliability and performance, the solder coverage should be at least 85 percent.
12.2 Layout Example
Power Ground
Both in Top and
Bottom
IOUT1
IOUT2
IOUT3
VSNS3
VSNS2
Vin
EN
TPS92630-Q1
VIA to Ground
PWM1
PWM2
PWM3
FAULT
VSNS1
GND
REF
FAULT_S
TEMP
Thermal Pad
Figure 32. TPS92630-Q1 Board Layout Diagram
版权 © 2014–2018, Texas Instruments Incorporated
33
TPS92630-Q1
ZHCSC40E –FEBRUARY 2014–REVISED MAY 2018
www.ti.com.cn
13 器件和文档支持
13.1 文档支持
13.1.1 相关文档
请参阅如下相关文档：
•
•
•
•
•
•
《如何在汽车外部照明应用中计算 TPS92630-Q1 最大输出 电流》
《适用于基于降压 + 线性 LED 驱动器的系统的 CISPR25 汽车尾灯参考设计》
《适用于基于升压 + 线性 LED 驱动器的系统的 CISPR25 经测试汽车尾灯参考设计》
《适用于汽车照明应用的线性 LED 驱动器参考 设计》
《汽车高侧调光尾灯参考设计》
《汽车尾灯 EMC 参考设计》
13.2 接收文档更新通知
要接收文档更新通知，请导航至 TI.com.cn 上的器件产品文件夹。单击右上角的通知我 进行注册，即可每周接收产
品信息更改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。
13.3 社区资源
下列链接提供到 TI 社区资源的连接。链接的内容由各个分销商“按照原样”提供。这些内容并不构成 TI 技术规范，
并且不一定反映 TI 的观点；请参阅 TI 的 《使用条款》。
TI E2E™ 在线社区 TI 的工程师对工程师 (E2E) 社区。此社区的创建目的在于促进工程师之间的协作。在
e2e.ti.com 中，您可以咨询问题、分享知识、拓展思路并与同行工程师一道帮助解决问题。
设计支持
TI 参考设计支持 可帮助您快速查找有帮助的 E2E 论坛、设计支持工具以及技术支持的联系信息。
13.4 商标
PowerPAD, E2E are trademarks of Texas Instruments.
All other trademarks are the property of their respective owners.
13.5 静电放电警告
ESD 可能会损坏该集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理措施和安装程序 , 可
能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级 , 大至整个器件故障。 精密的集成电路可能更容易受到损坏 , 这是因为非常细微的参数更改都可
能会导致器件与其发布的规格不相符。
13.6 术语表
SLYZ022 — TI 术语表。
这份术语表列出并解释术语、缩写和定义。
14 机械、封装和可订购信息
以下页面包含机械、封装和可订购信息。这些信息是适用于指定器件的最新数据。数据如有变更，恕不另行通知，
且不会对此文档进行修订。如需获取此产品说明书的浏览器版本，请查看左侧的导航面板。
34
版权 © 2014–2018, Texas Instruments Incorporated
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TPS92630QPWPRQ1
ACTIVE
HTSSOP
PWP
16
2000 RoHS & Green
NIPDAU
Level-3-260C-168 HR
-40 to 125
92630
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
20-Feb-2019
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPS92630QPWPRQ1 HTSSOP PWP
16
2000
330.0
12.4
6.9
5.6
1.6
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
20-Feb-2019
*All dimensions are nominal
Device
Package Type Package Drawing Pins
HTSSOP PWP 16
SPQ
Length (mm) Width (mm) Height (mm)
350.0 350.0 43.0
TPS92630QPWPRQ1
2000
Pack Materials-Page 2
PACKAGE OUTLINE
PWP0016A
PowerPAD TM HTSSOP - 1.2 mm max height
S
C
A
L
E
2
.
4
0
0
PLASTIC SMALL OUTLINE
C
6.6
6.2
TYP
SEATING PLANE
PIN 1 ID
AREA
A
0.1 C
14X 0.65
16
1
2X
5.1
4.9
4.55
NOTE 3
8
9
0.30
16X
0.19
4.5
4.3
B
0.1
C A B
(0.15) TYP
SEE DETAIL A
4X 0.166 MAX
NOTE 5
2X 1.34 MAX
NOTE 5
THERMAL
PAD
0.25
GAGE PLANE
3.3
2.7
17
1.2 MAX
0.15
0.05
0 - 8
0.75
0.50
DETAIL A
TYPICAL
(1)
3.3
2.7
4214868/A 02/2017
PowerPAD is a trademark of Texas Instruments.
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. Reference JEDEC registration MO-153.
5. Features may not be present.
www.ti.com
EXAMPLE BOARD LAYOUT
PWP0016A
PowerPAD TM HTSSOP - 1.2 mm max height
PLASTIC SMALL OUTLINE
(3.4)
NOTE 9
SOLDER MASK
DEFINED PAD
(3.3)
16X (1.5)
SYMM
SEE DETAILS
1
16
16X (0.45)
(1.1)
TYP
17
SYMM
(3.3)
(5)
NOTE 9
14X (0.65)
8
9
(
0.2) TYP
VIA
(1.1) TYP
METAL COVERED
BY SOLDER MASK
(5.8)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:10X
METAL UNDER
SOLDER MASK
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL
EXPOSED
METAL
EXPOSED
METAL
0.05 MIN
ALL AROUND
0.05 MAX
ALL AROUND
SOLDER MASK
DEFINED
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
PADS 1-16
4214868/A 02/2017
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
8. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
numbers SLMA002 (www.ti.com/lit/slma002) and SLMA004 (www.ti.com/lit/slma004).
9. Size of metal pad may vary due to creepage requirement.
www.ti.com
EXAMPLE STENCIL DESIGN
PWP0016A
PowerPAD TM HTSSOP - 1.2 mm max height
PLASTIC SMALL OUTLINE
(3.3)
BASED ON
0.125 THICK
STENCIL
16X (1.5)
(R0.05) TYP
1
16
16X (0.45)
(3.3)
17
SYMM
BASED ON
0.125 THICK
STENCIL
14X (0.65)
9
8
SYMM
(5.8)
METAL COVERED
BY SOLDER MASK
SEE TABLE FOR
DIFFERENT OPENINGS
FOR OTHER STENCIL
THICKNESSES
SOLDER PASTE EXAMPLE
EXPOSED PAD
100% PRINTED SOLDER COVERAGE BY AREA
SCALE:10X
STENCIL
THICKNESS
SOLDER STENCIL
OPENING
0.1
3.69 X 3.69
3.3 X 3.3 (SHOWN)
3.01 X 3.01
0.125
0.15
0.175
2.79 X 2.79
4214868/A 02/2017
NOTES: (continued)
10. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
11. Board assembly site may have different recommendations for stencil design.
www.ti.com
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