TPS72118-EP [TI]
LOW INPUT VOLTAGE, CAP FREE 150 mA LOW-DROPOUT (LDO) LINEAR REGULATOR; 低输入电压， CAP免费150毫安低压差（ LDO）线性稳压器
| 型号： | TPS72118-EP |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | LOW INPUT VOLTAGE, CAP FREE 150 mA LOW-DROPOUT (LDO) LINEAR REGULATOR |
| 文件： | 总14页 (文件大小：636K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPS72118-EP
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SGDS037A–OCTOBER 2007–REVISED DECEMBER 2007
LOW INPUT VOLTAGE, CAP FREE 150 mA
LOW-DROPOUT (LDO) LINEAR REGULATOR
1
FEATURES
APPLICATIONS
•
•
•
•
•
•
•
•
•
Portable Communication Devices
Battery-Powered Equipment
PCMCIA Cards
Personal Digital Assistants
Modems
Bar Code Scanners
Backup Power Supplies
SMPS Post Regulation
Internet Audio
•
Controlled Baseline
–
–
–
One Assembly Site
One Test Site
One Fabrication Site
•
•
Extended Temperature Performance of –55°C
to 125°C
Enhanced Diminishing Manufacturing Sources
(DMS) Support
•
•
•
•
•
Enhanced Product-Change Notification
(1)
Qualification Pedigree
150 mA Low-Dropout (LDO)
Available in 1.8 V Fixed-Output Version
Low Input Voltage Requirement (Down to
1.8 V)
•
•
•
Small Output Capacitor, 0.1 µF
Dropout Voltage Typically 200 mV at 150 mA
Less Than 3µA Quiescent Current in Shutdown
Mode
•
•
•
Thermal Protection
Over Current Limitation
5-Pin SOT-23 (DBV) Package
(1) Component qualification in accordance with JEDEC and
industry standards to ensure reliable operation over an
extended temperature range. This includes, but is not limited
to, Highly Accelerated Stress Test (HAST) or biased 85/85,
temperature cycle, autoclave or unbiased HAST,
electromigration, bond intermetallic life, and mold compound
life. Such qualification testing should not be viewed as
justifying use of this component beyond specified
performance and environmental limits.
DESCRIPTION/ORDERING INFORMATION
The TPS72118 family of LDO regulators is available in fixed voltage options that are commonly used to power
the latest DSPs and microcontrollers with a fixed output to 1.8 V. These regulators can be used in a wide variety
of applications ranging from portable, battery-powered equipment to PC peripherals. The family features
operation over a wide range of input voltages (1.8 V to 5.5 V) and low dropout voltage (150 mV at full load).
Therefore, compared to many other regulators that require 2.5 V or higher input voltages for operation, these
regulators can be operated directly from two AAA batteries. Also, the typical quiescent current (ground pin
current) is low, starting at 85 µA during normal operation and 3 µA in shutdown mode. These regulators can be
operated very efficiently and, in a battery-powered application, help extend the longevity of the device.
Similar LDO regulators require 1 µF or larger output capacitors for stability. However, this regulator uses an
internal compensation scheme that stabilizes the feedback loop over the full range of input voltages and load
currents with output capacitances as low as 0.1 µF. Ceramic capacitors of this size are relatively inexpensive and
available in small footprints.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2007, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
TPS72118-EP
www.ti.com
SGDS037A–OCTOBER 2007–REVISED DECEMBER 2007
This family of regulators is particularly suited as a portable power supply solution due to its minimal board space
requirement and 1.8 V minimum input voltage. Being able to use two off-the-shelf AAA batteries makes system
design easier and also reduces component cost. Moreover, the solution is more efficient than if a regulator with a
higher input voltage is used.
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION(1)
TJ
VOLTAGE
PACKAGE(2)
PART NUMBER
SYMBOL
–55°C to 125°C
1.8 V
DBV
TPS72118MDBVREP(3)
CKZ
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(3) The DBVR indicates tape and reel of 3000 parts.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted(1)(2)
TPS72118
Voltage range at IN
–0.3 V to 7 V
–0.3 V to 7 V
Voltage range at EN
Voltage on OUT, FB, NC
Peak output current
–0.3 V to VI + 0.3 V
Internally limited
3 kV
ESD rating, HBM
Continuous total power dissipation
Operating junction temperature range, TJ
Storage temperature range, Tstg
See Dissipation Rating Table
–55°C to 150°C
–65°C to 150°C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage
values are with respect to network ground terminal.
(2) All voltage values are with respect to network ground terminal.
PACKAGE DISSIPATION RATING
DERATING FACTOR
ABOVE TA = 25°C
T
A ≤ 25°C
TA = 70°C
TA = 85°C
BOARD
PACKAGE
RΘJC
RΘJA
POWER RATING POWER RATING POWER RATING
Low-K(1)
High-K(2)
DBV
DBV
65.8 °C/W
65.8 °C/W
259 °C/W
180 °C/W
3.9 mW/°C
5.6 mW/°C
386 mW
555 mW
212 mW
305 mW
154 mW
222 mW
(1) The JEDEC Low-K (1s) board design used to derive this data was a 3 inch x 3 inch, two-layer board with 2-ounce copper traces on top
of the board.
(2) The JEDEC High-K (2s2p) board design used to derive this data was a 3 inch x 3 inch, multilayer board with 1-ounce internal power and
ground planes and 2-ounce copper traces on top and bottom of the board.
2
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Product Folder Link(s): TPS72118-EP
TPS72118-EP
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SGDS037A–OCTOBER 2007–REVISED DECEMBER 2007
ELECTRICAL CHARACTERISTICS
over recommended operating junction temperature range VIN = VOUT(Nom) + 1 V, IOUT = 1 mA, EN = VIN, COUT = 1 µF (unless
otherwise noted)
PARAMETER
Input voltage(1)
TEST CONDITIONS
MIN TYP
MAX
5.5
UNIT
V
VIN
IOUT
TJ
1.8
0
Continuous output current
150
125
mA
°C
Operating junction temperature
–55
1.8
TJ = 25°C
1mA < IOUT < 150 mA
2.8 V ≤ VIN ≤ 5.5 V
VOUT
Output voltage
V
TJ = Full Temp
IOUT = 1 mA
IOUT = 1 mA
IOUT = 150 mA
IOUT = 150 mA
EN < 0.5 V
1.728
1.872
125
850
3
TJ = 25°C
85
570
TJ = Full Temp
TJ = 25°C
I(Q)
Quiescent current (GND current)
µA
TJ = Full Temp
TJ = 25°C
0.01
Standby current
µA
EN < 0.5 V
TJ = Full Temp
1.22
5
Vref
Reference voltage
TJ = 25°C
V
f = 100 Hz, Co = 10 µF,
IOUT = 150 mA
(1)
Ripple rejection
Current limit
TJ = 25°C
48
dB
PSRR
(2)
See
120
1.4
525
0.20
0.35
mA
TJ = 25°C
0.03
1.5
Output voltage line regulation
VO + 1 V < VIN≤ 5.5 V,
IOUT = 150 mA
%/V
mV
V
(1)
(ΔVOUT/VOUT
)
TJ = Full Temp
TJ = 25°C
Output voltage load regulation
EN high level input
0 < IOUT < 150 mA
VIH
VIL
EN low level input
0.4
–0.0
1
EN = 0 V
II
EN input current
µA
–0.0
1
EN = IN
VDO
Dropout voltage(3)
IOUT = 150 mA
TJ = 25°C
150
170
20
mV
°C
Thermal shutdown temperature
Thermal shutdown hysteresis
°C
(1) Minimum IN operating voltage is 1.8 V or VOUT + VDO, whichever is greater.
(2) Test condition includes output voltage VO = 1 V and pulse duration = 10 ms.
(3) Dropout voltage is defined as the differential voltage between VO and VI when VO drops 100 mV below the value measured with
VIN = VOUT + VDO
.
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SGDS037A–OCTOBER 2007–REVISED DECEMBER 2007
TPS72118
A. This pin must be left floating and not connected to GND.
Figure 1. Functional Block Diagram—Fixed Version
Terminal Functions
TERMINAL
NAME
DESCRIPTION
NO.
2
GND
EN
Ground
3
Enable input
IN
1
Input supply voltage
NC/FB
OUT
4
NC = Not connected (see (A)); FB = Feedback (adjustable option TPS72101)
Regulated output voltage
5
TYPICAL CHARACTERISTICS
TPS72118
TPS72118
OUTPUT VOLTAGE
vs
TPS72118
OUTPUT VOLTAGE
vs
GROUND CURRENT
vs
OUTPUT CURRENT
JUNCTION TEMPERATURE
JUNCTION TEMPERATURE
1.8040
1.8020
1.8000
1.7980
1.7960
1.8002
700
600
V = 2.8 V
I
V = 2.8 V
I
V = 2.8 V
I
I
= 150 mA
O
C
o
= 1 µF
C
o
= 1 µF
C
o
= 1 µF
1.8001
1.8000
1.7999
T
J
= 25° C
I
= 1 mA
500
400
O
I
= 150 mA
O
300
200
1.7998
1.7997
1.7940
1.7920
1.7900
I
= 1 mA
O
100
0
1.7996
1.7995
−40 −25−10
5
20 35 50 65 80 95 110 125
0
30
60
90
120
150
−40 −25 −10
5
20 35 50 65 80 95 110 125
I
− Output Current − mA
T
J
− Junction Temperature − °C
T
J
− Junction Temperature − °C
O
Figure 2.
Figure 3.
Figure 4.
4
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TPS72118-EP
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SGDS037A–OCTOBER 2007–REVISED DECEMBER 2007
TYPICAL CHARACTERISTICS (continued)
TPS72118
TPS72118
TPS72118
OUTPUT IMPEDANCE
vs
GROUND CURRENT
vs
OUTPUT SPECTRAL NOISE DENSITY
vs
OUTPUT CURRENT
FREQUENCY
FREQUENCY
1 k
700
600
2.5
V = 2.8 V
= 1 µF
I
V = 2.8 V
= 1 µF
I
V = 2.8 V
I
C
o
C
o
T = 125° C
J
C
o
= 1 µF
100
10
2
500
400
300
200
100
0
I
= 1 mA
O
1.5
I
= 150 mA
O
1
0.1
T
= 25° C
1
J
I
= 150 mA
O
T
= −40° C
J
0.01
0.001
0.5
I
= 1 mA
1 k
O
0
1
10 100 1 k 10 k 100 k 1 M 10 M
0
30
60
90
120
150
100
10 k
100 k
f − Frequency − Hz
I
− Output Current − mA
O
f − Frequency − Hz
Figure 5.
Figure 6.
Figure 7.
TPS72118
OUTPUT VOLTAGE, ENABLE
VOLTAGE
TPS72118
TPS72118
DROPOUT VOLTAGE
vs
POWER SUPPLY RIPPLE REJECTION
vs
FREQUENCY
70
vs
JUNCTION TEMPERATURE
TIME (START-UP)
250
200
150
V = 2.8 V
= 1 µF
I
V = 2.8 V
C
V
EN
I
C
o
3
2
= 1 µF
= 150 mA
o
60
50
40
I
O
I
= 150 mA
O
1
0
30
20
10
0
100
2
1
0
V = 2.8 V
I
V
= 1.8 V
O
V
50
0
O
I
= 150 mA
O
I
= 10 mA
O
C
o
= 1 µF
−40−25 −10 5 20 35 50 65 80 95 110 125
0
50 100 150 200 200 300 350 400 450 500
1
10
100
1 k
10 k 100 k 1 M
T
J
− Junction Temperature − °C
t − Time − µs
f − Frequency − Hz
Figure 8.
Figure 9.
Figure 10.
TPS72118
LINE TRANSIENT RESPONSE
TPS72118
LOAD TRANSIENT RESPONSE
POWER UP / POWER DOWN
6
5
4
3
2
I
C
= 150 mA
= 1 µF
O
V = 2.8 V
I
100
0
o
C
o
= 1 µF
V
I
V
I
3.8
2.8
−100
dI
O
0µ.1sA
+
dt
dV
I
dt
V
0µ.4sV
O
+
1
0
150
100
50
1
0
V
O
C
= 1 µF
o
C = 1 µF
i
-1
R
L
= 12 Ω
0
0
10 20 30 40 50 60 70 80 90 100
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
1
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
1
t − Time − ms
t − Time − ms
t − Time − ms
Figure 11.
Figure 12.
Figure 13.
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SGDS037A–OCTOBER 2007–REVISED DECEMBER 2007
TYPICAL CHARACTERISTICS (continued)
TPS72101
DROPOUT VOLTAGE
vs
MINIMUM REQUIRED INPUT
VOLTAGE
DC DROPOUT VOLTAGE
vs
vs
OUTPUT CURRENT
INPUT VOLTAGE
OUTPUT VOLTAGE
250
200
5.5
250
200
150
100
50
I
= 150 mA
O
I
= 150 mA
O
5
T
J
= 125°C
4.5
T
= 125°C
J
T
= 125°C
J
T
J
= 25°C
4
150
100
T
= 25°C
J
3.5
T
J
= 25°C
3
T
= −40°C
J
2.5
T
= −40°C
J
2
T
= −40°C
J
50
0
1.5
1
0
1.8
2.5
3.3
4
4.8
5.5
15 30 45 60 75 90 105 120 135 150
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
0
V − Input Voltage − V
I
V
− Output Voltage − V
I
− Output Current − mA
O
O
Figure 14.
Figure 15.
Figure 16.
6
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SGDS037A–OCTOBER 2007–REVISED DECEMBER 2007
APPLICATION INFORMATION
The TPS72118 family of low-dropout (LDO) regulators functions with a very low input voltage (>1.8 V). The
dropout voltage is typically 150 mV at full load. Typical quiescent current (ground pin current) is only 85 µA and
drops to 3 µA in the shutdown mode.
DEVICE OPERATION
The TPS72118 family can be operated at low input voltages due to low voltage circuit design techniques and a
PMOS pass element that exhibits low dropout.
A logic low on the enable input, EN, shuts off the output and reduces the supply current to less than 3 µA. EN
may be tied to VIN in applications where the shutdown feature is not used.
Current limiting and thermal protection prevent damage by excessive output current and/or power dissipation.
The device switches into a constant-current mode at approximately 350 mA; further load reduces the output
voltage instead of increasing the output current. The thermal protection shuts the regulator off if the junction
temperature rises above 170°C. Recovery is automatic when the junction temperature drops approximately 20°C
below the high temperature trip point. The PMOS pass element includes a back diode that safely conducts
reverse current when the input voltage level drops below the output voltage level.
A typical application circuit is shown in Figure 17.
TPS721xx
1
V
I
IN
5
4
V
O
OUT
NC
0.1 µF
3
EN
0.1 µF
GND
2
Figure 17. Typical Application Circuit
DUAL SUPPLY APPLICATION
In portable, battery-powered electronics, separate power rails for the DSP or microcontroller core voltage,
V(CORE), and I/O peripherals (VIO) are usually necessary. The TPS72118 family of LDO linear regulators is ideal
for providing V(CORE) for the DSP or microcontroller. As shown in Figure 18, two AAA batteries provide an input
voltage to a boost converter. The batteries combine input voltage ranges from 3.0 V down to 1.8 V near the end
of their useful lives. Therefore, a boost converter is necessary to provide the typical 3.3 V needed for VIO.
Although there is no explicit circuitry to perform power-up sequencing of first V(CORE) then VIO, the output of the
linear regulator reaches its regulated voltage much faster (< 400 µs) than the output of any switching type boost
converter due to the inherent slow start up of those types of converters. Assuming a boost converter with
minimum VI of 1.8 V is appropriately chosen, this power supply solution can be used over the entire life of the
two off-the-shelf AAA batteries. Thus, this solution is very efficient and the design time and overall cost of the
solution is minimized.
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SGDS037A–OCTOBER 2007–REVISED DECEMBER 2007
3.3 V
1.5 V
1.8 V – 3 V
V
Boost Converter
IO
DSP or
Controller
1.8 V
TPS72115
V
CORE
Two AAA
Batteries
Figure 18. Dual Supply Application Circuit
EXTERNAL CAPACITOR REQUIREMENTS
A 0.1-µF ceramic bypass capacitor is required on both the input and output for stability. Larger capacitors
improve transient response, noise rejection, and ripple rejection. A higher value electrolytic input capacitor may
be necessary if large, fast rise time load transient are anticipated, and/or there is significant input resistance from
the device to the input power supply.
POWER DISSIPATION AND JUNCTION TEMPERATURE
Specified regulator operation is ensured to a junction temperature of 125°C; the maximum junction temperature
allowable without damaging the device is 150°C. This restriction limits the power dissipation the regulator can
handle in any given application. To ensure the junction temperature is within acceptable limits, calculate the
maximum allowable dissipation, PD(max), and the actual dissipation, PD, which must be less than or equal to
PD(max)
.
The maximum power dissipation limit is determined using Equation 1 :
T max * T
J
+
A
P
D(max)
R
qJA
(1)
Where:
•
•
•
TJmax is the maximum allowable junction temperature.
θJA is the thermal resistance junction-to-ambient for the package; see the package dissipation rating table.
TA is the ambient temperature.
R
The regulator dissipation is calculated using Equation 2:
+ ǒVI * V
Ǔ
P
I
D
O
O
(2)
Power dissipation resulting from quiescent current is negligible.
REGULATOR PROTECTION
The TPS72118 pass element has a built-in back diode that safely conducts reverse current when the input
voltage drops below the output voltage (for example, during power down). Current is conducted from the output
to the input and is not internally limited. If extended reverse voltage is anticipated, external limiting might be
appropriate.
The TPS72118 also features internal current limiting and thermal protection. During normal operation, the
TPS72118 limits output current to approximately 350 mA. When current limiting engages, the output voltage
scales back linearly until the overcurrent condition ends. While current limiting is designed to prevent gross
device failure, care should be taken not to exceed the power dissipation ratings of the package. If the
temperature of the device exceeds 170°C, thermal-protection circuitry shuts it down. Once the device has cooled
down to below 150°C, regulator operation resumes.
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PACKAGE OPTION ADDENDUM
www.ti.com
2-Feb-2009
PACKAGING INFORMATION
Orderable Device
TPS72118MDBVREP
V62/07636-01XE
Status (1)
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOT-23
DBV
5
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOT-23
DBV
5
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TPS72118-EP :
Catalog: TPS72118
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
3-Nov-2011
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPS72118MDBVREP
SOT-23
DBV
5
3000
179.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
3-Nov-2011
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SOT-23 DBV
SPQ
Length (mm) Width (mm) Height (mm)
203.0 203.0 35.0
TPS72118MDBVREP
5
3000
Pack Materials-Page 2
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相关型号：
TPS72201DBVTG4
50mA Cap-Free Low-Input-Voltage Low-Dropout (LDO) Linear Regulator 5-SOT-23 -40 to 125
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