TPS630250 [TI]
采用 3.7mm² DSBGA 封装的 4A 开关单电感器降压/升压转换器;型号: | TPS630250 |
厂家: | TEXAS INSTRUMENTS |
描述: | 采用 3.7mm² DSBGA 封装的 4A 开关单电感器降压/升压转换器 升压转换器 开关 电感器 |
文件: | 总30页 (文件大小:3162K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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TPS630250
TPS630251, TPS630252
ZHCSCI9A –MAY 2014–REVISED MAY 2014
TPS63025x 高电流、高效单电感器降压-升压转换器
1 特性
3 说明
1
•
支持降压和升压运行间自动和无缝转换的实际降压
或升压运行
TPS63025 是一款高效、低静态电流降压-升压转换
器,此转换器适用于输入电压会高于或低于输出的应
用。 输出电流在升压模式中会高达 2A,而在降压模式
中会高达 4A。 开关内的最大平均电流被限制在
•
•
•
•
输入电压范围 2.3V 至 5.5V
2A 持续输出电流:VIN ≥ 2.7V,VOUT = 3.3V
可调和固定输出电压
4A(典型值)。 TPS63025 根据输入电压在降压或升
压模式之间自动切换,以便在整个输入电压范围内调节
输出电压,从而确保两个模式间的无缝转换。 此降压-
升压转换器基于一个使用同步整流的固定频率、脉宽调
制 (PWM) 控制器以获得最高效率。 在低负载电流情
况下,此转换器进入省电模式,以便在整个负载电流范
围内保持高效率。 有一个使用户能够在自动
在降压或升压模式中效率高达 95%,而在 VIN
=
VOUT 时,效率高达 97%
•
•
•
•
•
•
•
•
•
2.5MHz 典型开关频率
运行静态电流 35μA
集成软启动
省电模式
真正关断功能
PFM/PWM 模式运行和强制 PWM 运行之间进行选择
的 PFM/PWM 引脚。 在 PWM 模式期间,通常使用一
个 2.5MHz 的固定频率。 使用一个外部电阻分压器可
对输出电压进行编程,或者在芯片上对输出电压进行内
部固定。 转换器可被禁用以最大限度地减少电池消
耗。 在关断期间,负载从电池上断开。 此器件采用
20 引脚,1.766mm x 2.086 mm,WCSP 封装。
输出电容器放电功能
过热保护和过流保护
宽电容值选择
小型 1.766mm x 2.086mm,20 引脚晶圆级芯片尺
寸 (WCSP) 封装
2 应用范围
器件信息(1)
封装
•
•
•
•
•
手机、智能电话
平板个人电脑
产品型号
TPS630250
封装尺寸(标称值)
个人电脑和智能手机配件
负载点稳压
芯片尺寸球状引脚
栅格阵列
TPS630251
TPS630252
1.766mm x 2.086mm
(DSBGA) (20)
电池供电类应用
(1) 要了解所有可用封装,请见数据表末尾的可订购产品附录。
4 典型应用
.
.
效率与输出电流间的关系
L1
1µH
TPS63025
VIN
VOUT
L1
L2
2.7 V to 5.5 V
3.3 V up to 2A
VIN
EN
VOUT
C1
C2
2X22µF
FB
10µF
VINA
GND
PFM/
PWM
VIN = 2.8V, VOUT = 3.3V
PGND
V
V
V
IN = 3.3V, VOUT = 3.3V
IN = 3.6V, VOUT = 3.3V
IN = 4.2V, VOUT = 3.3V
TPS63025, Power Save Enabled
0.1
Output Current (mA)
1
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
English Data Sheet: SLVSBJ9
TPS630250
TPS630251, TPS630252
ZHCSCI9A –MAY 2014–REVISED MAY 2014
www.ti.com.cn
目录
9.3 Feature Description................................................. 11
9.4 Device Functional Modes........................................ 14
10 Application and Implementation........................ 15
10.1 Application Information.......................................... 15
10.2 Typical Application ............................................... 15
11 Power Supply Recommendations ..................... 20
12 Layout................................................................... 20
12.1 Layout Guidelines ................................................. 20
12.2 Layout Example .................................................... 20
12.3 Thermal Information.............................................. 20
13 器件和文档支持 ..................................................... 21
13.1 器件支持 ............................................................... 21
13.2 文档支持 ............................................................... 21
13.3 相关链接................................................................ 21
13.4 Trademarks........................................................... 21
13.5 Electrostatic Discharge Caution............................ 21
13.6 Glossary................................................................ 21
14 机械封装和可订购信息 .......................................... 21
1
2
3
4
5
6
7
8
特性.......................................................................... 1
应用范围................................................................... 1
说明.......................................................................... 1
典型应用................................................................... 1
修订历史记录 ........................................................... 2
Device Comparison Table..................................... 3
Pin Configuration and Functions......................... 3
Specifications......................................................... 4
8.1 Absolute Maximum Ratings ...................................... 4
8.2 Handling Ratings ...................................................... 4
8.3 Recommended Operating Conditions....................... 4
8.4 Thermal Information.................................................. 4
8.5 Electrical Characteristics........................................... 5
8.6 Timing Requirements................................................ 6
8.7 Typical Characteristics.............................................. 7
Detailed Description ............................................ 10
9.1 Overview ................................................................. 10
9.2 Functional Block Diagram ....................................... 10
9
5 修订历史记录
Changes from Original (May 2014) to Revision A
Page
•
•
已将标题的产品型号从 TPS63025 改为 TPS630250,TPS630251,TPS630252 ............................................................... 1
Changed Load Regulation Typ spec from "125 mV/A" to "2.5 mV/A" ................................................................................... 5
2
Copyright © 2014, Texas Instruments Incorporated
TPS630250
TPS630251, TPS630252
www.ti.com.cn
ZHCSCI9A –MAY 2014–REVISED MAY 2014
6
Device Comparison Table
(1)
PART NUMBER
VOUT
Adjustable
2.9V
TPS630250YFF
TPS630251YFF
TPS630252YFF
3.3V
(1) For all available packages, see the orderable addendum at the end of the datasheet.
7 Pin Configuration and Functions
WCSP
20-Pin
YFF
(TOP VIEW)
E1
E2
D1
C1
C2
C3
C4
B1
B2
B3
B4
A1
A2
A3
A4
D2
E3
E4
D3
D4
Pin Functions
PIN
I/O
DESCRIPTION
NAME
VOUT
FB
NO.
A1,A2,A3
A4
PWR Buck-boost converter output
IN Voltage feedback of adjustable version, must be connected to VOUT on fixed output voltage versions
PWR Connection for Inductor
IN set low for PFM mode, set high for forced PWM mode. It must not be left floating
L2
B1,B2,B3
B4
PFM/PWM
PGND
GND
L1
C1,C2,C3
C4
PWR Ground for Power stage
PWR Ground for Control stage
PWR Connection for Inductor
D1,D2,D3
D4
EN
IN
Enable input. Set high to enable and low to disable. It must not be left floating.
VIN
E1,E2,E3
E4
PWR Supply voltage for power stage
PWR Supply voltage for control stage.
VINA
Copyright © 2014, Texas Instruments Incorporated
3
TPS630250
TPS630251, TPS630252
ZHCSCI9A –MAY 2014–REVISED MAY 2014
www.ti.com.cn
8 Specifications
8.1 Absolute Maximum Ratings(1)
over operating free-air temperature range (unless otherwise noted)
VALUE
MIN
–0.3
–0.3
MAX
UNIT
V
Voltage(2)
L2(3), VOUT, FB
VIN, L1(3), EN, VINA, PFM/PWM
Continuos average current into L1(4)
4
7
V
Input current
2.7
125
A
Operating junction temperature, TJ
–40
°C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are DC-voltages with respect to ground terminal.
(3) L2, L1 voltage can exceed Absolute Maximum ratings during normal operation. As long as the device is operated within recommend
operating conditions device reliability is not affected.
(4) Maximum continuos average input current 3.5A, under those condition do not exceed 105°C for more than 25% operating time.
8.2 Handling Ratings
MIN
–65
0
MAX
150
UNIT
Tstg
Storage temperature range
°C
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all
pins(1)
2000
V(ESD)
Electrostatic discharge
V
Charged device model (CDM), per JEDEC specification
JESD22-C101, all pins(2)
0
700
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
8.3 Recommended Operating Conditions(1)
MIN
2.3
2.3
0.5
20
TYP
MAX
5.5
UNIT
V
VIN
VOUT
L
Input Voltage Range
Output Voltage
3.6
V
(2)
Inductance
1
1.3
µH
µF
°C
°C
Cout
TA
Output Capacitance(3)
Operating ambient temperature
Operating virtual junction temperature
–40
–40
85
TJ
125
(1) Refer to the Application Information section for further information
(2) Effective inductance value at operating condition. The nominal value given matches a typical inductor to be chosen to meet the
inductance required.
(3) Due to the dc bias effect of ceramic capacitors, the effective capacitance is lower then the nominal value when a voltage is applied. This
is why the capacitance is specified to allow the selection of the nominal capacitor required with the dc bias effect for this type of cap.
The nominal value given matches a typical capacitor to be chosen to meet the minimum capacitance required.
8.4 Thermal Information
TPS63025x
THERMAL METRIC(1)
YFF
20 PINS
53.8
0.5
UNIT
RθJA
Junction-to-ambient thermal resistance
RθJC(top)
RθJB
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
10.1
1.4
°C/W
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
ψJB
9.8
RθJC(bot)
N/A
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
4
Copyright © 2014, Texas Instruments Incorporated
TPS630250
TPS630251, TPS630252
www.ti.com.cn
ZHCSCI9A –MAY 2014–REVISED MAY 2014
8.5 Electrical Characteristics
TJ=-40°C to 125°C, typical values are at TA=25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
SUPPLY
VIN
Input voltage range
2.3
5.5
V
V
A
VIN_Min
IOUT
Minimum input voltage to turn on into full load
IOUT=2A
2.8
2
(1)
Continuos Output Current
VIN
IOUT=0mA, EN=VIN=3.6V,
VOUT=3.3V TJ=-40°C to 85°C,
not switching
35
70 μA
12 μA
IQ
Quiescent current
VOUT
Isd
Shutdown current
EN=low, TJ=-40°C to 85°C
VIN falling
0.1
1.7
180
140
20
2
μA
V
Under voltage lockout threshold
Under voltage lockout hysteresis
Thermal shutdown
1.6
1.9
UVLO
mV
°C
°C
Temperature rising
Thermal Shutdown hysteresis
LOGIC SIGNALS EN, PFM/PWM
VIH
High level input voltage
Low level input voltage
Input leakage current
VIN=2.3V to 5.5V
VIN=2.3V to 5.5V
EN=GND or VIN
1.2
2.3
V
V
VIL
0.4
Ilkg
0.01
0.8
0.2 μA
OUTPUT
VOUT
VFB
Output Voltage range
3.6
V
V
TPS630250 Feedback regulation voltage
TPS630250 Feedback voltage accuracy(2)
VFB
PWM mode
-1%
-1%
1%
+3%
(2)
VFB
TPS630250 Feedback voltage accuracy
PFM mode
1.3%
2.9
(2)
VOUT
VOUT
VOUT
VOUT
IPWM/PFM
IFB
TPS630251 Output voltage accuracy
TPS630251 Output voltage accuracy(2)
PWM mode
2.871
2.871
3.267
3.267
2.929
2.987
3.333
3.399
V
V
PFM mode
2.938
3.3
(2)
TPS630252 Output voltage accuracy
PWM mode
V
TPS630252 Output voltage accuracy(2)
Output current to enter PFM mode
Feedback input bias current
High side FET on-resistance
Low side FET on-resistance
High side FET on-resistance
Low side FET on-resistance
PFM mode
3.343
350
10
V
VIN =3V; VOUT = 3.3V
VFB = 0.8V
mA
100 nA
mΩ
VIN=3.0V, VOUT=3.3V
VIN=3.0V, VOUT=3.3V
VIN=3.0V, VOUT=3.3V
VIN=3.0V, VOUT=3.3V
35
RDS_Buck(on)
50
mΩ
25
mΩ
RDS_Boost(on)
IIN
50
mΩ
VIN=3.0V, VOUT=3.3V TJ=65°C
to 125°C
(3)
Average input current limit
3.5
4.5
5
A
fs
Switching Frequency
2.5
MHz
RON_DISC
Discharge ON-Resistance
EN=low
120
Ω
mV/
V
Line regulation
Load regulation
VIN=2.8V to 5.5V, IOUT=2A
7.4
2.5
mV/
A
VIN=3.6V,IOUT=0A to 2A
(1) For minimum and maximum output current in a specific working point see Figure 1 and Equation 1 trough Equation 4.
(2) Conditions: L=1 µH, COUT= 2 × 22 µF.
(3) For variation of this parameter with Input voltage and temperature see Figure 1.
Copyright © 2014, Texas Instruments Incorporated
5
TPS630250
TPS630251, TPS630252
ZHCSCI9A –MAY 2014–REVISED MAY 2014
www.ti.com.cn
8.6 Timing Requirements
TJ=-40°C to 125°C, typical values are at TA=25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
OUTPUT
VOUT=EN=low to high, Buck
mode VIN=3.6V, VOUT=3.3V,
IOUT=2A
450
µs
tSS
Soft-start time
VOUT=EN=low to high, Boost
mode VIN=2.8V, VOUT=3.3V,
IOUT=2A
700
100
µs
µs
Time from when EN=high to
when device starts switching
td
Start up delay
6
Copyright © 2014, Texas Instruments Incorporated
TPS630250
TPS630251, TPS630252
www.ti.com.cn
ZHCSCI9A –MAY 2014–REVISED MAY 2014
8.7 Typical Characteristics
Table 1. Table Of Graphs
DESCRIPTION
FIGURE
Minimum average input
current
vs Input voltage (TPS63025, VOUT = 3.3V)
Figure 1
Efficiency
vs Output current (TPS63025, Power Save Enabled, VOUT = 3.3V)
vs Output current (TPS63025, Power Save Disabled, VOUT = 3.3V)
vs Output current (TPS63025, Power Save Enabled, VOUT = 2.9V)
vs Output current (TPS63025, Power Save Disabled, VOUT = 2.9V)
Figure 2
Figure 3
Figure 4
Figure 5
vs Input voltage (TPS63025, Power Save Enabled, VOUT = 3.3V, IOUT = {10mA; 20mA; 1A; 2A})
vs Input voltage (TPS63025, Power Save Disabled, VOUT = 3.3V, IOUT = {10mA; 20mA; 1A; 2A})
vs Input voltage (TPS63025, Power Save Enabled, VOUT = 2.9V, IOUT = {10mA; 20mA; 1A; 2A})
vs Input voltage (TPS63025, Power Save Disabled, VOUT = 2.9V, IOUT = {10mA; 20mA; 1A; 2A})
vs Output current (TPS63025, VIN =2.8V, 3,3V, 3.6V, 4.2V, VOUT = 3.3V)
Figure 6
Figure 7
Figure 8
Figure 9
Figure 10
Figure 11
Output voltage
vs Output current (TPS63025, VIN =2.8V, 3,3V, 3.6V, 4.2V, VOUT = 3.3V)
.
.
5
4.5
4
3.5
3
2.5
2
VIN = 2.8V, VOUT = 3.3V
V
V
V
IN = 3.3V, VOUT = 3.3V
IN = 3.6V, VOUT = 3.3V
IN = 4.2V, VOUT = 3.3V
TPS63025, VOUT
= 3.3V
1.5
1
TA
TA
= 25 °C
= 85 °C
5.1 5.5
TPS63025, Power Save Enabled
2.3
2.7
3.1
3.5
3.9
4.3
4.7
0.1
Input Voltage (V)
Output Current (mA)
Figure 1. Minimum Average Input Current vs Input Voltage
Figure 2. Efficiency vs Output Current
VIN = 2.8V, VOUT = 3.3V
V
V
V
IN = 3.3V, VOUT = 3.3V
IN = 3.6V, VOUT = 3.3V
IN = 4.2V, VOUT = 3.3V
TPS63025, Power Save Disabled
0.1
1
10
100
1k 2k
Output Current (mA)
Figure 3. Efficiency vs Output Current
Copyright © 2014, Texas Instruments Incorporated
7
TPS630250
TPS630251, TPS630252
ZHCSCI9A –MAY 2014–REVISED MAY 2014
www.ti.com.cn
VIN = 2.8V, VOUT = 2.9V
VIN = 2.8V, VOUT = 2.9V
V
V
V
V
IN = 2.9V, VOUT = 2.9V
IN = 3.6V, VOUT = 2.9V
IN = 4.2V, VOUT = 2.9V
IN = 2.9V, VOUT = 2.9V
V
IN = 3.6V, VOUT = 2.9V
V
IN = 4.2V, VOUT = 2.9V
TPS63025, Power Save Disabled
TPS63025, Power Save Enabled
0.1
1
10
100
1k 2k
0.1
1
10
100
1k 2k
Output Current (mA)
Output Current (mA)
Figure 4. Efficiency vs Output Current
Figure 5. Efficiency vs Output Current
I
I
OUT = 10mA
OUT = 10mA
I
OUT = 200mA
= 1A
I
OUT = 200mA
= 1A
IOUT
IOUT = 2A
IOUT
IOUT = 2A
TPS63025, VOUT = 3.3V, Power Save Disabled
TPS63025, VOUT = 3.3V, Power Save enabled
Input Voltage (V)
Input Voltage (V)
Figure 6. Efficiency vs Input Voltage
Figure 7. Efficiency vs Input Voltage
TPS63025, VOUT = 2.9V, Power Save Disabled
I
OUT = 10mA
I
OUT = 200mA
= 1A
I
OUT = 10mA
IOUT
IOUT = 2A
I
OUT = 200mA
= 1A
IOUT
IOUT = 2A
TPS63025, VOUT = 2.9V, Power Save enabled
Input Voltage (V)
Input Voltage (V)
Figure 8. Efficiency vs Input Voltage
Figure 9. Efficiency vs Input Voltage
8
Copyright © 2014, Texas Instruments Incorporated
TPS630250
TPS630251, TPS630252
www.ti.com.cn
ZHCSCI9A –MAY 2014–REVISED MAY 2014
VIN = 2.8V
VIN = 3.3V
VIN = 3.6V
VIN = 2.8V
VIN = 3.3V
VIN = 3.6V
VIN = 4.2V
VIN = 4.2V
TPS63025, Power Save Enabled
Output Current (mA)
Output Current (mA)
Figure 10. Output Voltage vs Output Current
Figure 11. Output Voltage vs Output Current
Copyright © 2014, Texas Instruments Incorporated
9
TPS630250
TPS630251, TPS630252
ZHCSCI9A –MAY 2014–REVISED MAY 2014
www.ti.com.cn
9 Detailed Description
9.1 Overview
The TPS63025 use 4 internal N-channel MOSFETs to maintain synchronous power conversion at all possible
operating conditions. This enables the device to keep high efficiency over the complete input voltage and output
power range. To regulate the output voltage at all possible input voltage conditions, the device automatically
switches from buck operation to boost operation and back as required by the configuration. It always uses one
active switch, one rectifying switch, one switch is held on, and one switch held off. Therefore, it operates as a
buck converter when the input voltage is higher than the output voltage, and as a boost converter when the input
voltage is lower than the output voltage. There is no mode of operation in which all 4 switches are switching at
the same time. Keeping one switch on and one switch off eliminates their switching losses. The RMS current
through the switches and the inductor is kept at a minimum, to minimize switching and conduction losses.
Controlling the switches this way allows the converter to always keep higher efficiency.
The device provides a seamless transition from buck to boost or from boost to buck operation.
9.2 Functional Block Diagram
L1
L2
VIN
VOUT
Current
Sensor
EN
PGND
PGND
PGND
VIN
Gate
Control
VOUT
_
+
_
+
VINA
Modulator
Oscillator
FB
+
-
VREF
Device
Control
PFM/PWM
EN
Temperature
Control
PGND
GND
PGND
Functional Block Diagram (Adjustable Output Voltage)
10
Copyright © 2014, Texas Instruments Incorporated
TPS630250
TPS630251, TPS630252
www.ti.com.cn
ZHCSCI9A –MAY 2014–REVISED MAY 2014
Functional Block Diagram (continued)
L1
L2
VIN
VOUT
Current
Sensor
EN
PGND
PGND
PGND
VIN
Gate
Control
VOUT
FB
_
+
_
+
VINA
Modulator
Oscillator
+
-
VREF
Device
Control
PFM/PWM
EN
Temperature
Control
PGND
GND
PGND
Functional Block Diagram (Fixed Output Voltage)
9.3 Feature Description
9.3.1 Control Loop Description
The controller circuit of the device is based on an average current mode topology. The average inductor current
is regulated by a fast current regulator loop which is controlled by a voltage control loop. Figure 12 shows the
control loop.
The non inverting input of the transconductance amplifier, Gmv, is assumed to be constant. The output of Gmv
defines the average inductor current. The inductor current is reconstructed by measuring the current through the
high side buck MOSFET. This current corresponds exactly to the inductor current in boost mode. In buck mode
the current is measured during the on time of the same MOSFET. During the off time, the current is
reconstructed internally starting from the peak value reached at the end of the on time cycle. The average
current is then compared to the desired value and the difference, or current error, is amplified and compared to
the buck or the boost sawtooth ramp. Depending on which of the two ramps the Gmc amplified output crosses
either the Buck MOSFETs or the Boost MOSFETs will be activated. When the input voltage is close to the output
voltage, one buck cycle is always followed by a boost cycle. In this condition, no more than three cycles in a row
of the same mode are allowed. This control method in the buck-boost region ensures a robust control and the
highest efficiency.
Copyright © 2014, Texas Instruments Incorporated
11
TPS630250
TPS630251, TPS630252
ZHCSCI9A –MAY 2014–REVISED MAY 2014
www.ti.com.cn
Feature Description (continued)
0.8V
Ramp and Clock
Generator
Figure 12. Average Current Mode Control
9.3.2 Device Enable
The device is put into operation when the EN pin is set high. It is put into shutdown mode when the EN pin is set
low. In shutdown mode, the regulator stops switching, all internal control circuitry is switched off, and the load is
disconnected from the input. This means that during shutdown, the output voltage can drop below the input
voltage.
9.3.3 Output Discharge Function
When the device is disabled by pulling enable low and the supply voltage is still applied, a transistor is turned on,
and discharge the output capacitor. This means, if there is no supply voltage applied the output discharge
function is also disabled. The transistor which is responsible of the discharge function, when turned on, operates
like an equivalent 120Ω resistor, ensuring typically less than 10ms discharge time for 20uF output capacitance
and a 3.3V output.
9.3.4 Soft Start
To minimize inrush current and output voltage overshoot during start up, the device implements a soft start.
At turn on, the input current raises in a controlled manner until the output voltage reaches regulation.
During soft-start, the input current follows the current used to charge an internal soft start capacitor, this creates
a linear and controlled increase of Vout.
The soft start time, is measured as the time from when the EN pin is asserted to when the output voltage has
reached 90% of it's nominal value. It is typically less than 1ms. There is typically a 100µs delay time from when
the EN pin is asserted to when the device starts the switching activity.
The soft start time depends on the load current, the input voltage, and the output capacitor. The soft start time in
boost mode is longer then the time in buck mode.
12
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TPS630250
TPS630251, TPS630252
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ZHCSCI9A –MAY 2014–REVISED MAY 2014
Feature Description (continued)
Thanks to its innovative soft start circuit, the device smoothly ramps up the input current bringing the output
voltage to its regulated value without overshoot, even if a large capacitor is connected at the output. This specific
case is never confused with a short circuit condition. The inductor current is able to increase and always
guarantee soft start unless a real short circuit is applied at the output.
9.3.5 Short Circuit Protection
The TPS63025 provides short circuit protection to protect itself and the application. When the output voltage
does not increase above 1.2V, the device assumes a short circuit at the output and keeps the input current
controlled to protect itself and the application. In short circuit, the input current limit is kept at 3A
9.3.6 Undervoltage Lockout
An undervoltage lockout function prevents device start-up if the supply voltage on VIN and VINA is lower than its
threshold (see electrical characteristics table). When in operation, the device automatically enters shutdown
mode if the voltage on VIN and VINA drops below the undervoltage lockout threshold. The device automatically
restarts, if the input voltage recovers above the hysteresis amount.
9.3.7 Supply and Ground
The TPS63025 provides two input pins (VIN and VINA) and two ground pins (PGND and GND).
The VIN pin supplies the input power, while the VINA pin provides voltage for the control circuits. A similar
approach is used for the ground pins. GND and PGND are used to avoid ground shift problems due to the high
currents in the switches. The reference for all control functions is the GND pin. The power switches are
connected to PGND. Both grounds must be connected on the PCB at only one point, ideally, close to the GND
pin.
9.3.8 Overtemperature Protection
The device has a built-in temperature sensor which monitors the internal IC temperature. If the temperature
exceeds the programmed threshold (see electrical characteristics table) the device stops operating. As soon as
the IC temperature has decreased below the programmed threshold, it starts operating again. There is a built-in
hysteresis to avoid unstable operation at IC temperatures at the overtemperature threshold.
9.3.9 Current Limit
The current limit varies depending on the difference between the input and output voltage. The maximum value
of average input current is obtained at the highest difference.
Given the curves provided in Figure 1, it is possible to calculate the output current reached in boost mode, using
Equation 1 and Equation 2 and in buck mode using Equation 3 and Equation 4.
V
- V
IN
OUT
V
Duty Cycle Boost
D =
OUT
(1)
(2)
Output Current Boost
IOUT = 0 x IIN (1-D)
V
OUT
V
Duty Cycle Buck
D =
IN
(3)
(4)
Output Current Buck
IOUT = ( 0 x IIN ) / D
With,
η = Estimated converter efficiency (use the number from the efficiency curves or 0.90 as an assumption)
IIN=Minimum average input current (Figure 1)
Copyright © 2014, Texas Instruments Incorporated
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TPS630250
TPS630251, TPS630252
ZHCSCI9A –MAY 2014–REVISED MAY 2014
9.4 Device Functional Modes
9.4.1 Power Save Mode Operation
www.ti.com.cn
Depending on the load current, in order to provide the best efficiency over the complete load range, the device
works in PWM mode at load currents of approximately 350mA or higher. At lighter loads, the device switches
automatically into Power Save Mode to reduce power consumption and extend battery life. The PFM/PWM pin is
used to select between the two different operation modes. To enable Power Save Mode, the PFM/PWM pin must
be set low.
During Power Save Mode, the part operates with a reduced switching frequency and lowest supply current to
maintain high efficiency. The output voltage is monitored with a comparator at every clock cycle by the thresholds
comp low and comp high. When the device enters Power Save Mode, the converter stops operating and the
output voltage drops. The slope of the output voltage depends on the load and the output capacitance. When the
output voltage reaches the comp low threshold, at the next clock cycle the device ramps up the output voltage
again, by starting operation. Operation can last for one or several pulses until the comp high threshold is
reached. At the next clock cycle, if the load is still lower than about 350mA, the device switches off again and the
same operation is repeated. Instead, if at the next clock cycle, the load is above 350mA, the device automatically
switches to PWM mode.
In order to keep high efficiency in PFM mode, there is only a comparator active to keep the output voltage
regulated. The AC ripple in this condition is increased, compared to the PWM mode. The amplitude of this
voltage ripple in the worst case scenario is 50mV pk-pk, (typically 30mV pk-pk), with 20µF effective output
capacitance. In order to avoid a critical voltage drop when switching from 0A to full load, the output voltage in
PFM mode is typically 1.3% above the nominal value in PWM mode. Dynamic Voltage Positioning allows the
converter to operate with a small output capacitor and still have a low absolute voltage drop during heavy load
transients.
Power Save Mode is disabled by setting the PFM/PWM pin high.
Heavy Load transient step
PFM mode at light load
current
Comparator High
Vo+1.3%*Vo
Vo
30mV ripple
Comparator low
PWM mode
Absolute Voltage drop
with positioning
Figure 13. Power Save Mode Operation
14
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TPS630251, TPS630252
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ZHCSCI9A –MAY 2014–REVISED MAY 2014
10 Application and Implementation
10.1 Application Information
The devices are designed to operate from an input voltage supply range between 2.3V and 5.5V with a
maximum output current of 2A. The TPS63025 device operates in PWM mode for medium to heavy load
conditions and in power save mode at light load currents.
In PWM mode the TPS63025 converter operates with the nominal switching frequency of 2.5MHz. As the load
current decreases, the converter enters power save mode, reducing the switching frequency and minimizing the
IC quiescent current to achieve high efficiency over the entire load range.
10.2 Typical Application
L1
TPS63025
L1
L2
VOUT
VIN
VIN
VOUT
C3
C1
C2
R1
R2
EN
FB
VINA
PFM/
PWM
V
IN or GND
PGND
GND
10.2.1 Design Requirements
The TPS63025 series of buck-boost converter has internal loop compensation. Therefore, the external LC filter
has to be selected according to the internal compensation. Nevertheless, it's important to consider, that the
effective inductance, due to inductor tolerance and current derating can vary between +20% and -30%. The
same for the capacitance of the output filter: the effective capacitance can vary between +20% and -50% of the
specified datasheet value, due to capacitor tolerance and bias voltage. For this reason Table 3 shows the
capacitance and inductance value allowed
10.2.2 Detailed Design Procedure
Table 2. List Of Components(1)
REFERENCE
DESCRIPTION
MANUFACTURER
TPS63025
Texas Instruments
L1
Shielded, Composite, 1µH, 8.75A,
XAL4020-102MEB, Colicraft
13mΩ,SMD
C1,C2
C3
10 μF 6.3V, 0603, X5R ceramic
GRM188R60J106ME84D, Murata
GRM219R60J476ME44D, Murata
CAP, CERM,47uF, 6.3V, +/-20%,
X5R,0805
R1
R2
Depending on the output voltage at adjustable output voltage version, 0 Ω at fixed 3.3V or 2.9V
Depending on the output voltage at adjustable output voltage version, not used at fixed 3.3V or 2.9V
(1) See Third-Party Products Disclaimer
Copyright © 2014, Texas Instruments Incorporated
15
TPS630250
TPS630251, TPS630252
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10.2.2.1 Output Filter Design
Table 3. Matrix of Output Capacitor and Inductor Combinations
NOMINAL
INDUCTOR
NOMINAL OUTPUT CAPACITOR VALUE [µF](2)
VALUE [µH](1)
44
47
66
88
100
0.680
1.0
+
+
+
+
+
+
+
+
+
(3)
+
+
1.5
(1) Inductor tolerance and current de-rating is anticipated. The effective inductance can vary by 20% and –30%.
(2) Capacitance tolerance and bias voltage de-rating is anticipated. The effective capacitance can vary by 20% and –50%.
(3) Typical application. Other check mark indicates recommended filter combinations
10.2.2.2 Inductor Selection
For high efficiencies, the inductor should have a low dc resistance to minimize conduction losses. Especially at
high-switching frequencies, the core material has a high impact on efficiency. When using small chip inductors,
the efficiency is reduced mainly due to higher inductor core losses. This needs to be considered when selecting
the appropriate inductor. The inductor value determines the inductor ripple current. The larger the inductor value,
the smaller the inductor ripple current and the lower the conduction losses of the converter. Conversely, larger
inductor values cause a slower load transient response. To avoid saturation of the inductor, the peak current for
the inductor in steady state operation is calculated using Equation 1. Only the equation which defines the switch
current in boost mode is shown, because this provides the highest value of current and represents the critical
current value for selecting the right inductor.
V
- V
OUT
V
IN
Duty Cycle Boost
D =
OUT
(5)
(6)
Iout
η ´ (1 - D)
Vin ´ D
IPEAK
Where,
=
+
2 ´ f ´ L
D =Duty Cycle in Boost mode
f = Converter switching frequency (typical 2.5MHz)
L = Inductor value
η = Estimated converter efficiency (use the number from the efficiency curves or 0.90 as an assumption)
Note: The calculation must be done for the minimum input voltage which is possible to have in boost mode
Calculating the maximum inductor current using the actual operating conditions gives the minimum saturation
current of the inductor needed. It's recommended to choose an inductor with a saturation current 20% higher
than the value calculated using Equation 6. The following inductors are recommended for use:
The inductor value also affects the stability of the feedback loop. In particular the boost transfer function exhibits
a right half-plane zero, whose frequency is inverse proportional to the inductor value and the load current. This
means as the inductance and load current increase, the right half plane zero decreases in frequency. This could
degrade the phase margin of the feedback loop. It is recommended to choose the inductor's value in order to
have the frequency of the right half plane zero >300kHz. The frequency of the RHPZ can be calculated using
Equation 7.
(1 - D)2 ´ Vout
f
RHPZ
=
2p ´Iout ´ L
(7)
With,
D =Duty Cycle in Boost mode
Note: The calculation must be done for the minimum input voltage which is possible to have in boost mode
16
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TPS630250
TPS630251, TPS630252
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ZHCSCI9A –MAY 2014–REVISED MAY 2014
Table 4. List of Recommended Inductors(1)
INDUCTOR VALUE
COMPONENT SUPLIER
Coilcraft XAL4020-102ME
Toko, DFE322512C
SIZE (LxWxH mm)
4 X 4 X 2.10
3.2 X 2.5 X 1.2
4.4 X 4.1 X 1.2
3 X 3 X 1.2
Isat/DCR
4.5A/10mΩ
4.7A/34mΩ
4.1A/38mΩ
6.6A/42.10mΩ
5A/17.40mΩ
7.7A/36mΩ
1 µH
1 µH
1 µH
TDK, SPM4012
1 µH
Wuerth, 74438334010
Coilcraft XFL4012-601ME
Wuerth,744383340068
0.6 µH
0.68µH
4 X 4 X 1.2
3 X 3 X 1.2
(1) See Third-Party Products Desclaimer
10.2.2.3 Capacitor Selection
10.2.2.3.1 Input Capacitor
At least a 10μF input capacitor is recommended to improve transient behavior of the regulator and EMI behavior
of the total power supply circuit. An X5R or X7R ceramic capacitor placed as close as possible to the VIN and
PGND pins of the IC is recommended. This capacitance can be increased without limit.
10.2.2.3.2 Output Capacitor
For the output capacitor, use of a small ceramic capacitors placed as close as possible to the VOUT and PGND
pins of the IC is recommended. The recommended nominal output capacitance value is 20µF with a variance as
outlined in Table 4.
There is also no upper limit for the output capacitance value. Larger capacitors causes lower output voltage
ripple as well as lower output voltage drop during load transients.
10.2.2.4 Setting The Output Voltage
When the adjustable output voltage version TPS630250 is used, the output voltage is set by an external resistor
divider. The resistor divider must be connected between VOUT, FB and GND. When the output voltage is
regulated properly, the typical value of the voltage at the FB pin is 800mV. The current through the resistive
divider should be about 10 times greater than the current into the FB pin. The typical current into the FB pin is
0.1μA, and the voltage across the resistor between FB and GND, R2, is typically 800 mV. Based on these two
values, the recommended value for R2 should be lower than 180kΩ, in order to set the divider current at 4μA or
higher. It is recommended to keep the value for this resistor in the range of 180kΩ. From that, the value of the
resistor connected between VOUT and FB, R1, depending on the needed output voltage (VOUT), can be
calculated using Equation 8:
æ
ç
è
ö
VOUT
VFB
R1 = R2 ×
- 1
÷
ø
(8)
Copyright © 2014, Texas Instruments Incorporated
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TPS630251, TPS630252
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10.2.3 Application Curves
TPS63025
TPS63025
L2
L2
L1
L1
V
50mV/div
= 3.3 V, I
OUT_Ripple
V
OUT_Ripple
50mV/div
V
= 2.8 V, V
=3.3V, I
=16mA
V
= 200mA
OUT
Time 2µs/div
Time 2µs/div
IN
OUT OUT
IN
Figure 14. Output Voltage Ripple in Buck-Boost Mode
and PFM to PWM Transition
Figure 15. Output Voltage Ripple in Boost Mode and PFM
Operation
TPS63025
TPS63025
L2
L2
L1
L1
V
50mV/div
OUT_Ripple
V
50mV/div
OUT_Ripple
V
= 4.2 V, V
OUT
=3.3V, I
OUT
=16mA
V
= 2.5 V, V
OUT
=3.3V, I =1A
OUT
Time 2µs/div
Time 1µs/div
IN
IN
Figure 16. Output Voltage Ripple in Buck Mode
and PFM Operation
Figure 17. Switching Waveforms in Boost Mode
and PWM Operation
TPS63025
TPS63025
L2
L2
L1
L1
V
50mV/div
V
50mV/div
OUT_Ripple
OUT_Ripple
V
= 4.5V, V
OUT
=3.3V, I =1A
OUT
Time 1µs/div
IN
V
= 3.3V, V
=3.3V, I =1A
OUT
Time 1µs/div
IN
OUT
Figure 18. Switching Waveforms in Buck Mode
and PWM Operation
Figure 19. Switching Waveforms in Buck-Boost Mode
and PWM Operation
18
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TPS630251, TPS630252
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ZHCSCI9A –MAY 2014–REVISED MAY 2014
TPS63025
TPS63025
Output Current
1A/div, DC
Output Current
1A/div, DC
Output Voltage
100 mV/div, AC
Output Voltage
100 mV/div, AC
V
= 2.8 V, V
OUT
= 3.3 V, I
= 0A to 1.5A
OUT
V
= 4.2 V, V
OUT
= 3.3 V, I
= 0A to 1.5A
OUT
Time 1 ms/div
Time 1 ms/div
IN
IN
Figure 20. Load Transient Response Boost Mode
Figure 21. Load Transient Response Buck Mode
TPS63025 V
= 3.3 V
TPS63025
OUT
V
= from 3V to 3.6V, I
= 1.5A
OUT
IN
Enable
2 V/div, DC
Input Voltage
200 mV/div,
Offset 3V
Output Voltage
1V/div, DC
Output Voltage
50 mV/div
Inductor Current
500 mA/div, DC
Time 1 ms/div
V
= 2.5 V, I = 0A
L
Time 100 ms/div
IN
Figure 22. Line Transient Response
Figure 23. Start Up After Enable
TPS63025, V
= 3.3V
OUT
Enable
2 V/div, DC
Output Voltage
1V/div, DC
Inductor Current
500 mA/div, DC
V
= 4.5 V, I = 0A
L
Time 100 ms/div
IN
Figure 24. Start Up After Enable
Copyright © 2014, Texas Instruments Incorporated
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TPS630250
TPS630251, TPS630252
ZHCSCI9A –MAY 2014–REVISED MAY 2014
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11 Power Supply Recommendations
The device is designed to operate from an input voltage supply range between 2.3V and 5.5 V. This input supply
must be well regulated. If the input supply is located more than a few inches from the TPS63025 converter
additional bulk capacitance may be required in addition to the ceramic bypass capacitors. An electrolytic or
tantalum capacitor with a value of 47 μF is a typical choice.
12 Layout
12.1 Layout Guidelines
The PCB layout is an important step to maintain the high performance of the TPS63025 devices.
•
Place input and output capacitors, along with the inductor, as close as possible to the IC which keeps the
traces short. Routing these traces direct and wide results in low trace resistance and low parasitic inductance.
•
•
Use a common-power GND.
Properly connect the low side of the input and output capacitors to the power GND to avoid a GND potential
shift.
•
•
•
The sense trace connected to FB is signal trace. Keep these trace away from L1 and L2 nodes.
Use care to avoid noise induction. By a direct routing, parasitic inductance can be kept small.
Use GND layers for shielding if needed.
12.2 Layout Example
12.3 Thermal Information
Implementation of integrated circuits in low-profile and fine-pitch surface-mount packages typically requires
special attention to power dissipation. Many system-dependent issues such as thermal coupling, airflow, added
heat sinks and convection surfaces, and the presence of other heat-generating components affect the power-
dissipation limits of a given component.
20
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TPS630251, TPS630252
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ZHCSCI9A –MAY 2014–REVISED MAY 2014
Thermal Information (continued)
Two basic approaches for enhancing thermal performance are listed below:
•
•
Improving the power dissipation capability of the PCB design
Introducing airflow in the system
For more details on how to use the thermal parameters, see the application notes: Thermal Characteristics
Application Note (SZZA017), and IC Package Thermal Metrics Application Note (SPRA953).
13 器件和文档支持
13.1 器件支持
13.1.1 第三方产品免责声明
TI 发布的与第三方产品或服务有关的信息,不能构成与此类产品或服务或保修的适用性有关的认可,不能构成此类
产品或服务单独或与任何 TI 产品或服务一起的表示或认可。
13.2 文档支持
13.2.1 相关文档ꢀ
相关文档如下:
《TPS63025EVM-553 用户指南,TPS63025 高电流、高效率单电感器降压-升压转换器》,SLVUA24
13.3 相关链接
以下表格列出了快速访问链接。 范围包括技术文档、支持与社区资源、工具和软件,以及样片或购买的快速访问。
Table 5. 相关链接
部件
产品文件夹
请单击此处
请单击此处
请单击此处
样片与购买
请单击此处
请单击此处
请单击此处
技术文档
请单击此处
请单击此处
请单击此处
工具与软件
请单击此处
请单击此处
请单击此处
支持与社区
请单击此处
请单击此处
请单击此处
TPS630250
TPS630251
TPS630252
13.4 Trademarks
All trademarks are the property of their respective owners.
13.5 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
13.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms and definitions.
14 机械封装和可订购信息
以下页中包括机械封装和可订购信息。 这些信息是针对指定器件可提供的最新数据。 这些数据会在无通知且不对
本文档进行修订的情况下发生改变。 欲获得该数据表的浏览器版本,请查阅左侧的导航栏。
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PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TPS630250RNCR
TPS630250RNCT
TPS630250YFFR
ACTIVE
ACTIVE
ACTIVE
VQFN-HR
VQFN-HR
DSBGA
RNC
RNC
YFF
14
14
20
3000 RoHS & Green
250 RoHS & Green
3000 RoHS & Green
250 RoHS & Green
3000 RoHS & Green
250 RoHS & Green
3000 RoHS & Green
250 RoHS & Green
NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 125
-40 to 125
-40 to 125
63025P
NIPDAU
63025P
SNAGCU
TPS
630250
TPS630250YFFT
TPS630251YFFR
TPS630251YFFT
TPS630252YFFR
TPS630252YFFT
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
YFF
YFF
YFF
YFF
YFF
20
20
20
20
20
SNAGCU
SNAGCU
SNAGCU
SNAGCU
SNAGCU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
TPS
630250
TPS
630251
TPS
630251
TPS
630252
TPS
630252
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
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10-Dec-2020
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
20-Apr-2023
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPS630250RNCR
TPS630250RNCT
VQFN-
HR
RNC
RNC
14
14
3000
250
330.0
12.4
2.8
3.3
1.2
8.0
12.0
Q1
VQFN-
HR
180.0
12.4
2.8
3.3
1.2
8.0
12.0
Q1
TPS630250YFFR
TPS630250YFFT
TPS630251YFFR
TPS630251YFFT
TPS630252YFFR
TPS630252YFFT
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
YFF
YFF
YFF
YFF
YFF
YFF
20
20
20
20
20
20
3000
250
180.0
180.0
180.0
180.0
180.0
180.0
8.4
8.4
8.4
8.4
8.4
8.4
1.89
1.89
1.89
1.89
1.89
1.89
2.2
2.2
2.2
2.2
2.2
2.2
0.69
0.69
0.69
0.69
0.69
0.69
4.0
4.0
4.0
4.0
4.0
4.0
8.0
8.0
8.0
8.0
8.0
8.0
Q1
Q1
Q1
Q1
Q1
Q1
3000
250
3000
250
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
20-Apr-2023
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TPS630250RNCR
TPS630250RNCT
TPS630250YFFR
TPS630250YFFT
TPS630251YFFR
TPS630251YFFT
TPS630252YFFR
TPS630252YFFT
VQFN-HR
VQFN-HR
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
RNC
RNC
YFF
YFF
YFF
YFF
YFF
YFF
14
14
20
20
20
20
20
20
3000
250
346.0
182.0
182.0
182.0
182.0
182.0
182.0
182.0
346.0
182.0
182.0
182.0
182.0
182.0
182.0
182.0
33.0
20.0
20.0
20.0
20.0
20.0
20.0
20.0
3000
250
3000
250
3000
250
Pack Materials-Page 2
D: Max = 2.116 mm, Min =2.056 mm
E: Max = 1.796 mm, Min =1.736 mm
PACKAGE OUTLINE
RNC0014A
VQFN-HR - 1 mm max height
SCALE 4.000
PLASTIC QUAD FLATPACK - NO LEAD
2.6
2.4
B
A
PIN 1 INDEX AREA
3.1
2.9
C
0.9 0.1
SEATING PLANE
0.08 C
2X
(0.2) TYP
1.5
0.05
0.00
6X 0.5
7
4
2X 0.5
2X 0.49
SYMM
3
1
8
1
0.29
0.19
10
0.29
0.19
11X
0.5
0.27
0.17
0.1
C A B
C
PINS 1 & 3
0.05
14
11
PKG
11X
0.3
1.69
1.49
4221630/C 04/2018
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
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EXAMPLE BOARD LAYOUT
RNC0014A
VQFN-HR - 1 mm max height
PLASTIC QUAD FLATPACK - NO LEAD
PKG
11X (0.24)
11X (0.6)
SEE SOLDER MASK
DETAIL
11
14
8X (0.5)
10
1
2X
(0.49)
SYMM
(2.8)
(0.24)
8
3
(0.22)
PADS 1 & 3
4
7
(0.555)
(1.15)
3X (1.79)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:20X
0.05 MAX
ALL AROUND
0.05 MIN
METAL UNDER
SOLDER MASK
METAL EDGE
EXPOSED
METAL
EXPOSED
METAL
SOLDER MASK
OPENING
SOLDER MASK
OPENING
NON SOLDER MASK
SOLDER MASK
DEFINED
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4221630/C 04/2018
NOTES: (continued)
3. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271).
4. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
RNC0014A
VQFN-HR - 1 mm max height
PLASTIC QUAD FLATPACK - NO LEAD
PKG
11X (0.24)
11X (0.6)
14
11
3X
6X (0.795)
EXPOSED METAL
4X (0.22)
1
10
8X
(0.5)
(0.24)
SYMM
(2.8)
2X (0.49)
8
3
3X (0.06)
7
4
3X (1.05)
(1.15)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
FOR EXPOSED PADS 1-3
89% PRINTED SOLDER COVERAGE BY AREA
SCALE:30X
4221630/C 04/2018
NOTES: (continued)
5. For alternate stencil design recommendations, see IPC-7525 or board assembly site preference.
www.ti.com
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