TPS62824DMQR [TI]
TPS6282x 2.4-V to 5.5-V Input, 1-, 2-, 3-, 4-A Step-down Converter with 1% Output Accuracy;型号: | TPS62824DMQR |
厂家: | TEXAS INSTRUMENTS |
描述: | TPS6282x 2.4-V to 5.5-V Input, 1-, 2-, 3-, 4-A Step-down Converter with 1% Output Accuracy |
文件: | 总34页 (文件大小:2659K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
TPS62824, TPS62825, TPS62826, TPS62827, TPS62824A, TPS62825A, TPS62826A, TPS62827A
SLVSEF9G – MARCH 2018 – REVISED MARCH 2022
TPS6282x 2.4-V to 5.5-V Input, 1-, 2-, 3-, 4-A Step-down Converter with 1% Output
Accuracy
1 Features
3 Description
•
Available as an integrated-inductor power module:
TPSM82821 and TPSM82822
The TPS6282x is an easy-to-use synchronous step-
down DC-DC converters family with a very low
quiescent current of only 4 μA. Based on the DCS-
Control topology, it provides a fast transient response.
The internal reference allows to regulate the output
voltage down to 0.6 V with a high feedback voltage
accuracy of 1% over the junction temperature range
of –40°C to 125°C. The family devices are pin-to-
pin and BOM-to-BOM compatible. The entire solution
requires a small 470-nH inductor, a single 4.7-µF
input capacitor and two 10-µF or single 22-µF output
capacitor.
•
•
DCS-Control™ topology
1% feedback or output voltage accuracy (full
temperature range)
Up to 97% efficiency
•
•
•
•
•
•
•
•
•
•
•
•
•
•
26-mΩ and 25-mΩ internal power MOSFETs
2.4-V to 5.5-V input voltage range
4-μA operating quiescent current
2.2-MHz switching frequency
Adjustable output voltage from 0.6 V to 4 V
Power save mode for light load efficiency
100% duty cycle for lowest dropout
Active output discharge
Power good output
Thermal shutdown protection
Hiccup short-circuit protection
A forced-PWM version for CCM operation
Create a custom design using the TPS6282x with
the WEBENCH® Power Designer
The TPS6282x is available in two flavors. The
first includes an automatically entered power save
mode to maintain high efficiency down to very light
loads for extending the system battery run-time. The
second runs in forced-PWM maintaining a continuous
conduction mode to ensure the least ripple in the
output voltage and a quasi-fixed switching frequency.
The device features a Power Good signal and an
internal soft start circuit. It is able to operate in 100%
mode. For fault protection, it incorporates a HICCUP
short circuit protection as well as a thermal shutdown.
The device is available in a 6-pin 1.5 x 1.5-mm QFN
package, offering the highest power density solution.
2 Applications
•
•
•
•
•
•
Solid state drive
Portable electronics
Analog security and IP network cameras
Industrial PC
Multifunction printers
Generic point of load
Device Information
PART NUMBER
TPS62824x
PACKAGE(1)
BODY SIZE (NOM)
TPS62825x
6-Pin VSON-HR
1.5 mm x 1.5 mm
TPS62826x
TPS62827x
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
100
95
90
85
80
75
70
65
60
55
50
Vout=3.3V
Vout=2.5V
Vout=1.8V
Vout=1.2V
Vout=0.6V
Typical Application Schematic
100m
1m
10m
Load (A)
100m
1
4
Efficiency at VIN = 5 V
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS62824, TPS62825, TPS62826, TPS62827, TPS62824A, TPS62825A, TPS62826A, TPS62827A
SLVSEF9G – MARCH 2018 – REVISED MARCH 2022
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Table of Contents
1 Features............................................................................1
2 Applications.....................................................................1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Device Options................................................................ 3
6 Pin Configuration and Functions...................................3
7 Specifications.................................................................. 4
7.1 Absolute Maximum Ratings ....................................... 4
7.2 ESD Ratings .............................................................. 4
7.3 Recommended Operating Conditions ........................4
7.4 Thermal Information ...................................................4
7.5 Electrical Characteristics ............................................4
7.6 Typical Characteristics................................................6
8 Detailed Description........................................................7
8.1 Overview.....................................................................7
8.2 Functional Block Diagram...........................................7
8.3 Feature Description.....................................................8
8.4 Device Functional Modes............................................9
9 Application and Implementation..................................10
9.1 Application Information............................................. 10
9.2 Typical Application.................................................... 10
10 Power Supply Recommendations..............................21
11 Layout...........................................................................22
11.1 Layout Guidelines................................................... 22
11.2 Layout Example...................................................... 22
12 Device and Documentation Support..........................23
12.1 Device Support....................................................... 23
12.2 Documentation Support.......................................... 23
12.3 Support Resources................................................. 23
12.4 Trademarks.............................................................23
12.5 Electrostatic Discharge Caution..............................23
12.6 Glossary..................................................................23
13 Mechanical, Packaging, and Orderable
Information.................................................................... 24
4 Revision History
Changes from Revision F (September 2021) to Revision G (March 2022)
Page
•
Removed "in 1.5-mm × 1.5-mm QFN package" from data sheet title.................................................................1
Changes from Revision E (December 2020) to Revision F (September 2021)
Page
•
•
Changed the status of the TPS62824DMQ to Production Data......................................................................... 3
Added the TPS6282533..................................................................................................................................... 3
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SLVSEF9G – MARCH 2018 – REVISED MARCH 2022
5 Device Options
OPERATION
PART NUMBER
OUTPUT VOLTAGE
OUTPUT CURRENT
MODE
TPS62824DMQ
TPS62825DMQ
TPS6282518DMQ
TPS6282533DMQ
TPS62826DMQ
TPS6282618DMQ
TPS62827DMQ
TPS62824ADMQ
TPS62825ADMQ
TPS62826ADMQ
TPS62827ADMQ
Adjustable
Adjustable
1.8 V
1A
2 A
3.3 V
PSM/PWM
Adjustable
1.8 V
3 A
Adjustable
Adjustable
Adjustable
Adjustable
Adjustable
4 A
1 A
2 A
3 A
4A
Forced-PWM
6 Pin Configuration and Functions
FB
3
2
1
4
5
6
GND
SW
PG
EN
VIN
Figure 6-1. DMQ Package 6-Pin VSON-HR Bottom View
Table 6-1. Pin Functions
PIN
I/O
DESCRIPTION
NAME
NO.
Device enable pin. To enable the device, this pin needs to be pulled high. Pulling this pin low
disables the device. Do not leave floating.
EN
1
I
O
I
Power good open-drain output pin. The pullup resistor can be connected to voltages up to
5.5 V. If unused, leave it floating.
PG
FB
2
3
Feedback pin. For the fixed output voltage versions, this pin must be connected to the
output.
GND
SW
4
5
6
Ground pin
PWR
PWR
Switch pin of the power stage
Input voltage pin
VIN
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7 Specifications
7.1 Absolute Maximum Ratings
MIN
MAX
6
UNIT
VIN, FB, EN, PG
–0.3
–0.3
–1.0
–2.5
–40
SW (DC)
VIN + 0.3
VIN + 0.3
10
Voltage at Pins (1)
Temperature
V
SW (DC, in current limit)
SW (AC, less than 10ns) (2)
Operating junction temperature, TJ
Storage temperature, Tstg
150
°C
–65
150
(1) All voltage values are with respect to network ground terminal.
(2) While switching.
7.2 ESD Ratings
VALUE
UNIT
V
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
±2000
±500
V(ESD)
Electrostatic discharge
V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
Over operating junction temperature range (unless otherwise noted)
MIN
2.4
2.5
0.6
0
NOM
MAX
5.5
5.5
4.0
1
UNIT
V
VIN
Input voltage range, TPS62824x, TPS62825x and TPS62826x
Input voltage range, TPS62827x
Output voltage range
VIN
V
VOUT
IOUT
IOUT
IOUT
IOUT
ISINK_PG
VPG
TJ
V
Output current range, TPS62824x
Output current range, TPS62825x
Output current range, TPS62826x
Output current range, TPS62827x
Sink current at PG pin
A
0
2
A
0
3
A
0
4
A
1
mA
V
Pull-up resistor voltage
5.5
125
Operating junction temperature
-40
°C
7.4 Thermal Information
TPS6282xx
THERMAL METRIC(1)
TPS6282x, JEDEC
TPS62826EVM-794
UNIT
6 PINS
129.5
103.9
33.1
6 PINS
71.4
RθJA
RθJC(top)
RθJB
ψJT
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
n/a (2)
n/a (2)
3.9
Junction-to-top characterization parameter
Junction-to-board characterization parameter
3.8
ψJB
33.1
38.6
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
(2) Not applicable to an EVM.
7.5 Electrical Characteristics
TJ = –40°C to 125°C, and VIN = 2.4 V to 5.5 V. Typical values are at TJ = 25°C and VIN = 5 V , unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SUPPLY
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TJ = –40°C to 125°C, and VIN = 2.4 V to 5.5 V. Typical values are at TJ = 25°C and VIN = 5 V , unless otherwise noted.
PARAMETER
TEST CONDITIONS
EN = High, no load, device not switching
EN = High, no load, FPWM devices
EN = Low, TJ = -40 ℃ to 85 ℃
VIN falling
MIN
TYP
MAX
UNIT
µA
mA
µA
V
IQ
Quiescent current
4
10
IQ
Quiescent current
8
ISD
Shutdown current
0.05
2.2
160
150
20
0.5
2.3
Under voltage lock out threshold
Under voltage lock out hysteresis
Thermal shutdown threshold
Thermal shutdown hysteresis
2.1
VUVLO
VIN rising
mV
°C
TJ rising
TJSD
TJ falling
°C
LOGIC INTERFACE EN
VIH
High-level threshold voltage
1.0
V
V
VIL
Low-level threshold voltage
0.4
0.1
IEN,LKG
Input leakage current into EN pin
EN = High
0.01
µA
SOFT START, POWER GOOD
Time from EN high to 95% of VOUT nominal, TPS62827
1.75
1.25
ms
ms
tSS
Soft start time
Time from EN high to 95% of VOUT nominal,
TPS62824x/5x/6x/7A
VPG rising, VFB referenced to VFB nominal
VPG falling, VFB referenced to VFB nominal
VPG rising, VFB referenced to VFB nominal
VPG falling, VFB referenced to VFB nominal
Isink = 1 mA
94
90
96
92
98
94
%
%
%
%
V
Power good lower threshold
Power good upper threshold
VPG
103
108
105
110
107
112
0.4
0.1
VPG,OL
IPG,LKG
Low-level output voltage
Input leakage current into PG pin
VPG = 5.0 V
0.01
100
20
µA
PG rising edge
tPG,DLY
Power good deglitch delay
µs
PG falling edge
OUTPUT
VOUT
Output voltage accuracy
Output voltage accuracy
Feedback regulation voltage
TPS6282533, PWM mode
TPS6282x18, PWM mode
PWM mode
3.267
1.78
594
3.3
1.8
3.333
1.82
606
V
V
VOUT
VFB
600
mV
Feedback input leakage current for adjustable
output voltage
IFB,LKG
VFB = 0.6 V
0.01
7.5
0.05
µA
Internal resistor divider connected to FB pin, for
fixed output votlage
RFB
IDIS
TPS6282518, TPS6282618, TPS6282533
MΩ
Output discharge current
Load regulation
VSW = 0.4V; EN = LOW
75
400
0.1
mA
IOUT = 0.5 A to 3 A, VOUT = 1.8 V
%/A
POWER SWITCH
High-side FET on-resistance
26
25
mΩ
mΩ
A
RDS(on)
Low-side FET on-resistance
TPS62824A
1.7
2.7
3.7
4.8
2.1
3.3
4.3
5.6
-1.6
2.2
2.4
3.9
5.0
6.4
TPS62825x
A
ILIM
High-side FET switch current limit, DC
TPS62826x
A
TPS62827x
A
ILIM
fSW
Low-side FET negative current limit, DC
PWM switching frequency
TPS62824A/5A/6A/7A
IOUT = 1 A, VOUT = 1.8 V
A
MHz
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7.6 Typical Characteristics
70.0
60.0
50.0
40.0
30.0
20.0
10.0
0.0
70.0
60.0
50.0
40.0
30.0
20.0
10.0
0.0
TJ = 0 °C
TJ = 0 °C
TJ = 25 °C
TJ = 85 °C
TJ = 125 °C
TJ = 25 °C
TJ = 85 °C
TJ = 125 °C
2.5
3.0
3.5
4.0
Input Voltage (V)
4.5
5.0
5.5
2.5
3.0
3.5
4.0
Input Voltage (V)
4.5
5.0
5.5
D010
D011
Figure 7-1. High-Side FET On-Resistance
Figure 7-2. Low-Side FET On-Resistance
0.5
8.0
TJ = -40 °C
TJ = 25 °C
TJ = 85 °C
TJ = 125 °C
0.4
0.3
0.2
0.1
0.0
6.0
4.0
2.0
0.0
TJ = -40 °C
TJ = 25 °C
TJ = 85 °C
TJ = 125 °C
2.5
3.0
3.5
4.0
Input Voltage (V)
4.5
5.0
5.5
2.5
3.0
3.5
4.0
Input Voltage (V)
4.5
5.0
5.5
D000
D001
Figure 7-3. Shutdown Current
Figure 7-4. Quiescent Current
500
450
400
350
300
250
200
150
100
50
TJ = 0 °C
TJ = 25 °C
TJ = 85 °C
TJ = 125 °C
0
2.5
3.0
3.5
4.0
Input Voltage (V)
4.5
5.0
5.5
D012
Figure 7-5. Output Discharge Current
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8 Detailed Description
8.1 Overview
The TPS6282x are synchronous step-down converters based on the DCS-Control topology with an adaptive
constant on-time control and a stabilized switching frequency. It operates in PWM (pulse width modulation)
mode for medium to heavy loads and in PSM (power save mode) at light load conditions, keeping the output
voltage ripple small. The nominal switching frequency is about 2.2 MHz with a small and controlled variation
over the input voltage range. As the load current decreases, the converter enters PSM, reducing the switching
frequency to keep efficiency high over the entire load current range. Since combining both PWM and PSM within
a single building block, the transition between modes is seamless and without effect on the output voltage. In
forced-PWM devices, the converter maintains a continuous conduction mode operation and keeps the output
voltage ripple very low across the whole load range and at a nominal switching frequency of 2.2 MHz. The
devices offer both excellent dc voltage and fast load transient regulation, combined with a very low output
voltage ripple.
8.2 Functional Block Diagram
PG
Control Logic
EN
VFB
VREF
Thermal
Shutdown
Soft-Start
UVLO
VFB
VIN
VSW
FB
VIN
Ramp
Peak Current Detect
EA
VREF
HICCUP
Comp
VSW
Modulator
SW
Gate Drive
Ton
Output
Discharge
VIN
VSW
Zero Current Detect
0.6 V
Or
Fixed Output Voltages
VREF
GND
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8.3 Feature Description
8.3.1 Pulse Width Modulation (PWM) Operation
At load currents larger than half the inductor ripple current, the device operates in pulse width modulation in
continuous conduction mode (CCM). The PWM operation is based on an adaptive constant on-time control with
stabilized switching frequency. To achieve a stable switching frequency in a steady state condition, the on-time is
calculated as:
VOUT
TON
=
× 450ns
V
IN
(1)
In forced-PWM devices, the device always operates in pulse width modulation in continuous conduction mode
(CCM).
8.3.2 Power Save Mode (PSM) Operation
To maintain high efficiency at light loads, the device enters power save mode (PSM) at the boundary to
discontinuous conduction mode (DCM). This happens when the output current becomes smaller than half of the
ripple current of the inductor. The device operates now with a fixed on-time and the switching frequency further
decreases proportional to the load current. It can be calculated as:
2×IOUT
fPSM
=
V
V -V
é
ù
TO2N
×
IN
IN
OUT
ê
ú
VOUT
L
ë
û
(2)
In PSM, the output voltage rises slightly above the nominal target, which can be minimized using larger output
capacitance. At duty cycles larger than 90%, the device may not enter PSM. The device maintains output
regulation in PWM mode.
8.3.3 Minimum Duty Cycle and 100% Mode Operation
There is no limitation for small duty cycles since even at very low duty cycles, the switching frequency is reduced
as needed to always ensure a proper regulation.
If the output voltage level comes close to the input voltage, the device enters 100% mode. While the high-side
switch is constantly turned on, the low-side switch is switched off. The difference between VIN and VOUT is
determined by the voltage drop across the high-side FET and the DC resistance of the inductor. The minimum
VIN that is needed to maintain a specific VOUT value is estimated as:
V
= VOUT + IOUT,MAX ´(RDS(on) + RL )
IN,MIN
(3)
where
•
•
•
•
VIN,MIN = Minimum input voltage to maintain an output voltage
IOUT,MAX = Maximum output current
RDS(on) = High-side FET ON-resistance
RL = Inductor ohmic resistance (DCR)
8.3.4 Soft Start
About 250 μs after EN goes High, the internal soft-start circuitry controls the output voltage during start-up. This
avoids excessive inrush current and ensures a controlled output voltage ramp. It also prevents unwanted voltage
drops from high-impedance power sources or batteries. The TPS6282x can start into a pre-biased output.
8.3.5 Switch Current Limit and HICCUP Short-Circuit Protection
The switch current limit prevents the device from drawing excessive current in case of externally-caused
overcurrent or short circuit condition. Due to an internal propagation delay (typically 60 ns), the actual AC peak
current can exceed the static current limit during that time.
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If the current limit threshold is reached, the device delivers its maximum output current. Detecting this condition
for 32 switching cycles (about 13 μs), the device turns off the high-side MOSFET for about 100 μs which allows
the inductor current to decrease through the low-side MOSFET's body diode and then restarts again with a soft
start cycle. As long as the overload condition is present, the device hiccups that way, limiting the output power.
In forced PWM devices, a negative current limit (ILIMN) is enabled to prevent excessive current flowing
backwards to the input. When the inductor current reaches ILIMN, the low-side MOSFET turns off and the
high-side MOSFET turns on and kept on until TON time expires.
8.3.6 Undervoltage Lockout
The undervoltage lockout (UVLO) function prevents misoperation of the device if the input voltage drops below
the UVLO threshold. It is set to about 2.2 V with a hysteresis of typically 160 mV.
8.3.7 Thermal Shutdown
The junction temperature (TJ) of the device is monitored by an internal temperature sensor. If TJ exceeds 150°C
(typ.), the device goes in thermal shutdown with a hysteresis of typically 20°C. Once TJ has decreased enough,
the device resumes normal operation.
8.4 Device Functional Modes
8.4.1 Enable, Disable, and Output Discharge
The device starts operation when Enable (EN) is set High. The input threshold levels are typically 0.9 V for rising
and 0.7 V for falling signals. Do not leave EN floating. Shutdown is forced if EN is pulled Low with a shutdown
current of typically 50 nA. During shutdown, the internal power MOSFETs as well as the entire control circuitry
are turned off and the output voltage is actively discharged through the SW pin by a current sink. Therefore VIN
must remain present for the discharge to function.
8.4.2 Power Good
The TPS6282x has a built-in power good (PG) function. The PG pin goes high impedance when the output
voltage has reached its nominal value. Otherwise, including when disabled, in UVLO or in thermal shutdown, PG
is Low (see Table 8-1). The PG function is formed with a window comparator, which has an upper and lower
voltage threshold. The PG pin is an open-drain output and is specified to sink up to 1 mA. The power good
output requires a pullup resistor connecting to any voltage rail less than 5.5 V.
The PG signal can be used for sequencing of multiple rails by connecting it to the EN pin of other converters.
Leave the PG pin unconnected when not used. The PG rising edge has a 100-µs blanking time and the PG
falling edge has a deglitch delay of 20 µs.
Table 8-1. PG Pin Logic
LOGIC STATUS
DEVICE CONDITIONS
HIGH Z
LOW
EN = High, VFB ≥ 0.576 V
EN = High, VFB ≤ 0.552 V
EN = High, VFB ≤ 0.63 V
EN = High, VFB ≥ 0.66 V
EN = Low
√
√
Enable
√
√
√
√
√
Shutdown
Thermal Shutdown
UVLO
TJ > TJSD
0.7 V < VIN < VUVLO
VIN < 0.7 V
Power Supply Removal
√
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9 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification,
and TI does not warrant its accuracy or completeness. TI’s customers are responsible for
determining suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.
9.1 Application Information
The following section discusses the design of the external components to complete the power supply design for
several input and output voltage options by using typical applications as a reference.
9.2 Typical Application
Figure 9-1. Typical Application of TPS62826x
Figure 9-2. Typical Application of TPS62827
9.2.1 Design Requirements
For this design example, use the parameters listed in Table 9-1 as the input parameters.
Table 9-1. Design Parameters
DESIGN PARAMETER
Input voltage, TPS62826x
Input voltage, TPS62827x
Output voltage
EXAMPLE VALUE
2.4 V to 5.5 V
2.5 V to 5.5 V
1.8 V
Output ripple voltage
<20 mV
Maximum output current, TPS62826x
Maximum output current, TPS62827x
3 A
4 A
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Table 9-2 lists the components used for the example.
Table 9-2. List of Components
REFERENCE
DESCRIPTION
MANUFACTURER
C1
4.7 µF, Ceramic capacitor, 6.3 V, X7R, size 0603, JMK107BB7475MA
Taiyo Yuden
C2,
2 x 10 µF, Ceramic capacitor, 10 V, X7R, size 0603, GRM188Z71A106MA73D
Murata
TPS62824x/5x/6x/7A
C2, TPS62827
3 x 10 µF, Ceramic capacitor, 10 V, X7R, size 0603, GRM188Z71A106MA73D
120 pF, Ceramic capacitor, 50 V, size 0402
Murata
Std
C3
L1
0.47 µH, Power Inductor, XFL4015-471MEB
Coilcraft
Std
R1
R2
R3
Depending on the output voltage, 1%, size 0402
100 kΩ, Chip resistor, 1/16 W, 1%, size 0402
Std
100 kΩ, Chip resistor, 1/16 W, 1%, size 0402
Std
9.2.2 Detailed Design Procedure
9.2.2.1 Custom Design With WEBENCH® Tools
Click here to create a custom design using the TPS6282x device with the WEBENCH® Power Designer.
1. Start by entering the input voltage (VIN), output voltage (VOUT), and output current (IOUT) requirements.
2. Optimize the design for key parameters such as efficiency, footprint, and cost using the optimizer dial.
3. Compare the generated design with other possible solutions from Texas Instruments.
The WEBENCH Power Designer provides a customized schematic along with a list of materials with real-time
pricing and component availability.
In most cases, these actions are available:
•
•
•
•
Run electrical simulations to see important waveforms and circuit performance
Run thermal simulations to understand board thermal performance
Export customized schematic and layout into popular CAD formats
Print PDF reports for the design, and share the design with colleagues
Get more information about WEBENCH tools at www.ti.com/WEBENCH.
9.2.2.2 Setting The Output Voltage
The output voltage is set by an external resistor divider according to Equation 4:
≈
∆
«
’
VOUT
VFB
V
OUT
≈
’
R1= R2ì
-1 = R2ì
-1
÷
÷
∆
«
0.6V
◊
◊
(4)
R2 must not be higher than 100 kΩ to achieve high efficiency at light load while providing acceptable noise
sensitivity. Equation 5 shows how to compute the value of the feedforward capacitor for a given R2 value. For
the recommended 100k value for R2, a 120-pF feedforward capacitor is used.
12µ
C3 =
R2
(5)
For the fixed output voltage versions, connect the FB pin to the output. R1, R2, and C3 are not needed. The
fixed output voltage devices have an internal feedforward capacitor.
9.2.2.3 Output Filter Design
The inductor and the output capacitor together provide a low-pass filter. To simplify this process, Table 9-3
outlines possible inductor and capacitor value combinations for most applications. Checked cells represent
combinations that are proven for stability by simulation and lab test. Further combinations should be checked for
each individual application.
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Table 9-3. Matrix of Output Capacitor and Inductor Combinations, TPS62824x, TPS62825x, TPS62826x
and TPS62827A
NOMINAL COUT [µF](3)
NOMINAL L [µH](2)
10
2 x 10 or 22
47
100
0.33
0.47
1.0
(1)
+
+
+
(1) This LC combination is the standard value and recommended for most applications.
(2) Inductor tolerance and current derating is anticipated. The effective inductance can vary by 20% and –30%.
(3) Capacitance tolerance and bias voltage derating is anticipated. The effective capacitance can vary by 20% and –35%.
Table 9-4. Matrix of Output Capacitor and Inductor Combinations, TPS62827
NOMINAL COUT [µF](3)
NOMINAL L [µH](2)
22
3 x 10
47
100
0.33
0.47
1.0
(1)
+
+
+
9.2.2.4 Inductor Selection
The main parameter for the inductor selection is the inductor value and then the saturation current of the
inductor. To calculate the maximum inductor current under static load conditions, Equation 6 is given.
DIL
IL,MAX = IOUT,MAX
+
2
VOUT
1-
V
IN
DIL = VOUT
´
L ´ fSW
(6)
where
•
•
•
•
IOUT,MAX = Maximum output current
ΔIL = Inductor current ripple
fSW = Switching frequency
L = Inductor value
It is recommended to choose a saturation current for the inductor that is approximately 20% to 30% higher than
IL,MAX. In addition, DC resistance and size should also be taken into account when selecting an appropriate
inductor. Table 9-5 lists recommended inductors.
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Table 9-5. List of Recommended Inductors
CURRENT RATING DIMENSIONS [L x W
MAX. DC
RESISTANCE [mΩ]
INDUCTANCE [µH]
MFR PART NUMBER(1)
[A]
4.8
4.6
4.8
4.8
5.1
5.2
6.6
8.0
6.8
x H mm]
2.0 x 1.6 x 1.0
2.0 x 1.2 x 1.0
2.0 x 1.6 x 1.0
2.0 x 1.6 x 1.0
2.0 x 1.6 x 1.0
2.0 x 1.6 x 1.0
4.0 x 4.0 x 1.6
3.5 x 3.2 x 2.0
4.5 x 4 x 1.8
32
25
HTEN20161T-R47MDR, Cyntec
HTEH20121T-R47MSR, Cyntec
DFE201610E - R47M, MuRata
DFE201210S - R47M, MuRata
TFM201610ALM-R47MTAA, TDK
TFM201610ALC-R47MTAA, TDK
XFL4015-471ME, Coilcraft
32
32
0.47
34
25
8.36
10.85
11.2
XEL3520-471ME, Coilcraft
WE-LHMI-744373240047, Würth
(1) See the Third-party Products Disclaimer
9.2.2.5 Capacitor Selection
The input capacitor is the low-impedance energy source for the converters which helps provide stable operation.
A low-ESR multilayer ceramic capacitor is recommended for best filtering and must be placed between VIN and
GND as close as possible to those pins. For most applications, a minimum effective input capacitance of 3 µF
should be present, though a larger value reduces input current ripple.
The architecture of the device allows the use of tiny ceramic output capacitors with low equivalent series
resistance (ESR). These capacitors provide low output voltage ripple and are recommended. To keep its low
resistance up to high frequencies and to get narrow capacitance variation with temperature, TI recommends
using X7R or X5R dielectrics. Considering the DC-bias derating the capacitance, the minimum effective output
capacitance is 10 µF for TPS62824x, TPS62825x, TPS62826x and TPS62827A and 20 µF for TPS62827.
A feed forward capacitor is required for the adjustable version, as described in Section 9.2.2.2. This capacitor is
not required for the fixed output voltage versions.
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9.2.3 Application Curves
VIN = 5.0 V, VOUT = 1.8 V, TA = 25°C, BOM = Table 9-2, unless otherwise noted.
0.612
0.609
0.606
0.603
0.6
95
90
85
80
75
70
65
60
55
50
45
0.597
0.594
0.591
0.588
VIN = 2.5 V
VIN = 3.3 V
VIN = 4.2 V
VIN = 5.0 V
VIN = 2.5V
VIN = 3.3V
VIN = 4.2V
VIN = 5.0V
100m
1m
10m
Load (A)
100m
1
4
100m
1m
10m
Load (A)
100m
1
4
D021
D002
VOUT = 0.6 V
VOUT = 0.6 V
Figure 9-4. Load Regulation
Figure 9-3. Efficiency
100
95
90
85
80
75
70
65
60
55
50
45
40
0.609
0.606
0.603
0.6
VIN=2.5V
VIN=3.3V
VIN=4.2V
VIN=5.0V
0.597
0.594
0.591
VIN=2.5V
VIN=3.3V
VIN=4.2V
VIN=5.0V
0
0.5
1
1.5
2
Load (A)
2.5
3
3.5
4
0
0.5
1
1.5
2
Load (A)
2.5
3
3.5
4
VOUT = 0.6 V
F-PWM devices
VOUT = 0.6 V
F-PWM devices
Figure 9-6. Load Regulation
Figure 9-5. PWM Efficiency
100
95
90
85
80
75
70
65
60
55
1.212
1.209
1.206
1.203
1.2
1.197
1.194
1.191
1.188
VIN = 2.4 V
VIN = 3.3 V
VIN = 4.5 V
VIN = 5.0 V
VIN = 2.5V
VIN = 3.3V
VIN = 4.2V
VIN = 5.0V
100m
1m
10m
Load (A)
100m
1
4
100m
1m
10m
Load (A)
100m
1
4
D031
D003
VOUT = 1.2 V
VOUT = 1.2 V
Figure 9-8. Load Regulation
Figure 9-7. Efficiency
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100
95
90
85
80
75
70
65
60
55
50
45
1.218
VIN=2.5V
VIN=3.3V
VIN=4.2V
1.212
VIN=5.0V
1.206
1.2
1.194
VIN=2.5V
1.188
1.182
VIN=3.3V
VIN=4.2V
VIN=5.0V
40
0
0
0.5
1
1.5
2
Load (A)
2.5
3
3.5
4
0.5
1
1.5
2
Load (A)
2.5
3
3.5
4
VOUT = 1.2 V
F-PWM devices
VOUT = 1.2 V
F-PWM devices
Figure 9-10. Load Regulation
Figure 9-9. PWM Efficiency
100
95
90
85
80
75
70
65
1.818
1.812
1.806
1.8
VIN = 2.5 V
VIN = 3.3 V
VIN = 4.2 V
VIN = 5.0 V
1.794
1.788
1.782
VIN = 2.5V
VIN = 3.3V
VIN = 4.2V
VIN = 5.0V
60
100m
100m
1m
10m
Load (A)
100m
1
4
1m
10m
Load (A)
100m
1
4
D041
D004
VOUT = 1.8 V
VOUT = 1.8 V
Figure 9-12. Load Regulation
Figure 9-11. Efficiency
100
95
90
85
80
75
70
65
60
55
50
45
1.827
VIN=2.5V
1.821
1.815
1.809
1.803
1.797
1.791
1.785
1.779
1.773
VIN=3.3V
VIN=4.2V
VIN=5.0V
VIN=2.5V
VIN=3.3V
VIN=4.2V
VIN=5.0V
40
0
0
0.5
1
1.5
2
Load (A)
2.5
3
3.5
4
0.5
1
1.5
2
Load (A)
2.5
3
3.5
4
VOUT = 1.8 V
F-PWM devices
VOUT = 1.8 V
F-PWM devices
Figure 9-14. Load Regulation
Figure 9-13. PWM Efficiency
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100
95
90
85
80
75
70
65
60
2.525
2.515
2.505
2.495
2.485
2.475
VIN = 3.3 V
VIN = 4.2 V
VIN = 5.0 V
VIN = 3.3V
VIN = 4.2V
VIN = 5.0V
100m
1m
10m
Load (A)
100m
1
4
100m
1m
10m
Load (A)
100m
1
4
D061
D006
VOUT = 2.5 V
VOUT = 2.5 V
Figure 9-16. Load Regulation
Figure 9-15. Efficiency
2.5375
2.53
100
95
90
85
80
75
70
65
60
55
50
45
40
VIN=3.3V
VIN=4.2V
VIN=5.0V
2.5225
2.515
2.5075
2.5
2.4925
2.485
2.4775
2.47
VIN=3.3V
VIN=4.2V
VIN=5.0V
2.4625
0
0.5
1
1.5
2
Load (A)
2.5
3
3.5
4
0
0.5
1
1.5
2
Load (A)
2.5
3
3.5
4
VOUT = 2.5 V
F-PWM devices
VOUT = 2.5 V
F-PWM devices
Figure 9-18. Load Regulation
Figure 9-17. PWM Efficiency
100
95
90
85
80
75
70
3.340
3.320
3.300
3.280
3.260
VIN = 4.2V
VIN = 5.0V
VIN = 4.2V
VIN = 5.0V
100m
1m
10m
Load (A)
100m
1
4
100m
1m
10m
Load (A)
100m
1
4
D051
D005
VOUT = 3.3 V
VOUT = 3.3 V
Figure 9-20. Load Regulation
Figure 9-19. Efficiency
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3.3495
100
95
90
85
80
75
70
65
60
55
50
45
VIN=4.2V
VIN=5.0V
3.3396
3.3297
3.3198
3.3099
3.3
3.2901
3.2802
3.2703
3.2604
VIN=4.2V
VIN=5.0V
3.2505
40
0
0
0.5
1
1.5
2
Load (A)
2.5
3
3.5
4
0.5
1
1.5
2
Load (A)
2.5
3
3.5
4
VOUT = 3.3 V
F-PWM devices
VOUT = 3.3 V
F-PWM devices
Figure 9-22. Load Regulation
Figure 9-21. PWM Efficiency
3000
2750
2500
2250
2000
1750
1500
1250
1000
750
3000
2750
2500
2250
2000
1750
1500
1250
1000
750
VOUT = 0.6V
VOUT = 0.6V
VOUT = 1.2V
VOUT = 1.8V
VOUT = 2.5V
VOUT = 3.3V
VOUT = 1.2V
VOUT = 1.8V
VOUT = 2.5V
500
500
250
250
0
0
0.0
0.5
1.0
1.5
Load (A)
2.0
2.5
3.0
2.5
3.0
3.5
4.0
Input Voltage (V)
4.5
5.0
5.5
D008
D009
VIN = 3.3 V
TPS62824/5/6
IOUT = 1.0 A
TPS62824/5/6
Figure 9-23. Switching Frequency
Figure 9-24. Switching Frequency
3.00x106
2.70x106
2.75x106
2.50x106
2.25x106
2.00x106
1.75x106
1.50x106
1.25x106
1.00x106
750.00x103
500.00x103
250.00x103
0.00x100
2.40x106
2.10x106
1.80x106
1.50x106
1.20x106
900.00x103
600.00x103
300.00x103
0.00x100
VOUT=0.6V
VOUT=1.2V
VOUT=1.8V
VOUT=2.5V
VOUT=3.3V
VOUT=0.6V
VOUT=1.2V
VOUT=1.8V
VOUT=2.5V
2.4
2.8
3.2
3.6
4
Input Voltgae (V)
4.4
4.8
5.2 5.5
0
0.5
1
1.5
2
Load (A)
2.5
3
3.5
4
IOUT = 1.0 A
TPS62824A/5A/6A/7A
VIN = 3.3 V
TPS62824A/5A/6A/7A
Figure 9-26. Switching Frequency
Figure 9-25. Switching Frequency
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3000
2750
2500
2250
2000
1750
1500
1250
1000
750
3000
2750
2500
2250
2000
1750
1500
1250
1000
750
VOUT = 0.6V
VOUT = 0.6V
VOUT = 1.2V
VOUT = 1.8V
VOUT = 2.5V
VOUT = 1.2V
VOUT = 1.8V
VOUT = 2.5V
VOUT = 3.3V
500
500
250
250
0
0
0.0
0.5
1.0
1.5
2.0
Load (A)
2.5
3.0
3.5
4.0
2.5
3.0
3.5
4.0
Input Voltage (V)
4.5
5.0
5.5
D013
D014
VIN = 3.3 V
TPS62827
IOUT = 1.0 A
TPS62827
Figure 9-27. Switching Frequency
Figure 9-28. Switching Frequency
5
4
3
2
1
5
4
3
2
1
VIN = 2.5 V
VIN = 3.3 V
VIN = 5.0 V
VIN = 2.5 V
VIN = 3.3 V
VIN = 5.0 V
0
0
45
55
65
75
Ambient Temperature (°C)
85
95
105
115
125
45
55
65
75
Ambient Temperature (°C)
85
95
105
115
125
D020
D015
VOUT = 1.2 V
θJA= 71.4°C/W
VOUT = 1.8 V
θJA= 71.4°C/W
Figure 9-29. Thermal Derating
Figure 9-30. Thermal Derating
5
4
3
2
1
5
4
3
2
1
VIN = 3.3 V
VIN = 5.0 V
VIN = 5.0 V
0
0
45
55
65
75
Ambient Temperature (°C)
85
95
105
115
125
45
55
65
75
Ambient Temperature (°C)
85
95
105
115
125
D017
D016
VOUT = 2.5 V
θJA= 71.4°C/W
VOUT = 3.3 V
θJA= 71.4°C/W
Figure 9-31. Thermal Derating
Figure 9-32. Thermal Derating
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IOUT = 1.0 A
TPS62824/5/6/7
IOUT = 0.1 A
TPS62824/5/6/7
Figure 9-33. PWM Operation
Figure 9-34. PSM Operation
IOUT = 1.0 A
TPS62824A/5A/6A/7A
No load
TPS62824A/5A/6A/7A
Figure 9-35. PWM Operation at F-PWM
Figure 9-36. PWM Operation at F-PWM
Load = 0.6 Ω
TPS62825/6/7
TPS62824/5/6/7
Figure 9-37. Start-up with Load
Figure 9-38. Start-up with No Load
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Load = 0.6 Ω
TPS62825A/6A/7A
TPS62824A/5A/6A/7A
Figure 9-39. Start-up with Load
Figure 9-40. Start-up with No Load
Load = 1.8 Ω
TPS6282x
TPS6282x
Figure 9-41. Disable, Active Output Discharge
Figure 9-42. Disable, Active Output Discharge at
No Load
IOUT = 0.05 A to 1A
TPS62824/5/6/7
IOUT = 1 A to 2 A
TPS62825/6/7
Figure 9-43. Load Transient
Figure 9-44. Load Transient
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www.ti.com
SLVSEF9G – MARCH 2018 – REVISED MARCH 2022
IOUT = 0.05 A to 1A
TPS62824A/5A/6A/7A
IOUT = 1 A to 2 A
TPS62825A/6A/7A
Figure 9-45. Load Transient
Figure 9-46. Load Transient
VPG
VPG
5V/DIV
5V/DIV
ICOIL
ICOIL
2A/DIV
2A/DIV
VOUT
VOUT
1V/DIV
1V/DIV
Time - 200ꢀs/DIV
Time - 2ꢀs/DIV
D018
D019
IOUT = 1 A
TPS6282x
IOUT = 1 A
TPS6282x
Figure 9-47. HICCUP Short Circuit Protection
Figure 9-48. HICCUP Short Circuit Protection
(Zoom In)
10 Power Supply Recommendations
The device is designed to operate from an input voltage supply range from 2.4 V to 5.5 V. Ensure that the input
power supply has a sufficient current rating for the application.
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TPS62827A
TPS62824, TPS62825, TPS62826, TPS62827, TPS62824A, TPS62825A, TPS62826A, TPS62827A
SLVSEF9G – MARCH 2018 – REVISED MARCH 2022
www.ti.com
11 Layout
11.1 Layout Guidelines
The printed-circuit-board (PCB) layout is an important step to maintain the high performance of the device. See
Section 11.2 for the recommended PCB layout.
•
The input/output capacitors and the inductor should be placed as close as possible to the IC. This keeps
the power traces short. Routing these power traces direct and wide results in low trace resistance and low
parasitic inductance.
•
•
The low side of the input and output capacitors must be connected properly to the GND pin to avoid a ground
potential shift.
The sense traces connected to FB is a signal trace. Special care should be taken to avoid noise being
induced. Keep these traces away from SW nodes. The connection of the output voltage trace for the FB
resistors should be made at the output capacitor.
•
Refer to Section 11.2 for an example of component placement, routing and thermal design.
11.2 Layout Example
L1
C1
VOUT
VIN
C2
Solution size = 31mm2
R2
R1
GND
C3
Figure 11-1. PCB Layout Recommendation
11.2.1 Thermal Considerations
Implementation of integrated circuits in low-profile and fine-pitch surface-mount packages typically requires
special attention to power dissipation. Many system-dependent issues such as thermal coupling, airflow, added
heat sinks and convection surfaces, and the presence of other heat-generating components affect the power
dissipation limits of a given component.
Two basic approaches for enhancing thermal performance are:
•
•
Improving the power dissipation capability of the PCB design
Introducing airflow in the system
The Thermal Data section in Section 7.4 provides the thermal metric of the device on the EVM after considering
the PCB design of real applications. The big copper planes connecting to the pads of the IC on the PCB improve
the thermal performance of the device. For more details on how to use the thermal parameters, see the Thermal
Characteristics Application Notes, SZZA017 and SPRA953.
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www.ti.com
SLVSEF9G – MARCH 2018 – REVISED MARCH 2022
12 Device and Documentation Support
12.1 Device Support
12.1.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
12.1.2 Development Support
12.1.2.1 Custom Design With WEBENCH® Tools
Click here to create a custom design using the TPS6282x device with the WEBENCH® Power Designer.
1. Start by entering the input voltage (VIN), output voltage (VOUT), and output current (IOUT) requirements.
2. Optimize the design for key parameters such as efficiency, footprint, and cost using the optimizer dial.
3. Compare the generated design with other possible solutions from Texas Instruments.
The WEBENCH Power Designer provides a customized schematic along with a list of materials with real-time
pricing and component availability.
In most cases, these actions are available:
•
•
•
•
Run electrical simulations to see important waveforms and circuit performance
Run thermal simulations to understand board thermal performance
Export customized schematic and layout into popular CAD formats
Print PDF reports for the design, and share the design with colleagues
Get more information about WEBENCH tools at www.ti.com/WEBENCH.
12.2 Documentation Support
12.2.1 Related Documentation
For related documentation, see the following:
•
•
Thermal Characteristics Application Note, SZZA017
Thermal Characteristics Application Note, SPRA953
12.3 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
12.4 Trademarks
DCS-Control™ and TI E2E™ are trademarks of Texas Instruments.
WEBENCH® is a registered trademark of Texas Instruments.
All trademarks are the property of their respective owners.
12.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
12.6 Glossary
TI Glossary
This glossary lists and explains terms, acronyms, and definitions.
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SLVSEF9G – MARCH 2018 – REVISED MARCH 2022
www.ti.com
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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TPS62827A
PACKAGE OPTION ADDENDUM
www.ti.com
18-Feb-2022
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TPS62824ADMQR
TPS62824DMQR
TPS6282518DMQR
TPS6282518DMQT
TPS6282533DMQR
TPS62825ADMQR
TPS62825DMQR
TPS62825DMQT
TPS6282618DMQR
TPS6282618DMQT
TPS62826ADMQR
TPS62826DMQR
TPS62826DMQT
TPS62827ADMQR
TPS62827DMQR
TPS62827DMQT
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
VSON-HR
VSON-HR
VSON-HR
VSON-HR
VSON-HR
VSON-HR
VSON-HR
VSON-HR
VSON-HR
VSON-HR
VSON-HR
VSON-HR
VSON-HR
VSON-HR
VSON-HR
VSON-HR
DMQ
DMQ
DMQ
DMQ
DMQ
DMQ
DMQ
DMQ
DMQ
DMQ
DMQ
DMQ
DMQ
DMQ
DMQ
DMQ
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
3000 RoHS & Green
3000 RoHS & Green
Call TI | NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
JM
JL
Call TI | NIPDAU
3000 RoHS & Green Call TI | SN | NIPDAU Level-1-260C-UNLIM
250 RoHS & Green Call TI | SN | NIPDAU Level-1-260C-UNLIM
CJ
CJ
L1
3000 RoHS & Green
3000 RoHS & Green
3000 RoHS & Green
Call TI | NIPDAU
Call TI | NIPDAU
Call TI | NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
JN
CI
250
3000 RoHS & Green Call TI | SN | NIPDAU Level-1-260C-UNLIM
250 RoHS & Green Call TI | SN | NIPDAU Level-1-260C-UNLIM
3000 RoHS & Green Call TI | NIPDAU Level-1-260C-UNLIM
3000 RoHS & Green Call TI | SN | NIPDAU Level-1-260C-UNLIM
250 RoHS & Green Call TI | SN | NIPDAU Level-1-260C-UNLIM
RoHS & Green Call TI | SN | NIPDAU Level-1-260C-UNLIM
CI
CK
CK
JO
CL
CL
JP
EH
EH
3000 RoHS & Green
3000 RoHS & Green
Call TI | NIPDAU
Call TI | NIPDAU
Call TI | NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
250
RoHS & Green
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
18-Feb-2022
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
19-Feb-2022
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPS62824ADMQR
TPS62824DMQR
TPS6282518DMQR
TPS6282518DMQR
TPS6282518DMQT
TPS6282518DMQT
TPS6282533DMQR
TPS62825ADMQR
TPS62825DMQR
TPS62825DMQR
TPS62825DMQT
VSON-
HR
DMQ
DMQ
DMQ
DMQ
DMQ
DMQ
DMQ
DMQ
DMQ
DMQ
DMQ
6
6
6
6
6
6
6
6
6
6
6
3000
3000
3000
3000
250
180.0
180.0
180.0
180.0
180.0
180.0
180.0
180.0
180.0
180.0
180.0
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
1.75
1.75
1.0
1.14
1.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
Q2
Q2
Q2
Q2
Q2
Q2
Q2
Q2
Q2
Q2
Q2
VSON-
HR
1.7
1.7
VSON-
HR
1.75
1.7
1.75
1.7
VSON-
HR
1.14
1.14
1.0
VSON-
HR
1.7
1.7
VSON-
HR
250
1.75
1.7
1.75
1.7
VSON-
HR
3000
3000
3000
3000
250
1.14
1.0
VSON-
HR
1.75
1.75
1.7
1.75
1.75
1.7
VSON-
HR
1.0
VSON-
HR
1.14
1.0
VSON-
1.75
1.75
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
19-Feb-2022
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
HR
TPS62825DMQT
TPS6282618DMQR
TPS6282618DMQR
TPS6282618DMQT
TPS6282618DMQT
TPS62826ADMQR
TPS62826DMQR
TPS62826DMQR
TPS62826DMQT
TPS62826DMQT
TPS62827ADMQR
TPS62827DMQR
TPS62827DMQR
TPS62827DMQT
VSON-
HR
DMQ
DMQ
DMQ
DMQ
DMQ
DMQ
DMQ
DMQ
DMQ
DMQ
DMQ
DMQ
DMQ
DMQ
6
6
6
6
6
6
6
6
6
6
6
6
6
6
250
3000
3000
250
180.0
180.0
180.0
180.0
180.0
180.0
180.0
180.0
180.0
180.0
180.0
180.0
180.0
180.0
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
1.7
1.7
1.7
1.7
1.14
1.14
1.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
Q2
Q2
Q2
Q2
Q2
Q2
Q2
Q2
Q2
Q2
Q2
Q2
Q2
Q2
VSON-
HR
VSON-
HR
1.75
1.7
1.75
1.7
VSON-
HR
1.14
1.0
VSON-
HR
250
1.75
1.75
1.75
1.7
1.75
1.75
1.75
1.7
VSON-
HR
3000
3000
3000
250
1.0
VSON-
HR
1.0
VSON-
HR
1.14
1.14
1.0
VSON-
HR
1.7
1.7
VSON-
HR
250
1.75
1.75
1.75
1.7
1.75
1.75
1.75
1.7
VSON-
HR
3000
3000
3000
250
1.0
VSON-
HR
1.0
VSON-
HR
1.14
1.14
VSON-
HR
1.7
1.7
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
19-Feb-2022
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TPS62824ADMQR
TPS62824DMQR
TPS6282518DMQR
TPS6282518DMQR
TPS6282518DMQT
TPS6282518DMQT
TPS6282533DMQR
TPS62825ADMQR
TPS62825DMQR
TPS62825DMQR
TPS62825DMQT
TPS62825DMQT
TPS6282618DMQR
TPS6282618DMQR
TPS6282618DMQT
TPS6282618DMQT
TPS62826ADMQR
TPS62826DMQR
TPS62826DMQR
TPS62826DMQT
VSON-HR
VSON-HR
VSON-HR
VSON-HR
VSON-HR
VSON-HR
VSON-HR
VSON-HR
VSON-HR
VSON-HR
VSON-HR
VSON-HR
VSON-HR
VSON-HR
VSON-HR
VSON-HR
VSON-HR
VSON-HR
VSON-HR
VSON-HR
DMQ
DMQ
DMQ
DMQ
DMQ
DMQ
DMQ
DMQ
DMQ
DMQ
DMQ
DMQ
DMQ
DMQ
DMQ
DMQ
DMQ
DMQ
DMQ
DMQ
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
3000
3000
3000
3000
250
210.0
182.0
210.0
182.0
182.0
210.0
182.0
210.0
210.0
182.0
210.0
182.0
182.0
210.0
182.0
210.0
210.0
210.0
182.0
182.0
185.0
182.0
185.0
182.0
182.0
185.0
182.0
185.0
185.0
182.0
185.0
182.0
182.0
185.0
182.0
185.0
185.0
185.0
182.0
182.0
35.0
20.0
35.0
20.0
20.0
35.0
20.0
35.0
35.0
20.0
35.0
20.0
20.0
35.0
20.0
35.0
35.0
35.0
20.0
20.0
250
3000
3000
3000
3000
250
250
3000
3000
250
250
3000
3000
3000
250
Pack Materials-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
19-Feb-2022
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TPS62826DMQT
TPS62827ADMQR
TPS62827DMQR
TPS62827DMQR
TPS62827DMQT
VSON-HR
VSON-HR
VSON-HR
VSON-HR
VSON-HR
DMQ
DMQ
DMQ
DMQ
DMQ
6
6
6
6
6
250
3000
3000
3000
250
210.0
210.0
210.0
182.0
182.0
185.0
185.0
185.0
182.0
182.0
35.0
35.0
35.0
20.0
20.0
Pack Materials-Page 4
PACKAGE OUTLINE
DMQ0006A
VSON - 1 mm max height
SCALE 6.000
PLASTIC SMALL OUTLINE - NO LEAD
1.55
1.45
A
B
PIN 1 INDEX AREA
1.55
1.45
1 MAX
C
SEATING PLANE
0.08 C
(0.2) MIN
(0.2) TYP
0.05
0.00
0.5
3X
0.3
3
4
4X 0.5
2X
1
6
1
0.3
3X
0.25
0.15
3X
0.2
0.9
3X
0.1
C A B
C
0.1
C A B
C
0.7
0.05
0.05
4222645/C 10/2020
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
www.ti.com
EXAMPLE BOARD LAYOUT
DMQ0006A
VSON - 1 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
3X (1)
3X (0.6)
3X (0.2)
SYMM
1
6
3X (0.25)
4X (0.5)
4
3
(R0.05) TYP
(0.65)
(0.45)
PKG
LAND PATTERN EXAMPLE
SCALE:30X
0.05 MIN
ALL AROUND
0.05 MAX
ALL AROUND
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
SOLDER MASK
OPENING
PADS 4-6
NON SOLDER MASK
DEFINED
PADS 1-3
SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4222645/C 10/2020
NOTES: (continued)
3. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271).
www.ti.com
EXAMPLE STENCIL DESIGN
DMQ0006A
VSON - 1 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
3X
EXPOSED METAL
3X (0.85)
3X (0.6)
3X (0.25)
3X (0.2)
1
6
SYMM
4X (0.5)
4
3
(R0.05) TYP
SOLDER MASK
OPENING
TYP
(0.65)
(0.525)
METAL UNDER
SOLDER MASK
TYP
PKG
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
PADS 4, 5 & 6:
81% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE
SCALE:30X
4222645/C 10/2020
NOTES: (continued)
4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
www.ti.com
IMPORTANT NOTICE AND DISCLAIMER
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE
DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”
AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
PARTY INTELLECTUAL PROPERTY RIGHTS.
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable
standards, and any other safety, security, regulatory or other requirements.
These resources are subject to change without notice. TI grants you permission to use these resources only for development of an
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TPS62825DMQT
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