TPS3806I33-Q1 [TI]
具有可调节迟滞功能的汽车类双电源轨电压检测器;
| 型号： | TPS3806I33-Q1 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 具有可调节迟滞功能的汽车类双电源轨电压检测器 |
| 文件： | 总15页 (文件大小：1167K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPS3806I33-Q1
www.ti.com.cn
ZHCSAZ1A –MARCH 2013–REVISED MARCH 2013
支持可调节滞后的双路电压检测器
查询样品: TPS3806I33-Q1
1
特性
说明
•
•
符合汽车应用要求
具有符合 AEC-Q100 的下列结果：
TPS3806I33-Q1 集成了 2 个独立的电压检测器用于电
池电压监控。 加电时，此器件在电源电压 VDD或
LSENSE 输入上的电压变为高于 0.8V 时将RESET
和RSTSENSE置为有效。此后，监控电路监视 VDD和
LSENSE，只要 VDD和 LSENSE 保持低于电压阀
值，VIT，就将RESET和RSTSENSE保持有效。 只要
–
–
–
器件温度 1 级：-40°C 至 125°C 的环境运行温
度范围
器件人体模型 (HBM) 静电放电 (ESD) 分类等级
H2
器件充电器件模型 (CDM) ESD 分类等级 C4B
•
具有可调滞后，3.3V 可调和 2V 可调的双路电压检
测器
V
DD或 LSENSE 上升到高于阀值电压 VIT，此器件分别
将RESET或RSTSENSE置为无效。 TPS3806I33-Q1
器件有一个固定感测阀值电压 VIT，此阀值电压由 VDD
上的一个内部分压器和一个可调第二 LSENSE 输入设
定。 此外，用户可在 HSENSE 上设置一个较高电压
阀值以实现一个宽泛可调
•
•
•
•
VDD=0.8V 时复位
电源电流：VDD=3.3V 时的典型值为 3µA
独立开漏复位输出
6 引脚小外形尺寸晶体管 (SOT)-23 封装
滞后窗口。
应用范围
此器件采用 6 引脚 SOT-23 封装。 TPS3806I33-Q1
器件的特点是可在 -40°C 至 125°C 的温度范围内运
行。
•
•
•
电压监控器
电压检测器
电池监控器
TPS3806I33-Q1
DBV PACKAGE
(TOP VIEW)
1
6
5
4
HSENSE
RSTSENSE
GND
2
3
LSENSE
VDD
RESET
R4
R5
V
DD
RESET
TPS3806I33-Q1
R1
R2
LSENSE
RSTSENSE
3.6 V
Li-lon
Cell
HSENSE
GND
R3
Typical Operating Circuit
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2013, Texas Instruments Incorporated
English Data Sheet: SLVSBW8
TPS3806I33-Q1
ZHCSAZ1A –MARCH 2013–REVISED MARCH 2013
www.ti.com.cn
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
Table 1. ORDERING INFORMATION(1)
TA
PACKAGE
QUANTITY
PART NUMBER
TOP-SIDE SYMBOL
STATUS
–40°C to
125°C
DBV (SOT-23)
Reel of 3000
TPS3806I33QDBVRQ1
PZHQ
Active
(1) For the most-current package and ordering information, see the Package Option Addendum located at the end of this data sheet or refer
to the TI Web site at www.ti.com.
TPS380
6
I
33 DBV R
Reel
Package
Nominal Supply Voltage
Nominal Threshold Voltage
Functionality
Family
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)(1)
TPS3806I33-Q1
UNIT
V
(2)
Supply voltage, VDD
7
All other pins(2)
–0.3 to 7
V
Maximum low-output current, IOL
Maximum high-output current, IOH
5
–5
mA
mA
mA
mA
°C
Input clamp current, IIK (VI < 0 or VI > VDD
)
±10
Output clamp current, IOK (VO < 0 or VO > VDD
Operating free-air temperature range, TA
Storage temperature range, Tstg
)
±10
–40 to 125
–65 to 150
2
°C
Human-body model (HBM) AEC-Q100
Classification Level H2
kV
Electrostatic discharge rating, ESD
Charged-device model (CDM) AEC-Q100
Classification Level C4B
750
V
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to GND. For reliable operation, the device must not be continuously operated at 7 V for more than
t = 1000 h.
2
Copyright © 2013, Texas Instruments Incorporated
TPS3806I33-Q1
www.ti.com.cn
ZHCSAZ1A –MARCH 2013–REVISED MARCH 2013
THERMAL INFORMATION
TPS3806I33-Q1
THERMAL METRIC(1)
DBV
6 PINS
188.9
130.9
34.2
UNIT
θJA
Junction-to-ambient thermal resistance(2)
Junction-to-case (top) thermal resistance(3)
Junction-to-board thermal resistance(4)
Junction-to-top characterization parameter(5)
Junction-to-board characterization parameter(6)
Junction-to-case (bottom) thermal resistance(7)
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
θJCtop
θJB
ψJT
25.4
ψJB
33.8
θJCbot
N/A
(1) 有关传统和新的热 度量的更多信息，请参阅IC 封装热度量应用报告， SPRA953。
(2) 在 JESD51-2a 描述的环境中，按照 JESD51-7 的指定，在一个 JEDEC 标准高 K 电路板上进行仿真，从而获得自然 对流条件下的结至环
境热阻。
(3) 通过在封装顶部模拟一个冷板测试来获得结至芯片外壳（顶部）的热阻。 不存在特定的 JEDEC 标准测试，但 可在 ANSI SEMI 标准 G30-
88 中能找到内容接近的说明。
(4) 按照 JESD51-8 中的说明，通过 在配有用于控制 PCB 温度的环形冷板夹具的环境中进行仿真，以获得结板热阻。
(5) 结至顶部特征参数， ψJT，估算真实系统中器件的结温，并使用 JESD51-2a（第 6 章和第 7 章）中 描述的程序从仿真数据中 提取出该参
数以便获得 θJA
(6) 结至电路板特征参数， ψJB，估算真实系统中器件的结温，并使用 JESD51-2a（第 6 章和第 7 章）中 描述的程序从仿真数据中 提取出该
参数以便获得 θJA
。
。
(7) 通过在外露（电源）焊盘上进行冷板测试仿真来获得 结至芯片外壳（底部）热阻。 不存在特定的 JEDEC 标准 测试，但可在 ANSI SEMI
标准 G30-88 中能找到内容接近的说明。
空白
RECOMMENDED OPERATING CONDITIONS
MIN
1.3
0
MAX
6
UNIT
V
Supply voltage, VDD
Input voltage, VI
VDD + 0.3
125
V
Operating free-air temperature range, TA
–40
°C
Copyright © 2013, Texas Instruments Incorporated
3
TPS3806I33-Q1
ZHCSAZ1A –MARCH 2013–REVISED MARCH 2013
www.ti.com.cn
ELECTRICAL CHARACTERISTICS
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VDD = 1.5 V, IOL = 1 mA
VDD = 3.3 V, IOL = 2 mA
VDD = 6 V, IOL = 3 mA
MIN
TYP
MAX
UNIT
V
VOL
Low-level output voltage
0.3
Power-up reset voltage(1)
V
DD ≥ 0.8 V, IOL = 50 µA
0.2
1.216
3.022
1.226
3.048
1.231
3.06
V
LSENSE
1.198 1.207
2.978
1.188 1.207
2.952
1.183 1.207
TA = 25°C
TPS3806I33-Q1
LSENSE
3
Negative-going
VIT
TA = 0°C to 70°C
TA = –40°C to 125°C
V
input threshold voltage(2)
TPS3806I33-Q1
LSENSE
3
TPS3806I33-Q1
2.94
3
60
90
1.2 V < VIT < 2.5 V
2.5 V < VIT < 3.5 V
Vhys Hysteresis
mV
II
Input current
LSENSE, HSENSE
–25
25
300
5
nA
nA
IOH
High-level output current
VDD = VIT + 0.2 V, VOH = VDD
VDD = 3.3 V, output unconnected
VDD = 6 V, output unconnected
VI = 0 V to VDD
3
4
1
IDD
Ci
Supply current
µA
pF
6
Input capacitance
(1) The lowest supply voltage at which RESET becomes active. tr,VDD ≥ 15 µs/V
(2) To ensure best stability of the threshold voltage, place a bypass capacitor (ceramic, 0.1 µF) near the supply terminals.
SWITCHING CHARACTERISTICS
at RL = 1 MΩ, CL = 50 pF, TA = –40°C to 125°C
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VDD to RESET delay
Propagation (delay) time,
high-to-low-level output
tPHL
5
100
µs
LSENSE to RSTSENSE delay
VDD to RESET delay
VIH = 1.05 x VIT,
VIL = 0.95 x VIT
Propagation (delay) time,
low-to-high-level output
tPLH
5
100
µs
HSENSE to RSTSENSE delay
TIMING REQUIREMENTS
at RL = 1 MΩ, CL = 50 pF, TA = –40°C to 125°C
PARAMETER
TEST CONDITIONS
VIH = 1.05 x VIT, VIL = 0.95 x VIT
MIN
5.5
TYP
MAX
UNIT
At VDD
tw
Pulse duration
µs
At SENSE
4
Copyright © 2013, Texas Instruments Incorporated
TPS3806I33-Q1
www.ti.com.cn
ZHCSAZ1A –MARCH 2013–REVISED MARCH 2013
V
DD
V
IT(HSENSE)
V
IT(LSENSE)
V ,V +V
IT DD hys
V (V
)
IT DD
0.8 V
RSTSENSE
RESET
= Undefined
Table 2. TERMINAL FUNCTIONS
TERMINAL
I/O
DESCRIPTION
NAME
NO.
2
GND
I
I
Ground
HSENSE
LSENSE
RESET
RSTSENSE
VDD
6
Adjustable hysteresis input
Adjustable sense input
5
I
3
O
O
I
Active-low open-drain reset output (from VDD
Active-low open-drain reset output (from LSENSE)
Input supply voltage and fixed sense input
)
1
4
FUNCTION AND TRUTH TABLE
TPS3806I33-Q1
VDD > VIT
RESET
LSENSE > VIT
RSTSENSE
0
1
L
0
1
L
H
H
Copyright © 2013, Texas Instruments Incorporated
5
TPS3806I33-Q1
ZHCSAZ1A –MARCH 2013–REVISED MARCH 2013
www.ti.com.cn
FUNCTIONAL BLOCK DIAGRAM
TPS3806
LSENSE
HSENSE
RSTSENSE
RESET
_
+
R1
_
V
DD
+
R2
GND
Reference
Voltage of
1.207 V
Detailed Description
Operation
The TPS3806I33-Q1 monitors battery voltage and asserts RESET when a battery becomes discharged below a
certain threshold voltage. A comparator monitors the battery voltage via an external resistor divider. When the
voltage at the LSENSE input drops below the internal reference voltage, the RSTSENSE output pulls low. The
output remains low until the battery is replaced, or recharged above a second higher trip-point, set at HSENSE.
One can monitor a second voltage at VDD. The independent RESET output pulls low when the voltage at VDD
drops below the fixed threshold voltage. Because the TPS3806I33-Q1 outputs are open-drain MOSFETs, most
applications may require a pullup resistor.
Programming the Threshold Voltage Levels
Calculate the low-voltage threshold at LSENSE according to Equation 1:
R1 ) R2 ) R3
refǒ
Ǔ
V
+ V
(LSENSE)
R2 R3
(1)
(2)
where Vref = 1.207 V
Calculate the high-voltage threshold at HSENSE as shown in Equation 2:
R1 ) R2 ) R3
refǒ
Ǔ
V
+ V
(HSENSE)
where Vref = 1.207 V
R3
To minimize battery current draw, TI recommends using 1 MΩ as the total resistor value R(tot), with
R(tot) = R1 + R2 + R3.
6
Copyright © 2013, Texas Instruments Incorporated
TPS3806I33-Q1
www.ti.com.cn
ZHCSAZ1A –MARCH 2013–REVISED MARCH 2013
TYPICAL CHARACTERISTICS
SUPPLY CURRENT
versus
SUPPLY VOLTAGE
LOW-LEVEL OUTPUT VOLTAGE
versus
LOW-LEVEL OUTPUT CURRENT
6
5
4
3
2
1
1.60
V
< V
(LSENSE)
(HSENSE)
V
V
= 1.5 V
DD
1.40
1.20
RESET = Open
RSTSENSE = Open
= Low
(SENSE)
85°C
1.00
0.80
0.60
0.40
0.20
0
25°C
0°C
85°C
25°C
−40°C
0°C
−40°C
0
0
0.5
1
1.5
V
2
2.5
3
3.5
4
4.5
5
5.5
6
0
1
2
3
4
5
− Supply Voltage − V
I
− Low-Level Output Current − mA
DD
OL
Figure 1.
Figure 2.
LOW-LEVEL OUTPUT VOLTAGE
versus
LOW-LEVEL OUTPUT CURRENT
LOW-LEVEL OUTPUT VOLTAGE
versus
LOW-LEVEL OUTPUT CURRENT
0.50
0.45
3.5
3
V
= 1.5 V
= Low
V
V
= 6 V
DD
DD
V
= Low
(SENSE)
(SENSE)
0.40
0.35
85°C
85°C
2.5
2
25°C
0°C
25°C
0°C
0.30
0.25
0.20
0.15
−40°C
−40°C
1.5
1
0.5
0
0.10
0.05
Expanded View
0
0
0.5
1
1.5
2
2.5
3
0
5
10 15 20 25 30 35 40 45 50
I
− Low-Level Output Current − mA
I
− Low-Level Output Current − mA
OL
OL
Figure 3.
Figure 4.
Copyright © 2013, Texas Instruments Incorporated
7
TPS3806I33-Q1
ZHCSAZ1A –MARCH 2013–REVISED MARCH 2013
www.ti.com.cn
TYPICAL CHARACTERISTICS (continued)
LOW-LEVEL OUTPUT VOLTAGE
versus
LOW-LEVEL OUTPUT CURRENT
NORMALIZED INPUT THRESHOLD VOLTAGE
versus
FREE-AIR TEMPERATURE AT VDD
1
0.9
0.8
0.7
0.6
V
V
= 6 V
DD
1.005
1.004
= Low
(SENSE)
RESET = 100 kΩ to V
DD
85°C
25°C
0°C
1.003
1.002
1.001
1
−40°C
0.5
0.4
0.3
0.999
0.998
0.997
0.996
0.995
0.2
Expanded View
0.1
0
0
2
4
6
8
10 12 14 16 18 20
−40
−20
0
20
40
60
80
I
− Low-Level Output Current − mA
OL
T
A
− Free-Air Temperature at V − °C
DD
Figure 5.
Figure 6.
MINIMUM PULSE DURATION AT VDD
versus
VDD THRESHOLD OVERDRIVE VOLTAGE
MINIMUM PULSE DURATION AT LSENSE
versus
LSENSE THRESHOLD OVERDRIVE VOLTAGE
10
9
8
7
6
5
4
3
2
1
0
10
9
8
7
6
5
4
3
2
1
0
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
1
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
1
V
DD
− Threshold Overdrive Voltage − V
LSENSE − Threshold Overdrive Voltage − V
Figure 7.
Figure 8.
8
Copyright © 2013, Texas Instruments Incorporated
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TPS3806I33QDBVRQ1
ACTIVE
SOT-23
DBV
6
3000 RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
PZHQ
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
24-Apr-2020
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPS3806I33QDBVRQ1 SOT-23
DBV
6
3000
178.0
9.0
3.23
3.17
1.37
4.0
8.0
Q3
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
24-Apr-2020
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SOT-23 DBV
SPQ
Length (mm) Width (mm) Height (mm)
180.0 180.0 18.0
TPS3806I33QDBVRQ1
6
3000
Pack Materials-Page 2
PACKAGE OUTLINE
DBV0006A
SOT-23 - 1.45 mm max height
S
C
A
L
E
4
.
0
0
0
SMALL OUTLINE TRANSISTOR
C
3.0
2.6
0.1 C
1.75
1.45
B
1.45 MAX
A
PIN 1
INDEX AREA
1
2
6
5
2X 0.95
1.9
3.05
2.75
4
3
0.50
6X
0.25
C A B
0.15
0.00
0.2
(1.1)
TYP
0.25
GAGE PLANE
0.22
0.08
TYP
8
TYP
0
0.6
0.3
TYP
SEATING PLANE
4214840/C 06/2021
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Body dimensions do not include mold flash or protrusion. Mold flash and protrusion shall not exceed 0.25 per side.
4. Leads 1,2,3 may be wider than leads 4,5,6 for package orientation.
5. Refernce JEDEC MO-178.
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EXAMPLE BOARD LAYOUT
DBV0006A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
6X (1.1)
1
6X (0.6)
6
SYMM
5
2
3
2X (0.95)
4
(R0.05) TYP
(2.6)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:15X
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
EXPOSED METAL
EXPOSED METAL
0.07 MIN
ARROUND
0.07 MAX
ARROUND
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4214840/C 06/2021
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
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EXAMPLE STENCIL DESIGN
DBV0006A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
6X (1.1)
1
6X (0.6)
6
SYMM
5
2
3
2X(0.95)
4
(R0.05) TYP
(2.6)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:15X
4214840/C 06/2021
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
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