TPS281C30 [TI]
可耐受 60V 电压、30mΩ、6A 单通道高侧开关;型号: | TPS281C30 |
厂家: | TEXAS INSTRUMENTS |
描述: | 可耐受 60V 电压、30mΩ、6A 单通道高侧开关 开关 |
文件: | 总54页 (文件大小:2970K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
TPS281C30
SLVSGD3A – DECEMBER 2022 – REVISED JUNE 2023
TPS281C30x, 60-V Tolerant, 30-mΩ, Single-Channel Smart High-Side Switch
1 Features
3 Description
•
•
•
•
Wide operating voltage range: 6 V to 36 V
64-V DC tolerance when disabled
Low RON: 30-mΩ typ, 55-mΩ max
Improve system level reliability through adjustable
current limiting
– Version A: 1 A to 5 A (fixed 0.5 A)
– Version B: 2 A to 10 A (fixed 0.5 A)
Accurate current sensing
– ±4% at 1 A in standard sense mode
– ±12.5% at 6 mA in high accuracy sense mode
Integrated inductive discharge clamp > 65 V
Low standby current of < 0.5 µA
Low quiescent current (Iq) of < 1.5 mA
Functional safety capable
TPS281C30x is a single channel smart high-side
switch designed to meet the requirements of industrial
control systems. The low RON (30 mΩ) minimizes
device power dissipation, driving a wide range of
output load current up to 6-A DC and the 64-V DC
tolerance improves system robustness.
The device integrates protection features such as
thermal shut down, output clamp, and current limit.
These features improve system robustness during
fault events such as short circuit. TPS281C30x
implements an adjustable current limiting circuit that
improves the reliability of the system by reducing
inrush current when driving large capacitive loads
and minimizing overload current. In order to drive
high inrush current loads such as lamps or fast
charging capacitive loads, TPS281C30x implements
an inrush current time period with a higher level of
allowed current. The device also provides an accurate
load current sense that allows for improved load
diagnostics such as overload and open-load detection
enabling better predictive maintenance.
•
•
•
•
•
•
•
Operating junction temperature: –40 to 125°C
Input control: 1.8-V, 3.3-V, and 5-V logic
compatible
Integrated fault sense voltage scaling for ADC
protection
•
•
•
•
•
Open-load detection in off-state
Thermal shutdown and swing detection
14-pin thermally-enhanced TSSOP package
20-pin thermally-enhanced QFN package
TPS281C30x is available in a small 14-pin, 4.4-mm
× 5-mm HTSSOP leaded package with 0.65-mm pin
pitch and 20-pin, 5-mm × 5-mm QFN with 0.65-mm
pin pitch minimizing the PCB footprint.
2 Applications
•
•
•
•
Digital output module
Safe torque off (STO)
Holding brake
General resistive, inductive, and capacitive loads
Package Information
PART NUMBER
PACKAGE(1)
PCB SIZE (NOM)
5.00 mm × 5.00 mm
5.00 mm × 6.40 mm
QFN (20)
HTSSOP (14)
TPS281C30x
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
VS
+24V Field VS
D1*
Cin
Off-State
Open
Load
Detection
EN
Gate
Driver
VOUT
Cout
D2*
FAULT
Current Limit
DIAG_EN
To Inductive,
Capacitive and
Resistive Load
ILIM
Thermal
Shutdown
OL_ON
SNS
Current Sense
GND
RSNS
RILIM
*TVS for Surge Suppression Only
Typical Application Schematic
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS281C30
SLVSGD3A – DECEMBER 2022 – REVISED JUNE 2023
www.ti.com
Table of Contents
1 Features............................................................................1
2 Applications.....................................................................1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Device Comparison Table...............................................3
6 Pin Configuration and Functions...................................4
7 Specifications.................................................................. 5
7.1 Absolute Maximum Ratings........................................ 5
7.2 ESD Ratings............................................................... 5
7.3 Recommended Operating Conditions.........................5
7.4 Thermal Information....................................................6
7.5 Thermal Information....................................................6
7.6 Electrical Characteristics.............................................6
7.7 SNS Timing Characteristics...................................... 10
7.8 Switching Characteristics..........................................11
7.9 Typical Characteristics..............................................13
8 Parameter Measurement Information..........................16
9 Detailed Description......................................................18
9.1 Overview...................................................................18
9.2 Functional Block Diagram.........................................19
9.3 Device Functional Modes..........................................20
9.4 Feature Description...................................................21
10 Application and Implementation................................40
10.1 Application Information........................................... 40
10.2 Typical Application.................................................. 40
10.3 Power Supply Recommendations...........................42
10.4 Layout..................................................................... 42
11 Device and Documentation Support..........................46
11.1 Receiving Notification of Documentation Updates..46
11.2 Support Resources................................................. 46
11.3 Trademarks............................................................. 46
11.4 Electrostatic Discharge Caution..............................46
11.5 Glossary..................................................................46
12 Mechanical, Packaging, and Orderable
Information.................................................................... 46
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision * (December 2022) to Revision A (June 2023)
Page
•
Updated device status from preview to production data ....................................................................................1
Copyright © 2023 Texas Instruments Incorporated
2
Submit Document Feedback
Product Folder Links: TPS281C30
TPS281C30
SLVSGD3A – DECEMBER 2022 – REVISED JUNE 2023
www.ti.com
5 Device Comparison Table
Table 5-1. Device Options
INTEGRATED CLAMP FOR
DEVICE VERSION
PART NUMBER
CURRENT LIMIT RANGE
INDUCTIVE LOADS
A
B
C
D
TPS281C30A(1)
TPS281C30B(1)
TPS281C30C(1)
TPS281C30D(1)
1 A to 5 A
2 A to 10 A
1 A to 5 A
2 A to 10 A
Yes
Yes
No
No
(1) Devices available in RGW package now. PWP package in previews. Contact TI for additional information.
Copyright © 2023 Texas Instruments Incorporated
Submit Document Feedback
3
Product Folder Links: TPS281C30
TPS281C30
SLVSGD3A – DECEMBER 2022 – REVISED JUNE 2023
www.ti.com
6 Pin Configuration and Functions
14
13
GND
EN
1
2
3
4
VS
VS
VS
20 19 18 17 16
15
DIAG_EN
12
11
10
9
ILIM
NC
1
2
3
4
5
EN
NC
Thermal
Pad
FAULT
OL_ON
SNS
NC
14
13
12
11
Thermal
Pad
5
6
7
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VS
VS
8
ILIM
VS
10
6
7
8
9
Figure 6-1. PWP Package, 14-Pin HTSSOP (Top
View)
Figure 6-2. RGW Package, 20-Pin QFN (Top View)
Table 6-1. Pin Functions
PIN
TYPE
DESCRIPTION
NAME
GND
PWP
RGW
18
Ground of device. Connect to resistor- diode ground
network to have reverse polarity protection.
1
2
3
4
5
Power
EN
15
I
I
Input control for channel activation. Internal pulldown.
Enable-disable pin for diagnostics and current sensing.
Internal pulldown.
DIAG_EN
FAULT
OL_ON
16
17
O
I
Open drain global fault output. Referred to FLT, or fault pin.
Enable-disable pin for higher resolution current sense(Only
available when IOUT< IKsns2_EN). Internal pulldown.
19
Analog current output corresponding to load current.
Connect a resistor to GND to convert to voltage.
SNS
ILIM
6
7
20
1
O
O
Adjustable current limit. Connect a resistor to set the
current limit. Optionally short to ground or leave pin floating
to set the current limit to the default internal current limit.
See the electrical characteristics for more information.
NC
11
2, 7, 8, 9, 14
3, 4, 5, 6
N/A
Power
Power
—
No internal connection.
VOUT
VS
8, 9, 10
Output of high side switch, connect to load.
Power supply input.
12, 13, 14
Thermal Pad
10, 11, 12, 13
Pad
Pad
Thermal pad, internally shorted to ground.
Recommended Connection for Unused Pins
TPS281C30x is designed to provide an enhanced set of diagnostic and protection features. However, if the
system design only allows for a limited number of I/O connections, some pins may be considered as optional.
Table 6-2. Connections for Optional Pins
PIN NAME
CONNECTION IF NOT USED
IMPACT IF NOT USED
SNS
Ground through 10-kΩ resistor
Analog sense is not available.
If the ILIM pin is left floating, the device will be set to the default internal
current-limit threshold. This is considered a fault state for the device.
ILIM
Float
Float
If the FAULT pin is unused, the system cannot read faults from the
output.
FAULT
With DIAG_EN unused, the analog sense, open-load, and short-to-
supply diagnostics are not available.
DIAG_EN
OL_ON
Float or ground through RPROT resistor
Ground through RPROT resistor
With OL_ON unused, the high accuracy sense mode is not available.
Copyright © 2023 Texas Instruments Incorporated
4
Submit Document Feedback
Product Folder Links: TPS281C30
TPS281C30
SLVSGD3A – DECEMBER 2022 – REVISED JUNE 2023
www.ti.com
7 Specifications
7.1 Absolute Maximum Ratings
Over operating free-air temperature range (unless otherwise noted)(1)
MIN
-0.7
-60
-0.7
-0.7
-60
-0.7
–1
MAX
64
64
81
81
81
81
6
UNIT
V
Continuous supply voltage, VS with respect to IC GND: Version A, B
Continuous supply voltage, VOUT with respect to IC GND: Version A, B
Transient (< 100 us) voltage at the supply pin, VS with respect to IC GND: Version A, B
Continuous supply voltage, VS with respect to IC GND: Version C, D
Continuous supply voltage, VOUT with respect to IC GND: Version C, D
Continuous voltage across the VS and VOUT pins (VS - VOUT ): Version C, D
Enable pin voltage, VEN
V
V
V
V
V
V
OL_ON pin voltage, VOL_ON
–1
6
V
DIAG_EN pin voltage, VDIAG_EN
–1
6
V
Sense pin voltage, VSNS
–1
6
V
FAULT pin voltage, VFAULT
–1
6
V
Reverse ground current, IGND
Maximum junction temperature, TJ
Storage temperature, Tstg
VS < 0 V
–50
150
150
mA
°C
°C
–65
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress
ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under
Recommended Operating Conditions. Exposure to absolute maximum rated conditions for extended periods may affect device
reliability.
7.2 ESD Ratings
VALUE
UNIT
Human body model (HBM), per
ANSI/ESDA/JEDEC JS-001(1)
All pins except VS and VOUT
±2000
V
V
V
V
V
Electrostatic
discharge
Human body model (HBM), per
ANSI/ESDA/JEDEC JS-001(1)
VS and VOUT with respect to
GND
VESD
±4000
±750
Charged device model (CDM), per JEDEC
specification JESD22-C101, all pins(2)
All pins
Electrostatic
discharge
V(ESD4)
V(surge)
Contact discharge, per IEC 61000-4-2 (3)
VS and VOUT
VS and VOUT
±8000
±1000
Electrostatic
discharge
Surge protection with 42 Ω, per IEC 61000-4-5;
1.2/50 μs (3)
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
(3) Tested with application circuit and supply voltage (VS) of 24-V, ENx pins High (Output Enabled) and and EN pins Low (Outputs
Disabled)
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted) (1)
MIN
6.0
6.0
–1
MAX
36
UNIT
VS_OP_NOM
VS_OP_MAX
VEN
Nominal supply voltage(1)
Extended operating voltage(2)
Enable voltage
V
V
V
V
V
V
48
5.5
5.5
5.5
5.5
VOL_ON
OL_ON pin voltage, VOL_ON
Diagnostic Enable voltage
FAULT pin voltage
–1
VDIAG_EN
VFAULT
–1
–1
Copyright © 2023 Texas Instruments Incorporated
Submit Document Feedback
5
Product Folder Links: TPS281C30
TPS281C30
SLVSGD3A – DECEMBER 2022 – REVISED JUNE 2023
www.ti.com
7.3 Recommended Operating Conditions (continued)
over operating free-air temperature range (unless otherwise noted) (1)
MIN
–1
MAX
5.5
UNIT
V
VSNS
TA
Sense voltage
Operating free-air temperature
–40
125
°C
(1) All operating voltage conditions are measured with respect to device GND
(2) Device will function within extended operating range, however some parametric values might not apply
7.4 Thermal Information
TPS1HTC30
THERMAL METRIC
PWP (HTSSOP)
UNIT
14 PINS
31.5
23.8
7.4
RθJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJC(top)
RθJB
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
0.2
ψJB
7.3
RθJC(bot)
1.5
7.5 Thermal Information
TPS281C30x
PWP (HTSSOP)
THERMAL METRIC(1) (2)
RGW (QFN)
20 PINS
28.9
UNIT
14 PINS
31.5
23.8
7.4
RθJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJC(top)
RθJB
19.7
7.5
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
0.2
0.2
ψJB
7.5
7.3
RθJC(bot)
0.8
1.5
(1) For more information about traditional and new thermal metrics, see the SPRA953 application report.
(2) The thermal parameters are based on a 4-layer PCB according to the JESD51-5 and JESD51-7 standards.
7.6 Electrical Characteristics
VS = 6 V to 36 V, TJ = -40°C to 125°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
6
MAX
UNIT
A
VS SUPPLY VOLTAGE AND CURRENT
ILNOM
Continuous load current VEN = HI
TAMB = 85°C
Total device standby
current (including
MOSFET) with
VS ≤ 36 V, VEN
VDIAG_EN = LO, VOUT = 0 TJ = -40°C to 85°C
V
=
0.25
0.7
6
µA
diagnostics disabled
ISTBY, VS
Total device standby
current (including
MOSFET) with
VS ≤ 36 V, VEN
=
VDIAG_EN = LO, VOUT = 0 TJ = 150°C
V
0.63
µA
diagnostics disabled
ISTBY,
VS standby current with
diagnostics enabled
VS ≤ 36 V, VEN = LO, VDIAG_EN = HI, VOUT = 0 V
VEN = HI, VDIAG_EN = LO IOUT = 0A
1.2
1.5
1.3
mA
mA
VS_DIAG
VS quiescent current with
diagnostics disabled
IQ, VS
0.98
Copyright © 2023 Texas Instruments Incorporated
6
Submit Document Feedback
Product Folder Links: TPS281C30
TPS281C30
SLVSGD3A – DECEMBER 2022 – REVISED JUNE 2023
www.ti.com
7.6 Electrical Characteristics (continued)
VS = 6 V to 36 V, TJ = -40°C to 125°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
1.0
20
MAX
UNIT
VS quiescent current with
diagnostics enabled
IQ, VS_DIAG
tSTBY
VENx = HI, VDIAG_EN = HI IOUT = 0A
1.5
mA
Standby mode delay time VEN = VDIAG_EN = 0 V to standby
ms
µA
VS ≤ 36 V,
TJ = 85°C
TJ = 125°C
0.4
6
IOUT(OFF)
Output leakage current
VEN = VDIAG_EN = 0 V,
VOUT = 0 V
0.5
µA
VS UNDERVOLTAGE LOCKOUT (UVLO) INPUT
VS undervoltage lockout
rising
VS,UVLOR
VS,UVLOF
Measured with respect to the GND pin of the device
Measured with respect to the GND pin of the device
5.0
4.1
5.4
4.5
5.75
4.85
V
V
VS undervoltage lockout
falling
VS OVERVOLTAGE LOCKOUT (OVLO) INPUT
VS overvoltage protection Measured with respect to the GND pin of the device,
rising VEN = 5V
VS,OVPR
VS,OVPF
VS,OVPH
51
49
54
52
57
56
V
V
VS overvoltage protection Measured with respect to the GND pin of the device,
recovery falling VEN = 5V
VS overvoltage protection Measured with respect to the GND pin of the device,
1.5
100
V
threshold hysteresis
VEN = 5V
VS overvoltage protection
deglitch time
tVS,OVP
Time from triggering the OVP fault to FET turn-off
80
140
µs
VDS CLAMP
VS = 24 V
VS = 6 V
65
48
72.5
53
80
58
V
V
Version A, B FET current
= 10 mA
VDS,Clamp
VDS clamp voltage
RON CHARACTERISTICS
B,D = 0.5A ≤ IOUT ≤ 6A,
A,C = 0.5A ≤ IOUT ≤ 3A
VS = 24V
TJ = 25°C
29
mΩ
mΩ
VS to VOUT On-
resistance
RON
TJ = 125°C
55
60
B,D = 0.5A ≤ IOUT ≤ 6A,
A,C = 0.5A ≤ IOUT ≤ 3A
VS = -24V
On-resistance during
RON(REV)
TJ = -40°C to 125°C
TJ = -40°C to 125°C
30
mΩ
Ω
reverse polarity
VS to VOUT On-
RON_AUXFE resistance
VS = 24V, IOUT = 40 mA
OL_ON=DIAG_EN=5V
5.2
12
High Accuracy Sense
T
Mode
CURRENT LIMIT CHARACTERISTICS
KCL
KCL
Current Limit Ratio
Current Limit Ratio
Device Version A, C
Device Version B, D
Device Version A, C
RILIM = 10kΩ to 50kΩ
RILIM = 10kΩ to 50kΩ
RILIM = 10kΩ to 50kΩ
40
80
50
100
60 A * kΩ
120 A * kΩ
Peak current prior to
regulation when switch is
enabled
2x ICL
6.5
14
A
A
ILIM_STARTU
P
Device Version B, D
RILIM = 10kΩ to 50kΩ
2x ICL
Peak current delay time
prior to regulation when
switch is enabled
ILIM_STARTU
12
ms
P_DELAY
RILIM = 50 kΩ
RILIM = 25 kΩ
RILIM = 16.7 kΩ
RILIM = 12.5 kΩ
RILIM = 10 kΩ
0.8
1.8
2.7
3.6
4.5
1
2
3
4
5
1.2
2.2
3.3
4.4
5.5
A
A
A
A
A
Device Version A, C
Short circuit condition
ICL
Current Limit level
RILIM = GND, open, or
out of range(<9kΩ, and
>100kΩ)
0.5
0.8
A
Copyright © 2023 Texas Instruments Incorporated
Submit Document Feedback
7
Product Folder Links: TPS281C30
TPS281C30
SLVSGD3A – DECEMBER 2022 – REVISED JUNE 2023
www.ti.com
7.6 Electrical Characteristics (continued)
VS = 6 V to 36 V, TJ = -40°C to 125°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
1.85
3.7
5.6
7.2
9
TYP
2
MAX
2.5
4.6
6.6
8.8
11
UNIT
RILIM = 50 kΩ
RILIM = 25 kΩ
RILIM = 16.7 kΩ
RILIM = 12.5 kΩ
RILIM = 10 kΩ
A
A
A
A
A
4
6
Device Version B, D
Short circuit condition
8
ICL
Current Limit level
10
RILIM = GND, open, or
out of range(<9kΩ, and
>100kΩ)
0.2
0.5
1
A
Overcurrent Limit
Threshold(1)
ICL_LINPK
IILIM_ENPS
IILIM_ENPS2 Peak current enabling into permanent short
Overload condition
RILIM = 10 kΩ to 50kΩ
RILIM = 10 kΩ
1.3x ICL
2x ICL
A
A
Peak current enabling into permanent short
2x
RILIM = 10kΩ,
t<ILIM_STARTUP_DELAY
ILIM_START
A
UP
Rising
37
0
40
2
43
V
V
VILIM_OVP
ILIM Switchover threshold during overvoltage
ILIM Current Limit
Hysteresis
IILIM_OVP
threshold during
overvoltage
Overload condition
RILIM = X, VVS ≥ VILIM_OVP
0.552
0.5
1.5
A
μs
A
Short circuit response
time
tIOS
VS = 24V
ILIM Current Limitation
threshold during
overvoltage
IILIM_OVERV
Overload condition when RILIM = X, 48V ≥ VVS ≥
5.25
195
VS > 36V(1)
36V
OLTAGE
THERMAL SHUTDOWN CHARACTERISTICS
TABS
TREL
Thermal shutdown
175
1.5
185
77
°C
°C
Relative thermal
shutdown
Time from fault shutdown until switch re-enable
(thermal shutdown).
tRETRY
Fault
Retry time
2.1
Auto-retry
10
3
ms
Fault reponse to Thermal
Response Shutdown
Absolute Thermal
shutdown hysteresis
THYS
°C
A
FAULT PIN CHARACTERISTICS
ICL Current Limit Fault
ICL_FAULT_R
VDIAG_EN = 5 V, VOL_ON
0 V
=
=
Rising
Falling
0.90xICL 0.95xICL
0.85xICL 0.90xICL
Assertion Threshold
ICL Fault De-Assertion
ICL_FAULT_F
VDIAG_EN = 5 V, VOL_ON
0 V
A
V
Threshold
VFAULT
FAULT low output voltage IFAULT = 2.5 mA
0.5
12
75
95
tFAULT_BLAN Fault blanking time
VDIAG_EN = 5 V, VEN = 0
to 5 V
ms
µs
µs
during startup
KING
tFAULT_FLT Fault indication-time
tFAULT_SNS Fault indication-time
Time between fault and FAULT asserting
VDIAG_EN = 5 V
Time between fault and ISNS settling at VSNSFH
CURRENT SENSE CHARACTERISTICS
Load current supported
IKSNS2_EN
to enable KSNS2 when in VEN = VDIAG_EN = 5 V, VOL_ON = GND
KSNS1 Mode
42
50
70
mA
Copyright © 2023 Texas Instruments Incorporated
8
Submit Document Feedback
Product Folder Links: TPS281C30
TPS281C30
SLVSGD3A – DECEMBER 2022 – REVISED JUNE 2023
www.ti.com
7.6 Electrical Characteristics (continued)
VS = 6 V to 36 V, TJ = -40°C to 125°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Load current to disable
IKSNS2_DIS KSNS2 when in KSNS2 VEN = VDIAG_EN = 5 V, VOL_ON = GND
Mode
75
85
105
mA
Current sense ratio -
KSNS
Standard Sensing
IOUT / ISNS
IOUT = 2 A, VOL_ON = GND
IOUT = 30mA, VOL_ON = 5V
1300
A/A
A/A
Current sense ratio -
High Accuracy Sensing
IOUT / ISNS
KSNS2
24.6
5.38
mA
%
IOUT = 7A
-6
-6
6
6
4.61
3.0
mA
%
IOUT = 6 A
mA
%
IOUT = 4 A
–4
4
1.533
0.764
0.380
0.150
0.073
0.034
1.62
mA
%
IOUT = 2 A
–4
4
mA
%
Current sense current
and accuracy
VEN = VDIAG_EN = 5
V, VOL_ON = GND
ISNS
IOUT = 1 A
–4
4
mA
%
IOUT = 500 mA
IOUT = 200 mA
IOUT = 100 mA
IOUT = 50 mA
IOUT = 40 mA
IOUT = 20 mA
IOUT = 10 mA
IOUT = 4 mA
IOUT = 2 mA
IOUT = 1 mA
-6
6
mA
%
-10
-15
-25
-6
10
15
25
6
mA
%
mA
%
mA
%
0.833
0.404
0.161
0.0800
0.0395
mA
%
-6
6
mA
%
Current sense current
and accuracy for high
accuracy sense mode
-10
-12.5
-15
-20
10
12.5
15
20
VEN = VDIAG_EN = 5
V, VOL_ON = 5V
ISNS2
mA
%
mA
%
mA
%
SNS PIN CHARACTERISTICS
VDIAG_EN = 5 V
4.5
3.5
2.8
5.8
5
3.95
3.66
6.4
5.77
4.2
V
V
VSNSFH
VSNS fault high-level
VDIAG_EN = 3.3 V, RSNS=Open
VDIAG_EN = VIH
3.8
V
ISNSFLT
ISNSleak
ISNS fault high-level
ISNS leakage
VDIAG_EN > VIH,DIAG_EN
VDIAG_EN = 5 V, IL = 0 mA
mA
µA
1.3
Copyright © 2023 Texas Instruments Incorporated
Submit Document Feedback
9
Product Folder Links: TPS281C30
TPS281C30
SLVSGD3A – DECEMBER 2022 – REVISED JUNE 2023
www.ti.com
7.6 Electrical Characteristics (continued)
VS = 6 V to 36 V, TJ = -40°C to 125°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VS headroom needed for VDIAG_EN = 3.3V
full current sense and
fault functionality
5.8
V
VS_ISNS
VDIAG_EN = 5V
6.5
V
OPEN LOAD DETECTION CHARACTERISTICS
OFF state open-load
(OL) detection voltage
VOL_OFF
VEN = 0 V, VDIAG_EN = 5 V
1.5
2
2.5
V
OFF state open-load
(OL) detection internal
pull-up resistor
ROL_OFF
VEN = 0 V, VDIAG_EN = 5 V
120
150
180
kΩ
OFF state open-load
(OL) detection deglitch
time
VEN = 0 V, VDIAG_EN = 5 V, When Vs – VOUT < VOL
duration longer than tOL. Open load detected.
,
tOL_OFF
480
310
700
µs
OL_OFF and STB
indication-time from EN
falling
VEN = 5 V to 0 V, VDIAG_EN = 5 V
IOUT = 0 mA, VOUT = Vs - VOL
tOL_OFF_1
700
700
µs
µs
OL and STB indication-
time from DIA_EN rising IOUT = 0 mA, VOUT = VS - VOL
VEN = 0 V, VDIAG_EN = 0 V to 5 V
tOL_OFF_2
OL_ON PIN CHARACTERISTICS
VIL, OL_ON Input voltage low-level
VIH, OL_ON Input voltage high-level
0.8
V
V
1.5
VIHYS,
Input voltage hysteresis
282
1
mV
OL_ON
ROL_ON
Internal pulldown resistor
Input current low-level
Input current low-level
Input current high-level
0.7
–25
0.6
3
1.3
0
MΩ
µA
µA
µA
IIL_OL_ON
IIL, OL_ON
IIH, OL_ON
VOL_ON = -1 V
VOL_ON = 0.8 V
VOL_ON = 5 V
.8
5
1.2
7
DIAG_EN PIN CHARACTERISTICS
VIL, DIAG_EN Input voltage low-level
VIH, DIAG_EN Input voltage high-level
No GND Network
No GND Network
0.8
V
V
1.5
VIHYS,
Input voltage hysteresis
270
mV
DIAG_EN
RDIAG_EN
Internal pulldown resistor
200
350
0.8
14
500
kΩ
µA
µA
IIL, DIAG_EN Input current low-level
IIH, DIAG_EN Input current high-level
EN PIN CHARACTERISTICS
VDIAG_EN = 0.8 V, VEN=0V
VDIAG_EN = 5 V
VIL, EN
VIH, EN
VIHYS, EN
REN
Input voltage low-level
Input voltage high-level
Input voltage hysteresis
Internal pulldown resistor
Input current low-level
Input current high-level
No GND Network
No GND Network
0.8
V
V
1.5
280
350
2.2
14
mV
kΩ
µA
µA
200
500
IIL, EN
VEN = 0.8 V
VEN = 5 V
IIH, EN
(1) The maximum current output under overload condition before current limit regulation
7.7 SNS Timing Characteristics
VS = 6 V to 36 V, TJ = -40°C to 125°C(unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SNS TIMING - CURRENT SENSE
Copyright © 2023 Texas Instruments Incorporated
10
Submit Document Feedback
Product Folder Links: TPS281C30
TPS281C30
SLVSGD3A – DECEMBER 2022 – REVISED JUNE 2023
www.ti.com
7.7 SNS Timing Characteristics (continued)
VS = 6 V to 36 V, TJ = -40°C to 125°C(unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VEN= 5 V, VDIAG_EN = 0 V to 5
V, VOL_ON = 0 V ,
15
µs
RSNS = 1 kΩ, IL = 1A
Settling time from rising edge of DIAG_EN
50% of VDIAG_EN to 90% of settled ISNS
tSNSION1
VEN = 5 V, VDIAG_EN = 0 V to 5
V, VOL_ON = 0 V ,
80
µs
µs
RSNS = 1 kΩ, IL = 50 mA
Settling time from rising edge of EN and
DIAG_EN
50% of VDIAG_EN VEN to 90% of settled
ISNS
VEN = VDIAG_EN = 0 V to 5 V
VS = 24V RSNS = 1 kΩ, IL = 1A
tSNSION2
150
Settling time from rising edge of EN
50% of VEN to 90% of settled ISNS
VEN = 0 V to 5 V, VDIAG_EN = 5 V
RSNS = 1 kΩ, IL = 1A
tSNSION3
150
60
µs
µs
VOL_ON = 0 to 5V, VEN = VDIAG_EN = 5
V
RSNS = 1 kΩ, IL = 6mA
Settling time from rising edge of OL_ON
50% of VOL_ON to 90% of settled ISNS
tSNSION4
Settling time from falling edge of IL <
IKSNS2_EN to 90% of settled ISNS
VOL_ON = VEN = VDIAG_EN = 5 V
RSNS = 1 kΩ, IL = 100 mA to 10mA
tSNSION5
tSNSION6
60
60
30
20
µs
µs
µs
µs
Settling time from Rising edge of IL >
IKSNS2_DIS. to 90% of settled ISNS
VOL_ON = VEN = VDIAG_EN = 5 V
RSNS = 1 kΩ, IL = 10 mA to 100mA
tKSNS2_DIS_ Deglitch time for transition of IL >
VOL_ON = VEN = VDIAG_EN = 5 V
RSNS = 1 kΩ, IL = 10 mA to 100mA
IKSNS2_DIS.
DGL
VEN = 5 V, VDIAG_EN = 5 V to 0 V
RSNS = 1 kΩ, RL = 48 Ω
tSNSIOFF
Settling time from falling edge of DIAG_EN
Settling time from rising edge of load step
to 90% of setttled value of current sense
output
VEN = VDIAG_EN = 5 V
RSNS = 1 kΩ, IOUT = 0.5 A to 3 A
tSETTLEH
20
20
µs
µs
Settling time from output edge of load step
to 10% of setttled value of current sense
output
VEN = VDIAG_EN = 5 V
RSNS = 1 kΩ, IOUT = 3 A to 0.5 A
tSETTLEL
Time to indicate VSNSFH due to VS-
VOUT>2V.
From rising edge of EN, DIAG_EN and
OL_ON
50% of VDIA_EN VEN VOL_ONto 50% of rising
edge of VSNSFH
VDIAG_EN = VEN = VOL_ON = 0 V to 5 V
RSNS = 1 kΩ, IOUT = 5 mA
COUT =50uF
tTIMEOUT
245
µs
7.8 Switching Characteristics
VS = 24 V, TJ = -40 °C to +125 °C (unless otherwise noted), COUT = 22 nF
Parameter
Test Conditions
Min
Typ
Max
Unit
VS = 24 V, RL = 48 Ω 50% of EN to
20% of VOUT
tDR
tDR
tDF
Turnon delay time (from standby)
35
25
35
0.7
0.8
55
45
50
µs
Turnon delay time (from delay or
diagnostic)
VS = 24 V, RL = 48 Ω 50% of EN to
20% of VOUT
µs
µs
VS = 24 V, RL = 48 Ω 50% of EN to
80% of VOUT
Turnoff delay time
20
VS = 24 V, 20% to 80% of VOUT
RL = 48 Ω
,
SRR
VOUT rising slew rate
0.4
0.4
0.95
V/µs
VS = 24 V, 80% to 20% of VOUT
RL = 48 Ω
,
SRF
fmax
tON
VOUT falling slew rate
Maximum PWM frequency
Turnon time
1.2
1
V/µs
kHz
µs
VS = 24 V, RL = 48 Ω 50% of EN to
80% of VOUT
55
75
Copyright © 2023 Texas Instruments Incorporated
Submit Document Feedback
11
Product Folder Links: TPS281C30
TPS281C30
SLVSGD3A – DECEMBER 2022 – REVISED JUNE 2023
www.ti.com
7.8 Switching Characteristics (continued)
VS = 24 V, TJ = -40 °C to +125 °C (unless otherwise noted), COUT = 22 nF
Parameter
Test Conditions
Min
Typ
Max
Unit
VS = 24 V, RL = 48 Ω 50% of EN to
20% of VOUT
tOFF
Turnoff time
60
70
45
µs
1ms ON time switch enable
pulse Vs = 24 V, RL = 48 Ω
tON - tOFF
Turnon and off matching
–25
µs
µs
100-µs ON time switch enable
pulse, VOUT @80% of VS, VS = 24 50
V, RL = 48 Ω, F = fmax
tON_pw
ΔPWM
EON
Minimum VOUT ON pulse width
85
15
200-µs enable pulse, VS = 24 V, RL =
48 Ω
F = fmax
PWM accuracy - average load
current
-15
%
VS = 24 V, RL = 8 Ω, 1 ms pulse,
VOUT from 20% to 80% of VS
voltage
Switching energy losses during
turnon
0.5
mJ
mJ
VS = 24 V, RL = 8 Ω, 1 ms pulse,
VOUT from 20% to 80% of VS
voltage
Switching energy losses during
turnoff
EOFF
0.25
Copyright © 2023 Texas Instruments Incorporated
12
Submit Document Feedback
Product Folder Links: TPS281C30
TPS281C30
SLVSGD3A – DECEMBER 2022 – REVISED JUNE 2023
www.ti.com
7.9 Typical Characteristics
45
45
42.5
40
6.5 V
8.5 V
0.2 A
0.5 A
6 A
42.5
13.5 V
40
18 V
24 V
27.5 V
36 V
37.5
35
37.5
35
32.5
30
32.5
30
27.5
25
27.5
25
22.5
20
22.5
20
-40
-20
0
20
40
60
80
100 120 140
-40
-20
0
20
40
60
80
100 120 140
Temperature (C)
Temperature (C)
IOUT= 0. 2 A
VS = 24 V
Figure 7-1. On-Resistance (RON) vs Temperature vs VS Supply
Voltage
Figure 7-2. On-Resistance (RON) vs Temperature vs Load
Current
1
0.99
0.98
0.97
0.96
0.95
0.94
0.93
0.92
0.91
0.9
0.89
0.88
0.65
6.5 V
24 V
28 V
36 V
0.6
0.55
0.5
0.45
0.4
0.35
0.3
6.5 V
8.5 V
13.5 V
18 V
24 V
27.5 V
36 V
0.25
0.2
0.87
0.86
0.85
0.15
0.1
-40
-20
0
20
40
60
80
100 120 140
-40
-20
0
20
40
60
80
100 120 140
Temperature (C)
Temperature (C)
VEN = 5 V
VDIAG_EN = 0 V
VEN = 0 V
VDIAG_EN = 0 V
Figure 7-3. Quiescent Current (IQ, VS) From VS Input Supply vs
Temperature vs VS Voltage
Figure 7-4. Standby Current (ISTBY, VS) From VS Input Supply vs
Temperature vs VS Voltage
35.4
40
38
36
34
32
30
28
26
24
22
6.5 V
18 V
24 V
27.5 V
36 V
35.1
34.8
34.5
34.2
33.9
33.6
33.3
33
20
18
16
14
6.5 V
18 V
24 V
27.5 V
36 V
12
32.7
10
-40
-40
-20
0
20
40
60
80
100 120 140
-20
0
20
40
60
80
100 120 140
Temperature (C)
Temperature (C)
RL= 48 Ω
RL= 48 Ω
Figure 7-5. Turn-on Delay Time (tDR) vs Temperature vs VS
Voltage
Figure 7-6. Turn-off Delay Time (tDF) vs Temperature vs VS
Voltage
Copyright © 2023 Texas Instruments Incorporated
Submit Document Feedback
13
Product Folder Links: TPS281C30
TPS281C30
SLVSGD3A – DECEMBER 2022 – REVISED JUNE 2023
www.ti.com
7.9 Typical Characteristics (continued)
72
68
64
60
56
52
48
44
40
36
32
28
24
20
70
65
60
55
50
45
40
35
30
25
20
6.5 V
18 V
24 V
27.5 V
36 V
6.5 V
18 V
24 V
27.5 V
36 V
-40
-20
0
20
40
60
80
100 120 140
-40
-20
0
20
40
60
80
100 120 140
Temperature (C)
Temperature (C)
RL= 48 Ω
RL= 48 Ω
Figure 7-8. Turn-off Time (tOFF) vs Temperature vs VS Voltage
Figure 7-7. Turn-on Time (tON) vs Temperature vs VS Voltage
0.95
0.9
0.85
0.8
0.75
0.7
0.65
0.6
1
0.9
0.8
0.7
0.6
0.5
0.55
0.5
0.45
0.4
0.35
0.3
0.25
0.2
-40
18 V
24 V
27.5 V
36 V
0.4
0.3
0.2
18 V
24 V
27.5 V
36 V
-40
-20
0
20
40
60
80
100 120 140
-20
0
20
40
60
80
100 120 140
Temperature (C)
Temperature (C)
RL= 48 Ω
RL= 48 Ω
Figure 7-10. VOUT Rising Slew Rate (SRF) vs Temperature vs
VS Voltage
Figure 7-9. VOUT Rising Slew Rate (SRR) vs Temperature vs VS
Voltage
1480
1460
1440
25.9
25.7
25.5
25.3
25.1
24.9
24.7
24.5
24.3
IOUT
1 mA
2 mA
30 mA
40 mA
IOUT
0.1 A
0.2 A
1 A
2 A
4 A
6 A
7 A
1420
1400
1380
1360
1340
1320
1300
1280
-40
-20
0
20
40
60
80
100 120 140
-40
-20
0
20
40
60
80
100 120 140
Temperature (C)
Temperature (C)
VS = 24 V
VS = 24 V
Figure 7-12. Current Sense Ratio (KSNS2) vs Temperature vs
Load Current
Figure 7-11. Current Sense Ratio (KSNS1) vs Temperature vs
Load Current
Copyright © 2023 Texas Instruments Incorporated
14
Submit Document Feedback
Product Folder Links: TPS281C30
TPS281C30
SLVSGD3A – DECEMBER 2022 – REVISED JUNE 2023
www.ti.com
7.9 Typical Characteristics (continued)
101.5
101
100.5
100
99.5
99
RILIM
10 k
25 k
50 k
98.5
98
-40
-20
0
20
40
60
80
100 120 140
Temperature (C)
VS = 24 V
Figure 7-13. Current Limit Ratio (KCL) vs Temperature vs RILIM
Copyright © 2023 Texas Instruments Incorporated
Submit Document Feedback
15
Product Folder Links: TPS281C30
TPS281C30
SLVSGD3A – DECEMBER 2022 – REVISED JUNE 2023
www.ti.com
8 Parameter Measurement Information
Figure 8-1. Parameter Definitions
IEN
EN
IVS
VS
IDIAG_EN
DIAG_EN
FAULT
OL_ON
SNS
IFAULT
IOL_ON
ISNS
IILIM
VOUT
IOUT
ILIM
GND
(1)
VEN
50%
50%
90%
90%
tDR
tDF
VOUT
10%
10%
tON
tOFF
Rise and fall time of VEN is 100 ns.
Figure 8-2. Switching Characteristics Definitions
Copyright © 2023 Texas Instruments Incorporated
16
Submit Document Feedback
Product Folder Links: TPS281C30
TPS281C30
SLVSGD3A – DECEMBER 2022 – REVISED JUNE 2023
www.ti.com
VEN
VDIAG_EN
IOUT
ISNS
tSNSION1
tSNSION2
tSNSION3
tSNSIOFF1
Current (A)
VEN
VDIAG_EN
IOUT
ICL_ENPS
ICL
ISNS
Time (s)
tSETTLEH
tSETTLEL
tIOS
Rise and fall times of control signals are 100 ns. Control signals include: EN, DIA_EN.
Figure 8-3. SNS Timing Characteristics Definitions
Copyright © 2023 Texas Instruments Incorporated
Submit Document Feedback
17
Product Folder Links: TPS281C30
TPS281C30
SLVSGD3A – DECEMBER 2022 – REVISED JUNE 2023
www.ti.com
9 Detailed Description
9.1 Overview
The TPS281C30 is a single-channel, fully-protected, high-side power switch with an integrated NMOS power
FET and charge pump rated to 60V DC tolerance. Full diagnostics and high-accuracy current-sense features
enable intelligent control of the load. Low logic high threshold, VIH, of 1.5V on the input pins allow use of MCU's
down to 1.8V. A programmable current-limit function greatly improves the reliability of the whole system. The
device diagnostic reporting has two pins to support both digital status and analog current-sense output, both of
which can be set to the high-impedance state when diagnostics are disabled, for multiplexing the MCU analog or
digital interface among devices.
The digital status report is implemented with an open-drain structure on the fault pin. When a fault condition
occurs, the pin is pulled down to GND. An external pullup is required to match the microcontroller supply level.
High-accuracy current sensing allows a better real-time monitoring effect and more-accurate diagnostics without
further calibration. A current mirror is used to source 1 / KSNS of the load current, which is reflected as voltage
on the SNS pin. KSNS is a constant value across temperature and supply voltage. The SNS pin can also report
a fault by forcing a voltage of VSNSFH that scales with the diagnostic enable voltage so that the max voltage
seen by the system's ADC is within an acceptable value. This removes the need for an external zener diode or
resistor divider on the SNS pin.
The external high-accuracy current limit allows setting the current limit value by application. It highly improves
the reliability of the system by clamping the inrush current effectively under start-up or short-circuit conditions.
Also, it can save system costs by reducing PCB trace, connector size, and the preceding power-stage capacity.
An internal current limit can also be implemented in this device. The lower value of the external or internal
current-limit value is applied.
An active drain to source voltage clamp is built in to address switching off the energy of inductive loads, such as
relays, solenoids, pumps, motors, and so forth. During the inductive switching-off cycle, both the energy of the
power supply (EBAT) and the load (ELOAD) are dissipated on the high-side power switch itself. With the benefits
of process technology and excellent IC layout, the TPS281C30x device can achieve excellent energy dissipation
capacity, which can help save the external free-wheeling circuitry in most cases.
The TPS281C30x device can be used as a high-side power switch for a wide variety of resistive, inductive, and
capacitive loads, including the low-wattage bulbs, LEDs, relays, solenoids, and heaters.
Copyright © 2023 Texas Instruments Incorporated
18
Submit Document Feedback
Product Folder Links: TPS281C30
TPS281C30
SLVSGD3A – DECEMBER 2022 – REVISED JUNE 2023
www.ti.com
9.2 Functional Block Diagram
TPS281C30x
VS
OL_ON
*
Off-State
Open Load
Detection
QAUX
14
OFF_OL
IOUT
KSNS2
IOUT
KSNS1
Thermal
Shutdown
QMain
30m
TSD ||TREL
ISNSFH
+
VSNSFH
Voltage
Scaling
OVP
DIAG_EN
VS_OVP
–
OUT
SNS_FLT
+
–
Charge Pump &
*
UVLO
Gate Control
VS_UVLO
Current Limit Amp
SNS
EN
IOUT
KCL
Fast-Trip Comparator
ILIM
ILIM_OPN
ILIM_GND
ILIM_OR
FAULT
RILIM_INT
ICL = 0.5A
OVP
ILIM
DIAG_EN
EN
OFF_OL
TSD
OFF_PU_EN
GND
DIAG_EN
OL_ON
IOUT >IKSNS2_EN
OL_ON_Invalid
OVP
ILIM
TSD
SNS_FLT
*IEC ESD Protection
Copyright © 2023 Texas Instruments Incorporated
Submit Document Feedback
19
Product Folder Links: TPS281C30
TPS281C30
SLVSGD3A – DECEMBER 2022 – REVISED JUNE 2023
www.ti.com
9.3 Device Functional Modes
9.3.1 Working Mode
The four working modes in the device are normal mode, normal mode with diagnostics, standby mode, and
standby mode with diagnostics. If an off-state power saving is required in the system, the standby current is less
than 500 nA with EN and DIAG_EN low. If an off-state diagnostic is required in the system, the typical standby
current is around 0.5 mA with DIAG_EN high. Note that to enter standby mode requires IN low and t > tSTBY
tSTBY is the standby-mode deglitch time, which is used to avoid false triggering or interfere with PWM switching.
.
DIAG_EN low and
EN high to low
t > toff,deg
Standby Mode
EN low, DIAG_EN low)
Normal Mode
(EN high, DIAG_EN low)
EN low to high
DIAG_EN high to low
DIAG_EN low to high
DIAG EN low to high
DIAG_EN high to low
EN high to low and
DIAG_EN high and
t > toff,deg
Standby Mode
Normal Mode
with Diagnostics
With Diagnostics
(EN low, DIAG_EN high)
(EN high, DIAG_EN high)
EN low to high
Figure 9-1. Work-Mode State Machine
Copyright © 2023 Texas Instruments Incorporated
20
Submit Document Feedback
Product Folder Links: TPS281C30
TPS281C30
SLVSGD3A – DECEMBER 2022 – REVISED JUNE 2023
www.ti.com
9.4 Feature Description
9.4.1 Accurate Current Sense
The current-sense function is internally implemented, which allows a better real-time monitoring effect and
more-accurate diagnostics without further calibration. A current mirror is used to source 1 / KSNS of the load
current, flowing out to the external resistor between the SNS pin and GND, and reflected as voltage on the SNS
pin.
KSNS is the ratio of the output current and the sense current. The accuracy values of KSNS quoted in the
electrical characteristics do take into consideration temperature and supply voltage. Each device was internally
calibrated while in production, so post-calibration by users is not required in most cases.
The maximum voltage out on the SNS pin is clamped to VSNSFH which is the fault voltage level. In order to
make sure that this voltage is not higher than the system can tolerate, TI has correlated the voltage coming
in on the DIAG_EN pin with the maximum voltage out on the SNS pin. If DIAG_EN is between VIH and 3.3
V, the maximum output on the SNS pin will be ~3.3 V. However, if the voltage at DIAG_EN is above 3.3 V,
then the fault SNS voltage, VSNSFH, will track that voltage up to 5 V. This is done because the GPIO voltage
output that is powering the diagnostics through DIAG_EN, will be close to the maximum acceptable ADC voltage
within the same microcontroller. Therefore, the sense resistor value, RSNS, can be chosen to maximize the range
of currents needed to be measured by the system. The RSNS value should be chosen based on application
need. The maximum usable RSNS value is bounded by the ADC minimum acceptable voltage, VADC,min, for the
smallest load current needed to be measured by the system, ILOAD,min. The minimum acceptable RSNS value has
to ensure the VSNS voltage is below the VSNSFH value so that the system can determine faults. This difference
between the maximum readable current through the SNS pin, ILOAD,max × RSNS, and the VSNSFH is called the
headroom voltage, VHR. The headroom voltage is determined by the system but is important so that there is a
difference between the maximum readable current and a fault condition. Therefore, the minimum RSNS value
has to be the VSNSFH minus the VHR times the sense current ratio, KSNS divided by the maximum load current the
system needs to measure, ILOAD,max. This boundary equation can be seen in Equation 1.
VADC,min × KSNS / ILOAD,min ≤ RSNS ≤ (VSNSFH – VHR) × KSNS / ILOAD,max
(1)
Current Sense
Voltage
VSNSFH
ADC Full Scale Range, VADC,max
Headroom, VHR
Max Measurable Current
Over Current
Max Nominal Current
1
Normal
RSNS
Open Load Current, VADC,min
Sense Current
Figure 9-2. Voltage Indication on the Current-Sense Pin
The maximum current the system wants to read, ILOAD,max, needs to be below the current limit threshold because
once the current limit threshold is tripped the VSNS value will go to VSNSFH. Additionally, currents being measured
should be below 7 A to ensure that the current sense output is not saturated.
Copyright © 2023 Texas Instruments Incorporated
Submit Document Feedback
21
Product Folder Links: TPS281C30
TPS281C30
SLVSGD3A – DECEMBER 2022 – REVISED JUNE 2023
www.ti.com
VIN
VS
OL_ON
QMain
QAUX
OL_ON&DIAG_EN
IOUT
KCL
IOUT
KSNS2
IOUT
KSNS1
IOUT
–
+
VOUT
VSNSFH
Voltage
Scaling
DIAG_EN
Current
Clamp
SNS
ILIM
RSNS
RILIM
Figure 9-3. Current-Sense and Current-Limit Block Diagram
Since this scheme adapts based on the voltage coming in from the MCU. There is no need to have a zener
diode on the SNS pin to protect from high voltages.
Copyright © 2023 Texas Instruments Incorporated
22
Submit Document Feedback
Product Folder Links: TPS281C30
TPS281C30
SLVSGD3A – DECEMBER 2022 – REVISED JUNE 2023
www.ti.com
9.4.1.1 High Accuracy Sense Mode
In some applications, having accurate current sensing at lower load currents can be critical to distinguish
between a real load and a fault scenario such as an open load condition(Wire-Break). To address this challenge,
TPS281C30x implements a high accuracy sense mode that enables customers to achieve ±30% @6mA load.
This mode will be activated when diagnostics are enabled(DIAG_EN=HI), OL_ON = HI and ILoad<IKsns2_EN
.
To achieve this high accuracy , the device increases its main path resistance to improve its sense accuracy
while high accuracy sensing is active. TI recommends users to disable this accuracy sense mode by setting
OL_ON=LO if the load starts to increase beyond 40mA. This will proactively prevent any higher power
dissipation states.
In other scenarios such as a sudden load step where the system might not be fast enough to react to the change
in SNS output current. For this case, in order to prevent a high-power dissipation state given by the increased
resistance. TPS281C30x senses the load flowing through the VS-VOUT path to remain < IKsns2_DIS. If the load
increases beyond IKSNS2_DIS the FET resistance will revert back to its lowest resistance and high accuracy sense
mode will be disabled. This will result in nFAULT being asserted to signal that high accuracy sense mode has
been disabled. This will ensure the lowest power dissipation when higher loads are being driven. In addition to
this, the user can PWM the OL_ON pin to disable the high resistance mode and minimize power losses further.
However, even if accuracy is achieved by the device; Depending on the current sense ratio, system ADCs can
struggle to measure lower load currents accurately due to the low voltages that would need to be read by the
ADC. As an example, a 6mA ILoad will be represented as ~5mV using RSNS=1kOhm with a current sense ratio
of 1200. For a 10-bit 5V-ADC the 5mV output is just over 1LSB(4.88mV). This does not provide enough margin
to accurately measure this current for the ADC and likely a higher resolution would need to be used.
Therefore, in order to enable lower ADC resolution requirements and to accurately sense low load currents when
operating in high accuracy sense mode, TPS281C30x decreases its current sense ratio to 24. With a sense ratio
of 24, the 6mA ILoad will be represented as 250mV using RSNS=1kOhm when operating in high accuracy sense
mode. This equals to 51LSBs of margin for the same 10-bit ADC or even for an 8-bit ADC the output would still
provide >12LSBs of headroom.
Full Protection and Diagnostics for full device states.
Table 9-1. Current Sensing Operation Modes
OL_ON
FAULT
Conditions
EN
VOUT
KSNS
SNS
Behavior
Recovery
L
L
L
1200
0
Hi-Z
Normal
Normal
Normal
ILoad
/
Standard Sensing
H
H
H
L
1200
24
Hi-Z
Hi-Z
Ksns1
Enables x50 sense ratio for high
accuracy sensing and FAULT stays
Hi-Z since valid condition is met
ILoad<IKsns2_EN.
High Accuracy
Sense
ILoad
Ksns2
/
H
H
H
Normal Operation
Clears when
High Accuracy
Sense
FAULT is asserted signaling that
high accuracy sensing is not
enabled since ILoad>IKsns2_DIS
load falls below
IKSNS2_EN or
OL_ON is reset to
LO.
ILoad
/
H
H
1200
L
Ksns1
Invalid Range
Copyright © 2023 Texas Instruments Incorporated
Submit Document Feedback
23
Product Folder Links: TPS281C30
TPS281C30
SLVSGD3A – DECEMBER 2022 – REVISED JUNE 2023
www.ti.com
ILOAD(I)
ICL
IKSNS2_DIS
IKSNS2_EN
Time (s)
OL_ON(V)
Time (s)
FAULT(V)
Time (s)
SENSE(I)
ISNSFH
SNS = 1/KSNS1
SNS = 1/KSNS2
SNS = 1/KSNS1
SNS = 1/KSNS2
SNS = 1/KSNS1
Time (s)
High Accuracy
Sensing
OL_ON=HI
High accuracy
sensing enabled with
OL_ON=HI
Invalid Range due to
OL_ON=HI and
ILOAD>IKSNS2_EN
Standard Sensing
OL_ON=LO
Standard Sensing
with OL_ON=LO
Figure 9-4. High Accuracy Sensing FAULT Indication
9.4.2 Programmable Current Limit
A high-accuracy current limit allows higher reliability, which protects the power supply during short circuit or
power up. Also, it can save system costs by reducing PCB traces, connector size, and the capacity of the
preceding power stage.
Current limit offers protection from overstressing to the load and integrated power FET. Current limit holds the
current at the set value, and pulls up the SNS pin to VSNSFH and asserts the FAULT pin as diagnostic reports.
The two current-limit thresholds are:
Copyright © 2023 Texas Instruments Incorporated
24
Submit Document Feedback
Product Folder Links: TPS281C30
TPS281C30
SLVSGD3A – DECEMBER 2022 – REVISED JUNE 2023
www.ti.com
•
External programmable current limit -- An external resistor, RILIMis used to set the channel current limit. When
the current through the device exceeds ICL (current limit threshold), a closed loop steps in immediately. VGS
voltage regulates accordingly, leading to the VDS voltage regulation. When the closed loop is set up, the
current is clamped at the set value. The external programmable current limit provides the capability to set the
current-limit value by application.
Additionally this value can be dynamically changed by changing the resistance on the ILIM pin. This can be
seen in the Applications Section
•
Internal current limit: ILIM pin open or pin shorted to ground -- If the external current limit is out of range on the
lower end or the ILIM pin is shorted to ground, the internal current limit is fixed and typically 0.5A. This works
as a safety power limitting mechanicsm during failures with shorts or open connections with PCB
Overstress.
Both the internal current limit (Ilim,nom) and external programmable current limit are always active when VS is
powered and EN is high. The lower value one (of ILIM and the external programmable current limit) is applied as
the actual current limit. The typical deglitch time for the current limit to assert is 2.5µs.
Note that if a GND network is used (which leads to the level shift between the device GND and board GND), the
ILIM pin must be connected with device GND. Calculate RLIM with Equation 2.
RILIM = KCL / ICL
(2)
For better protection from a hard short-to-GND condition (when VS and input are high and a short to GND
happens suddenly), an open-loop fast-response behavior is set to turn off the channel, before the current-limit
closed loop is set up. With this fast response, the device can achieve better inrush-suppression performance.
9.4.2.1 Short-Circuit and Overload Protection
TPS281C30 provides output short-circuit protection to ensure that the device will prevent current flow in the
event of a low impedance path to GND, removing the risk of damage or significant supply droop. The device is
guaranteed to protect against short-circuit events regardless of the state of the ILIM pins and with up to 36-V
supply at 125°C.
On-State Short-Circuit Behavior shows the behavior of TPS281C30x when a short-circuit occurs and the device
is in the on-state and already outputting current. When the internal pass FET is fully enabled, the current
clamping settling time is slower so to ensure overshoot is limited, the device implements a fast trip level at a
level IOVCR. When this fast trip threshold is hit, the device immediately shuts off for a short period of time before
quickly re-enabling and clamping the current to ICL level after a brief transient overshoot to the higher peak
current (ICL_ENPS) level. The device will then keep the current clamped at the regulation current limit until the
thermal shutdown temperature is hit and the device will safely shut-off.
Current (A)
IOVCR
ICL_ENPS
ICL
Thermal Shutdown
tRETRY
INOM
Time (s)
Figure 9-5. On-State Short-Circuit Behavior
Overload Behavior shows the behavior of the TPS281C30x when there is a small change in impedance that
sends the load current above the ICL threshold. The current rises to ICL_LINPK above the regulation level. Then
the current limit regulation loop kicks in and the current drops to the ICL value.
Copyright © 2023 Texas Instruments Incorporated
Submit Document Feedback
25
Product Folder Links: TPS281C30
TPS281C30
SLVSGD3A – DECEMBER 2022 – REVISED JUNE 2023
www.ti.com
Current (A)
ICL_ENPS
ICL_LINPK
ICL
INOM
tRETRY
Thermal Shutdown
Time (s)
Figure 9-6. Overload Behavior
In all of these cases, the internal thermal shutdown is safe to hit repetitively. There is no device risk or lifetime
reliability concerns from repeatedly hitting this thermal shutdown level.
9.4.2.2 Capacitive Charging
Capacitive Charging Circuit shows the typical set up for a capacitive load application and the internal blocks that
function when the device is used. Note that all capacitive loads will have an associated "load" in parallel with the
capacitor that is described as a resistive load but in reality it can be inductive or resistive.
Power Supply
VS
QMAIN
EN
Gate Driver
KCL
VS
RQMAIN + RLOAD
ICL
=
RILIM
INOM =
ILIM
Current
Limit
GND
VOUT
RILIM
CLOAD
RLOAD
ICL = CLOAD x dVDS/dt
Figure 9-7. Capacitive Charging Circuit
The first thing to check is that the nominal DC current, INOM, is acceptable for the TPS281C30 device. This can
easily be done by taking the RθJA from the Thermal Section and multiplying the RON of the TPS281C30 and the
INOM with it, add the ambient temperature and if that value is below the thermal shutdown value the device can
operate with that load current. For an example of this calculation see the Applications Section.
The second key care about for this application is to make sure that the capacitive load can be charged up
completely without the device hitting thermal shutdown. This is because if the device hits thermal shutdown
during the charging, the resistive nature of the load in parallel with the capacitor will start to discharge the
capacitor over the duration the TPS281C30x is off. Note that there are some application with high enough
load impedance that the TPS281C30 hitting thermal shutdown and trying again is acceptable; however, for the
majority of applications the system should be designed so that the TPS281C30x does not hit thermal shutdown
while charging the capacitor.
With the current clamping feature of the TPS281C30x, capacitors can be charged up at a lower inrush current
than other high current limit switches. This lower inrush current means that the capacitor will take a little longer
to charge all the way up. However, to minimize this longer charge time during startup, TPS281C30 implements
an inrush current handling feature described in On-State Short Circuit Behavior. When the EN pin goes high to
Copyright © 2023 Texas Instruments Incorporated
26
Submit Document Feedback
Product Folder Links: TPS281C30
TPS281C30
SLVSGD3A – DECEMBER 2022 – REVISED JUNE 2023
www.ti.com
turn on the high side switch, the device will default its current limit threshold to ILIM_STARTUP for a duration of
ILIM_STARTUP_DELAY. During this delay period, a capacitive load can be charged at a higher rate than what typical
ICL would allow and FAULT will be masked to prevent unwanted Fault triggers. After ILIM_STARTUP_DELAY, the
current limit will default back to ICL and Fault will work normally.
Current (A)
ILIM_STARTUP
ICL
Time (S)
ILIM_STARTUP_DELAY
Voltage (V)
VEN
Time (S)
Voltage (V)
VFAULT
Time (S)
tFAULT_BLANKING
Figure 9-8. Inrush Current Handling
The initial inrush current period when the current limit is higher enables two different system advantages when
driving loads:
•
•
Enables higher load current to be supported for a period of time of the order of milliseconds to drive high
inrush current loads like incandescent bulb loads.
Enables fast capacitive load charging. In some situations, it is ideal to charge capacitive loads at a higher
current than the DC current to ensure quick supply bring up. This architecture allows a module to quickly
charge a capacitive load using the initial higher inrush current limit and then use a lower current limit to
reliably protect the module under overload or short circuit conditions.
Copyright © 2023 Texas Instruments Incorporated
Submit Document Feedback
27
Product Folder Links: TPS281C30
TPS281C30
SLVSGD3A – DECEMBER 2022 – REVISED JUNE 2023
www.ti.com
Current (A)
ICL_ENPS2
ILIM_STARTUP
ICL_ENPS
ICL
ILIM_STARTUP_DELAY
Time (S)
Voltage (V)
VEN
Time (S)
Figure 9-9. Auto-retry Behavior After ILIM_STARTUP_DELAY Period Expires
Current (A)
ICL_ENPS2
ILIM_STARTUP
ICL
ILIM_STARTUP_DELAY
Time (S)
Voltage (V)
VEN
Time (S)
Figure 9-10. Auto-retry Behavior Before ILIM_STARTUP_DELAY Period Expires
While in current limiting mode, at any level, the device will have a high power dissipation. If the FET temperature
exceeds the over-temperature shutdown threshold, the device will turn off just the channel that is overloaded.
After cooling down, the device will re-try. If the device is turning off prematurely on start-up, it is recommended to
improve the PCB thermal layout, lower the current limit to lower power dissipation, or decrease the inrush current
(capacitive loading). t limit to lower power dissipation, or decrease the inrush current (capacitive loading).
Copyright © 2023 Texas Instruments Incorporated
28
Submit Document Feedback
Product Folder Links: TPS281C30
TPS281C30
SLVSGD3A – DECEMBER 2022 – REVISED JUNE 2023
www.ti.com
For more information about capacitive charging with high side switches see the How to Drive Capacitive Loads
application note. This application note has information about the thermal modeling available along with quick
ways to estimate if a high side switch will be able to charge a capacitor to a given voltage.
9.4.3 Inductive-Load Switching-Off Clamp
When an inductive load is switching off, the output voltage is pulled down to negative, due to the inductance
characteristics. The power FET may break down if the voltage is not clamped during the current-decay period.
To protect the power FET in this situation, internally clamp the drain-to-source voltage, namely VDS,clamp, the
clamp diode between the drain and gate.
VDS,Clamp = VS – VOUT
(3)
During the current-decay period (TDECAY), the power FET is turned on for inductance-energy dissipation. Both
the energy of the power supply (ES) and the load (ELOAD) are dissipated on the high-side power switch itself,
which is called EHSD. If resistance is in series with inductance, some of the load energy is dissipated in the
resistance.
EHSD = ES + ELOAD = ES + EL – ER
(4)
From the high-side power switch’s view, EHSD equals the integration value during the current-decay period.
TDECAY
EHSD
=
VDS,clamp ì IOUT(t)dt
—
0
(5)
(6)
(7)
≈
’
R ì IOUT(MAX) + VOUT
L
∆
∆
«
÷
÷
◊
TDECAY
=
ì ln
R
VOUT
»
ÿ
Ÿ
VBAT + VOUT
≈ R ì IOUT(MAX) + VOUT
’
…
ì R ì IOUT(MAX) œ VOUT ln
EHSD = L ì
∆
÷
÷
◊
R2
∆
VOUT
…
Ÿ
⁄
«
When R approximately equals 0, EHSD can be given simply as:
VBAT + VOUT
1
2
EHSD
=
ì L ì I2
OUT(MAX)
R2
(8)
Power Supply
VS
VDS
EN
Gate Driver
GND
VOUT
L
VOUT
R
Figure 9-11. Driving Inductive Load
Copyright © 2023 Texas Instruments Incorporated
Submit Document Feedback
29
Product Folder Links: TPS281C30
TPS281C30
SLVSGD3A – DECEMBER 2022 – REVISED JUNE 2023
www.ti.com
INPUT
VIN(BAT)
VOUT
IOUT
VDS, clamp
EHSD
tDECAY
Figure 9-12. Inductive-Load Switching-Off Diagram
As discussed previously, when switching off, battery energy and load energy are dissipated on the high-side
power switch, which leads to the large thermal variation. For each high-side power switch, the upper limit of
the maximum safe power dissipation depends on the device intrinsic capacity, ambient temperature, and board
dissipation condition. TI provides the upper limit of single-pulse energy that devices can tolerate under the test
condition: VS = 24 V, inductance from 0.1 mH to 400 mH, R = 0 Ω, FR4 2s2p board, 2× 70-μm copper, 2× 35-μm
copper, thermal pad copper area 600 mm2.
9.4.4 Inductive Load Demagnetization
When switching off an inductive load, the inductor can impose a negative voltage on the output of the switch.
The TPS281C30 includes voltage clamps between VS and VOUT to limit the voltage across the FETs and
demagnetize load inductance if there is any. The negative voltage applied at the OUT pin drives the discharge of
inductor current. Figure 10-14 shows the device discharging a 400-mH load.
Copyright © 2023 Texas Instruments Incorporated
30
Submit Document Feedback
Product Folder Links: TPS281C30
TPS281C30
SLVSGD3A – DECEMBER 2022 – REVISED JUNE 2023
www.ti.com
Figure 9-13. TPS281C30 Inductive Discharge (400 mH)
The maximum acceptable load inductance is a function of the energy dissipated in the device and therefore the
load current and the inductive load. The maximum energy and the load inductance the device can withstand for
one pulse inductive dissipation at 125°C is shown in Figure 10-15. The device can withstand 50% of this energy
for one million inductive repetitive pulses with a >4-Hz repetitive pulse. If the application parameters exceed this
device limit, use a protection device like a freewheeling diode to dissipate the energy stored in the inductor.
1500
VS = 36 V
1400
1300
1200
1100
1000
900
800
700
600
500
400
300
200
100
0
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16
Current (A)
Figure 9-14. TPS281C30 Inductive Load Discharge Energy Capability at 125°C
Copyright © 2023 Texas Instruments Incorporated
Submit Document Feedback
31
Product Folder Links: TPS281C30
TPS281C30
SLVSGD3A – DECEMBER 2022 – REVISED JUNE 2023
www.ti.com
9.4.5 Full Protections and Diagnostics
Current Sensing is active when DIAG_EN enabled. When DIAG_EN is low, current sense is disabled. The SNS
output is in high-impedance mode.
Table 9-2. DIAG_EN Logic Table
DIAG_EN EN Condition
Protections and Diagnostics
HIGH
HIGH
LOW
See Fault Table
HIGH
Diagnostics disabled and SNS output
is set to high Impedance. Protection is
normal and FAULT continues to indicate
TSD or ILIM.
LOW
LOW
Copyright © 2023 Texas Instruments Incorporated
32
Submit Document Feedback
Product Folder Links: TPS281C30
TPS281C30
SLVSGD3A – DECEMBER 2022 – REVISED JUNE 2023
www.ti.com
Table 9-3. Status Table (DIAG_EN=HIGH )
Conditions
EN
L
VOUT
OL_ON
FAULT
SNS
Behavior
Recovery
Normal
L
L
L
Hi-Z
0
Normal
Standard Sensing
H
H
Hi-Z
ILoad
/
Normal
Ksns1
High Accuracy
Sense
H
H
H
H
H
H
L
ILoad
/
FAULT is asserted signaling that high Clears when load falls
accuracy sensing is not enabled since below IKSNS2_EN or
Ksns1
Invalid Range
ILoad>IKsns2_EN
OL_ON is reset to LO.
High Accuracy
Sense
Hi-Z
ILoad
/
Enables x50 sense ratio for high
accuracy sensing and FAULT stays
Hi-Z since valid condition is met
ILoad<IKsns2_EN.
Ksns2
Normal Operation
Overcurrent
H
H
VS
-
x
x
L
L
VSNSFH
Holds the current at the current limit
until thermal shutdown
ILIM*RLOAD
STG, Relative
Thermal
H/L
VSNSFH
Shuts down when devices hits relative
or absolute thermal shutdown
Auto retries when
THYSis met and it
Shutdown,
has been longer than
tRETRY amount of time
Absolute Thermal
Shutdown
Open Load
H
H
L
H
H
H
x
L
H
L
x
Hi-Z
Hi-Z
L
ILoad
/
Normal behavior, user can judge if it is
an open load or not
Ksns1 = ~0
ILoad
/
Normal behavior, user can judge if it is
an open load or not
Ksns2 = ~0
VSNSFH
Internal pullup resistor is active. If VS
VOUT < VOL then fault active
–
Clears when fault goes
away
Reverse Polarity
x
x
x
Channel turns on to lower power
dissipation. Current into ground pin is
limited by external ground network
9.4.5.1 Open-Load Detection
On-State Open Load Detection
When the main channel is enabled faults are diagnosed by reading the voltage on the SNS or FLT pin and
judged by the user. A benefit of high-accuracy current sense is that this device can achieve a very low open-load
detection threshold, which correspondingly expands the normal operation region. As explained in section high
accuracy sense mode, this mode can be used to sense 6mA currents accurately.
Off-State Open Load Detection
In the off state, if a load is connected, the output voltage is pulled to 0V. In the case of an open load, the output
voltage is close to the supply voltage, VS – VOUT < Vol,off. The FLT pin goes low to indicate the fault to the MCU,
and the SNS pin is pulled up to ISNSFH. There is always a leakage current Iol,off present on the output, due to the
internal logic control path or external humidity, corrosion, and so forth. Thus, TI implimented an internal pullup
resistor to offset the leakage current. This pullup current should be less than the output load current to avoid
false detection in the normal operation mode. To reduce the standby current, TI implimented a switch in series
with the pullup resistor controlled by the DIAG_EN pin. The pull up resistor value is 150 kΩ.
Copyright © 2023 Texas Instruments Incorporated
Submit Document Feedback
33
Product Folder Links: TPS281C30
TPS281C30
SLVSGD3A – DECEMBER 2022 – REVISED JUNE 2023
www.ti.com
VS
SNS=0
1
0
SNS
DIAG_EN
VSNSFH
OFF-STATE
OPEN LOAD
VOL_OFF
ROL_OFF
FAULT
FAULT
EN
OUT
GND
Figure 9-15. Off-State Open-Load Detection Circuit
9.4.5.2 Thermal Protection Behavior
The thermal protection behavior can be split up into 2 categories of events that can happen. Thermal behavior
shows each of these categories.
1. Relative thermal shutdown: The device is enabled into an over current event. The DIAG_EN pin is high
so that diagnostics can be monitored on SNS and FLT. The output current rises up to the IILIM level and the
FLT goes low while the SNS goes to VSNSFH. With this large amount of current going through the junction
temperature of the FET increases rapidly with respect to the controller temperature. When the power FET
temperature rises TREL amount above the controller junction temperature ΔT = TFET – TCON > TREL, the
device shuts down. The faults are continually shown on SNS and FLT and the part waits for the tRETRY
timer to expire. When tRETRY timer expires, since EN is still high, the device will come back on into this IILIM
condition.
2. Absolute thermal shutdown: In this case, the ambient temperature is now much higher than previous.
The device is still enabled in an over current event with DIAG_EN high. However, in this case the junction
temperature rises up and hits an absolute reference temperature, TABS, and then shuts down. The device
will not recover until both TJ < TABS – Thys and the tRETRY timer has expired.
Copyright © 2023 Texas Instruments Incorporated
34
Submit Document Feedback
Product Folder Links: TPS281C30
TPS281C30
SLVSGD3A – DECEMBER 2022 – REVISED JUNE 2023
www.ti.com
1
2
DIAG_EN
EN
TABS
TABS
THYS
Junction
Temperature
tRETRY
tRETRY
tRETRY
TREL
Output
ILIM
Current
VSNSFH
VSNS
FLT
Figure 9-16. Thermal Behavior
9.4.5.3 Undervoltage Lockout (UVLO) Protection
The device monitors the supply voltage VS to prevent unpredicted behaviors in the event that the supply voltage
is too low. When the supply voltage falls down to VUVLOF, the output stage is shut down automatically. When the
supply rises up to VUVLOR, the device turns on. If an overcurrent event trips the UVLO threshold, the device will
shut off and come back on into a current limit safely.
9.4.5.4 Overvoltage (OVP) Protection
The device monitors the supply voltage VS to prevent unpredicted behaviors in the event that the supply voltage
is too high. When the supply increases beyond VS,OVPR, the output stage is shut down automatically. When the
supply falls belowVS,OVPF, the device turns on. If an overcurrent event trips the OVP threshold due to inductive
load oscillations, the integrates a deglitcher to avoid immediate output shutoff due to short transients.
Copyright © 2023 Texas Instruments Incorporated
Submit Document Feedback
35
Product Folder Links: TPS281C30
TPS281C30
SLVSGD3A – DECEMBER 2022 – REVISED JUNE 2023
www.ti.com
9.4.5.5 Reverse Polarity Protection
Method 1: Blocking diode connected with VBB. Both the device and load are protected when in reverse polarity.
The blocking diode does not allow any of the current to flow during reverse battery condition.
S
VDD
–
+
UT
MCU
Figure 9-17. Reverse Protection With Blocking Diode
Copyright © 2023 Texas Instruments Incorporated
36
Submit Document Feedback
Product Folder Links: TPS281C30
TPS281C30
SLVSGD3A – DECEMBER 2022 – REVISED JUNE 2023
www.ti.com
Method 2 (GND network protection): Only the high-side device is protected under this connection. The
load reverse loop is limited by the load itself. Note when reverse polarity happens, the continuous reverse
current through the power FET should be less than Irev. Of the three types of ground pin networks, TI strongly
recommends type 3 (the resistor and diode in parallel). No matter what types of connection are between the
device GND and the board GND, if a GND voltage shift happens, ensure the following proper connections for the
normal operation:
•
•
Leave the NC pin floating or connect to the device GND. TI recommends to leave floating.
Connect the current limit programmable resistor to the device GND.
RPROT
s
VD
–
+
UT
MCU
RGND
DGND
Figure 9-18. Reverse Protection With GND Network
•
Type 1 (resistor): The higher resistor value contributes to a better current limit effect when the reverse
battery or negative ISO pulses. However, it leads to higher GND shift during normal operation mode. Also,
consider the resistor’s power dissipation.
VGNDshift
RGND
Ç
Inom
(9)
œV
(
)
CC
RGND
í
œI
GND
(10)
where
– VGNDshift is the maximum value for the GND shift, determined by the HSS and microcontroller. TI suggests
a value ≤ 0.6 V.
– Inom is the nominal operating current.
– –VCC is the maximum reverse voltage seen on the battery line.
– –IGND is the maximum reverse current the ground pin can withstand, which is available in the Absolute
Maximum Ratings.
If multiple high-side power switches are used, the resistor can be shared among devices.
Type 2 (diode): A diode is needed to block the reverse voltage, which also brings a ground shift (≈ 600 mV).
However, an inductive load is not acceptable to avoid an abnormal status when switching off.
Type 3 (resistor and diode in parallel (recommended)): A peak negative spike may occur when the
inductive load is switching off, which may damage the HSD or the diode. So, TI recommends a resistor
in parallel with the diode when driving an inductive load. The recommended selection are 1-kΩ resistor in
parallel with an IF > 100-mA diode. If multiple high-side switches are used, the resistor and diode can be
shared among devices.
•
•
Copyright © 2023 Texas Instruments Incorporated
Submit Document Feedback
37
Product Folder Links: TPS281C30
TPS281C30
SLVSGD3A – DECEMBER 2022 – REVISED JUNE 2023
www.ti.com
9.4.5.6 Protection for MCU I/Os
In many conditions, such as the negative surge pulse, or the loss of battery with an inductive load, a negative
potential on the device GND pin may damage the MCU I/O pins [more likely, the internal circuitry connected to
the pins]. Therefore, the serial resistors between MCU and HSS are required.
Also, for proper protection against loss of GND, TI recommends 10 kΩ resistance for the RPROT resistors.
RPROT
s
VD
–
+
UT
MCU
d
RGND
DGND
Figure 9-19. MCU IO Protections
9.4.5.7 Diagnostic Enable Function
The diagnostic enable pin, DIAG_EN, offers multiplexing of the microcontroller diagnostic input for current sense
or digital status, by sharing the same sense resistor and ADC line or I/O port among multiple devices.
In addition, this pin can be used to manage power dissipation by the device. During the ouput-on period, if no
continious sense output diagnositcs are required, the diagnostic disable feature will lower the operating current.
On the other hand, the output-off period, the diagnostic disable function lowers the current consumption for the
standby condition.
Copyright © 2023 Texas Instruments Incorporated
38
Submit Document Feedback
Product Folder Links: TPS281C30
TPS281C30
SLVSGD3A – DECEMBER 2022 – REVISED JUNE 2023
www.ti.com
Switch 1
Switch 2
Switch 3
Switch 4
DIAG_EN
SNS
SNS
SNS
GPIO1
GPIO2
GPIO3
DIAG_EN
DIAG_EN
MCU
DIAG_EN
SNS
GPIO4
ADC_IN
Figure 9-20. Resistor sharing
9.4.5.8 Loss of Ground
The ground connection may be lost either on the device level or on the module level. If the ground connection
is lost, the channel output will be disabled irrespective of the EN input level. If the switch was already disabled
when the ground connection was lost, the outputs will remain disabled even when the channels are enabled. The
steady state current from the output to the load that remains connected to the system ground is below the level
specified in the Specifications section of this document. When the ground is reconnected, normal operation will
resume.
Copyright © 2023 Texas Instruments Incorporated
Submit Document Feedback
39
Product Folder Links: TPS281C30
TPS281C30
SLVSGD3A – DECEMBER 2022 – REVISED JUNE 2023
www.ti.com
10 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification,
and TI does not warrant its accuracy or completeness. TI’s customers are responsible for
determining suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.
10.1 Application Information
10.2 Typical Application
The Typical Application Circuit shows an example of how to design the external circuitry parameters.
VS
+24V Field VS
CIN
D1
+3.3V/5.0V
RPU
To Inductive,
Capacitive and
Resistive Load
FAULT
EN
RPROT
RPROT
RPROT
RPROT
VOUT
COUT
D2
DIAG_EN
OL_ON
SNS
ILIM
RPROT
GND
CSNS
RSNS
RILIM
RGND
DGND
Figure 10-1. Typical Application Circuit
Copyright © 2023 Texas Instruments Incorporated
40
Submit Document Feedback
Product Folder Links: TPS281C30
TPS281C30
SLVSGD3A – DECEMBER 2022 – REVISED JUNE 2023
www.ti.com
10.2.1 Design Requirements
Component
Description
Purpose
D1
D2
SMBJ60CA
Clamp surge voltages at the supply input
Clamp surge voltages at the supply output
SMBJ36CA (Optional)
CIN1
CIN2
100nF
4.7nF
Stabilize the input supply and filter out low frequency noise.
Filtering of voltage transients (for example, ESD, IEC 61000-4-5) and
improved emissions.
RPROT
10kΩ
Protection resistor for microcontroller and device I/O pins - Optional for
reverse polarity protection
RILIM
RSNS
CSNS
7.5kΩ – 50kΩ
500-2000
1nF
Set current limit threshold
Translate the sense current into sense voltage.
Coupled with RPROT on the SNS line creates a low pass filter to filter out
noise going into the ADC of the MCU.
CVOUT
RGND
22nF
1kΩ
Improves EMI performance, filtering of voltage transients
Stabilize GND potential during turn-off of inductive load - Optional for
reverse polarity protection
DGND
BAS21 Diode
Keeps GND close to system ground during normal operation - Optional for
reverse polarity protection
10.2.1.1 IEC 61000-4-5 Surge
The TPS281C30 is designed to survive against IEC 61000-4-5 surge using external TVS clamps. The device
is rated to 64 V ensuring that external TVS diodes can clamp below the rated maximum voltage of the
TPS281C30x. Above 64 V, the device includes VDS clamps to help shunt current and ensure that the device
survives the transient pulses. Depending on the class of the output, TI recommends that the system has a
SMBJ36A or SMCJ36A between VS and module GND.
10.2.2 Detailed Design Procedure
10.2.2.1 Selecting RILIM
In this application, the TPS281C30A must allow for the maximum DC current with margin but minimize the
energy in the switch and the load on the input supply during a fault condition by minimizing the current limit.
The nominal current limit should be set such that the worst case (lowest) current limit will be higher than the
maximum load current (4 A). Since the lower limit is 10% below the typical value, for this application, the best
ILIM set point is approximately 5.5A. The below equation allows you to calculate the RILIM value that is placed
from the ILIMx pins to GND pin of the device. RILIM is calculated in kΩ.
RILIM = KCL / ICL
(11)
The KCL value in the Specifications section is 50A/kΩ. So the calculated value of RILIM is 9.09 kΩ which can be
found as a standard 1% resistor.
10.2.2.2 Selecting RSNS
Table 10-1 shows the requirements for the load current sense in this application. The KSNS value is specified for
the device and can be found in the Specifications section.
Table 10-1. RSNS Calculation Parameters
PARAMETER
EXAMPLE VALUE
Current Sense Ratio (KSNS1
)
1300
Current Sense Ratio (KSNS2
)
24
Copyright © 2023 Texas Instruments Incorporated
Submit Document Feedback
41
Product Folder Links: TPS281C30
TPS281C30
SLVSGD3A – DECEMBER 2022 – REVISED JUNE 2023
www.ti.com
Table 10-1. RSNS Calculation Parameters (continued)
PARAMETER
EXAMPLE VALUE
Largest diagnosable load current
4.8 A
Smallest diagnosable load current
4 mA
5.0 V
10 bit
Full-scale ADC voltage
ADC resolution
The load current measurement up to 4.8 A ensures that even in the event of a overload but below the set current
limit, the MCU can register and react by turning off the FET while the low level of 4 mA allows for accurate
measurement of low load currents and enable the distinction open load faults from supported nominal load
currents. For load currents < 50 mA, the customer can enable high accuracy sensing to change the sense ratio
from KSNS1 to KSNS2. This prevents the requirement of a higher resolution ADC and it also increases sense
accuracy. Go to high accuracy sensing for more information.
The RSNS resistor value should be selected such that the largest diagnosable load current puts the SNS pin
voltage (VSNS) at about 90% of the ADC full-scale. With this design, any ADC value above 80% of full scale (FS)
can be considered a fault. Additionally, the RSNS resistor value should ensure that the smallest diagnosable load
current does not cause VSNS to fall below at a least a few LSB of the ADC.
With the given example values, a 1.0-kΩ sense resistor satisfies both requirements.
Table 10-2. VSNS Calculation
Sense Mode
LOAD (A)
SENSE RATIO
ISNS (mA)
RSNS (Ω)
VSNS (V)
% of 5-V ADC
OL_ON
Standard
Sensing
LO
4.8A
1200
3.69
1000
3.69
73.8%
High Accuracy
Sensing
3.3% (~34
LSBs)
HI
0.004
24
0.166
1000
0.166
10.3 Power Supply Recommendations
The TPS281C30 device is designed to operate in a 24-V industrial system. The allowed supply voltage range
(VS pin) is 6 V to 36 V as measured at the VS pin with respect to the GND pin of the device. In this range
the device meets full parametric specifications as listed in the Electrical Characteristics table. The device is also
designed to withstand voltage transients beyond this range such as SELV supply failures.
It is recommended to place a 0.1uF capacitor at the Vs supply input to stabilize the input supply and filter out
low frequency noise. The power supply must be able to withstand all transient load current steps. In cases
where the power supply is slow to respond to a large transient current or large load current step, additional bulk
capacitance can be required on the input.
VS Input Supply Voltage Range
Description
Nominal supply voltage, all parametric specifications apply. The
device is completely short-circuit protected.
6 V to 36 V
Device is fully functional and protected but timing parametrics can
deviate from specifications.
36 V > VS > VS, OVPR
VS > Vs, OVPR
SELV Supply Voltage. Device disables itself and tolerates up to 64 V
at the input for extended period of time.
10.4 Layout
10.4.1 Layout Guidelines
To prevent thermal shutdown, TJ must be less than 125°C. If the output current is very high, the power
dissipation may be large. The HTSSOP and QFN packages have good thermal impedance. However, the PCB
layout is very important. Good PCB design can optimize heat transfer, which is absolutely essential for the
long-term reliability of the device.
Copyright © 2023 Texas Instruments Incorporated
42
Submit Document Feedback
Product Folder Links: TPS281C30
TPS281C30
SLVSGD3A – DECEMBER 2022 – REVISED JUNE 2023
www.ti.com
•
Maximize the copper coverage on the PCB to increase the thermal conductivity of the board. The major
heat-flow path from the package to the ambient is through the copper on the PCB. Maximum copper is
extremely important when there are not any heat sinks attached to the PCB on the other side of the board
opposite the package.
•
•
Add as many thermal vias as possible directly under the package ground pad to optimize the thermal
conductivity of the board.
All thermal vias should either be plated shut or plugged and capped on both sides of the board to prevent
solder voids. To ensure reliability and performance, the solder coverage should be at least 85%.
10.4.1.1 EMC Considerations
10.4.2 Layout Example
10.4.2.1 PWP Layout without a GND Network
Without a GND network, tie the thermal pad directly to the board GND copper for better thermal performance.
CVS
RPROT
14
13
GND
VS
VS
VS
1
2
3
4
5
6
7
RPROT
EN
DIAG_EN
FAULT
12
11
RPU
RPROT
Thermal
Pad
NC
RPROT
10
OL_ON
SNS
VOUT
RPROT
9
8
RSNS
CFILTER
ILIM
VOUT
CVOUT
RLIM
Figure 10-2. PWP Layout Without a GND Network
Copyright © 2023 Texas Instruments Incorporated
Submit Document Feedback
43
Product Folder Links: TPS281C30
TPS281C30
SLVSGD3A – DECEMBER 2022 – REVISED JUNE 2023
www.ti.com
10.4.2.2 PWP Layout with a GND Network
With a GND network, tie the thermal pad with a single trace through the GND network to the board GND copper.
RGND
DGND
CVS_IC
CVS
RPROT
G
RPROT
DIAG_
FAU
OL_
S
RPU
RPROT
RPROT
RPROT
RSNS
CFILTER
ILIM
CVOUT
RLI
Figure 10-3. PWP Layout With a GND Network
10.4.2.3 RGW Layout with a GND Network
With a GND network, tie the thermal pad with a single trace through the GND network to the board GND copper.
Copyright © 2023 Texas Instruments Incorporated
44
Submit Document Feedback
Product Folder Links: TPS281C30
TPS281C30
SLVSGD3A – DECEMBER 2022 – REVISED JUNE 2023
www.ti.com
RSNS
RILIM
20
19
18 17 16
15
14
13
12
11
ILIM
1
2
3
4
5
EN
NC
NC
VOUT
VOUT
VOUT
VS
VS
VS
10
6
7
8
9
RILIM
DGND
Figure 10-4. RGW Layout With a GND Network
10.4.3 Thermal Considerations
This device possesses thermal shutdown (TABS) circuitry as a protection from overheating. For continuous
normal operation, the junction temperature should not exceed the thermal-shutdown trip point. If the junction
temperature exceeds the thermal-shutdown trip point, the output turns off. When the junction temperature falls
below the thermal-shutdown trip point, the output turns on again.
Calculate the power dissipated by the device according to Equation 13.
PT = IOUT 2 x RDSON + VS x INOM
(12)
where
PT = Total power dissipation of the device
•
After determining the power dissipated by the device, calculate the junction temperature from the ambient
temperature and the device thermal impedance.
TJ = TA + RθJA x PT
(13)
For more information please see How to Drive Resistive, Inductive, Capacitive, and Lighting Loads.
Copyright © 2023 Texas Instruments Incorporated
Submit Document Feedback
45
Product Folder Links: TPS281C30
TPS281C30
SLVSGD3A – DECEMBER 2022 – REVISED JUNE 2023
www.ti.com
11 Device and Documentation Support
11.1 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Subscribe to updates to register and receive a weekly digest of any product information that has changed. For
change details, review the revision history included in any revised document.
11.2 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
11.3 Trademarks
TI E2E™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
11.4 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
11.5 Glossary
TI Glossary
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
Copyright © 2023 Texas Instruments Incorporated
46
Submit Document Feedback
Product Folder Links: TPS281C30
PACKAGE OPTION ADDENDUM
www.ti.com
10-Jun-2023
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TPS281C30BRGWR
ACTIVE
VQFN
RGW
20
3000 RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
28C30B
Samples
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
10-Jun-2023
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPS281C30BRGWR
VQFN
RGW
20
3000
330.0
12.4
5.3
5.3
1.1
8.0
12.0
Q2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
10-Jun-2023
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
VQFN RGW 20
SPQ
Length (mm) Width (mm) Height (mm)
367.0 367.0 35.0
TPS281C30BRGWR
3000
Pack Materials-Page 2
GENERIC PACKAGE VIEW
RGW 20
5 x 5, 0.65 mm pitch
VQFN - 1 mm max height
PLASTIC QUAD FLATPACK - NO LEAD
This image is a representation of the package family, actual package may vary.
Refer to the product data sheet for package details.
4227157/A
www.ti.com
PACKAGE OUTLINE
VQFN - 1 mm max height
RGW0020A
PLASTIC QUAD FLATPACK-NO LEAD
5.1
4.9
B
PIN 1 INDEX AREA
5.1
4.9
C
1 MAX
SEATING PLANE
0.08 C
0.05
0.00
3.15±0.1
2X 2.6
(0.1) TYP
10
6
16X 0.65
5
11
SYMM
21
2X
2.6
15
1
0.36
0.26
20X
PIN1 ID
(OPTIONAL)
0.1
C A B
C
20
16
0.05
SYMM
0.65
0.45
20X
4219039/A 06/2018
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for optimal thermal and mechanical performance.
www.ti.com
EXAMPLE BOARD LAYOUT
VQFN - 1 mm max height
RGW0020A
PLASTIC QUAD FLATPACK-NO LEAD
(4.65)
3.15)
(2.6)
(
20
16
16X (0.65)
15
1
(1.325)
21
SYMM
(4.65) (2.6)
(R0.05) TYP
11
5
20X (0.31)
20X (0.75)
(Ø0.2) VIA
6
10
TYP
(1.325)
SYMM
LAND PATTERN EXAMPLE
SCALE: 15X
0.07 MAX
ALL AROUND
0.07 MIN
ALL AROUND
SOLDER MASK
OPENING
EXPOSED METAL
METAL
EXPOSED METAL
METAL UNDER
SOLDER MASK
SOLDER MASK
OPENING
NON SOLDER MASK
SOLDER MASK
DEFINED
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4219039/A 06/2018
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown
on this view. It is recommended that vias under paste be filled, plugged or tented.
www.ti.com
EXAMPLE STENCIL DESIGN
VQFN - 1 mm max height
RGW0020A
PLASTIC QUAD FLATPACK-NO LEAD
(4.65)
4X ( 1.37)
2X (0.785)
16
20
16X (0.65)
21
1
15
2X (0.785)
SYMM
(4.65) (2.6)
(R0.05) TYP
11
5
20X (0.31)
20X (0.75)
METAL
TYP
6
10
SYMM
(2.6)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
EXPOSED PAD
75% PRINTED COVERAGE BY AREA
SCALE: 15X
4219039/A 06/2018
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
www.ti.com
IMPORTANT NOTICE AND DISCLAIMER
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE
DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”
AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
PARTY INTELLECTUAL PROPERTY RIGHTS.
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable
standards, and any other safety, security, regulatory or other requirements.
These resources are subject to change without notice. TI grants you permission to use these resources only for development of an
application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license
is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you
will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these
resources.
TI’s products are provided subject to TI’s Terms of Sale or other applicable terms available either on ti.com or provided in conjunction with
such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for
TI products.
TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2023, Texas Instruments Incorporated
相关型号:
TPS28225D
4-A, 27-V half bridge gate driver with 4-V UVLO for synchronous rectification 8-SOIC -40 to 125
TI
©2020 ICPDF网 联系我们和版权申明