TPS2121 [TI]
支持无缝切换的 2.7V 至 22V、56mΩ、4.5A 电源多路复用器;
| 型号： | TPS2121 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 支持无缝切换的 2.7V 至 22V、56mΩ、4.5A 电源多路复用器 复用器 |
| 文件： | 总45页 (文件大小：2765K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPS2120, TPS2121
ZHCSIQ0F –AUGUST 2018 –REVISED AUGUST 2020
支持无缝切换的TPS212x 2.8V 至22V 主电源多路复用器
1 特性
3 说明
• 宽工作电压范围：2.8 V 至22 V
– 绝对最大输入电压为24V
• 低导通电阻：
TPS212x 器件是双输入、单输出 (DISO) 电源多路复
用器 (MUX)，非常适合用于各种多电源系统。这些器
件能够在可用输入之间自动检测、选择和无缝转换。
– TPS2120：62mΩ（典型值）
– TPS2121: 56mΩ（典型值）
• 可调节过压监控器(OVx)：
– 精度< ±5%
• 可调节优先级监控器(PR1)：
– 精度< ±5%
优先级可自动分配给最高输入电压或手动分配给较低
的电压输入，以支持 ORing 和资源选择操作。优先级
电压监控器用于选择输入源。
理想二极管运行用于在输入源之间无缝转换。在切换
期间，需对压降进行控制以阻止反向电流的发生，并以
最小的保持电容为负载提供不间断电源。
• TPS2121 支持外部电压基准(CP2)，精度<1%
• 输出电流限制(ILM)：
在启动和切换期间，需对电流进行限制以防止过流事
件，同时在器件正常工作期间为其提供保护。可使用单
个外部电阻器调节输出电流限制。
– TPS2120：1 A –3 A
– TPS2121: 1 A –4.5 A
TPS212x 器件采用 WCSP 和小型 VQFN-HR 封装选
项，可在-40°C 至125°C 的温度范围内正常运行。
• 通道状态指示(ST)
• 可调节输入建立时间(SS)
• 可调节输出软启动时间(SS)
• TPS2121 快速输出切换(tSW)：5µs（典型值）
• 使能输入的低IQ：200µA（典型值）
• 禁用输入的低IQ：10µA（典型值）
• 手动输入源选择(OVx)
器件信息
封装(1)
WCSP (20)
VQFN-HR (12)
封装尺寸（标称值）
1.5mm x 2.0mm
2.0mm x 2.5mm
器件型号
TPS2120
TPS2121
• 过热保护(OTP)
(1) 要了解所有可用封装，请见数据表末尾的可订购产品附录。
2 应用
• 备用电源
• 输入源选择
• 多电池管理
• EPOS 和条形码扫描仪
• 楼宇自动化和监控
• 跟踪和远程信息处理
典型应用
本文档旨在为方便起见，提供有关TI 产品中文版本的信息，以确认产品的概要。有关适用的官方英文版本的最新信息，请访问
www.ti.com，其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前，请务必参考最新版本的英文版本。
English Data Sheet: SLVSEA3
TPS2120, TPS2121
ZHCSIQ0F –AUGUST 2018 –REVISED AUGUST 2020
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Table of Contents
10.1 Application Information........................................... 19
10.2 Typical Application.................................................. 19
10.3 Automatic Switchover with Priority (XCOMP)......... 25
10.4 Automatic Seamless Switchover with Priority
1 特性................................................................................... 1
2 应用................................................................................... 1
3 说明................................................................................... 1
4 Revision History.............................................................. 2
5 Device Comparison Table...............................................3
6 Pin Configuration and Functions...................................4
7 Specifications.................................................................. 6
7.1 Absolute Maximum Ratings........................................ 6
7.2 ESD Ratings............................................................... 6
7.3 Recommended Operating Conditions.........................6
7.4 Thermal Information....................................................6
7.5 Electrical Characteristics.............................................7
7.6 Typical Characteristics................................................9
8 Parameter Measurement Information..........................10
9 Detailed Description......................................................11
9.1 Overview................................................................... 11
9.2 Functional Block Diagram......................................... 11
9.3 Feature Description...................................................12
9.4 TPS2120 Device Functional Modes..........................18
9.5 TPS2121 Device Functional Modes..........................18
10 Application and Implementation................................19
(XREF)........................................................................ 27
10.5 Highest Voltage Operation (VCOMP)..................... 28
10.6 Reverse Polarity Protection with TPS212x............. 31
10.7 Hotplugging with TPS212x......................................31
11 Power Supply Recommendations..............................33
12 Layout...........................................................................33
12.1 Layout Guidelines................................................... 33
12.2 Layout Example...................................................... 33
13 Device and Documentation Support..........................34
13.1 Documentation Support.......................................... 34
13.2 接收文档更新通知................................................... 34
13.3 支持资源..................................................................34
13.4 Trademarks.............................................................34
13.5 静电放电警告.......................................................... 34
13.6 术语表..................................................................... 34
14 Mechanical, Packaging, and Orderable
Information.................................................................... 34
4 Revision History
注：以前版本的页码可能与当前版本的页码不同
Changes from Revision E (February 2020) to Revision F (August 2020)
Page
• 更新了整个文档中的表格、图和交叉参考的编号格式.........................................................................................1
Changes from Revision D (September 2019) to Revision E (February 2020)
Page
• Updated the Leakage Current in the Electrical Characteristics table in the Specifications section....................6
Changes from Revision C (February 2019) to Revision D (September 2019)
Page
• Updated the Reverse Polarity Protection with TPS212x section .....................................................................31
• Updated the 节10.7 section ............................................................................................................................ 31
Changes from Revision B (December 2018) to Revision C (February 2019)
Page
• 在特性部分将“可调节过压监控器(OVx) 精度”更改为< ±5%.........................................................................1
• Changes made in the Recommended Operating Conditions and Electrical Characteristics table in the
Specifications section......................................................................................................................................... 6
• Changes made in the Active Current Limiting (ILM) section.............................................................................13
• Changed (typical) from 170°C to 160°C in the Thermal Protection (TSD) section............................................ 14
• Changed Equation 8 and Equation 9 ...............................................................................................................23
Changes from Revision A (November 2018) to Revision B (December 2018)
Page
• 将“预告信息”更改为“量产数据”.................................................................................................................. 1
Changes from Revision * (August 2018) to Revision A (November 2018)
Page
• 将“宽工作电压范围”更改为“2.7V 至22V”.................................................................................................. 1
• Revised the Application and Implementation section....................................................................................... 19
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5 Device Comparison Table
Part Number
TPS2120
Package
WCSP (20)
On-Resistance
62 mΩ
Maximum Current
Fastest Switchover
Unique Pin
SEL
100 us
5 us
3 A
CP2
TPS2121
VQFN-HR (12)
4.5 A
56 mΩ
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6 Pin Configuration and Functions
图6-1. TPS2120 (YFP) Package 20-Pin WCSP Bottom View
图6-2. TPS2121 (RUX) Package 12-Pin VQFN-HR Bottom View
Pin Functions
PIN
TPS2120
WCSP
TPS2121
I/O
DESCRIPTION
NAME
VQFN-HR
IN1
IN2
B1, B2, C1
B3, B4, C4
7
2
I
I
Power Input for Source 1
Power Input for Source 2
C2, C3, D1,
D2, D3, D4
1, 8
OUT
I
Power Output
ST
E1
E2
E3
E4
9
O
O
Status output indicating which channel is selected. Connect to GND if not required.
Output Current Limiting for both channels.
ILIM
SS
10
11
12
6
O
Adjusts Input Setting Delay Time and Output Soft Start Time
Device Ground
GND
—
Enables Priority Operation. Connect to IN1 to set switchover voltage. Connect to
GND if not required.
PR1
OV1
OV2
SEL
A1
A2
A3
A4
I
I
I
I
5
4
Active Low Enable Supervisor for IN1 Overvoltage Protection. Connect to GND if
not required.
Active Low Enable Supervisor for IN2 Overvoltage Protection. Connect to GND if
not required.
Active low Enable for IN1. Allows GPIO to override priority operation and manually
select IN2. TPS2120 only.
—
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Pin Functions (continued)
PIN
TPS2120
WCSP
TPS2121
VQFN-HR
3
I/O
DESCRIPTION
NAME
Enables Comparator Operation and is compared to PR1 to set switchover voltage.
Connect to GND if not required. TPS2121 only.
CP2
I
—
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7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
Pins
MIN
MAX
UNIT
VIN1 , VIN2
VOUT
,
IN1, IN2,
OUT
Maximum Power Pin Voltage
-0.3
24
6
V
VOV1
VOV2
,
Maximum Overvoltage Pin Voltage
OV1, OV2
-0.3
V
VPRI , VSEL Maximum Control Pin Voltage
PRI, SEL
ST
-0.3
-0.3
6
6
V
V
VST
Maximum Control Pin Voltage
Maximum Output Current
Maximum Junction Temperature
Storage temperature
IOUT
OUT
Internally Limited
Internally Limited
TJ, MAX
TSTG
-65
150
°C
(1) Stresses beyond those listed under Absolute Maximum Rating may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under
Recommended Operating Condition. Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability.
7.2 ESD Ratings
Pins
VALUE
UNIT
Human body model (HBM), per ANSI/ESDA/
JEDEC JS-001, (1)
All
±2000
VESD
Electrostatic discharge
V
Charged device model (CDM), per JEDEC
specification JESD22-C101, (2)
All
±500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
Pins
IN1, IN2
OUT
MIN
2.8
0
MAX
22
UNIT
V
VIN1 , VIN2 Input Voltage Range(1)
VOUT
Output Voltage Range
Overvoltage Pin Voltage
22
V
VOV1
VOV2
,
OV1, OV2
0
5.5
V
VPRI , VSEL Control Pin Voltage
PRI, SEL
ST
0
0
5.5
5.5
20
V
V
VST
Control Pin Voltage
RST
Status Pin Pull Up Resistance
Current Limit Resistance
SS Pin Output Voltage
ST
6
kΩ
kΩ
V
RILM
ILM
18
100
4
VSS
SS
IIN1 , IIN2
IIN1 , IIN2
TJ
TPS2120 Continuous Input Current
TPS2121 Continuous Input Current
Junction temperature
IN1, IN2
IN1, IN2
-
3
A
4.5
125
A
-40
°C
(1) See Power Supply Recommendations Section for more Details
7.4 Thermal Information
TPS2120
YFP (WCSP)
20 PINS
TPS2121
RNW (PKG FAM)
11 PINS
THERMAL METRIC(1)
UNIT
RθJA
Junction-to-ambient thermal resistance
72.5
72.2
°C/W
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7.4 Thermal Information (continued)
TPS2120
TPS2121
THERMAL METRIC(1)
YFP (WCSP)
20 PINS
0.5
RNW (PKG FAM)
UNIT
11 PINS
38.5
15.4
0.9
RθJC(top)
RθJB
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
16.4
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
0.3
ΨJT
16.6
15.5
N/A
ΨJB
RθJC(bot)
N/A
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
7.5 Electrical Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TJ
MIN
TYP
MAX UNIT
INPUT SOURCE (IN1, IN2)
Quiescent Current
IQ, INx
OUT = Open
-40°C to 125°C
300
15
400
µA
(INx Powering OUT) (1)
25°C
0
25
25
1
µA
µA
µA
µA
µA
µA
µA
µA
V
Standby Current
ISBY, INx
VOUT = VINx
(INx not powering OUT)(1)
-40°C to 125°C
25°C
-1
-5
-40°C to 85°C
-40°C to 125°C
25°C
5
|VINx - VOUT| ≤5V
-80
-1
80
1
Leakage Current
ILK, INx
(INx to OUT)
-40°C to 85°C
-40°C to 125°C
-40°C to 125°C
-40°C to 125°C
-35
-500
2.5
2.4
35
500
2.8
2.7
|VINx - VOUT| ≤22V
VINx Rising
VINx Falling
2.65
2.55
VUV, INx Undervoltage Lockout
V
OUTPUT SWITCHOVER (OUT)
VOUT < VINx
CP2 or SEL < VREF
tSW
Switchover Time
-40°C to 125°C
-40°C to 125°C
100
5
µs
µs
VOUT < VINx
CP2 ≥VREF
Fast Switchover Time
(TPS2121 only)
tFSW
-40°C to 125°C
-40°C to 125°C
0
280
3.5
600
4.5
mV
%
V
IN1 ≥VIN2
Input Voltage Comparator
VCOMP
(VIN2 referenced to VIN1
)
VIN1 > VIN2, Falling Hysteresis
2.5
ON-RESISTANCE (INx to OUT)
25°C
62
75
90
mΩ
mΩ
mΩ
mΩ
mΩ
mΩ
mΩ
mΩ
IOUT = -200 mA
VPRI > VREF
-40°C to 85°C
-40°C to 105°C
-40°C to 125°C
25°C
ON-State Resistance (TPS2120)
ON-State Resistance (TPS2121)
100
120
70
V
INx ≥5.0 V
RON
56
IOUT = -200 mA
VPRI > VREF
-40°C to 85°C
-40°C to 105°C
-40°C to 125°C
85
90
V
INx ≥5.0 V
100
CURRENT LIMIT (ILM)
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MAX UNIT
7.5 Electrical Characteristics (continued)
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TJ
MIN
3
TYP
3.5
2.5
1.5
2.5
5.2
4.5
3.5
2.5
1.5
2.5
250
-40°C to 125°C
-40°C to 125°C
-40°C to 125°C
-40°C to 125°C
-40°C to 125°C
-40°C to 125°C
-40°C to 125°C
-40°C to 125°C
-40°C to 125°C
-40°C to 125°C
-40°C to 125°C
4
3
A
A
A
A
A
A
A
A
A
A
µs
RILM = 31.6kΩ
2
RILM = 46.4kΩ
RILM = 85kΩ
Output Current Limit (TPS2120)
1
2
1.5
4.6
4
3.5
5.8
5
RILM < 1kΩ
RILM = 18.7kΩ
RILM = 22.1kΩ
RILM = 29.8kΩ
RILM = 44.2kΩ
RILM = 80kΩ
(2)
ILM
3
4
Output Current Limit (TPS2121)
Current Limit Response Time
2
3
1
2
1.5
3.5
RILM < 1kΩ
(3)
tLM
Output Steady State
CONTROL PINS (PRI, SEL, OV1, OV2)
VPR1, VCP2, VOV1, VOV2 Rising
VPR1, VCP2, VOV1, VOV2 Falling
-40°C to 125°C
-40°C to 125°C
1.01
0.99
1.06
1.04
1.1
V
V
VREF, x Internal Voltage Reference
1.09
Comparator Offset Voltage
(TPS2121 only)
VPR1 > VREF
VCP2 > VREF
VOFST
-40°C to 125°C
-40°C to 125°C
5
20
40
mV
µA
VPR1, VCP2, VOV1, VOV2 = 0 V to 5.5
V
ILK, x
Pin Leakage Current
-0.1
0.1
STATUS INDICATION PIN (ST)
ILK, ST
tST
Pin Leakage
Status Delay
VST = 0 V to 5.5 V
L to H
-40°C to 125°C
-40°C to 125°C
-0.1
0.1
µA
µs
1
FAST REVERSE CURRENT BLOCKING (RCB)
Fast Reverse Current Detection
Threshold
IRCB
VOUT > VINx
VOUT > VINx
-40°C to 125°C
-40°C to 125°C
-40°C to 125°C
0.2
0
1
25
10
2
A
VRCB
tRCB
RCB Release Voltage
50
mV
µs
Fast Reverse Current Blocking
Response Time
THERMAL SHUTDOWN (TSD)
TSD Thermal Shutdown
Shutdown
Recovery
Rising
Falling
160
150
°C
°C
(1) When PR1 < VREF, CP2 < VREF, and |VIN1-VIN2| < 1V, Quiescent current can be drawn from both IN1 and IN2 with combined current
not to exceed IQ,INx
.
(2) The current limit can be measured by forcing a voltage differential from VIN to VOUT. This value must be at least 200mV greater than
the voltage drop across the device at the current limit threshold (ILM x RON(MAX)). For example, the TPS2121 would need a minimum
voltage drop of (1.5A x 100mΩ+ 200mV) = 350mV from VIN to VOUT for a current limit setting of 1.5A (typical).
(3) For more information on device behavior during short circuit conditions, see Section 9.3.3.
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7.6 Typical Characteristics
320
312
304
296
288
280
272
264
256
248
240
260
240
220
200
180
160
-40èC
25èC
85èC
125èC
-40èC
25èC
85èC
125èC
2
4
6
8
10
Input Voltage (V)
12
14
16
18
20
22
2
4
6
8
10
Input Voltage (V)
12
14
16
18
20
22
D001
D002
ILM = 5.2A
图7-1. Quiescent Current vs Input Voltage
ILM = 1.5A
图7-2. Quiescent Current vs Input Voltage
16
15
14
13
12
11
10
9
18
16
14
12
10
8
-40èC
-40èC
8
25èC
85èC
125èC
25èC
85èC
125èC
7
6
6
2
4
6
8
10
Input Voltage (V)
12
14
16
18
20
22
2
4
6
8
10
Input Voltage (V)
12
14
16
18
20
22
D003
D004
ILM = 5.2A
图7-3. Standby Current vs Input Voltage
ILM = 1.5A
图7-4. Standby Current vs Input Voltage
104
96
88
80
72
64
56
48
40
18
15
12
9
-40èC
5V
12V
20V
25èC
85èC
125èC
6
3
0
2
4
6
8
10
12
14
Input Voltage (V)
16
18
20
22
1
2
3 4 567 10 20 30 50 70100 200
CSS Capacitor (nF)
500 1000
D005
D006
IOUT = -200 mA
VIN1 > UVLO
VIN2 = 0V
图7-5. TPS2121 On-Resistance vs Input Voltage
图7-6. Output Slew Rate vs CSS Capacitor
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7.6 Typical Characteristics (continued)
VIN1 = 12 V
VIN2 = 0 V
VIN1 = 12 V
VIN2 = 0 V
VOUT = GND
RILM = 71.5kΩ
图7-7. TPS2121 Hot Short on OUT while IN1 is Enabled
图7-8. TPS2120 IN1 is Enabled with a Short on OUT
8 Parameter Measurement Information
图8-1. Timing Parameter Diagram
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9 Detailed Description
9.1 Overview
The TPS212x devices are Dual-Input, Single-Output (DISO) Power Multiplexer (MUX) that are well suited for a
variety of systems having multiple power sources. The devices will automatically detect, select, and seamlessly
transition between available inputs. Priority can be automatically given to the highest input voltage or manually
assigned to a lower voltage input to support both ORing and Source Selection operations. A priority voltage
supervisor is used to select an input source.
An Ideal Diode operation is used to seamlessly transition between input sources. During switchover, the voltage
drop is controlled to block reverse current before it happens and provide uninterrupted power to the load with
minimal hold-up capacitance. Active current limiting is used during startup and switchover to protect against
overcurrent, and also protects the device during normal operation. The output current limit can be adjusted with
a single external resistor.
9.2 Functional Block Diagram
The below figures show the block diagrams for the TPS2120 and TPS2121. The TPS2120 has the SEL pin,
while the TPS2121 has the CP2 pin and supports fast switchover.
BFET1
HFET1
IN1
Temp
SNS
PR1
+
ST
œ
VREF
GND
Control Logic
+ Gate Drivers
SS
SEL
OV1
+
œ
VREF
+
OUT
ILM
œ
VREF
OV2
IN2
+
Current
Limit
œ
Temp
SNS
VREF
BFET2
HFET2
图9-1. TPS2120 Functional Block Diagram
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BFET1
HFET1
IN1
Temp
SNS
PR1
+
ST
œ
VREF
+
GND
Control Logic
+ Gate Drivers
VOFST
œ
SS
CP2
OV1
+
œ
VREF
+
OUT
ILM
œ
VREF
OV2
IN2
+
Current
Limit
œ
Temp
SNS
VREF
BFET2
HFET2
图9-2. TPS2121 Functional Block Diagram
9.3 Feature Description
This section describes the different features of the TPS212x power mux device.
9.3.1 Input Settling Time and Output Soft Start Control (SS)
The TPS212x will automatically select the first source to become valid (INx >UV and INx <OV). The external
capacitor (CSS) will then be used as a timer to wait for the input to finish setting (tSETx). When the settling timer
has expired, CSS will continue to charge and set the output slew rate (SRON) for a soft start. After the total turn
on time (tONx), soft start will not be used again for INx until it ceases to be valid (INx <UV or INx >OV).
When the second source becomes valid (INy >UV and INy <OV), the external capacitor (Css) will be used again
for a second settling time (tSETy). After tSETy, the TPS212x will decide whether to continue sourcing the first
source, or switchover to the second source. If the second source is selected at the end of tSETy, then CSS will
be reused to set the output slew rate (SRON) for a second soft start. After the total turn on time (tONy), soft start
will not be used again for INy until it ceases to be valid (INy <UV or INy >OV).
图9-3. Settling and Soft Start Timing
If INy becomes valid before the end of tONx, tSETy will be delayed and start after tONx has ended.
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If INy is not selected during tSETy, a second soft start will not take place, skipping tONy, and CSS will be retired
until one of the inputs ceases to be valid.
9.3.1.1 Slew Rate vs. CSS Capacitor
表9-1 shows the estimated slew rate across CSS capacitance and VIN.
表9-1. Slew Rate vs. CSS Capacitor
CSS CAPACITOR
VIN = 5 V
VIN = 12 V
VIN = 20 V
UNITS
V/s
100 nF
780
800
92
880
1 uF
88
92
V/s
10 uF
8.8
9.6
10.4
V/s
9.3.2 Active Current Limiting (ILM)
The load current is monitored at all times. When the load current exceed the current limit trip point ILM
programmed by RILM resistor, the device regulates the current within tILM. The following equations can be used
to find the RILM value for a desired current limit, where RILM is in kΩand between 18 kΩto 100 kΩ.
69.1
ILM
=
0.861
RILM
TPS2120:
(1)
65.2
ILM
=
0.861
RILM
TPS2121:
(2)
During current regulation, the output voltage will drop resulting in increased device power dissipation. If the
device junction temperature (TJ) reaches the thermal shutdown threshold (TSD) the internal FETs are turned off.
After cooling down, the device will automatically restart.
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图9-4. Current Limiting Behavior
9.3.3 Short-Circuit Protection
During a transient short circuit event, the current through the device increases very rapidly. As the current-limit
amplifier cannot respond quickly to this event due to its limited bandwidth, the device incorporates a fast-trip
overcurrent protection (OCP) comparator, with a threshold IOCP. This comparator shuts down the pass device
within 1 µs, when the current through internal FET IOUT exceeds IOCP (IOUT> IOCP). The trip threshold is set to
about 2.4x of the programmed current limit IOCP = 2.4 × ILM. The OCP circuit holds the internal FET off for about
25 ms, after which the device turns back on. If the short is still present then the current-limit loop will regulate the
output current to ILM and behave in a manner similar to a power up into a short.
9.3.4 Thermal Protection (TSD
)
The TPS212x devices have built-in absolute thermal shutdown and relative thermal shutdown to ensure
maximum reliability of the power mux. The absolute thermal shutdown is designed to disable the power FETs, if
the junction temperature exceeds 160°C (typical). The device auto recovers about 25 ms after TJ < [T (TSD) –
10°C]. The relative thermal shutdown protects the device by turning off when the temperature of the power FETs
increases sharply such that the FET temperature rises about 60°C above the rest of the die. The device auto
recovers about 25 ms after the FETs cools down by 20°C. The relative thermal shutdown is critical for protecting
the device against faults such as a power up into a short which causes the FET temperature to increase sharply.
9.3.5 Overvoltage Protection (OVx)
Output Overvoltage Protection is available for both IN1 and IN2 in case either applied voltage is greater than the
maximum supported load voltage. The VREF comparator on the OVx pins allow for the Overvoltage Protection
threshold to be adjusted independently for each input. When overvoltage is engaged, the corresponding channel
will turn off immediately. Fast switchover to the other input is supported if it is a valid voltage.
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VSUPPLY
R1
OVx
R2
图9-5. OVP Resistor Configuration
9.3.6 Fast Reverse Current Blocking (RCB)
Each channel has the always on reverse current blocking. If the output is forced above the selected input by
VIRCB, the channel will switch off to stop the reverse current IRCB within tRCB. As the output falls to within VRCB of
VIN, the selected channel will quickly turn back on to avoid unnecessary voltage drops during fast switchover
(tSW).
图9-6. Reverse Current Blocking Behavior
9.3.7 Output Voltage Dip and Fast Switchover Control (TPS2121 only)
After input settling and soft start time, the TPS2121 utilizes a fast switchover to minimize output voltage drop.
Where VSW is the output voltage when the switchover is triggered and tSW is the time until the output voltage
stops dipping. The amount of voltage dip during the switchover time is a function of output load current (IOUT)
and load capacitance (COUT). The minimum output voltage during switchover can be found using the following
equations:
VOUT,MIN = VSW -VDIP
(3)
Where:
≈
’
IOUT
VDIP = t SW
ì
∆
∆
«
÷
÷
◊
COUT
(4)
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图9-7. Minimum Output Voltage During Fast Switchover
If switching from a lower to a higher voltage, the selected channel will not detect reverse voltage and shall turn
on immediately using the current monitor to limit the output current to a safe level. If the output current reaches
the current limit during fast switchover, this will increase the total time until the output reaches steady state.
VIN2
Input
VIN1
Voltages
0 V
H
PRI
VREF
L
VIN2
VOUT
tSW
VIN1
VSW
VOUT,MIN
SROUT
Current Limited
IOUT
0
IIN2
Time
VOUT,MIN = VSW - (tSWxSROUT) where SROUT = IOUT/COUT
VOUT,MIN = 3.5 V - (5µs x 30mV/µs) = 3.35 V
VOUT,MIN = 3.5 V - (5µs x 1A/10µF) = 3 V
VOUT,MIN = 3.5 V - (5µs x 1A/100µF) = 3.45 V
图9-8. Fast Switchover from Lower to Higher Voltage
If an input is selected while the output voltage is still a higher voltage, that channel will continue to block reverse
current by waiting to fast turn on until the output drops below the VRCB threshold.
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VIN2
VIN1
Input
Voltages
0 V
1
OV2
0
VIN2
tSW
VOUT
SROUT
VRCB
VIN1
VOUT,MIN
No Spikes
IOUT
0
IIN1
Time
VOUT,MIN = VIN1 + VRCB - (tSW x SROUT) where SROUT = IOUT/COUT
VOUT,MIN = 4.25 V + 50 mV - (5µs x 30mV/µs) = 4.15 V
VOUT,MIN = 4.25 V + 50 mV - (5µs x 1A/10µF) = 3.8 V
VOUT,MIN = 4.25 V + 50 mV (5µs x 1A/100µF) = 4.25 V
图9-9. Fast Switchover from Higher to Lower Voltage
9.3.8 Input Voltage Comparator (VCOMP)
If both PR1 and CP2 are < VREF, the device will use an internal comparator between the two inputs to
determine the priority source. VCOMP is configured to ensure IN2 will take priority if the input voltages are equal.
If IN2 falls below the VCOMP Hysteresis, then IN1 will have priority.
图9-10. VCOMP Priority Source Selection
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9.4 TPS2120 Device Functional Modes
表9-2 shows the TPS2120 functional behavior.
表9-2. TPS2120 Output Source Selection Table
MODE OF
OPERATION
DEVICE INPUTS
DEVICE OUTPUTS
IN1 ≤UV OR
OV1 ≥VREF OR
SEL ≥VREF
IN2 ≤UV OR
OV2 ≥VREF
VCOMP
OUT
ST
MODE
PR1 ≥VREF
0
0
0
0
1
1
0
0
0
1
0
1
0
0
IN2 < IN1
IN1
IN2
IN1
IN1
IN2
Hi-Z
H
L
VCOMP
VCOMP
IN2 ≥IN1
1
X
X
X
X
H
H
L
VREF
X
X
X
Invalid Input
SEL / Invalid Input
Invalid Inputs
H
A summary of the operation of the TPS2120 device can be found below:
• If only one input voltage is valid (above UV and below OV) then that input will power the output.
• If both inputs are not valid, then the output is Hi-Z.
• ST is pulled high when the output is Hi-Z or IN1. It is pulled low when IN2 is powering the output.
• If both inputs are valid and PR1 is pulled high (higher than VREF, 1.06-V typical), then IN1 is used.
• If both inputs are valid and PR1 is pulled low, then the highest voltage input is used.
9.5 TPS2121 Device Functional Modes
表9-3 shows the TPS2121 functional behavior.
表9-3. TPS2121 Output Source Selection Table
MODE OF
OPERATION
DEVICE INPUTS
DEVICE OUTPUTS
IN1 ≤UV OR
OV1 ≥VREF
IN2 ≤UV OR
OV2 ≥VREF
CP2 ≥
VREF
PR1 ≥
VREF
VCOMP
XCOMP
OUT
ST
MODE
0
X
0
X
0
X
0
1
1
X
0
X
0
X
0
1
0
1
0
0
0
1
1
1
X
X
X
0
0
1
0
1
1
X
X
X
IN2 < IN1
X
IN1
IN2
IN1
IN2
IN1
IN2
IN1
IN2
Hi-Z
H
L
VCOMP
VCOMP
X
IN2 ≥IN1
X
X
X
X
X
X
X
X
H
L
VREF
X
VREF
PR1 > CP2
H
L
XCOMP / XREF
XCOMP / XREF
Invalid Input
Invalid Input
Invalid Inputs
PR1 ≤CP2
X
X
X
H
L
H
A summary of the operation of the TPS2121 device can be found below:
• If only one input voltage is valid (above UV and below OV) then that input will power the output.
• If both inputs are not valid, then the output is Hi-Z.
• ST is pulled high when the output is Hi-Z or IN1. It is pulled low when IN2 is powering the output.
• If CP2 is pulled low, then the TPS2121 ignores this pin.
• When CP2 is pulled high, this enables fast switchover and is compared to PR1. If PR1 > CP2 then IN1 is
used, and if PR1 < CP2 then IN2 is used.
• If both inputs are valid, CP2 is low, and PR1 is pulled high, (higher than VREF, 1.06-V typical), then IN1 is
used.
• If both inputs are valid, CP2 is low, and PR1 is pulled low, then the highest voltage input is used.
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10 Application and Implementation
备注
以下应用部分的信息不属于TI 组件规范，TI 不担保其准确性和完整性。客户应负责确定 TI 组件是否适
用于其应用。客户应验证并测试其设计，以确保系统功能。
10.1 Application Information
The TPS212x device is a highly configurable power mux that can be designed to meet various application
requirements. When designing the TPS212x for a power mux configuration, 3 key factors should be considered:
• VOUT voltage dip
• Manual and Automatic Switchover
• Switchover Time
The TPS212x device can be configured in various modes to meet these considerations and provides a general
table that describes each mode of operation. This application section will highlight 3 common modes of
operation that address these factors.
10.2 Typical Application
表10-1 summarizes the applications highlighted in the following sections.
表10-1. TPS212x Application Summary Table
MODE
DEVICE(S)
DESCRIPTION
SECTION
An external controller (such as an MCU) can be used
to manually select between the two input sources.
Manual Switchover
TPS2120 / TPS2121
11.2.1
Automatic Switchover with
Priority (XCOMP)
Prioritizes Supply 1 when present, and quickly
switches to Supply 2 when Supply 1 drops.
TPS2121
TPS2121
11.3
11.4
11.5
Prioritizes Supply 1 when present, and quickly
switches to Supply 2 when Supply 1 drops. An external
supply is used to increase the accuracy of the
comparator for switchover.
Automatic Switchover with
Priority (XREF)
Highest Voltage Operation
(VCOMP)
The device automatically selects the highest voltage
supply to power the output.
TPS2120 / TPS2121
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10.2.1 Manual Switchover Schematic
图10-1 and 图10-2 show the application schematic for manual switchover on the TPS2120 and TPS2121.
图10-1. TPS2120 Manual Switchover
图10-2. TPS2121 Manual Switchover
10.2.2 Design Requirements
In certain power architectures, an external MCU or controller monitors the downstream load. If the controller
needs to select between multiple supplies, the controller can manually switch between inputs through a single
GPIO. In this configuration, an external signal will switch between two input supplies, a 5-V supply (IN1) and a
3.3-V supply (IN2). 表10-2 summarizes the design parameters for this example.
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表10-2. Manual Switchover Design Requirements
DESIGN PARAMETER
SPECIFICATION
DETAILS
5 V
IN1 Voltage
IN2 Voltage
VIN1
VIN1
3.3 V
Load Current
IOUT
500 mA
100 µF
100 mA
2 A
Load Capacitance
Maximum Inrush Current
Current Limit
CL
IINRUSH
Switchover Time
tSW
Manual Switchover
VMCU
TPS2121: 5 µs
TPS2120: 100 µs
Mode of Operation
TPS2120: VREF
TPS2121: XREF
External MCU Signal
Overvoltage Protection
3.3 V
VOV1
VOV2
OV1 : 6.1 V
OV2: 4 V
10.2.3 Detailed Design Description
The TPS212x devices can be configured to manually switch between IN1 and IN2 through an external GPIO. In
this example, an external MCU signal is selecting between main power and auxiliary power to power a
downstream load. By manually toggling the TPS212x, the device will switch between both sources, even if one
supply is higher than the other supply. Ultimately, the main factor that will determine the switchover time between
IN1 (5 V) and IN2 (3.3 V) is the output load.
Manual switchover can be enabled by configuring the TPS212x for internal voltage reference control scheme
(VREF). In the VREF scheme, if the voltage on PR1 is higher than the internal VREF voltage, 1.06 V (typical),
the device will select IN1 as the output. If the voltage on PR1 drops below VREF, then the device will switch to
IN2, as long as IN2 is presenting a valid input voltage. IN1 is commonly connected to PR1 with an external
resistor divider. OV1 and OV2 can be configured to provide overvoltage protection. The ST pin can be pulled
high with a resistor to provide feedback on the status of the system. If the status pin is high, IN1 is the output. If
the pin is low, IN2 is the output. If this feature is not required, the ST pin can be connected to GND.
On the TPS2120, by connecting an external signal to the select pin (SEL), the device can override the PR1/
VREF comparison. If the voltage on SEL is higher than VREF at approximately (1.06 V), then the device will
select IN2, as shown on 表 9-2. If the voltage on SEL drops below VREF, then the device will switch to IN1 as
long as PR1 >= VREF. Otherwise, the highest voltage input will be chosen between IN1 and IN2. In this
example, since the IN1 is higher than IN2, at 5 V, it will be selected.
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图10-3 shows the application schematic for this design example on the TPS2120.
图10-3. TPS2120 Manual Switchover
On the TPS2121, fast switchover can be enabled to minimize the voltage drop on VOUT. The internal
comparator will detect and seamlessly switch between IN1 and IN2 as long as a reverse voltage condition does
not exist on that channel. To enable fast switchover on the TPS2121, CP2 needs to be higher than VREF, 1.06-V
(typical). By using the external voltage reference control scheme (XREF), the voltages on PR1 and CP2 pins are
compared to determine whether IN1 or IN2 is powering the output. If the voltage on PR1 is higher than CP2,
then IN1 is powering the output. If the voltage on PR1 is lower than CP2, then IN2 is powering the output.
Manual switchover on the TPS2121 is configured by connecting PR1 to IN1 with a resistor divider, and
connecting CP2 to the external 3.3-V MCU signal. If the voltage on CP2 is higher than the voltage on PR1, then
IN2 will power the output. However, if CP2 is toggled low, then IN1 will power the output, assuming IN1 has a
valid input voltage.
The diagram below shows the application schematic for this design example on the TPS2121.
图10-4. TPS2121 Manual Switchover
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10.2.4 Design Procedure
10.2.4.1 Selecting PR1 and CP2 Resistors
The TPS2120 does not contain a CP2 pin. Instead, a select pin (SEL), enables override of the PR1 / VREF
comparison. Once the voltage on SEL is greater than VREF, the device will select IN2 as the output. For manual
switchover, an external signal can be connected to the SEL pin. For this example, the external MCU signal is a
3.3-V enable.
The TPS2121 can be configured for manual switchover in a similar manner as the TPS2120. Instead of a SEL
pin, the 3.3-V external MCU signal can be connected to CP2. As long as the voltage on CP2 is higher than PR1,
the device will select IN2 as the output. When the voltage on CP2 drops below PR1, the device will switch back
to IN1. Therefore, the resistor divider on PR1 is configured the same as above, with the 5 kΩand 10.2 kΩ.
For additional precautions, the voltage on PR1 can also be configured. If the voltage on IN1 were to drop, the
device can automatically switchover to IN2. In this example, if voltage on IN1 drops below IN2 (3.3 V) then the
device will switch to IN2. Therefore, the resistor divider on PR1 should be configured such that the voltage on
PR1 will drop below VREF, when IN1 dips below 3.3 V. The bottom resistor is chosen to be 5 kΩ due to it's
commonality and minimal current leakage. If a smaller leakage is desired, a larger resistor can be used. With this
configuration, the top resistor was selected to be 10.2 kΩ. With this resistor configuration, the device will switch
to IN2 when the voltage on IN1 dips to 3.22 V. Refer to 表9-2 for additional information regarding the switchover
configuration.
See Equation 5 for the VPR1 Calculation
5 kW
5 kW + 10.2 kW
VPR1 = VIN1
ì
5 kW
5 kW + 10.2 kW
1.06 V = V ì
= 3.22 V
IN1
(5)
10.2.4.2 Selecting OVx Resistors
Independent output overvoltage protection is available for both IN1 and IN2. The VREF comparator on the OV1
and OV2 pins allows for the overvoltage protection thresholds to be adjusted independently, allowing for different
overvoltage thresholds on each channel. When overvoltage is engaged, the corresponding channel will turn off
immediately if the pin reaches VREF, 1.06 V (typical). On this design, the overvoltage thresholds are triggered at
roughly 1-V higher than the nominal input voltages. On IN1, the overvoltage resistor divider was programmed to
be 6.08 V, where as the divider on IN2 was programmed to be 3.96 V. The OV resistor calculations are shown in
Equation 6 and Equation 7.
≈
’
5 kW
5 kW + 23.7 kW
1.06 V = V ì
= 6.08 V
= 3.96 V
IN1
∆
«
÷
◊
(6)
(7)
≈
’
5 kW
1.06 V = V
ì
IN2
∆
÷
5 kW + 13.7 kW
«
◊
10.2.4.3 Selecting Soft-Start Capacitor and Current Limit Resistors
Equation 1 can be used to determine the RLIM values for this application. In this example, the DC load current is
1 A. Setting the current limit to 2 A will limit potential inrush current events and protect downstream loads. See
Equation 8 for the TPS2120 ILM Calculation:
69.1
ILM
=
= 2.06A
590.861
(8)
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See Equation 9 for the TPS2121 ILM Calculation:
65.2
ILM
=
= 1.95A
590.861
(9)
To calculate the slew rate needed to limit the inrush current to 100 mA, the Slew Rate Calculation can be used in
Equation 10:
IINRUSH
SRON
=
CL
(10)
(11)
100 mA
SRON
=
= 1000 V / S
100 mF
Using this equation, the slew rate must be limited to 1000V/S or below to keep the inrush current below 100 mA.
According to 表 9-1, at 5 V a CSS capacitance of 100 nF will provide a slew rate of 780V/S (typical), which is
below the calculated threshold of 1000V/S. Therefore, a 100 nF capacitor will limit the inrush below 100 mA in a
typical application.
10.2.5 Application Curves
图10-5. TPS2120 Switchover from IN1 to IN2
图10-6. TPS2120 Switchover from IN2 to IN1
图10-7. TPS2121 Switchover from IN1 to IN2
图10-8. TPS2121 Switchover from IN2 to IN1
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10.3 Automatic Switchover with Priority (XCOMP)
In certain applications, the system needs to provide uninterrupted sources of power. If one of the input power
supplies were to fail, the system needs to automatically switchover to a backup power source without interrupting
normal operation. In this example, two scenarios will be demonstrated. The first example will prioritize a 12-V
main supply, and switchover to a 5-V auxiliary supply whenever the 12 V is not present. The second example will
showcase power redundancy with two 12-V supplies. If one 12-V supply were to fail, the device will seamlessly
switchover to the backup supply.
10.3.1 Application Schematic
图 10-9 shows the application schematic for automatic switchover on the TPS2121 between a 12-V and 5-V
supply.
IN1
(12V)
System Load
(2A, 200µF)
IN1
PRI
OUT
18.2kO
5kO
63.4kO
5kO
ST
OV1
TPS2121
IN2
(5V)
IN2
10.2kO
5kO
SS
1µF
CP2
23.7kO
5kO
ILM
OV2
21.5kO
GND
图10-9. Automatic Switchover Between 12 V and 5 V
10.3.2 Design Requirements
表10-3. Automatic Switchover Design Requirements
DESIGN PARAMETER
IN1 Voltage
SPECIFICATION
DETAILS
12 V
VIN1
IN2 Voltage
VIN1
5 V
Load Current
IOUT
2 A
Load Capacitance
Maximum Inrush Current
Switchover Time
Mode of Operation
CL
IINRUSH
200 µF
100 mA
tSW
TPS2120: 5 µs
TPS2121: XCOMP
Automatic Switchover
10.3.3 Detailed Design Description
The first example demonstrates automatic switchover from main power (IN1) to standby power (IN2). This
architecture is commonly found on applications that require a secondary/auxiliary input to conserve power while
keeping downstream loads on. When switching between main and auxiliary power, the voltage drop on the
output should also be minimal to prevent the downstream load from resetting or entering a lockout condition.
In this first example, the system is prioritizing the 12-V main supply on IN1. When the 12-V supply drops below
7.6 V, the device will automatically switch to the 5-V auxiliary supply on IN2. When the 12-V supply returns, it will
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become the output supply again. Furthermore, the voltage drop on the output should be minimal, providing the
output with uninterrupted redundant power.
To minimize the voltage dip on the output, the TPS2121 will be used in fast switchover mode. By configuring the
device in external comparator control scheme (XCOMP), the voltages on PR1 and CP2 are compared to
determine whether IN1 or IN2 is powering the output. However, unlike the XREF mode, described above in the
manual switchover configuration, XCOMP does not connect an external GPIO signal to the CP2 pin. Instead,
PR1 and CP2 are connected to IN1 and IN2 respectively, allowing a direct voltage comparison between the two
input channels. PR1 and CP2 are connected to IN1 and IN2 with a resistor divider. If the voltage on CP2 is
higher than the voltage on PR1, then IN2 will power the output. If the voltage on PR1 is higher than the voltage
on CP2, then IN1 will power the output.
10.3.4 Design Procedure
10.3.4.1 Selecting PR1 and CP2 Resistors
In this example, the device will switch from IN1 to IN2 when the voltage on IN1 drops below 7.6 V. Therefore, the
voltage on PR1 needs to remain higher than the voltage on CP2 until this condition exists.
Since this example was tested on the TPS2121EVM, the resistor divider configured the voltage on CP2 to be
1.644 V.
See Equation 12 for the VCP2 Calculation
5 kW
5 kW + 10.2 kW
VCP2 = 5 V ì
= 1.64 V
(12)
Since the voltage on CP2 is higher than VREF, fast switchover mode is enabled.
Next, to calculate the necessary resistor divider on PR1, the voltage on PR1 needs to drop below 1.64 V when
IN1 reaches 7.6 V. On the EVM, the PR1 resistors were configured as followed:
See Equation 13 for the VPR1 Caculation
5 kW
5 kW + 18.2 kW
VPR1 = 12 V ì
= 2.59 V
5 kW
5 kW + 18.2 kW
1.64 V = VSW ì
= 7.6 V
(13)
10.3.5 Application Curves
图10-11. Automatic Switchover from IN2 to IN1
图10-10. Automatic Switchover from IN1 to IN2
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10.4 Automatic Seamless Switchover with Priority (XREF)
In this second automatic switchover example, the application design will showcase power redundancy with two
12-V supplies. If one 12-V supply were to fail, the device will seamlessly switchover to the backup supply.
10.4.1 Application Schematic
图10-12 shows the application schematic for automatic switchover with redundant supplies on the TPS2121.
IN1
(12V)
System Load
(2.5A, 320µF)
IN1
PRI
OUT
12kO
1MO
Hyst
ST
XREF
3V
57.6kO
5kO
CP2
OV1
TPS2121
IN2
(12V)
IN2
57.6kO
5kO
SS
OV2
1µF
ILM
21.5kO
GND
图10-12. Automatic Switchover Between Two 12-V Supplies
10.4.2 Design Requirements
表10-4. Automatic Switchover Design Requirements
DESIGN PARAMETER
Input Voltage Range
Output Voltage Range
Load Current
SPECIFICATION
DETAILS
12.1 V ± 3%
12 V ± 5%
2.5 A
VIN1, VIN2
VOUT
IOUT
Load Capacitance
Switchover Time
CL
tSW
320 µF
TPS2120: 5 µs
TPS2121: XREF
Mode of Operation
Automatic Switchover
10.4.3 Detailed Design Description
In the second example, the system seamlessly switches between two 12-V supplies, providing uninterrupted
power to a downstream load. Priority is given to IN1, the main 12-V power rail, and switches over to IN2, the
backup 12-V power rail, whenever IN1 dips. When the main power rail returns, the device will switch back to the
main supply. Redundant power is critical in systems that require uninterrupted sources of power. If the output
voltage were to dip on these systems, this could cause the downstream load to reset to enter an undervoltage
lockout condition. Therefore, the TPS2121 will be used in fast switchover mode to minimize the output voltage
dip.
Similar to the automatic switchover example shown above, the TPS2121 can be configured in XCOMP mode.
However, to minimize the voltage switchover error for a more seamless switchover, an external precision
regulator can be connected to CP2 in XREF mode. In this configuration, a REF3325 provides an external
reference voltage on 2.5 V ± 0.15% (2.50375V). If the voltage on PR1 is higher than this external reference,
priority will be given to IN1. If the voltage on PR1 drops below 2.50375V, then the device will switchover to IN2.
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The design specifications detail the input voltage range for 12.1 ± 3%. Therefore, the resistor divider on PR1 is
configured such that the voltage on the pin dips below 2.50375V before IN1 crosses 11.73 V (12.1 V – 3%).
Once this occurs, the design will start fast switchover to IN2 within 5 us.
For additional information regarding this configuration, including full design procedures, schematics, and layout,
please refer to TIDA-01638: Seamless Switchover for Backup Power Reference Design.
10.4.4 Application Curves
图10-14. Fast Switchover Demonstration
图10-13. Seamless Switchover Between Two 12-V
Supplies
10.5 Highest Voltage Operation (VCOMP)
10.5.1 Application Schematic
图 10-15 shows the application schematic for highest voltage operation on the TPS2121. The same
configuration can be completed on the TPS2120, with the SEL pin connected to GND instead of the CP2 pin.
IN1
(5V)
System Load
(0.5A, 100µF)
IN1
OUT
23.7kO
OV1
PR1
5k
ST
TPS2121
IN2
(5V)
IN2
23.7kO
5kO
SS
0.01uF
OV2
CP2
ILM
51.1kO
GND
图10-15. Highest Voltage Operation
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10.5.2 Design Requirements
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表10-5. Highest Voltage Design Requirements
DESIGN PARAMETER
Input Voltage
SPECIFICATION
DETAILS
5 V
VIN1, VIN2
Output Voltage
VOUT
5 V
Load Current
IOUT
0.5 A
Load Capacitance
Switchover Time
Mode of Operation
CL
tSW
100 µF
TPS2121: 100 µs
Automatic Switchover
TPS2121: VCOMP
10.5.3 Detailed Design Description
In this mode of operation, the device will use an internal comparator between the two inputs to determine the
priority source. If both PR1 and CP2 are below VREF, priority is given to the highest input voltage. If both of the
inputs voltages are equal, VCOMP and hysteresis ensures that IN2 takes priority. If IN2 falls below the VCOMP
hysteresis, then IN1 will have priority. If IN2 gets reapplied, it will take priority when it falls within VCOMP of IN1.
In this example, the TPS2120 is configured with two 5-V inputs. When IN2 is applied to the system, it takes
priority over IN1. Once it gets removed, priority returns to IN1.
10.5.4 Detailed Design Procedure
See 表 9-2 to summarize the priority between IN1 and IN2. Once IN2 reaches within VCOMP of IN1, the
TPS2120 will switchover to IN2. Since IN1 is 5 V, once IN2 reaches 4.7 V (5 V – 300 mV), typically, the device
will switch over to IN2. On the falling transition, once IN2 drops below VCOMP of IN1, the added hysteresis will
prevent the device from switching back to IN1. Once IN2 drops below VCOMP and the hysteresis (3.5% typical) ,
the device will switch. Therefore, the device will switch back to IN1 once IN1 reaches (5 V – 300 mV – 175
mV), 4.525 V.
10.5.5 Application Curves
图10-16. Switchover from IN1 to IN2
图10-17. Timing from IN1 to IN2
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图10-18. Switchover from IN2 to IN1
10.6 Reverse Polarity Protection with TPS212x
For applications that require reverse polarity protection, the TPS212x can be configured to protect against mis-
wiring input power supplies and block reverse current that could potentially damage the system. By connecting a
diode on the GND pin of the TPS212x, this prevents reverse current from flowing back into the device when VIN
is below system ground.
Since the TPS212x has an absolute maximum rating of 24 V when referenced to device ground, the GND diode
should be rated to standoff voltages up to the maximum reverse voltage. Furthermore, since the control pin
voltages (PR1, OV1, OV2, etc.) are in reference to system GND, the voltage thresholds will need to be
recalculated based on the voltage drop across the diode. To reduce the voltage drop, a resistor in parallel with
the diode can also be used.
IN1
OUT
Supply 1
System Load
ESD Diode
ESD Diode
PR1
OV1
SEL
ST
µC
IN2
SS
Supply 2
CSS
ESD Diode
Device GND
System GND
OV2
ILM
GND
Diode
RILM
Device GND
System GND
图10-19. TPS212x Reverse Polarity Configuration
10.7 Hotplugging with TPS212x
Some applications require power muxing between hotplugged inputs, such as USB applications or systems with
secondary supplies coming from a long cable. During a hot plug event, the inherent inductance in the cable and
input traces can cause a voltage spike on the input pin (V = LCABLE * dI / dT). This can cause a voltage spike on
the input of the TPS212x that could potentially exceed the absolute maximum rating.
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+
VIN1
-
IN1
OUT
Supply 1
System Load
PR1
+
VIN2
-
Supply 2
IN2
SS
CP2
ILM
GND
图10-20. TPS212x Hotplug Configuration
图10-21 shows a hotplug event where a 12-V supply is connected to the TPS212x through a 15ft cable. Without
an external TVS, the input voltage spikes to over 30 V. To protect against this voltage transient, a clamping
device such as a TVS (Transient Voltage Suppression) diode can be used. As shown in 图 10-22 , by using the
TVS1800, the same voltage spike was clamped to 19.3 V.
图10-21. TPS2121 Hotplug Event without TVS
图10-22. TPS2121 Hotplug Event with TVS1800
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11 Power Supply Recommendations
IN1, IN2, and OUT traces should all be wide enough to accomodate the amount of current passing through the
device. Bypass capacitors on these pins should be placed as close to the device as possible. Low ESR ceramic
capacitors with X5R or X7R dielectric are recommended.
To avoid output voltage drop, the capacitance on OUT can be increased. If the power supply cannot handle the
inrush current transients due to the output capacitance, a higher input capacitance can be used. In the case
where there are long cables or wires connected to the input of the device, there may be ringing on the supply,
especially during the fast switchover of the TPS2121. To help nullify the inductance of the cables and prevent
ringing, a large capacitance can be used near the input of the device.
12 Layout
12.1 Layout Guidelines
Use short wide traces for input and output planes. For high current applications place vias under input and
output pins to avoid current density and thermal resistance bottlenecks.
12.2 Layout Example
The example layout for the TPS2121 shows where to place vias for better thermal dissipation. This can improve
the junction-to-ambient thermal resistance (RθJA).
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13 Device and Documentation Support
13.1 Documentation Support
13.1.1 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to order now.
表13-1. Related Links
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
PARTS
PRODUCT FOLDER
ORDER NOW
TPS2120
TPS2121
Click here
Click here
Click here
Click here
Click here
Click here
Click here
Click here
Click here
Click here
13.2 接收文档更新通知
要接收文档更新通知，请导航至 ti.com 上的器件产品文件夹。点击订阅更新 进行注册，即可每周接收产品信息更
改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。
13.3 支持资源
TI E2E™ 中文支持论坛是工程师的重要参考资料，可直接从专家处获得快速、经过验证的解答和设计帮助。搜索
现有解答或提出自己的问题，获得所需的快速设计帮助。
链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范，并且不一定反映 TI 的观点；请参阅
TI 的使用条款。
13.4 Trademarks
TI E2E™ is a trademark of Texas Instruments.
所有商标均为其各自所有者的财产。
13.5 静电放电警告
静电放电(ESD) 会损坏这个集成电路。德州仪器(TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理
和安装程序，可能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级，大至整个器件故障。精密的集成电路可能更容易受到损坏，这是因为非常细微的参
数更改都可能会导致器件与其发布的规格不相符。
13.6 术语表
TI 术语表
本术语表列出并解释了术语、首字母缩略词和定义。
14 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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EXAMPLE BOARD LAYOUT
YFP0020-C01
DSBGA - 0.5 mm max height
DIE SIZE BALL GRID ARRAY
(0.4) TYP
3
20X ( 0.23)
1
4
2
A
(0.4) TYP
B
C
SYMM
D
E
SYMM
LAND PATTERN EXAMPLE
SCALE:25X
0.05 MAX
0.05 MIN
METAL UNDER
SOLDER MASK
( 0.23)
METAL
(
0.23)
SOLDER MASK
OPENING
SOLDER MASK
OPENING
NON-SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK
DEFINED
SOLDER MASK DETAILS
NOT TO SCALE
4226007/A 06/2020
NOTES: (continued)
3. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints.
For more information, see Texas Instruments literature number SNVA009 (www.ti.com/lit/snva009).
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EXAMPLE STENCIL DESIGN
YFP0020-C01
DSBGA - 0.5 mm max height
DIE SIZE BALL GRID ARRAY
(0.4) TYP
(R0.05) TYP
20X ( 0.25)
3
1
2
4
A
B
(0.4) TYP
METAL
TYP
SYMM
C
D
E
SYMM
SOLDER PASTE EXAMPLE
BASED ON 0.1 mm THICK STENCIL
SCALE:30X
4226007/A 06/2020
NOTES: (continued)
4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release.
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PACKAGE OUTLINE
VQFN-HR - 1 mm max height
RUX0012A
PLASTIC QUAD FLAT-NO LEAD
A
2.1
1.9
B
2.6
2.4
PIN 1 INDEX AREA
1 MAX
C
SEATING PLANE
0.05
0.00
0.08
C
SYMM
(0.1) TYP
0.95
0.75
4X
3
6
0.45
0.25
4X
2X 0.7
2
1
0.1
C A B
7
8
SYMM
0.05
C
0.5
0.3
8X
12
9
0.25
0.15
6X 0.5
8X
2X 1.5
0.1
C A B
0.05
C
4224010/A 11/2017
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
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EXAMPLE BOARD LAYOUT
VQFN-HR - 1 mm max height
PLASTIC QUAD FLAT-NO LEAD
RUX0012A
6X 0.5
8X (0.2)
2X (0.8)
8X (0.6)
9
12
VIA TYP
8
1
SYMM
2X
(0.7)
(2.3)
2
7
4X (0.4)
6
3
4X (1.05)
(R0.05) TYP
SYMM
1.35
LAND PATTERN EXAMPLE
SCALE: 25X
0.05 MAX
ALL AROUND
METAL
SOLDER MASK
OPENING
EXPOSED METAL
NON- SOLDER MASK
DEFINED
4224010/A 11/2017
NOTES: (continued)
3. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271) .
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EXAMPLE STENCIL DESIGN
VQFN-HR - 1 mm max height
RUX0012A
PLASTIC QUAD FLAT-NO LEAD
6X 0.5
8X (0.2)
8X (0.6)
9
12
1
8
SYMM
2X
(2.3)
(0.7)
7
2
4X (0.4)
6
3
4X (1.05)
(R0.05) TYP
SYMM
1.35
SOLDER PASTE EXAMPLE
BASED ON 0.1mm THICK STENCIL
EXPOSED PAD
100% PRINTED COVERAGE BY AREA
SCALE: 25X
4224010/A 11/2017
NOTES: (continued)
4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
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PACKAGE OPTION ADDENDUM
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10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TPS2120YFPR
TPS2120YFPT
TPS2121RUXR
TPS2121RUXT
ACTIVE
ACTIVE
ACTIVE
ACTIVE
DSBGA
DSBGA
YFP
YFP
RUX
RUX
20
20
12
12
3000 RoHS & Green SAC396 | SNAGCU
250 RoHS & Green SAC396 | SNAGCU
3000 RoHS & Green
250 RoHS & Green
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 125
-40 to 125
-40 to 125
-40 to 125
20
20
VQFN-HR
VQFN-HR
NIPDAU
NIPDAU
2121
2121
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
10-Dec-2022
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPS2120YFPR
TPS2120YFPR
TPS2120YFPT
TPS2120YFPT
TPS2121RUXR
DSBGA
DSBGA
DSBGA
DSBGA
YFP
YFP
YFP
YFP
RUX
20
20
20
20
12
3000
3000
250
180.0
180.0
180.0
180.0
180.0
8.4
8.4
8.4
8.4
8.4
1.66
1.66
1.66
1.66
2.25
2.06
2.06
2.06
2.06
2.8
0.56
0.56
0.56
0.56
1.1
4.0
4.0
4.0
4.0
4.0
8.0
8.0
8.0
8.0
8.0
Q1
Q1
Q1
Q1
Q1
250
VQFN-
HR
3000
TPS2121RUXT
VQFN-
HR
RUX
12
250
180.0
8.4
2.25
2.8
1.1
4.0
8.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
10-Dec-2022
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TPS2120YFPR
TPS2120YFPR
TPS2120YFPT
TPS2120YFPT
TPS2121RUXR
TPS2121RUXT
DSBGA
DSBGA
YFP
YFP
YFP
YFP
RUX
RUX
20
20
20
20
12
12
3000
3000
250
182.0
182.0
182.0
182.0
182.0
182.0
182.0
182.0
182.0
182.0
182.0
182.0
20.0
20.0
20.0
20.0
20.0
20.0
DSBGA
DSBGA
250
VQFN-HR
VQFN-HR
3000
250
Pack Materials-Page 2
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