TPS1HA08-Q1 [TI]
具有可选择电流限制的 40V、8mΩ、汽车类单通道智能高侧开关;
| 型号： | TPS1HA08-Q1 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 具有可选择电流限制的 40V、8mΩ、汽车类单通道智能高侧开关 开关 |
| 文件： | 总53页 (文件大小：2044K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Support &
Community
Product
Folder
Order
Now
Tools &
Software
Technical
Documents
TPS1HA08-Q1
ZHCSJ60D –NOVEMBER 2018–REVISED DECEMBER 2019
TPS1HA08-Q1 40V、8mΩ 单通道智能高侧开关
1 特性
3 说明
1
•
•
具有 8mΩ RON (TJ = 25°C) 的单通道智能高侧开关
符合汽车类 应用的 16 通道 AFE：
器件是一款适用于 12V 汽车系统的单通道智能高侧开
关。该器件集成了强大的保护和诊断 功能 以确保在短
路等有害事件中提供输出端口保护。该器件通过可靠的
电流限制来防止故障，其中电流限制可设置为 80A 和
20A（取决于器件型号），也可配置为通过立即关断开
关或将输出电流调节为设置点来应对过流事件。高电流
限制选项使其可用于需要大瞬态电流的负载，而低电流
限制选项可为不需要高峰值电流的负载提供更好的保
护。
–
–
符合 AEC Q-100 标准
器件温度等级 1：–40°C 至 +125°C 的环境工作
温度范围
–
可承受 40V 负载突降
•
•
提供功能安全
提供文档以帮助创建功能安全系统设计
通过可选电流限制提高可靠性
–
–
–
电流限制设置点为 20A 或 80A
还可提供高精度模拟电流检测，可在进行不同的负载分
布时改进诊断。通过向系统 MCU 报告负载电流、设备
温度和电源电压，该器件可实现预测性维护和负载诊
断，从而延长系统寿命。
电流钳位或瞬时关断的过流响应
•
强大的集成输出保护：
–
–
–
–
–
–
集成热保护
接地短路和电池短路保护
电池反向时自动启动
采用小型的 16 引脚 HTSSOP 封装，可减小 PCB 尺
寸。
发生失电和接地失效时自动关闭
集成输出钳位对电感负载进行消磁
可配置故障处理
器件信息(1)
器件型号
封装
封装尺寸（标称值）
•
•
可对模拟检测输出进行配置，以精确测量：
TPS1HA08-Q1
HTSSOP (16)
5.00mm x 4.40mm
–
–
–
负载电流
电源电压
器件温度
(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附
录。
简化原理图
将 FLT 指示返回到 MCU
开路负载和电池短路检测
DIA_EN
SEL1
–
SEL2
2 应用
µC
SNS
ST
•
•
•
车身控制模块
白炽灯和 LED 照明
LATCH
EN
TPS1HA08-Q1
加热元件：
–
–
–
座椅加热器
火花塞
12-V Battery
VBB
油箱加热器
•
•
•
•
变速器控制单元
汽车空调
VOUT
GND
信息娱乐系统显示屏
ADAS 模块
Load
1
本文档旨在为方便起见，提供有关 TI 产品中文版本的信息，以确认产品的概要。 有关适用的官方英文版本的最新信息，请访问 www.ti.com，其内容始终优先。 TI 不保证翻译的准确
性和有效性。 在实际设计之前，请务必参考最新版本的英文版本。
English Data Sheet: SLVSDM4
TPS1HA08-Q1
ZHCSJ60D –NOVEMBER 2018–REVISED DECEMBER 2019
www.ti.com.cn
目录
1
2
3
4
5
6
特性.......................................................................... 1
应用.......................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
Device Comparison Table..................................... 3
Pin Configuration and Functions......................... 4
6.1 Recommended Connections for Unused Pins.......... 5
Specifications......................................................... 6
7.1 Absolute Maximum Ratings ...................................... 6
7.2 ESD Ratings.............................................................. 6
7.3 Recommended Operating Conditions....................... 6
7.4 Thermal Information.................................................. 7
7.5 Electrical Characteristics........................................... 7
7.6 Switching Characteristics.......................................... 9
7.7 SNS Timing Characteristics .................................... 10
7.8 Typical Characteristics............................................ 12
Parameter Measurement Information ................ 18
9
Detailed Description ............................................ 19
9.1 Overview ................................................................. 19
9.2 Functional Block Diagram ....................................... 20
9.3 Feature Description................................................. 21
9.4 Device Functional Modes........................................ 36
10 Application and Implementation........................ 38
10.1 Application Information.......................................... 38
10.2 Typical Application ............................................... 41
11 Power Supply Recommendations ..................... 45
12 Layout................................................................... 46
12.1 Layout Guidelines ................................................. 46
12.2 Layout Example .................................................... 46
13 器件和文档支持 ..................................................... 47
13.1 器件支持................................................................ 47
13.2 商标....................................................................... 47
13.3 静电放电警告......................................................... 47
13.4 Glossary................................................................ 47
14 机械、封装和可订购信息....................................... 47
7
8
4 修订历史记录
Changes from Revision C (May 2019) to Revision D
Page
•
向特性 部分添加了提供功能安全的链接.................................................................................................................................. 1
Changes from Revision B (January 2019) to Revision C
Page
•
•
•
•
•
•
已添加 向特性 和说明 部分添加了指向引用应用手册的链接................................................................................................... 1
Removed the Product Preview note from Device Version B,D,E in the Device Comparison Table ...................................... 3
Updated the Absolute Maximum Ratings and Electrical Characteristics tables in the Specifications section ....................... 6
Updated 图 7 ........................................................................................................................................................................ 13
已添加 paragragh to the Undervoltage Lockout (UVLO) section.......................................................................................... 22
Added app note link to 图 41 title ........................................................................................................................................ 24
Changes from Revision A (December 2018) to Revision B
Page
•
Deleted note from Device Version C in the Device Comparison Table ................................................................................ 3
Changes from Original (September 2017) to Revision A
Page
•
已更改 从“预告信息”更改为“生产数据”.................................................................................................................................... 1
2
Copyright © 2018–2019, Texas Instruments Incorporated
TPS1HA08-Q1
www.ti.com.cn
ZHCSJ60D –NOVEMBER 2018–REVISED DECEMBER 2019
5 Device Comparison Table
Device Version
Full Device Number
TPS1HA08A-Q1
TPS1HA08B-Q1
Current Limit (ICL
)
Overcurrent Behavior
Disable Switch Immediately
Disable Switch Immediately
Watchdog Feature
Disabled
A
B
20 A
80 A
Disabled
Clamp Current at ICL until Thermal
Shutdown
C
TPS1HA08C-Q1
20 A
Disabled
Clamp Current at ICL until Thermal
Shutdown
D
E
TPS1HA08D-Q1
TPS1HA08E-Q1
80 A
20 A
Disabled
Enabled
Disable Switch Immediately
Copyright © 2018–2019, Texas Instruments Incorporated
3
TPS1HA08-Q1
ZHCSJ60D –NOVEMBER 2018–REVISED DECEMBER 2019
www.ti.com.cn
6 Pin Configuration and Functions
PWP Package
16-Pin HTSSOP
Top View
GND
SNS
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
DIA_EN
SEL2
SEL1
NC
LATCH
EN
VBB
ST
NC
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
Pin Functions
PIN
I/O
DESCRIPTION
NO.
NAME
GND
SNS
1
—
O
I
Device ground
Sense output
2
3
LATCH
EN
Sets fault handling behavior (latched or auto-retry)
Switch control input, active high
Switch diagnostic feedback, active low
Switch output
4
I
5
ST
O
O
--
--
I
6, 7, 8, 9, 10, 11
VOUT
NC
12
No Connect
13
NC
No Connect
14
SEL1
SEL2
DIA_EN
VBB
Diagnostics Select 1
15
16
I
Diagnostics Select 2
I
Diagnostic enable, active high
Power supply input
Exposed pad
I
4
Copyright © 2018–2019, Texas Instruments Incorporated
TPS1HA08-Q1
www.ti.com.cn
ZHCSJ60D –NOVEMBER 2018–REVISED DECEMBER 2019
6.1 Recommended Connections for Unused Pins
The device is designed to provide an enhanced set of diagnostic and protection features. However, if the system
design only allows for a limited number of I/O connections, some pins may be considered as optional.
Table 1. Connections for Optional Pins
PIN NAME
CONNECTION IF NOT USED
IMPACT IF NOT USED
SNS
Ground through 1-kΩ resistor Analog sense is not available.
With LATCH unused, the device will auto-retry after a fault. If latched
behavior is desired it is possible to use one microcontroller output to
control the latch function of several high-side channels.
Float or ground through
RPROT resistor
LATCH
ST
All faults are indicated by the analog SNS pin. The ST pin provides the
additional benefits:
•
•
•
Provide fault indication when DIA_EN = 0
Provide fault indication regardless of SELx pin conditions
Provide fault indication to a simple digital I/O (rather than ADC or
comparator used with the SNS signal)
Float
Float or ground through
RPROT resistor
SEL1 selects between the VBB and TJ sensing features. With SEL1
unused, only load diagnostics are available.
SEL1
SEL2
Ground through RPROT
resistor
With SEL2 = 0 V, VBB measurement diagnostics are not available.
Float or ground through
RPROT resistor
With DIA_EN unused, analog sense, open-load and short-to-battery
diagnostics are not available.
DIA_EN
RPROT is used to protect the pins from excess current flow during reverse battery conditions, for more information
please see the section on Reverse Battery protection.
Copyright © 2018–2019, Texas Instruments Incorporated
5
TPS1HA08-Q1
ZHCSJ60D –NOVEMBER 2018–REVISED DECEMBER 2019
www.ti.com.cn
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
MAX
36
UNIT
V
VBB
Maximum continuous supply voltage
Load dump voltage
VLD
ISO16750-2:2010(E)
40
V
VRev
VEN
Reverse battery voltage, VREV ≤ 3 minutes
Enable pin voltage
–18
–1
–1
–1
–1
–1
V
7
7
7(2)
V
VLATCH
VST
VDIA_EN
VSNS
LATCH pin voltage
V
Status pin voltage
V
Diagnostic Enable pin voltage
Sense pin voltage
7
V
7
V
VSEL1
VSEL2
,
Select pin voltage
–1
7
V
IGND
Reverse ground current
VBB < 0 V
–50
95
mA
mJ
mJ
°C
Single pulse, LOUT = 5 mH, TA = 125°C
Repetitive pulse, 10 Hz, LOUT = 5 mH, TA = 125°C
ETOFF
Energy dissipation during turn-off
56
TJ
Maximum junction temperature
Storage temperature
150
150
Tstg
–65
°C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) These pins are adjacent to pins that will handle high-voltages. In the event of a pin-to-pin short, there will not be device damage.
7.2 ESD Ratings
VALUE
UNIT
All pins except exposed pad and
pins 6 to 11
±2000
Human-body model (HBM), per AEC Q100-002(1)
Charged-device model (CDM), per AEC Q100-011
Electrostatic
discharge
V(ESD)
V
Exposed pad and pins 6 to 11
All pins
±4000
±750
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
8
MAX
UNIT
VBB
Nominal supply voltage
Extended operating range
Enable voltage
18
28
V
V
V
V
V
(1)
VBB
3
VEN
–1
–1
–1
5.5
5.5
5.5
VLATCH
VDIA_EN
LATCH voltage
Diagnostic enable voltage
VSEL1
VSEL2
,
Select voltage
–1
5.5
V
VST
Status voltage
0
–1
0
5.5
VSNSclamp
10
V
V
A
VSNS
IMAX
Sense voltage
Continuous load current
TA = 70°C
(1) Device will function within extended operating range, however some parametric values might not apply
6
Copyright © 2018–2019, Texas Instruments Incorporated
TPS1HA08-Q1
www.ti.com.cn
ZHCSJ60D –NOVEMBER 2018–REVISED DECEMBER 2019
7.4 Thermal Information
TPS1HA08-Q1
THERMAL METRIC(1)(2)
PWP (HTSSOP)
UNIT
16 PINS
32.8
30.7
9.3
RθJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJC(top)
RθJB
Junction-to-board thermal resistance
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
2.6
ψJB
9.4
RθJC(bot)
1.0
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
(2) The thermal parameters are based on a 4-layer PCB according to the JESD51-5 and JESD51-7 standards.
7.5 Electrical Characteristics
VBB = 8 V to 18 V, TJ = –40°C to 150°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
INPUT VOLTAGE AND CURRENT
VClamp
VUVLOF
VUVLOR
VDS clamp voltage
40
58
3
V
V
V
VBB undervoltage lockout falling
VBB undervoltage lockout rising
2.5
2.5
3
VBB = 13.5 V, TJ = 25°C
VEN = VDIA_EN = 0 V, VOUT = 0 V
0.5
0.5
3
µA
µA
µA
µA
µA
mA
VBB = 13.5 V, TJ = 85°C
VEN = VDIA_EN = 0 V, VOUT = 0 V
Standby current (includes
MOSFET leakage)
ISB
VBB = 13.5 V, TJ = 125°C,
VEN = VDIA_EN = 0 V, VOUT = 0 V
VBB = 13.5 V, TJ = 25°C
VEN = VDIA_EN = 0 V, VOUT = 0 V
0.01
0.5
3
IOUT(standby)
Output leakage current
VBB = 13.5 V, TJ = 125°C
VEN = VDIA_EN = 0 V, VOUT = 0 V
VBB = 13.5 V, ISNS = 0 mA
VEN = 0 V, VDIA_EN = 5 V, VOUT = 0V
Current consumption in
diagnostic mode
IDIA
3
6
VBB = 13.5 V
VEN = VDIA_EN = 5 V, IOUT = 0 A, VSELX = 0 V
IQ
Quiescent current
3
6
mA
ms
tSTBY
Standby mode delay time
VEN = VDIA_EN = 0 V to Standby
20
RON CHARACTERISTICS
TJ = 25°C, 6 V ≤ VBB ≤ 28 V
TJ = 150°C, 6 V ≤ VBB ≤ 28 V
TJ = 25°C, 3 V ≤ VBB ≤ 6 V
TJ = 25°C, -18 V ≤ VBB ≤ -8 V
TJ = 105°C, -18 V ≤ VBB ≤ -8 V
9
9
mΩ
mΩ
mΩ
mΩ
mΩ
On-resistance
Includes MOSFET and package
RON
20
15
On-resistance during reverse
polarity
RON(REV)
20
CURRENT SENSE CHARACTERISTICS
Current sense ratio
IOUT / ISNS
KSNS
4600
Copyright © 2018–2019, Texas Instruments Incorporated
7
TPS1HA08-Q1
ZHCSJ60D –NOVEMBER 2018–REVISED DECEMBER 2019
www.ti.com.cn
Electrical Characteristics (continued)
VBB = 8 V to 18 V, TJ = –40°C to 150°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
–5
TYP
MAX
5
UNIT
mA
%
4.35
IOUT = 20 A
IOUT = 8 A
1.74
0.65
mA
%
–5
5
mA
%
IOUT = 3 A
–5
5
Current sense current and
current sense accuracy
VEN = VDIA_EN = 5 V, VSEL1
VSEL2 = 0 V
=
ISNSI
0.217
0.065
0.022
mA
%
IOUT = 1 A
–5
5
mA
%
IOUT = 300 mA
IOUT = 100 mA
–12
–42
12
42
mA
%
TJ SENSE CHARACTERISTICS
TJ = –40°C
TJ = 25°C
TJ = 85°C
TJ = 150°C
0.12
0.85
mA
mA
VDIA_EN = 5 V, VSEL1 = 5 V, VSEL2
= 0 V
ISNST
Temperature sense current
1.52
mA
2.25
mA
dISNST/dT
Coefficient
0.0112
mA/°C
VBB SENSE CHARACTERISTICS
VBB = 3 V
0.26
0.69
mA
mA
VBB = 8 V
VDIA_EN = 5 V, VSEL1 = 5 V, VSEL2
= 5 V
ISNSV
Voltage sense current
Coefficient
VBB = 13.5 V
VBB = 18 V
VBB = 28 V
1.17
mA
1.56
mA
2.43
mA
dISNSV/dV
0.0867
mA/V
SNS CHARACTERISTICS
ISNSFH
ISNS fault high level
VDIA_EN = 5 V, VSEL1 = 0 V, VSEL2 = 0
VDIA_EN = 0 V
6
0
6.9
5.9
7.6
1
mA
µA
V
ISNSleak
VSNSclamp
ISNS leakage
VSNS clamp
CURRENT LIMIT CHARACTERISTICS
TJ = –40°C
75.5
68
88.8
80
102.1
92
Device Version B/D
TJ = 25°C
TJ = 150°C
TJ = –40°C
TJ = 25°C
TJ = 150°C
A
A
51
60
69
ICL
Current Limit
16
22.2
20
27.8
25
Device Version A/C/E
14.4
10.8
15
18.8
ST PIN CHARACTERISTICS
VOL Open-load detection voltage
VEN = 0 V, VDIA_EN = 5 V
From falling edge of EN
VEN= 5 V to 0 V, VDIA_EN = 5 V, VSELx = 00
IOUT = 0 mA, VOUT = 4 V
2
2.5
4
V
OL and STB indication time -
switch disabled
tOL1
300
500
700
µs
From rising edge of DIA_EN
VEN = 0 V, VDIA_EN = 0 V to 5 V, VSELx = 00
IOUT = 0 mA, VOUT = 4 V
OL and STB indication time -
switch disabled
tOL2
50
50
µs
µs
From rising edge of VOUT
VEN = 0 V, VDIA_EN = 5 V, VSELx = 00
IOUT = 0 mA, VOUT = 0 V to 4 V
OL and STB indication time -
switch disabled
tOL3
TABS
THYS
Thermal shutdown
160
°C
°C
Thermal shutdown hysteresis
20
2
Minimum time from fault shutdown to switch re-enable (for
thermal shutdown, current limit, and energy limit)
tRETRY
tWD
Retry time
1
3
ms
ms
Watchdog timer
Device version E
350
400
450
8
Copyright © 2018–2019, Texas Instruments Incorporated
TPS1HA08-Q1
www.ti.com.cn
ZHCSJ60D –NOVEMBER 2018–REVISED DECEMBER 2019
Electrical Characteristics (continued)
VBB = 8 V to 18 V, TJ = –40°C to 150°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
EN PIN CHARACTERISTICS(1)
VIL, EN
VIH, EN
VIHYS, EN
IIL, EN
Input voltage low level
0.8
V
V
Input voltage high level
Input voltage hysteresis
Input current low level
Input current high level
No GND network Diode
No GND network Diode
VEN = 0.8 V
2
250
0.8
2
mV
µA
µA
MΩ
IIH, EN
REN
VEN = 2.0 V
Internal pulldown resistor
1
(1)
DIA_EN PIN CHARACTERISTICS
VIL, DIA_EN
VIH, DIA_EN
VIHYS, DIA_EN
IIL, DIA_EN
IIH, DIA_EN
RDIA_EN
Input voltage low level
Input voltage high level
Input voltage hysteresis
Input current low level
Input current high level
Internal pulldown resistor
No GND network Diode
No GND network Diode
0.8
0.8
0.8
V
V
2
2
2
250
0.8
2
mV
µA
µA
MΩ
VDIA_EN = 0.8 V
VDIA_EN = 2.0 V
1
(1)
SEL1 AND SEL2 PIN CHARACTERISTICS
VIL, SELx
VIH, SELx
VIHYS, SELx
IIL, SELx
Input voltage low level
Input voltage high level
Input voltage hysteresis
Input current low level
Input current high level
No GND network Diode
V
V
250
0.8
2
mV
µA
µA
MΩ
VSELx = 0.8 V
VSELx = 2.0 V
IIH, SELx
RSELx
Internal pulldown resistor
1
(1)
LATCH PIN CHARACTERISTICS
VIL, LATCH
VIH, LATCH
VIHYS, LATCH
IIL, LATCH
IIH, LATCH
RLATCH
Input voltage low level
Input voltage high level
Input voltage hysteresis
Input current low level
Input current high level
No GND network Diode
No GND network Diode
V
V
250
0.8
2
mV
µA
µA
MΩ
VLATCH = 0.8 V
VLATCH = 2.0 V
Internal pulldown resistor
1
(1)
ST PIN CHARACTERISTICS
VOL, ST
ISTleak
Output voltage low level
Leakage current
IST = 1 mA
VST = 5 V
0.4
2
V
µA
(1) VBB = 3 to 28 V
7.6 Switching Characteristics
VBB = 13.5 V, TJ = –40°C to 150°C (unless otherwise noted)
PARAMETER
Turn-on delay time
Turn-off delay time
TEST CONDITIONS
MIN
20
TYP
70
MAX
UNIT
tDR
tDF
VBB = 13.5 V, RL = 2.6 Ω
VBB = 13.5 V, RL = 2.6 Ω
100
100
µs
µs
20
50
VBB = 13.5 V, 20% to 80% of VOUT
RL = 2.6 Ω
,
,
SRR
SRF
VOUT rising slew rate
VOUT falling slew rate
0.1
0.1
0.35
0.5
0.7
0.7
V/µs
V/µs
VBB = 13.5 V, 80% to 20% of VOUT
RL = 2.6 Ω
tON
Turn-on time
VBB = 13.5 V, RL = 2.6 Ω
VBB = 13.5 V, RL = 2.6 Ω
200-µs enable pulse
39
39
80
75
0
145
145
50
µs
µs
tOFF
Turn-off time
tON - tOFF
EON
Turn-on and off matching
–50
µs
Switching energy losses during turn-on VBB = 13.5 V, RL = 2.6 Ω
Switching energy losses during turn-off VBB = 13.5 V, RL = 2.6 Ω
0.4
0.4
mJ
mJ
EOFF
Copyright © 2018–2019, Texas Instruments Incorporated
9
TPS1HA08-Q1
ZHCSJ60D –NOVEMBER 2018–REVISED DECEMBER 2019
www.ti.com.cn
7.7 SNS Timing Characteristics
VBB = 8 to 18 V, TJ = –40°C to 150°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SNS TIMING - CURRENT SENSE
VEN = 5 V, VDIA_EN = 0 V to 5 V
RSNS = 1 kΩ, RL = 2.6 Ω
tSNSION1
tSNSION2
tSNSION3
tSNSIOFF1
tSETTLEH
tSETTLEL
Settling time from rising edge of DIA_EN
Settling time from rising edge of EN
40
180
180
20
µs
µs
µs
µs
µs
µs
VEN = VDIA_EN = 0 V to 5 V
RSNS = 1 kΩ, RL = 2.6 Ω
VEN = 0 V to 5 V, VDIA_EN = 5 V
RSNS = 1 kΩ, RL = 2.6 Ω
Settling time from rising edge of EN
VEN = 5 V, VDIA_EN = 5 V to 0 V
RSNS = 1 kΩ, RL = 2.6 Ω
Settling time from falling edge of DIA_EN
Settling time from rising edge of load step
Settling time from falling edge of load step
VEN = 5 V, VDIA_EN = 5 V
RSNS = 1 kΩ, IOUT = 1 A to 5 A
20
VEN = 5 V, VDIA_EN = 5 V
RSNS = 1 kΩ, IOUT = 5 A to 1 A
20
SNS TIMING - TEMPERATURE SENSE
VEN = 5 V, VDIA_EN = 0 V to 5 V
RSNS = 1 kΩ
tSNSTON1
tSNSTON2
tSNSTOFF
Settling time from rising edge of DIA_EN
40
70
20
µs
µs
µs
VEN = 0 V, VDIA_EN = 0 V to 5 V
RSNS = 1 kΩ
Settling time from rising edge of DIA_EN
Settling time from falling edge of DIA_EN
VEN = X, VDIA_EN = 5 V to 0 V
RSNS = 1 kΩ
SNS TIMING - VOLTAGE SENSE
VEN = 5 V, VDIA_EN = 0 V to 5 V
RSNS = 1 kΩ
tSNSVON1
tSNSVON2
tSNSVOFF
Settling time from rising edge of DIA_EN
40
70
20
µs
µs
µs
VEN = 0 V, VDIA_EN = 0 V to 5 V
RSNS = 1 kΩ
Settling time from rising edge of DIA_EN
Settling time from falling edge of DIA_EN
VEN = X, VDIA_EN = 5 V to 0 V
RSNS = 1 kΩ
SNS TIMING - MULTIPLEXER
VEN= X, VDIA_EN = 5 V
VSEL1 = 5 V to 0 V, VSEL2 = 0 V
RSNS = 1 kΩ, RL = 2.6 Ω
Settling time from temperature sense to current
sense
60
60
60
60
60
60
µs
µs
µs
µs
µs
µs
VEN = X, VDIA_EN = 5 V
VSEL1 = 5 V, VSEL2 = 0 V to 5 V
RSNS = 1 kΩ
Settling time from temperature sense to voltage
sense
VEN = X, VDIA_EN = 5 V
VSEL1 = 5 V, VSEL2 = 5 V to 0 V
RSNS = 1 kΩ
Settling time from voltage sense to temperature
sense
tMUX
VEN = X, VDIA_EN = 5 V
VSEL1 = VSEL2 = 5 V to 0 V,
RSNS = 1 kΩ, RL = 2.6 Ω
Settling time from voltage sense to current sense
VEN = X, VDIA_EN = 5 V
VSEL1 = 0 V to 5 V, VSEL2 = 0 V
RSNS = 1 kΩ, RL = 2.6 Ω
Settling time from current sense to temperature
sense
VEN = X, VDIA_EN = 5 V
VSEL1 = VSEL2 = 0 V to 5 V
RSNS = 1 kΩ, RL = 2.6 Ω
Settling time from current sense to voltage sense
10
版权 © 2018–2019, Texas Instruments Incorporated
TPS1HA08-Q1
www.ti.com.cn
ZHCSJ60D –NOVEMBER 2018–REVISED DECEMBER 2019
VEN
VDIA_EN
IOUT
ISNS
tSNSION1
tSNSION2
tSNSION3
tSNSIOFF1
VEN
VDIA_EN
IOUT
ISNS
tSETTLEH
tSETTLEL
VEN
VDIA_EN
TJ
ISNS
tSNSTON1
tSNSTON2
tSNSTOFF
NOTES: Rise and fall times of control signals are 100 ns. Control signals include: EN, DIA_EN, SEL1, SEL2.
SEL1 and SEL2 must be set to the appropriate values.
The temperature sense timing diagram can also be used to depict the voltage sense timings.
图 1. SNS Timing Characteristics Definitions
版权 © 2018–2019, Texas Instruments Incorporated
11
TPS1HA08-Q1
ZHCSJ60D –NOVEMBER 2018–REVISED DECEMBER 2019
www.ti.com.cn
(1)
VEN
50%
50%
90%
10%
90%
tDR
tDF
VOUT
10%
tON
tOFF
Rise and fall time of VEN is 100 ns.
图 2. Switching Characteristics Definitions
7.8 Typical Characteristics
2.7
1.25
VBB
8 V
13.5 V
18 V
2.65
2.6
1
0.75
2.55
2.5
0.5
0.25
0
2.45
-40
-10
20
50 80
Temperature (°C)
110
140
-40
-20
0
20
40
Temperature (°C)
60
80
100
120
SLVS
SLVS
VBB = 13.5 V to 0 V
VEN = 5 V
ROUT = 1 kΩ
VDIAG__EN = 0 V
VOUT = 0 V
VEN = 0 V
VDIAG_EN = 0 V
图 3. Falling Undervoltage Lockout (VUVLOF) vs Temperature
图 4. Standby Current (ISB) vs Temperature
0.8
5
4
3
2
8 V
13.5 V
18 V
VBB
8 V
13.5 V
18 V
0.6
0.4
0.2
0
-40
-20
0
20
40
60
80
100
120
-40
-20
0
20
40
60
80
100
120
Temperature (èC)
Temperature (èC)
SLVS
SLVS
VOUT = 0 V
VEN = 0 V
VDIAG_EN = 0 V
IOUT = 0 A
VEN = 5 V
VSEL1 = VSEL2 = 0 V
VDIAG_EN = 5 V
RSNS = 1 kΩ
图 5. Output Leakage Current (IOUT(standby)) vs Temperature
图 6. Quiescent Current (IQ) vs Temperature
12
版权 © 2018–2019, Texas Instruments Incorporated
TPS1HA08-Q1
www.ti.com.cn
ZHCSJ60D –NOVEMBER 2018–REVISED DECEMBER 2019
Typical Characteristics (接下页)
18
20
16
12
8
VBB
8 V
13.5 V
18 V
16
14
12
10
8
-40èC
25èC
60èC
85èC
4
105èC
125èC
150èC
6
0
-40
-15
10
35
60
85
110
135 150
0
4
8
12
16
20
24
28
Temperature (èC)
VBB (V)
SLVS
SLVS
IOUT = 200 mA
VEN = 5 V
VDIAG_EN = 0 V
IOUT = 200 mA
VEN = 5 V
VBB = 13.5 V
VDIAG_EN = 0 V
RSNS = 1 kΩ
RSNS = 1 kΩ
图 7. On Resistance (RON) vs Temperature
图 8. On Resistance (RON) vs VBB
75
73
71
69
67
65
55
54.5
54
53.5
53
52.5
52
51.5
51
-40
-15
10
35
60
85
110
135 150
-40
-15
10
35
60
85
110
135 150
Temperature (èC)
VEN = 0 V to 5 V
VBB = 13.5 V
Temperature (èC)
VEN = 5 V to 0 V
VBB = 13.5 V
SLVS
SLVS
ROUT = 2.6 Ω
RSNS = 1 kΩ
VDIAG_EN = 0 V
ROUT = 2.6 Ω
RSNS = 1 kΩ
VDIAG_EN = 0 V
图 9. Turn-on Delay Time (tDR) vs Temperature
图 10. Turn-off Delay Time (tDF) vs Temperature
0.5
0.495
0.49
0.37
0.36
0.35
0.34
0.33
0.32
0.485
0.48
0.475
0.47
0.465
0.46
0.455
0.45
-40
-15
10
35
60
85
110
135 150
-40
-15
10
35
60
85
110
135 150
Temperature (èC)
VEN = 0 V to 5 V
VBB = 13.5 V
Temperature (èC)
VEN = 5 V to 0 V
VBB = 13.5 V
SLVS
SLVS
ROUT = 2.6 Ω
RSNS = 1 kΩ
VDIAG_EN = 0 V
ROUT = 2.6 Ω
RSNS = 1 kΩ
VDIAG_EN = 0 V
图 11. VOUT Slew Rate Rising (SRR) vs Temperature
图 12. VOUT Slew Rate Falling (SRF) vs Temperature
版权 © 2018–2019, Texas Instruments Incorporated
13
TPS1HA08-Q1
ZHCSJ60D –NOVEMBER 2018–REVISED DECEMBER 2019
www.ti.com.cn
Typical Characteristics (接下页)
83
82
81
80
79
78
77
76
75
74
73
72
76.5
75
73.5
72
70.5
-40
-15
10
35
60
85
110
135
-40
-15
10
35
60
85
110
135 150
Temperature (èC)
VEN = 0 V to 5 V
VBB = 13.5 V
Temperature (èC)
VEN = 5 V to 0 V
VBB = 13.5 V
SLVS
SLVS
ROUT = 2.6 Ω
RSNS = 1 kΩ
VDIAG_EN = 0 V
ROUT = 2.6 Ω
RSNS = 1 kΩ
VDIAG_EN = 0 V
图 13. Turn-on Time (tON) vs Temperature
图 14. Turn-off Time (tOFF) vs Temperature
10
8
0.2
0.18
0.16
0.14
0.12
0.1
-40èC
25èC
60èC
85èC
105èC
125èC
150èC
6
4
0.08
0.06
0.04
0.02
0
2
0
-40
-15
10
35
60
85
110
135 150
0
100 200 300 400 500 600 700 800 900
ILOAD (mA), VBB=13.5
Temperature (èC)
SLVS
SLVS
ROUT = 2.6 Ω
RSNS = 1 kΩ
VEN = 0 V to 5 V
and 5 V to 0 V
VDIAG_EN = 0 V
VSEL1 = VSEL2 = 0 V
VEN = 5 V
VDIAG_EN = 5 V
RSNS = 1 kΩ
VBB = 13.5 V
VBB = 13.5 V
图 16. Current Sense Output Current (ISNSI ) vs Load Current
图 15. Turn-on and Turn-off Matching (tON - tOFF) vs
(IOUT) across Temperature
Temperature
3
0.2
0.18
0.16
0.14
0.12
0.1
8 V
13.5 V
18 V
VBB
8 V
13.5 V
18 V
2.5
2
1.5
1
0.08
0.06
0.04
0.02
0
0.5
0
0
100 200 300 400 500 600 700 800 900
ILOAD (mA)
-40
-15
10
35
60
85
110
135 150
Temperature (èC)
VSEL2 = 0 V
VEN = 0 V
SLVS
SLVS
VSEL1 = VSEL2 = 0 V
VEN = 5 V
TA = 25°C
VDIAG_EN = 5 V
VSEL1 = 5 V
RSNS = 1 kΩ
VDIAG_EN = 5 V
RSNS = 1 kΩ
图 17. Current Sense Output Current (ISNSI) vs Load Current
图 18. Temperature Sense Output Current (ISNST) vs
(IOUT) across VBB
Temperature
14
版权 © 2018–2019, Texas Instruments Incorporated
TPS1HA08-Q1
www.ti.com.cn
ZHCSJ60D –NOVEMBER 2018–REVISED DECEMBER 2019
Typical Characteristics (接下页)
2.5
6.95
6.9
-40èC
25èC
8 V
13.5 V
18 V
60èC
2
85èC
6.85
6.8
105èC
125èC
1.5
150èC
6.75
6.7
1
0.5
0
6.65
6.6
0
4
8
12
16
20
24
28
-40
-15
10
35
60
85
110
135 150
VBB (V)
Temperature (èC)
SLVS
SLVS
VSEL1 = VSEL2 = 5 V
VEN = 0 V
IOUT = 0 A
VDIAG_EN = 5 V
VSEL1 = VSEL2 = 0 V
VEN = 0 V
VDIAG_EN = 5 V
RSNS = 1 kΩ
RSNS = 500 Ω
VOUT Floating
图 19. Voltage Sense Output Current (ISNSV) vs VBB
图 20. Fault High Output Current (ISNSFH) vs Temperature
6.4
6.3
6.2
6.1
6
26
24
22
20
18
16
14
12
10
8 V
13.5 V
18 V
5.9
5.8
5.7
-40
-15
10
35
60
85
110
135 150
-40
-15
10
35
60
85
110
135 150
Temperature (èC)
Temperature (èC)
VOUT = 0 V
VEN = 5 V
SLVS
SLVS
VSEL1 = VSEL2 = 0 V
VEN = 5 V
VDIAG_EN = 5 V
VBB = 13.5 V
VDIAG_EN = 0 V
VLATCH = 5 V
RSNS = 10 kΩ
IOUT = 4 A
Device Version C
图 21. Sense Pin Clamp Voltage (VSNSCLAMP) vs Temperature
图 22. Current Limit (ICL) vs Temperature
1.54
1.535
1.53
2.85
VBB
8 V
VBB
8 V
13.5 V
18 V
13.5 V
18 V
2.75
1.525
1.52
2.65
1.515
1.51
2.55
2.45
2.35
1.505
1.5
1.495
1.49
-40
-15
10
35
60
85
110
135 150
-40
-15
10
35
60
85
110
135 150
Temperature (èC)
VOUT = 0 V to 5 V
VSEL1 = VSEL2 = 0 V
Temperature (èC)
SLVS
SLVS
VEN = 0 V
IOUT = 0 A
VEN = 3.3 V to 0 V
VOUT = 0 V
VDIAG_EN = 0 V
VDIAG_EN= 5 V
ROUT = 1 kΩ
图 23. Open Load Detection Voltage (VOL) vs Temperature
图 24. VIL vs Temperature
版权 © 2018–2019, Texas Instruments Incorporated
15
TPS1HA08-Q1
ZHCSJ60D –NOVEMBER 2018–REVISED DECEMBER 2019
www.ti.com.cn
Typical Characteristics (接下页)
325
320
315
310
305
300
295
290
1.86
VBB
8 V
VBB
8 V
13.5 V
18 V
1.85
13.5 V
18 V
1.84
1.83
1.82
1.81
1.8
-40
-15
10
35
60
85
110
135 150
-40
-15
10
35
60
85
110
135 150
Temperature (èC)
Temperature (èC)
SLVS
SLVS
VEN = 0 V to 3.3 V
VOUT = 0 V
VDIAG_EN = 0 V
VEN = 0 V to 3.3 V
and 3.3 V to 0 V
VOUT = 0 V
VDIAG_EN = 0 V
ROUT = 1 kΩ
ROUT = 1 kΩ
图 25. VIH vs Temperature
图 26. VIHYS vs Temperature
1.6
3.6
8 V
13.5 V
18 V
8 V
13.5 V
18 V
1.4
1.2
1
3.2
2.8
2.4
2
0.8
0.6
0.4
1.6
1.2
-40
-15
10
35
60
85
110
135 150
-40
-15
10
35
60
85
110
135 150
Temperature (èC)
Temperature (èC)
SLVS
SLVS
VEN = 0.8 V
ROUT = 1 kΩ
VOUT = 0 V
VDIAG_EN = 0 V
VEN = 2 V
VOUT = 0 V
VDIAG_EN = 0 V
ROUT = 1 kΩ
图 27. IIL vs Temperature
图 28. IIH vs Temperature
ROUT = 2.6 Ω
RSNS = 1 kΩ
VDIA_EN = 5 V
VSEL1 = VSEL2 = 0 V
ROUT = 2.6 Ω
RSNS = 1 kΩ
VDIA_EN = 5 V
VSEL1 = VSEL2 = 0 V
图 29. Turn-on Time (tON
)
图 30. Turn-off Time (tOFF) and Sense Settle Time (tSNSION2)
16
版权 © 2018–2019, Texas Instruments Incorporated
TPS1HA08-Q1
www.ti.com.cn
ZHCSJ60D –NOVEMBER 2018–REVISED DECEMBER 2019
Typical Characteristics (接下页)
ROUT = 2.6 Ω
RSNS = 1 kΩ
VDIA_EN= 0 V to 5 V
VSEL1 = VSEL2 = 0 V
IOUT = 1 A to 5 A
RSNS = 1 kΩ
VDIA_EN = 5 V
VSEL1 = VSEL2 = 0 V
图 31. ISNS Settling Time (tSNSION1) on DIA_EN Transition
图 32. ISNS Settling Time (tSETTLEH) on Rising Load Step
100
90
80
70
60
50
40
30
20
10
0
11
IVBB (A)
ST (V)
SNS (V)
EN (V)
10
9
8
7
6
5
4
3
2
1
0
-1
-10
-20
0
0.0001
0.0002
0.0003
0.0004
0.0005
Time (s)
BPer
VOUT = VBB
VEN = 0 V
RSNS = 1 kΩ
VSEL1 = VSEL2 = 0 V
VBB = 13.5 V
VEN = 0 V to 5 V
B Device Version
TA = 25°C
VOUT = 0 V
VDIAG_EN = 5 V
图 33. Open Load Detection Time (tOL2) on Rising DIAG_EN
图 34. Short Circuit Behavior with B Device Version
30
24
20
16
12
8
15
10
5
15
10
5
IVBB (A)
ST (V)
SNS (V)
EN (V)
25
20
15
10
5
0
0
-5
-5
-10
-15
-20
-25
-30
-35
-10
-15
-20
4
IVBB
VBB
VOUT
-25
0
0
-30
EN
-35
-5
-4
0.00075
0
0.00015
0.0003
0.00045
0.0006
0.0008 0.0016 0.0024 0.0032 0.004 0.0048 0.0056
Time (s)
Time (s)
C_Pe
Indu
VBB = 13.5 V
VEN = 0 V to 5 V
C Device Version
TA = 25°C
VOUT = 0 V
VBB = 13.5 V
TA = 125°C
LOUT = 5 mH
VEN = 0 V to 5 V, 5
V to 0 V
图 35. Short Circuit Behavior with C Device Version
图 36. Inductive Load Demagnetization
版权 © 2018–2019, Texas Instruments Incorporated
17
TPS1HA08-Q1
ZHCSJ60D –NOVEMBER 2018–REVISED DECEMBER 2019
www.ti.com.cn
8 Parameter Measurement Information
IBB
VBB
SNS
LATCH
EN
DIA_EN
SEL2
IDIA_EN
ISNS
ISEL2
ILATCH
SEL1
ISEL1
IEN
VOUT
IOUT
IST
ST
GND
图 37. Parameter Definitions
18
版权 © 2018–2019, Texas Instruments Incorporated
TPS1HA08-Q1
www.ti.com.cn
ZHCSJ60D –NOVEMBER 2018–REVISED DECEMBER 2019
9 Detailed Description
9.1 Overview
The device is a single-channel smart high-side power switch intended for use with 12 V automotive batteries.
Many protection and diagnostic features are integrated in the device.
Diagnostics features include the analog SNS output and the open-drain fault indication (ST). The analog SNS
output is capable of providing a signal that is proportional to device temperature, supply voltage, or load current.
The high-accuracy load current sense allows for diagnostics of complex loads.
This device includes protection through thermal shutdown, current limit, transient withstand, and reverse battery
operation. For more details on the protection features, refer to the Feature Description and Application
Information sections of the document.
9.1.1 Device Nomenclature
The is one device in the TI family of Smart High Side Switches. 图 38 shows the family part number
nomenclature and explains how to determine device characteristics from the part number for TI Smart High Side
Switches.
TPS
1
H
A
08
X
Q
PWPR
Q1
Prefix
Auto Qual
Packaging
No. of Channels
H
12-V HSS
24-V HSS
AEC Temp Grade
T
Generation
Version
RON (mΩ)
图 38. Naming Convention
版权 © 2018–2019, Texas Instruments Incorporated
19
TPS1HA08-Q1
ZHCSJ60D –NOVEMBER 2018–REVISED DECEMBER 2019
www.ti.com.cn
9.2 Functional Block Diagram
VBB
VBB to GND
Clamp
Internal Power
Supply
VBB to VOUT
Clamp
GND
VOUT
Gate Driver
Power FET
EN
LATCH
DIA_EN
SEL1
Current Limit
Energy Limit
Thermal
Shutdown
Open-load /
Short-to-Bat
Detection
SEL2
VBB
Voltage Sense
Fault Indication
Current Sense
SNS
SNS Mux
ST
Temperature
Sense
20
版权 © 2018–2019, Texas Instruments Incorporated
TPS1HA08-Q1
www.ti.com.cn
ZHCSJ60D –NOVEMBER 2018–REVISED DECEMBER 2019
9.3 Feature Description
9.3.1 Protection Mechanisms
The is designed to operate in the automotive environment. The protection mechanisms allow the device to be
robust against many system-level events such as load dump, reverse battery, short-to-ground and more.
There are three protection features which, if triggered, will cause the switch to automatically disable:
•
•
•
Thermal Shutdown
Current Limit (Versions A,B,E)
Energy Limit
When any of these protections are triggered, the device will enter the FAULT state. In the FAULT state, the fault
indication will be available on both the SNS pin and the ST pin (see the diagnostic section of the data sheet for
more details).
The switch is no longer held off and the fault indication is reset when all of the below conditions are met:
•
•
•
LATCH pin is low
tRETRY has expired
All faults are cleared (thermal shutdown, current limit, energy limit)
9.3.1.1 Thermal Shutdown
The includes temperature sensors on the FET and inside of the device controller. When TJ,FET > TABS, the device
will see a thermal shutdown fault. After the fault is detected, the switch will turn off. The fault is cleared when the
switch temperature decreases by the hysteresis value, THYS
.
9.3.1.2 Current Limit
When IOUT reaches the current limit threshold, ICL, the device can switch off immediately (Versions A,B,E), or the
device can remain enabled and limit IOUT (Versions C/D) to ICL (see Device Comparison Table section for more
details). In the case that the device remains enabled and limits IOUT, the thermal shutdown and/or energy limit
protection feature may be triggered due to the high amount of power dissipation in the device.
During a short circuit event, the device will hit the ICL threshold that is listed in the Specifications (for the given
device version) and then turn the output off or regulate the output current to protect the device. The device will
register a short circuit event when the output current exceeds ICL, however the measured maximum current may
exceed the ICL threshold due to the deglitch filter and turn-off time. The device is guaranteed to protect itself
during a short circuit event over the nominal supply voltage range (as defined in the Specifications section) at
125°C.
9.3.1.2.1 Current Limit Foldback
The implements a current limit foldback feature that is designed to protect the device in the case of a long-term
fault condition. If the device undergoes three consecutive fault shutdown events (any of thermal shutdown,
current limit, or energy limit), the current limit will be reduced to half of the original value. The device will revert
back to the original current limit threshold if either of the following occurs:
•
•
The device goes to Standby Delay.
The switch turns-on and turns-off without any fault occurring.
9.3.1.2.2 Selectable Current Limit Threshold
The offers two current limit thresholds. The high threshold is designed to allow for a large transient load current
(for example, inrush current of a 65-W bulb). The low threshold is designed to provide improved system-level
protection for loads that do not have large transient currents (for example, heating element). The lower threshold
can allow for reduced size/cost in the current carrying components such as PCB traces and module connectors.
Version A (20 A current limit) is ideal for charging capacitors, as it will enable the device to prevent inrush current
and clamp the overcurrent to linearly charge the capacitor.
版权 © 2018–2019, Texas Instruments Incorporated
21
TPS1HA08-Q1
ZHCSJ60D –NOVEMBER 2018–REVISED DECEMBER 2019
www.ti.com.cn
Feature Description (接下页)
9.3.1.2.3 Undervoltage Lockout (UVLO)
The device monitors the supply voltage VBB to prevent unpredicted behaviors in the event that the supply voltage
is too low. When the supply voltage falls down to VUVLOF, the output stage is shut down automatically. When the
supply rises up to VUVLOR, the device turns back on.
During an initial ramp of VBB from 0 V at a ramp rate slower than 1 V/ms, VEN pin will have to be held low until
VBB is above UVLO threshold (with respect to board ground) and the supply voltage to the device has reliably
reached above the UVLO condition. For best operation, ensure that VBB has risen above UVLO before setting the
VEN pin to high.
9.3.1.2.4 VBB during Short-to-Ground
When VOUT is shorted to ground, the module power supply (VBB) can have a transient decrease. This is caused
by the sudden increase in current flowing through the wiring harness cables. To achieve ideal system behavior, it
is recommended that the module maintain VBB > 3 V during VOUT short-to-ground. This is typically accomplished
by placing bulk capacitance on the power supply node.
9.3.1.3 Energy Limit
The energy limiting feature is implemented to protect the switch from excessive stress. The device will
continuously monitor the amount of energy dissipated in the FET. If the energy limit threshold is reached, the
switch will automatically disable. In practice, the energy limit will only be reached during a fault event such as
short-to-ground.
Energy limit events have the same system-level behavior as thermal shutdown events.
9.3.1.4 Voltage Transients
The contains two voltage clamps which protect the device against system-level voltage transients.
The clamp from VBB to GND is primarily used to protect the controller from positive transients on the supply line
(for example, ISO7637-2). The clamp from VBB to VOUT is primarily used to limit the voltage across the FET when
switching off an inductive load. Both clamp levels are set to protect the device during these fault conditions. If the
voltage potential from VBB to GND exceeds the VBB clamp level, the clamp will allow current to flow through the
device from VBB to GND (Path 2). If the voltage potential from VBB to VOUT exceeds VCLAMP, the power FET will
allow current to flow from VBB to VOUT (Path 3).
Ri
Positive Supply Transient
(e.g. ISO7637 pulse 2a/3b)
(1)
VBB
VDS
Clamp
(3)
(2)
Controller
VBB
Clamp
VOUT
Load
GND
图 39. Current Path During Supply Voltage Transient
22
版权 © 2018–2019, Texas Instruments Incorporated
TPS1HA08-Q1
www.ti.com.cn
ZHCSJ60D –NOVEMBER 2018–REVISED DECEMBER 2019
Feature Description (接下页)
9.3.1.4.1 Load Dump
The is tested according to ISO 16750-2:2010(E) suppressed load dump pulse. The device supports up to 40 V
load dump transient. The switch will maintain normal operation during the load dump pulse. If the switch is
enabled, it will stay enabled. If the switch is disabled, it will stay disabled.
9.3.1.4.2 Driving Inductive and Capacitive Loads
When switching off an inductive load, the inductor may impose a negative voltage on the output of the switch.
The includes a voltage clamp to limit voltage across the FET. The maximum acceptable load inductance is a
function of the device robustness. With a 5 mH load, the can withstand a single pulse of 95 mJ inductive
dissipation at 125°C and can withstand 56 mJ of inductive dissipation with a 10 Hz repetitive pulse. If the
application parameters exceed this device limit, it is necessary to use a protection device like a freewheeling
diode to dissipate the energy stored in the inductor. 图 40 shows the discharging a 5 mH load that is driven at 5
A.
15
10
5
15
10
5
0
0
-5
-5
-10
-15
-20
-25
-30
-35
-10
-15
-20
-25
-30
-35
IVBB
VBB
VOUT
EN
0.0008 0.0016 0.0024 0.0032 0.004 0.0048 0.0056
Time (s)
Indu
图 40. Inductive Discharge (5 mH, 5 A)
In addition, the current limit provides an ideal way to charge a capacitive load safely with limited inrush current.
With no protection, charging a large capacitive load can lead to high inrush currents that pull a supply down,
however by using the low current limit device options the capacitive load can be safely charged.
For more information on driving inductive or capacitive loads, reference TI's "How To Drive Inductive, Capacitive,
and Lighting Loads with Smart High Side Switch application report.
9.3.1.5 Reverse Battery
In the reverse battery condition, the switch will automatically be enabled (regardless of EN status) to prevent
power dissipation inside the MOSFET body diode. In many applications (for example, resistive load), the full load
current may be present during reverse battery. In order to activate the automatic switch on feature, the SEL2 pin
must have a path to module ground. This may be path 1 as shown below, or, if the SEL2 pin is unused, the path
may be through RPROT to module ground.
Protection features (for example, thermal shutdown) are not available during reverse battery. Care must be taken
to ensure that excessive power is not dissipated in the switch during the reverse battery condition.
版权 © 2018–2019, Texas Instruments Incorporated
23
TPS1HA08-Q1
ZHCSJ60D –NOVEMBER 2018–REVISED DECEMBER 2019
www.ti.com.cn
Feature Description (接下页)
There are two options for blocking reverse current in the system. Option 1 is to place a blocking device (FET or
diode) in series with the battery supply. This will block all current paths. Option 2 is to place a blocking diode in
series with the GND node of the high-side switch. This method will protect the controller portion of the switch
(path 2), but it will not prevent current from flowing through the load (path 3). The diode used for Option 2 may be
shared amongst multiple high-side switches.
Path 1 shown in 图 41 is blocked inside of the device.
Reverse blocking
Option 1
BAT
FET or diode
VBB
0V
µC
VDD
(3)
VOUT
(2)
Controller
GPIO
GPIO
VBB
Clamp
Load
RPROT
(1)
GND
Option 2
图 41. Current Path During Reverse Battery
9.3.1.6 Fault Event – Timing Diagrams
注
All timing diagrams assume that the SELx pins are set to 00.
The LATCH, DIA_EN, and EN pins are controlled by the user. The timing diagrams
represent a possible use-case.
图 42 shows the immediate current limit switch off behavior of Versions A,B,E. The diagram also illustrates the
retry behavior. As shown, the switch will remain latched off until the LATCH pin is low.
24
版权 © 2018–2019, Texas Instruments Incorporated
TPS1HA08-Q1
www.ti.com.cn
ZHCSJ60D –NOVEMBER 2018–REVISED DECEMBER 2019
Feature Description (接下页)
µC resets
the latch
LATCH
DIA_EN
ISNSFH
Current
Sense
Current
Sense
SNS
ST
High-z
High-z
High-z
High-z
VOUT
EN
ICL
tRETRY
IOUT
t
Switch follows EN. Normal
operation.
Load reaches limit.
Switch is Disabled.
图 42. Current Limit – Version A,B,E - Latched Behavior
图 43 shows the immediate current limit switch off behavior of versions A,B,E. In this example, LATCH is tied to
GND; hence, the switch will retry after the fault is cleared and tRETRY has expired.
版权 © 2018–2019, Texas Instruments Incorporated
25
TPS1HA08-Q1
ZHCSJ60D –NOVEMBER 2018–REVISED DECEMBER 2019
www.ti.com.cn
Feature Description (接下页)
DIA_EN
ISNSFH
Current
Sense
Current
Sense
SNS
ST
High-z
High-z
High-z
High-z
VOUT
EN
ICL
tRETRY
IOUT
t
Switch follows EN. Normal
operation.
Load reaches limit.
Switch is Disabled.
图 43. Current Limit – Version A,B,E - LATCH = 0
图 44 shows the active current limiting behavior of versions C,D. In versions C,D, the switch will not shutdown
until either the energy limit or the thermal shutdown is reached.
26
版权 © 2018–2019, Texas Instruments Incorporated
TPS1HA08-Q1
www.ti.com.cn
ZHCSJ60D –NOVEMBER 2018–REVISED DECEMBER 2019
Feature Description (接下页)
µC resets
the latch
LATCH
DIA_EN
ISNSFH
Current
Sense
Current
Sense
SNS
ST
High-z
High-z
High-z
High-z
VOUT
EN
TABS
THYS
TJ
tRETRY
ICL
IOUT
t
Load reaches limit. Current is limited. Temp Switch is disabled. Temp decreases by
reaches limit. THYS
Switch follows EN. Normal
operation.
图 44. Current Limit – Version C,D - Latched Behavior
图 45 shows the active current limiting behavior of versions C,D. The switch will not shutdown until either thermal
shutdown or energy limit is tripped. In this example, LATCH is tied to GND.
版权 © 2018–2019, Texas Instruments Incorporated
27
TPS1HA08-Q1
ZHCSJ60D –NOVEMBER 2018–REVISED DECEMBER 2019
www.ti.com.cn
Feature Description (接下页)
DIA_EN
ISNSFH
ISNSFH
Current
Sense
Current
Sense
SNS
ST
High-z
High-z
High-z
High-z
VOUT
EN
TABS
THYS
TJ
tRETRY
ICL
IOUT
t
Load reaches limit. Current is limited.
Temp reaches limit.
Switch is disabled. TJ decreases by
THYS
Switch follows EN. Normal operation.
图 45. Current Limit – Version C,D - LATCH = 0
When the switch retries after a shutdown event, the SNS fault indication will remain until VOUT has risen to VBB
–
1.8 V. Once VOUT has risen, the SNS fault indication is reset and current sensing is available. ST fault indication
is reset as soon as the switch is re-enabled (does not wait for VOUT to rise). If there is a short-to-ground and VOUT
is not able to rise, the SNS fault indication will remain indefinitely. The following diagram illustrates auto-retry
behavior and provides a zoomed-in view of the fault indication during retry.
注
图 46 assumes that tRETRY has expired by the time that TJ reaches the hysteresis
threshold.
LATCH = 0 V and DIA_EN = 5 V
28
版权 © 2018–2019, Texas Instruments Incorporated
TPS1HA08-Q1
www.ti.com.cn
ZHCSJ60D –NOVEMBER 2018–REVISED DECEMBER 2019
Feature Description (接下页)
ISNSFH
ISNSFH
ISNSFH
ISNSFH
SNS
ST
VOUT
EN
TABS
THYS
TJ
t
ISNSFH
ISNSI
SNS
ST
VBB œ 1.8 V
VOUT
EN
TABS
THYS
TJ
t
图 46. Fault Indication During Retry
9.3.2 Diagnostic Mechanisms
9.3.2.1 VOUT Short-to-Battery and Open-Load
9.3.2.1.1 Detection With Switch Enabled
When the switch is enabled, the VOUT short-to-battery and open-load conditions can be detected with the current
sense feature. In both cases, the load current will be measured through the SNS pin and will be below the
expected value.
版权 © 2018–2019, Texas Instruments Incorporated
29
TPS1HA08-Q1
ZHCSJ60D –NOVEMBER 2018–REVISED DECEMBER 2019
www.ti.com.cn
Feature Description (接下页)
9.3.2.1.2 Detection With Switch Disabled
While the switch is disabled, if DIA_EN is high, an internal comparator will detect the condition of VOUT. If the
load is disconnected (open load condition) or there is a short to battery the voltage will be higher than the
OUT
open load threshold (VOL,off) and a fault is indicated on the SNS pin. An internal pull-up of 1 MΩ is in series with
an internal MOSFET switch, so no external component is required if only a completely open load needs to be
detected. However, if there is significant leakage or other current draw even when the load is disconnected, a
lower value pull-up resistor and switch can be added externally to set the VOUT voltage above the VOL,off during
open load conditions.
(1) This figure assumes that the device ground and the load ground are at the same potential. In application, there may
be a ground shift voltage of 1 V to 2 V.
图 47. Short to Battery and Open Load Detection
The detection circuitry is only enabled when DIA_EN = HIGH and EN = LOW.
If VOUT > VOL, the SNS pin will go to the fault level.
If VOUT < VOL, then there is no fault indication.
The fault indication will only occur if the SEL1 pin is set to diagnose the channel.
While the switch is disabled and DIA_EN is high, the fault indication mechanisms will continuously represent the
present status. For example, if VOUT decreases from >VOL to <VOL, the fault indication is reset. Additionally, the
fault indication is reset upon the falling edge of DIA_EN or the rising edge of EN.
30
版权 © 2018–2019, Texas Instruments Incorporated
TPS1HA08-Q1
www.ti.com.cn
ZHCSJ60D –NOVEMBER 2018–REVISED DECEMBER 2019
Feature Description (接下页)
DIA_EN
ISNSFH
High-z
High-z
SNS
tOL2
Enabled
VOUT depends on external conditions
VOL
VOUT
EN
t
Switch is disabled and DIA_EN goes
high.
The condition is determined by the
internal comparator.
The open-load fault is
indicated.
Device standby
图 48. Open Load
9.3.2.2 SNS Output
The SNS output may be used to sense the load current, supply voltage, or device temperature. The SELx pins
will select the desired sense signal. The sense circuit will provide a current that is proportional to the selected
parameter. This current will be sourced into an external resistor to create a voltage that is proportional to the
selected parameter. This voltage may be measured by an ADC or comparator.
To ensure accurate sensing measurement, the sensing resistor should be connected to the same ground
potential as the μC ADC.
The SNS Output includes an internal clamp, VSNSclamp. This clamp is designed to prevent a high voltage at the
SNS output and the ADC input.
表 2. Analog Sense Transfer Function
PARAMETER
TRANSFER FUNCTION
ISNSI = IOUT / 4600
Load current
Supply voltage(1)
Device temperature
ISNSV = (VBB) × dISNSV / dV
ISNST = (TJ – 25°C) × dISNST / dT + 0.85
(1) Voltage potential between the VBB pin and the GND pin.
版权 © 2018–2019, Texas Instruments Incorporated
31
TPS1HA08-Q1
ZHCSJ60D –NOVEMBER 2018–REVISED DECEMBER 2019
www.ti.com.cn
The SNS output will also be used to indicate system faults. ISNS will go to the predefined level, ISNSFH, when there
is a fault. This level is defined in the electrical specifications.
9.3.2.2.1 RSNS Value
The following factors should be considered when selecting the RSNS value:
•
•
•
•
Current sense ratio
Largest and smallest diagnosable load current
Full-scale voltage of the ADC
Resolution of the ADC
For an example of selecting RISNS value, reference Selecting the RISNS Value in the applications section of this
data sheet.
9.3.2.2.1.1 High Accuracy Load Current Sense
In many automotive modules, it is required that the high-side switch provide diagnostic information about the
downstream load. With more complex loads, high accuracy sensing is required. A few examples follow:
•
LED Lighting: In many architectures, the Body Control Module must be compatible with both incandescent
bulbs and also LED modules. The bulb may be relatively simple to diagnose. However, the LED module will
consume less current and also can include multiple LED strings in parallel. The same BCM is used in both
cases, so the high-side switch must be able to accurately diagnose both load types.
•
Solenoid Protection: Often solenoids are precisely controlled by low-side switches. However, in a fault
event, the low-side switch cannot disconnect the solenoid from the power supply. A high-side switch can be
used to continuously monitor several solenoids. If the system current becomes higher than expected, the
high-side switch can disable the module.
9.3.2.2.1.2 SNS Output Filter
To achieve the most accurate current sense value, it is recommended to apply filtering to the SNS output. There
are two methods of filtering:
•
Low-Pass RC filter between the SNS pin and the ADC input. This filter is illustrated in 图 54 and typical
values for the resistor and capacitor are given. The designer should select a CSNS capacitor value based on
system requirements. A larger value will provide improved filtering. A smaller value will allow for faster
transient response.
•
The ADC and microcontroller can also be used for filtering. It is recommended that the ADC collects several
measurements of the SNS output. The median value of this data set should be considered as the most
accurate result. By performing this median calculation, the microcontroller is able to filter out any noise or
outlier data.
9.3.2.3 ST Pin
The ST pin is an open-drain output. The pin indicates the status of the switch channel. The output is high-z when
there is no fault condition. The output is pulled low when there is a fault condition.
9.3.2.4 Fault Indication and SNS Mux
The following faults will be communicated via the SNS and ST outputs:
•
Switch shutdown, due to:
–
–
–
Thermal Shutdown
Current limit
Energy limit
•
•
Active current limiting
Open-Load / VOUT shorted-to-battery
Open-load / Short-to-battery are not indicated while the switch is enabled (though these conditions can be
detected via the sense current). Hence, if there is a fault indication corresponding to an enabled channel, then it
must be either switch shutdown or active current limiting.
The SNS pin will only indicate the fault if the SELx = 00. Switch shutdown fault indication will occur on the ST pin
regardless of the SELx pins; however, OL/STB fault indication is only available when the SELx = 00.
32
版权 © 2018–2019, Texas Instruments Incorporated
TPS1HA08-Q1
www.ti.com.cn
ZHCSJ60D –NOVEMBER 2018–REVISED DECEMBER 2019
表 3. SNS Mux
INPUTS
OUTPUTS
DIA_EN
SEL1
SEL2
FAULT DETECT(1)
SNS
High-z
ST
0
0
1
1
1
1
1
1
1
1
X
X
0
0
1
1
0
0
1
1
X
X
0
1
0
1
0
1
0
1
0
1
0
0
0
0
1
1
1
1
High-z
High-z
Pull low
High-z
Load current
Not Used
Not Used
High-z
Device temperature
Supply voltage
ISNSFH
High-z
Pull low
Not Used
Pull low
Pull low
Not Used
Device temperature
Supply voltage
(1) Fault Detect encompasses the below conditions:
(a) Switch shutdown and waiting for retry
(b) Active current limiting
(c) OL / STB
9.3.2.5 Resistor Sharing
Multiple high-side switch channels may use the same SNS resistor as shown in 图 49 below. This reduces the
total number of passive components in the system and the number of ADC terminals that are required of the
microcontroller.
Microcontroller
GPIO
GPIO
GPIO
DIA_EN
DIA_EN
DIA_EN
DIA_EN
Switch 1
Switch 2
Switch 3
Switch 4
SNS
SNS
SNS
SNS
GPIO
ADC
RPROT
CSNS
RSNS
图 49. Sharing RSNS Among Multiple Devices
9.3.2.6 High-Frequency, Low Duty-Cycle Current Sensing
Some applications will operate with a high-frequency, low duty-cycle PWM. Such applications require fast settling
of the SNS output. For example, a 250 Hz, 5% duty cycle PWM will have an on-time of only 200 µs. The
microcontroller ADC may sample the SNS signal after the defined settling time, tSNSION3
.
版权 © 2018–2019, Texas Instruments Incorporated
33
TPS1HA08-Q1
ZHCSJ60D –NOVEMBER 2018–REVISED DECEMBER 2019
www.ti.com.cn
DIA_EN
EN
IOUT
SNS
t
tSNSION3
图 50. Current Sensing in Low-Duty Cycle Applications
9.3.3 Enable Watchdog
For some automotive applications, it is necessary to continuously verify that there is valid communication
between the microcontroller and the switch enable pin. The purpose of this is to protect against possible
communication faults (for example, microcontroller failure). The \ includes an optional watchdog feature which
continuously polls the enable pin. Note that this feature is only activated for device version E, so the below
information is only applicable to version E.
To use the watchdog feature, the microcontroller should apply a PWM to the switch enable pin. If this PWM is
not present (EN is high continuously for ≥ tWD) the switch will automatically be disabled. The watchdog timer is
reset on the rising edge of EN. The fault indications are cleared upon the falling edge of EN. The following figure
illustrates how the switch will respond to the EN PWM.
34
版权 © 2018–2019, Texas Instruments Incorporated
TPS1HA08-Q1
www.ti.com.cn
ZHCSJ60D –NOVEMBER 2018–REVISED DECEMBER 2019
ENABLE
VOUT
Off
t > 200µs
ENABLE
VOUT
PWM (up to 99%
duty cycle)
5µs < t <
20µs(1)
t < tWD
ENABLE
VOUT
On
(100% Duty
Cycle)
t = tWD
ENABLE
VOUT
Fault Condition
t = tWD
ENABLE
VOUT
Fault Recovery
The watchdog feature requires that a PWM is applied to the switch enable pin. To maintain VOUT at 100% duty cycle,
the microcontroller should periodically apply a short pulse to the enable pin. This short pulse will reset the watchdog
timer, but will not cause the switch to turn-off. The pulse must be >5 μs to ensure that it is recognized by the device.
There is no upper limit on the pulse width; however, if the pulse is longer than 20 μs, the switch may start to transition
from enabled to disabled.
图 51. Enable Watchdog - Overview
图 52 illustrates the behavior of the watchdog feature.
版权 © 2018–2019, Texas Instruments Incorporated
35
TPS1HA08-Q1
ZHCSJ60D –NOVEMBER 2018–REVISED DECEMBER 2019
www.ti.com.cn
DIA_EN
ISNSFH
Current
Sense
Current
Sense
SNS
ST
High-z
High-z
High-z
High-z
VOUT
t = tWD
EN
t
Switch is disabled until a rising edge of
EN.
Enable pin is high for t ≥ tWD
.
Normal operation.
图 52. Enable Watchdog Timing Diagram
9.4 Device Functional Modes
9.4.1 Off
Off state occurs when the device is not powered.
9.4.2 Standby
Standby state is a low-power mode used to reduce power consumption to the lowest level. Diagnostic
capabilities are not available in Standby mode.
9.4.3 Diagnostic
Diagnostic state may be used to perform diagnostics while the switch is disabled.
9.4.4 Standby Delay
The Standby Delay state is entered when EN and DIA_EN are low. After tSTBY, if the EN and DIA_EN pins are
still low, the device will go to Standby State.
9.4.5 Active
In Active state, the switch is enabled. The diagnostic functions may be turned on or off during Active state.
9.4.6 Fault
The Fault state is entered if a fault shutdown occurs (thermal shutdown, current limit, energy limit). After all faults
are cleared, the LATCH pin is low, and the retry timer has expired, the device will transition out of Fault state. If
the Enable pin is high, the switch will re-enable. If the Enable pin is low, the switch will remain off.
36
版权 © 2018–2019, Texas Instruments Incorporated
TPS1HA08-Q1
www.ti.com.cn
ZHCSJ60D –NOVEMBER 2018–REVISED DECEMBER 2019
Device Functional Modes (接下页)
VBB < UVLO
OFF
ANY STATE
VBB > UVLO
EN = Low
DIA_EN = Low
t > tSTBY
STANDBY
EN = Low
DIA_EN = High
EN = Low DIA_EN = Low
EN = High
DIA_EN = X
DIAGNOSTIC
STANDBY DELAY
EN = Low DIA_EN = High
EN = Low
DIA_EN = High
EN = High
DIA_EN = X
ACTIVE
EN = Low
DIA_EN = Low
EN = High
DIA_EN = X
!OT_ABS & !OT_REL & !ILIM & !ELIMIT &
LATCH = Low & tRETRY expired
OT_ABS || OT_REL || ILIM ||
ELIMIT
FAULT
图 53. State Diagram
版权 © 2018–2019, Texas Instruments Incorporated
37
TPS1HA08-Q1
ZHCSJ60D –NOVEMBER 2018–REVISED DECEMBER 2019
www.ti.com.cn
10 Application and Implementation
注
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
10.1 Application Information
VBB
DIA_EN
SEL1
RPROT
RPROT
RPROT
RPROT
RPROT
CVBB
BAT
GND
SEL2
EN
RGND
DGND
(1)
Microcontroller
(1)
LATCH
Load
VOUT
COUT
RPU
ST
RPROT
Legend
SNS
ADC
RPROT
RSNS
Chassis GND
Module GND
Device GND
CSNS
(1) With the ground protection network, the
device ground will be offset relative to the
microcontroller ground.
With the ground protection network, the device ground will be offset relative to the microcontroller ground.
图 54. System Diagram
表 4. Recommended External Components
COMPONENT
RPROT
RSNS
TYPICAL VALUE
15 kΩ
PURPOSE
Protect microcontroller and device I/O pins
1 kΩ
Translate the sense current into sense voltage
Provide pull-up source for open-drain output
Low-pass filter for the ADC input
RPU
10 kΩ
CSNS
100 pF - 10 nF
4.7 kΩ
RGND
Stabilize GND potential during turn-off of inductive load
Protects device during reverse battery
DGND
BAS21 Diode
Filtering of voltage transients (for example, ESD, ISO7637-2) and improved
emissions
220 nF to Device GND
CVBB
COUT
100 nF to Module GND Stabilize the input supply and filter out low frequency noise.
22 nF Filtering of voltage transients (for example, ESD, ISO7637-2)
38
版权 © 2018–2019, Texas Instruments Incorporated
TPS1HA08-Q1
www.ti.com.cn
ZHCSJ60D –NOVEMBER 2018–REVISED DECEMBER 2019
10.1.1 Ground Protection Network
As discussed in the section regarding Reverse Battery, DGND may be used to prevent excessive reverse current
from flowing into the device during a reverse battery event. Additionally, RGND is placed in parallel with DGND if
the switch is used to drive an inductive load. The ground protection network (DGND and RGND) may be shared
amongst multiple high-side switches.
A minimum value for RGND may be calculated by using the absolute maximum rating for IGND. During the reverse
battery condition, IGND = VBB / RGND
:
RGND ≥ VBB / IGND
•
•
Set VBB = –13.5 V
Set IGND = –50 mA (absolute maximum rating)
RGND ≥ –13.5 V / –50 mA = 270 Ω
(1)
In this example, it is found that RGND must be at least 270 Ω. It is also necessary to consider the power
dissipation in RGND during the reverse battery event:
PRGND = VBB2 / RGND
(2)
PRGND = (13.5 V)2 / 270 Ω = 0.675 W
In practice, RGND may not be rated for such a high power. In this case, a larger resistor value should be selected.
10.1.2 Interface With Microcontroller
The ground protection network will cause the device ground to be at a higher potential than the module ground
(and microcontroller ground). This offset will impact the interface between the device and the microcontroller.
Logic pin voltage will be offset by the forward voltage of the diode. For input pins (for example, EN), the designer
must consider the VIH specification of the switch and the VOH specification of the microcontroller. For a system
that does not include DGND, it is required that VOH > VIH. For a system that does include DGND, it is required that
VOH > (VIH + VF). VF is the forward voltage of DGND
.
For use of the status pin, ST, a similar consideration is necessary. The designer must consider the VOL,
ST
specification and the VIL specification of the microcontroller. For a system that includes DGND, it is required that
VOL, ST + VF < VIL, µC
.
The sense resistor, RSNS, should be terminated to the microcontroller ground. In this case, the ADC can
accurately measure the SNS signal even if there is an offset between the microcontroller ground and the device
ground.
10.1.3 I/O Protection
RPROT is used to protect the microcontroller I/O pins during system-level voltage transients such as ISO pulses or
reverse battery. A large resistance value ensures that current through the pin is limited to a safe level.
10.1.4 Inverse Current
Inverse current occurs when 0 V < VBB < VOUT. In this case, current may flow from VOUT to VBB. Inverse current
cannot be caused by a purely resistive load. However, a capacitive or inductive load can cause inverse current.
For example, if there is a significant amount of load capacitance and the VBB node has a transient droop, VOUT
may be greater than VBB
.
will not detect inverse current. When the switch is enabled, inverse current will pass through the switch. When
the switch is disabled, inverse current may pass through the MOSFET body diode. The device will continue
operating in the normal manner during an inverse current event.
10.1.5 Loss of GND
The ground connection may be lost either on the device level or on the module level. If the ground connection is
lost, both switches will be disabled. If the switch was already disabled when the ground connection was lost, the
switch will remain disabled. When the ground is reconnected, normal operation will resume.
版权 © 2018–2019, Texas Instruments Incorporated
39
TPS1HA08-Q1
ZHCSJ60D –NOVEMBER 2018–REVISED DECEMBER 2019
www.ti.com.cn
10.1.6 Automotive Standards
10.1.6.1 ISO7637-2
is tested according to the ISO7637-2:2011 (E) standard. The test pulses are applied both with the switches
enabled and disabled. The test setup includes only the DUT and minimal external components: CVBB, COUT
DGND, and RGND
,
.
Status II is defined in ISO 7637-1 Function Performance Status Classification (FPSC) as: “The function does not
perform as designed during the test but returns automatically to normal operation after the test”.
表 5. ISO7637-2:2011 (E) Results
TEST PULSE SEVERITY LEVEL WITH
STATUS II FUNCTIONAL PERFORMANCE
MINIMUM NUMBER
OF PULSES OR TEST
TIME
BURST CYCLE / PULSE REPETITION TIME
TEST
PULSE
LEVEL
US
MIN
0.5 s
0.20
MAX
--
1
IV
III
IV
III
III
–150 V
+55 V
+10 V
–165 V
+112 V
500 pulses
500 pulses
10 pulses
1 hour
2a
2b
3a
3b
5 s
0.5 s
90 ms
90 ms
5 s
100 ms
100 ms
1 hour
10.1.6.2 AEC – Q100-012 Short Circuit Reliability
The is tested according to the AEC - Q100-012 Short Circuit Reliability standard. This test is performed to
demonstrate the robustness of the device against VOUT short-to-ground events. Test results are summarized in
表 6. For further details, refer to the AEC - Q100-012 standard document or TI's Short Circuit Reliability Test for
Smart Power Switches application report.
Test conditions:
•
•
•
•
•
LATCH = 0 V
TA = –40ºC
10 units from 3 separate lots for a total of 30 units
Lsupply = 5 μH, Rsupply = 10 mΩ
VBB = 14 V
Test procedure:
•
•
•
Parametric data is collected on each unit pre-stress
Each unit is enabled into a short circuit with the required short circuit cycles or duration as specified
Parametric data is re-collected on each unit post-stress to verify that no parametric shift is observed
The cold repetitive test is run at –40ºC which is the worst case condition for the . The current limit threshold is
highest at cold temperature; hence, the short-circuit pulse contains more energy at cold temperature. The cold
repetitive test refers to the device being given time to cool down between pulses, within than being run at a cold
temperature. The load short circuit is the worst case situation, since the energy stored in the cable inductance
can cause additional harm. The fast response of the device ensures current limiting occurs quickly and at a
current close to the load short condition. In addition, the hot repetitive test is performed as well.
表 6. AEC - Q100-012 Test Results
DEVICE
VERSION
NO. OF
CYCLES
NO. OF
UNITS
NO. OF
FAILS
TEST
LOCATION OF SHORT
Load Short Circuit, Lshort = 5 μH,
Rshort = 100 mΩ, TA = –40ºC
D
200 k
30
0
Cold Repetitive - Long Pulse
Hot Repetitive - Long Pulse
Terminal Short Circuit, Lshort = 5 μH,
Rshort = 100 mΩ, TA = 25ºC
D
100 hours
30
0
40
版权 © 2018–2019, Texas Instruments Incorporated
TPS1HA08-Q1
www.ti.com.cn
ZHCSJ60D –NOVEMBER 2018–REVISED DECEMBER 2019
10.1.7 Thermal Information
When outputting current, the will heat up due to the power dissipation. 图 55 shows the transient thermal
impedance curve that can be used to determine the device temperature during 1 W pulse of a given length.
35
30
25
20
15
10
5
0
0.0001
0.001 0.002 0.005 0.01 0.02
0.05 0.1 0.2 0.3 0.5
Time (s)
1
2
3 4 567 10
20 30 50 100 200 400
TPS1
图 55. Transient Thermal Impedance
10.2 Typical Application
This application example demonstrates how the device can be used to power resistive heater loads as in seat
heaters. 图 56 shows a typical application where the load is a resistive seat heater. This document highlights the
basics of this type of application, however for a more detailed discussion reference TI's Smart Power Switch Seat
Heater Reference Design.
DIA_EN
SEL1
SEL2
µC
SNS
ST
LATCH
EN
TPS1HA08-Q1
12-V Battery
VBB
VOUT
GND
Load
图 56. Block Diagram for Powering Heater Loads
版权 © 2018–2019, Texas Instruments Incorporated
41
TPS1HA08-Q1
ZHCSJ60D –NOVEMBER 2018–REVISED DECEMBER 2019
www.ti.com.cn
Typical Application (接下页)
10.2.1 Design Requirements
For this design example, use the input parameters shown in 表 7.
表 7. Design Parameters
DESIGN PARAMETER
VBB
EXAMPLE VALUE
12.8 V
90 W max
Heater Load
Load Current Sense
Ambient temperature
RθJA
100 mA to 20 A
85°C
32.8°C/W (depending on PCB)
10.2.2 Detailed Design Procedure
10.2.2.1 Thermal Considerations
The DC current under maximum load power condition will be around 7.03 A. Power dissipation in the switch is
calculated in 公式 3. RON is assumed to be 20 mΩ because this is the maximum specification. In practice, RON
will be lower.
PFET = I2 × RON
PFET = (7.03 A)2 × 20 mΩ = 0.988 W
(3)
(4)
The junction temperature of the device can be calculated using 公式 5 and the RθJA value from the Specifications
section.
TJ = TA + RθJA × PFET
(5)
TJ = 85°C + 32.8°C/W × 0.988 W = 117.4°C
The maximum junction temperature rating for device is TJ = 150°C. Based on the above example calculation, the
device temperature will stay below the maximum rating.
10.2.2.2 Diagnostics
If the resistive heating load is disconnected (heater malfunction), an alert is desired. Open-load detection can be
performed in the switch-enabled state via the current sense feature of the device. Alternatively, under open load
condition in off-state with diagnostics enabled, the current in the SNS pin will be the fault current and the can be
detected from the sense voltage measurement.
10.2.2.2.1 Selecting the RISNS Value
表 8 shows the requirements for the load current sense in this application. The KSNS value is specified for the
device and can be found in the Specifications section.
表 8. RSNS Calculation Parameters
PARAMETER
EXAMPLE VALUE
Current Sense Ratio (KSNS
)
4600
20 A
Largest diagnosable load current
Smallest diagnosable load current
Full-scale ADC voltage
50 mA
5 V
ADC resolution
10 bit
The load current measurement requirements of 20 A ensures that current can be sensed up to the 20 A current
limit, while the low level of 100 mA allows for accurate measurement of low load currents.
The RSNS resistor value should be selected such that the largest diagnosable load current puts VSNS at about
90% of the ADC full-scale. With this design, any ADC value above 90% can be considered a fault. Additionally,
the RSNS resistor value should ensure that the smallest diagnosable load current does not cause VSNS to fall
below 1 LSB of the ADC. With the given example values, a 1-kΩ sense resistor satisfies both requirements
shown in 表 9.
42
版权 © 2018–2019, Texas Instruments Incorporated
TPS1HA08-Q1
www.ti.com.cn
ZHCSJ60D –NOVEMBER 2018–REVISED DECEMBER 2019
表 9. VSNS Calculation
LOAD (A)
0.050
SENSE RATIO
4600
ISNS (mA)
RSNS (Ω)
1000
VSNS (V)
0.011
% OF 5-V ADC
0.22%
0.011
4.348
20.000
4600
1000
4.348
87%
10.2.3 Application Curves
图 57 shows the behavior of the in this application when the MCU provides an enable pulse to beginning heating
the resistive element. Shortly after the EN pin goes high, the load current begins to flow and the SNS pin
measures the output current.
图 57. Heater Turn-on Time
By measuring the voltage on the SNS pin, the can communicate back to the system MCU what the load current
is. 图 58 shows that when the seat heater approaches full load and IOUT jumps from a low load current of 1 A up
to a 5 A load current, the load step is mirrored on the SNS pin.
版权 © 2018–2019, Texas Instruments Incorporated
43
TPS1HA08-Q1
ZHCSJ60D –NOVEMBER 2018–REVISED DECEMBER 2019
www.ti.com.cn
图 58. SNS Response During Heater Load Step
One common concern in these type of applications is that the heating element can accidentally lose connection,
creating an open load situation. In this case, it is ideal for the to recognize that the load has been removed and
report a FLT to the MCU. 图 59 shows the behavior of the when there is no load attached. As soon as the
DIAG_EN pin is engaged, the SNS output goes high and the ST output engages low. By monitoring these pins,
the MCU can recognize there is a fault and notify the user that maintenance is required.
图 59. Open Load Detection If Heating Element is Missing
44
版权 © 2018–2019, Texas Instruments Incorporated
TPS1HA08-Q1
www.ti.com.cn
ZHCSJ60D –NOVEMBER 2018–REVISED DECEMBER 2019
Importantly, the will also protect the system in the event of a short-circuit. 图 60 shows the behavior of the device
if it is enabled into a short circuit condition. If this is using the device option C, the current will be clamped to the
current limit ICL until it hits an over temperature event, at which point it will shut down. In this way, the system is
protected from unchecked overcurrent in the event of a short circuit.
30
25
20
15
10
5
24
20
16
12
8
IVBB (A)
ST (V)
SNS (V)
EN (V)
4
0
0
-5
-4
0.00075
0
0.00015
0.0003
0.00045
0.0006
Time (s)
C_Pe
图 60. Overcurrent Behavior During Short Circuit Event
11 Power Supply Recommendations
The is designed to operate in a 12-V automotive system. The nominal supply voltage range is 8 V to 18 V. The
device is also designed to withstand voltage transients beyond this range. When operating outside of the nominal
voltage range, the device will exhibit normal functional behavior. However, parametric specifications may not be
guaranteed.
表 10. Operating Voltage Range
VBB Voltage Range
Note
Transients such as cold crank and start-stop, functional operation
guaranteed but some parametric specifications may not apply. The
device is completely short-circuit protected up to 125°C
3 V to 8 V
Nominal supply voltage, all parametric specifications apply. The
device is completely short-circuit protected up to 125°C
8 V to 18 V
Transients such as jump-start and load-dump, functional operation
guaranteed but some parametric specifications may not apply
18 V to 40 V
版权 © 2018–2019, Texas Instruments Incorporated
45
TPS1HA08-Q1
ZHCSJ60D –NOVEMBER 2018–REVISED DECEMBER 2019
www.ti.com.cn
12 Layout
12.1 Layout Guidelines
To achieve optimal thermal performance, connect the exposed pad to a large copper pour. On the top PCB layer,
the pour may extend beyond the pad dimensions as shown in the example below. In addition to this, it is
recommended to also have a VBB plane either on one of the internal PCB layers or on the bottom layer. Vias
should connect this plane to the top VBB pour.
has 6 VOUT pins. All VOUT pins must be shorted together on the PCB. Additionally, the layout should ensure that
the current path is symmetrical for both sides of the device. If the path is not symmetrical, there will be some
imbalance in current spreading across the power FET. This can impact accuracy of the current sense
measurement.
12.2 Layout Example
GND
SNS
DIA_EN
SEL2
SEL1
NC
To µC
LATCH
EN
To µC
VBB
ST
NC
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
图 61. PWP Layout Example
46
版权 © 2018–2019, Texas Instruments Incorporated
TPS1HA08-Q1
www.ti.com.cn
ZHCSJ60D –NOVEMBER 2018–REVISED DECEMBER 2019
13 器件和文档支持
13.1 器件支持
13.1.1 相关文档
请参阅如下相关文档：
•
•
•
•
TI《如何利用智能高侧开关驱动电感、电容和照明负载》
《智能电源开关的短路可靠性测试》
TI《智能电源开关座椅加热器参考设计》
适用于高侧开关的反向电池保护
13.2 商标
All trademarks are the property of their respective owners.
13.3 静电放电警告
这些装置包含有限的内置 ESD 保护。 存储或装卸时，应将导线一起截短或将装置放置于导电泡棉中，以防止 MOS 门极遭受静电损
伤。
13.4 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
14 机械、封装和可订购信息
以下页面包含机械、封装和可订购信息。这些信息是指定器件的最新可用数据。数据如有变更，恕不另行通知，且
不会对此文档进行修订。如需获取此数据表的浏览器版本，请查阅左侧的导航栏。
版权 © 2018–2019, Texas Instruments Incorporated
47
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TPS1HA08AQPWPRQ1
TPS1HA08BQPWPRQ1
TPS1HA08CQPWPRQ1
TPS1HA08DQPWPRQ1
TPS1HA08EQPWPRQ1
ACTIVE
HTSSOP
HTSSOP
HTSSOP
HTSSOP
HTSSOP
PWP
16
16
16
16
16
3000
3000
3000
3000
3000
RoHS-Exempt
& Green
NIPDAU
Level-3-260C-168HRS
Level-3-260C-168HRS
Level-3-260C-168HRS
Level-3-260C-168HRS
Level-3-260C-168HRS
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
1HA08A
ACTIVE
ACTIVE
ACTIVE
ACTIVE
PWP
RoHS-Exempt
& Green
NIPDAU
NIPDAU
NIPDAU
NIPDAU
1HA08B
1HA08C
1HA08D
1HA08E
PWP
RoHS-Exempt
& Green
PWP
RoHS-Exempt
& Green
PWP
RoHS-Exempt
& Green
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
6-Aug-2020
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPS1HA08AQPWPRQ1 HTSSOP PWP
TPS1HA08BQPWPRQ1 HTSSOP PWP
TPS1HA08CQPWPRQ1 HTSSOP PWP
TPS1HA08DQPWPRQ1 HTSSOP PWP
TPS1HA08EQPWPRQ1 HTSSOP PWP
16
16
16
16
16
3000
3000
3000
3000
3000
330.0
330.0
330.0
330.0
330.0
12.4
12.4
12.4
12.4
12.4
6.9
6.9
6.9
6.9
6.9
5.6
5.6
5.6
5.6
5.6
1.6
1.6
1.6
1.6
1.6
8.0
8.0
8.0
8.0
8.0
12.0
12.0
12.0
12.0
12.0
Q1
Q1
Q1
Q1
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
6-Aug-2020
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TPS1HA08AQPWPRQ1
TPS1HA08BQPWPRQ1
TPS1HA08CQPWPRQ1
TPS1HA08DQPWPRQ1
TPS1HA08EQPWPRQ1
HTSSOP
HTSSOP
HTSSOP
HTSSOP
HTSSOP
PWP
PWP
PWP
PWP
PWP
16
16
16
16
16
3000
3000
3000
3000
3000
350.0
350.0
350.0
350.0
350.0
350.0
350.0
350.0
350.0
350.0
43.0
43.0
43.0
43.0
43.0
Pack Materials-Page 2
重要声明和免责声明
TI“按原样”提供技术和可靠性数据（包括数据表）、设计资源（包括参考设计）、应用或其他设计建议、网络工具、安全信息和其他资源，
不保证没有瑕疵且不做出任何明示或暗示的担保，包括但不限于对适销性、某特定用途方面的适用性或不侵犯任何第三方知识产权的暗示担
保。
这些资源可供使用 TI 产品进行设计的熟练开发人员使用。您将自行承担以下全部责任：(1) 针对您的应用选择合适的 TI 产品，(2) 设计、验
证并测试您的应用，(3) 确保您的应用满足相应标准以及任何其他功能安全、信息安全、监管或其他要求。
这些资源如有变更，恕不另行通知。TI 授权您仅可将这些资源用于研发本资源所述的 TI 产品的应用。严禁对这些资源进行其他复制或展示。
您无权使用任何其他 TI 知识产权或任何第三方知识产权。您应全额赔偿因在这些资源的使用中对 TI 及其代表造成的任何索赔、损害、成
本、损失和债务，TI 对此概不负责。
TI 提供的产品受 TI 的销售条款或 ti.com 上其他适用条款/TI 产品随附的其他适用条款的约束。TI 提供这些资源并不会扩展或以其他方式更改
TI 针对 TI 产品发布的适用的担保或担保免责声明。
TI 反对并拒绝您可能提出的任何其他或不同的条款。IMPORTANT NOTICE
邮寄地址：Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2023，德州仪器 (TI) 公司
相关型号：
©2020 ICPDF网 联系我们和版权申明