TPA6203A1 [TI]
1.25-W MONO FULLY DIFFERENTIAL AUDIO POWER AMPLIFIER; 1.25 -W单声道全差分音频功率放大器
| 型号： | TPA6203A1 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 1.25-W MONO FULLY DIFFERENTIAL AUDIO POWER AMPLIFIER |
| 文件： | 总19页 (文件大小：462K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPA6203A1
www.ti.com
SLOS364C–MARCH 2002–REVISED SEPTEMBER 2003
1.25-W MONO FULLY DIFFERENTIAL AUDIO POWER AMPLIFIER
APPLICATIONS
FEATURES
•
1.25 W Into 8 Ω From a 5-V Supply at
THD = 1% (Typ)
•
Designed for Wireless or Cellular Handsets
and PDAs
•
•
•
Low Supply Current: 1.7 mA typ
Shutdown Control <1 µA
DESCRIPTION
The TPA6203A1 is a 1.25-W mono fully differential
amplifier designed to drive a speaker with at least 8-Ω
impedance while consuming less than 37 mm2 total
printed-circuit board (PCB) area in most applications.
This device operates from 2.5 V to 5.5 V, drawing only
1.7 mA of quiescent supply current. The TPA6203A1 is
available in the space-saving 2 mm x 2 mm MicroStar
Junior™ BGA package.
Only Five External Components
– Improved PSRR (90 dB) and Wide Supply
Voltage (2.5 V to 5.5 V) for Direct Battery
Operation
– Fully Differential Design Reduces RF
Rectification
– Improved CMRR Eliminates Two Input
Coupling Capacitors
– C(BYPASS) Is Optional Due to Fully Differential
Design and High PSRR
– ZQV (Pb - free) and GQV Options
Features like 85-dB PSRR from 90 Hz to 5 kHz,
improved RF-rectification immunity, and small PCB
area makes the TPA6203A1 ideal for wireless
handsets. A fast start-up time of 4 µs with minimal pop
makes the TPA6203A1 ideal for PDA applications.
•
Avaliable in a 2 mm x 2 mm MicroStar
Junior™ BGA Package
– ZQV (Pb - free) and GQV Options
APPLICATION CIRCUIT
Actual Solution Size
V
DD
A3
R
F
To Battery
R
F
C
s
R
I
-
IN-
C3
V
_
+
O+
B3
A1
In From
DAC
R
I
V
C
S
O-
+
C2 IN+
(1)
C
B
5,25 mm
R
F
GND B2
R
I
B1
C1
SHUTDOWN
(1)
Bias
Circuitry
R
I
C
(BYPASS)
R
F
(1)
C
is optional
(BYPASS)
6,9 mm
MicroStar Junior is a trademark of Texas Instruments.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily in-
cludetestingofallparameters.
Copyright © 2002–2003, Texas Instruments Incorporated
TPA6203A1
www.ti.com
SLOS364C–MARCH 2002–REVISED SEPTEMBER 2003
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ABSOLUTE MAXIMUM RATINGS
(1)
over operating free-air temperature range unless otherwise noted
UNIT
-0.3 V to 6.0 V
-0.3 V to VDD +0.3V
See Dissipation Rating Table
-40°C to 85°C
-40°C to 125°C
-65°C to 150°C
260°C
Supply voltage, VDD
Input voltage, VI
Continuous total power dissipation
Operating free-air temperature, TA
Junction temperature, TJ
Storage temperature, Tstg
ZQV
GQV
Lead temperature 1,6 mm (1/16 Inch) from case for 10 seconds
235°C
(1)
Stresses beyond those listed under "absolute maximum ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS
MIN
2.5
2
TYP
MAX UNIT
Supply voltage, VDD
5.5
V
V
High-level input voltage, VIH
Low-level input voltage, VIL
SHUTDOWN
SHUTDOWN
0.8
VDD-0.8
85
V
Common-mode input voltage, VIC
Operating free-air temperature, TA
VDD = 2.5 V, 5.5 V, CMRR ≤ -60 dB
0.5
-40
V
°C
DISSIPATION RATINGS
TA≤ 25°C
POWER RATING
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
PACKAGE
DERATING FACTOR
GQV, ZQV
885 mW
8.8 mW/°C
486 mW
354 mW
ORDERING INFORMATION
(1) (2)
PACKAGED DEVICES
MICROSTAR JUNIOR™
MICROSTAR JUNIOR™
(GQV)
TPA6203A1GQVR
AADI
(ZQV)
TPA6203A1ZQVR
AAEI
Device
Symbolization
(1)
(2)
The GQV is the standard MicroStar Junior package. The ZQV is a lead-free option and is qualified for 260° lead-free assembly.
The GQV and ZQV packages are only available taped and reeled. The suffix R designates taped and reeled parts.
2
TPA6203A1
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SLOS364C–MARCH 2002–REVISED SEPTEMBER 2003
ELECTRICAL CHARACTERISTICS
TA = 25°C, Gain = 1 V/V
PARAMETER
TEST CONDITIONS
VI = 0 V, VDD = 2.5 V to 5.5 V
MIN
TYP MAX UNIT
Output offset voltage (measured
differentially)
|VOO
|
9
mV
dB
PSRR
Power supply rejection ratio
VDD = 2.5 V to 5.5 V
-90
-70
-62
-70
-65
-55
VDD = 3.6 V to 5.5 V, VIC = 0.5 V to VDD-0.8
VDD = 2.5 V, VIC = 0.5 V to 1.7 V
CMRR Common-mode rejection ratio
dB
VDD = 5.5 V
0.30 0.46
0.22
RL = 8 Ω, VIN+ = VDD, VIN- = 0 V or VIN+
VOL
Low-level output voltage
High-level output voltage
VDD = 3.6 V
VDD = 2.5 V
VDD = 5.5 V
VDD = 3.6 V
VDD = 2.5 V
V
= 0 V, VIN- = VDD
0.19 0.26
5.12
4.8
2.1
RL = 8 Ω, VIN+ = VDD, VIN- = 0 V or VIN+
= 0 V, VIN- = VDD
VOH
3.28
V
2.24
|IIH
|
High-level input current
Low-level input current
Supply current
VDD = 5.5 V, VI = 5.8 V
VDD = 5.5 V, VI = -0.3 V
1.2
µA
µA
mA
µA
|IIL|
1.2
IDD
VDD = 2.5 V to 5.5 V, no load, SHUTDOWN = 2 V
1.7
2
IDD(SD)
Supply current in shutdown mode SHUTDOWN = 0.8 V, VDD = 2.5 V to 5.5 V, no load
0.01
0.9
OPERATING CHARACTERISTICS
TA = 25°C, Gain = 1 V/V, RL = 8 Ω
PARAMETER
TEST CONDITIONS
VDD = 5 V
MIN TYP
1.25
MAX
UNIT
PO
Output power
THD + N = 1%, f = 1 kHz
VDD = 3.6 V
VDD = 2.5 V
0.63
W
0.3
0.06
%
VDD = 5 V, PO = 1 W, f = 1 kHz
Total harmonic distortion
plus noise
0.07
%
THD+N
VDD = 3.6 V, PO = 0.5 W, f = 1 kHz
VDD = 2.5 V, PO = 200 mW, f = 1 kHz
0.08
%
C(BYPASS) = 0.47 µF, VDD = 3.6 V to
5.5 V,
Inputs ac-grounded with CI = 2 µF
f = 217 Hz to 2 kHz,
VRIPPLE = 200 mVPP
-87
-82
C(BYPASS) = 0.47 µF, VDD = 2.5 V to
3.6 V,
Inputs ac-grounded with CI = 2 µF
Supply ripple rejection
ratio
f = 217 Hz to 2 kHz,
VRIPPLE = 200 mVPP
kSVR
dB
C(BYPASS) = 0.47 µF, VDD = 2.5 V to
5.5 V,
Inputs ac-grounded with CI = 2 µF
f = 40 Hz to 20 kHz,
VRIPPLE = 200 mVPP
≤-74
SNR
Vn
Signal-to-noise ratio
Output voltage noise
VDD = 5 V, PO= 1 W
104
17
dB
No weighting
f = 20 Hz to 20 kHz
µVRMS
A weighting
13
f = 20 Hz to 1 kHz
f = 20 Hz to 20 kHz
≤-85
≤-74
2
Common-mode rejection
ratio
VDD = 2.5 V to 5.5 V,
VICM = 200 mVPP
CMRR
ZI
dB
Input impedance
MΩ
Shutdown attenuation
f = 20 Hz to 20 kHz, RF = RI = 20 kΩ
-80
dB
3
TPA6203A1
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SLOS364C–MARCH 2002–REVISED SEPTEMBER 2003
MicroStar Junior (GQV or ZQV) Package
(TOP VIEW)
GND
1 2
3
A
B
C
V
V
V
DD
O+
O–
SHUTDOWN
BYPASS
IN–
IN+
(SIDE VIEW)
Terminal Functions
TERMINAL
NAME
I/O
DESCRIPTION
NO.
C1
B2
C3
C2
B1
BYPASS
GND
I
I
I
I
I
Mid-supply voltage. Connect a capacitor to GND for BYPASS voltage filtering. Bypass capacitor is optional.
High-current ground
IN-
Negative differential input
Positive differential input
IN+
SHUTDOWN
Shutdown terminal. Pull this pin low (≤0.8 V) to place the device in shutdown and pull it high (≥2 V) for
active mode.
VDD
VO+
VO-
A3
B3
A1
I
Supply voltage terminal
Positive BTL output
Negative BTL output
O
O
4
TPA6203A1
www.ti.com
SLOS364C–MARCH 2002–REVISED SEPTEMBER 2003
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
vs Supply voltage
vs Load resistance
vs Output power
1
PO
PD
Output power
2, 3
Power dissipation
4, 5
Maximum ambient temperature
vs Power dissipation
vs Output power
6
7, 8
Total harmonic distortion + noise
vs Frequency
9, 10, 11, 12
vs Common-mode input voltage
vs Frequency
13
Supply voltage rejection ratio
Supply voltage rejection ratio
GSM Power supply rejection
GSM Power supply rejection
14, 15, 16, 17
vs Common-mode input voltage
vs Time
18
19
20
21
22
23
24
25
26
27
vs Frequency
vs Frequency
CMRR Common-mode rejection ratio
vs Common-mode input voltage
vs Frequency
Closed loop gain/phase
Open loop gain/phase
vs Frequency
vs Supply voltage
vs Shutdown voltage
vs Bypass capacitor
IDD
Supply current
Start-up time
5
TPA6203A1
www.ti.com
SLOS364C–MARCH 2002–REVISED SEPTEMBER 2003
TYPICAL CHARACTERISTICS
OUTPUT POWER
vs
SUPPLY VOLTAGE
OUTPUT POWER
vs
LOAD RESISTANCE
OUTPUT POWER
vs
LOAD RESISTANCE
1.8
1.6
1.4
1.2
1
1.8
1.6
1.4
1.2
1.4
1.2
1
f = 1 kHz
THD+N = 10%
Gain = 1 V/V
= 3.6 V
R
= 8 Ω
f = 1 kHz
THD+N = 1%
Gain = 1 V/V
L
f = 1 kHz
Gain = 1 V/V
V
= 5 V
DD
V
= 5 V
DD
THD+N = 10%
V
DD
V
= 3.6 V
DD
0.8
0.6
0.4
1
0.8
V
= 2.5 V
DD
0.8
0.6
0.4
V
= 2.5 V
DD
0.6
0.4
0.2
THD+N = 1%
0.2
0
0.2
0
0
2.5
3
3.5
4
4.5
5
8
13
18
23
28
32
8
13
18
23
28
32
V
- Supply Voltage - V
R
L
- Load Resistance - Ω
DD
R
L
- Load Resistance - Ω
Figure 1.
Figure 2.
Figure 3.
MAXIMUM AMBIENT
TEMPERATURE
vs
POWER DISSIPATION
vs
POWER DISSIPATION
vs
OUTPUT POWER
OUTPUT POWER
POWER DISSIPATION
0.4
0.35
0.3
0.7
90
80
70
60
50
40
30
20
10
0
V
= 5 V
V
= 3.6 V
DD
DD
0.6
0.5
0.4
0.3
0.2
0.1
0
8 Ω
8 Ω
0.25
0.2
0.15
0.1
16 Ω
16 Ω
0.05
0
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8
0
0.2
0.4
0.6
0.8
0
0.2 0.4
0.6
0.8
1
1.2 1.4
P
- Power Dissipation - W
P
- Output Power - W
P
- Output Power - W
O
D
O
Figure 4.
Figure 5.
Figure 6.
TOTAL HARMONIC DISTORTION
TOTAL HARMONIC DISTORTION
TOTAL HARMONIC DISTORTION
+ NOISE
vs
+ NOISE
vs
+ NOISE
vs
OUTPUT POWER
OUTPUT POWER
FREQUENCY
10
5
10
10
5
R
L
= 16 Ω
f = 1 kHz
V
= 5 V
DD
C = 2 µF
= 8 Ω
L
5
50 mW
I
2
1
C
= 0 to 1 µF
R
C
(Bypass)
2.5 V
2
1
2
Gain = 1 V/V
= 0 to 1 µF
(Bypass)
3.6 V
0.5
Gain = 1 V/V
1
0.2
0.1
250 mW
0.5
5 V
0.5
2.5 V
3.6 V
5 V
0.05
0.2
0.1
0.2
0.1
0.02
0.01
1 W
0.05
0.05
R
C
= 8 Ω, f = 1 kHz
0.005
L
= 0 to 1 µF
(Bypass)
0.02
0.01
0.02
0.01
0.002
0.001
Gain = 1 V/V
10 m
100 m
1
2
3
10 m
100 m
1
2
20
100 200
1 k 2 k
10 k 20 k
f - Frequency - Hz
P
- Output Power - W
P
- Output Power - W
O
O
Figure 7.
Figure 8.
Figure 9.
6
TPA6203A1
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SLOS364C–MARCH 2002–REVISED SEPTEMBER 2003
TYPICAL CHARACTERISTICS (continued)
TOTAL HARMONIC DISTORTION
TOTAL HARMONIC DISTORTION
TOTAL HARMONIC DISTORTION
+ NOISE
vs
+ NOISE
vs
+ NOISE
vs
FREQUENCY
10
FREQUENCY
FREQUENCY
10
5
10
5
V
= 3.6 V
DD
C = 2 µF
V
= 2.5 V
V
= 3.6 V
5
25 mW
DD
C = 2 µF
DD
C = 2 µF
I
15 mW
I
I
2
1
2
1
2
1
R
C
= 8 Ω
L
25 mW
R
C
= 8 Ω
R
C
= 16 Ω
L
= 0 to 1 µF
(Bypass)
L
= 0 to 1 µF
(Bypass)
= 0 to 1 µF
(Bypass)
Gain = 1 V/V
0.5
0.5
0.5
Gain = 1 V/V
Gain = 1 V/V
0.2
0.1
0.2
0.1
0.2
0.1
125 mW
125 mW
75 mW
0.05
0.05
0.05
0.02
0.01
0.02
0.01
0.02
0.01
500 mW
200 mW
250 mW
0.005
0.005
0.005
0.002
0.001
0.002
0.001
0.002
0.001
20
50 100 200 500 1 k 2 k 5 k 10 k 20 k
20
50 100 200 500 1 k 2 k 5 k 10 k 20 k
20
50 100 200 500 1 k 2 k 5 k 10 k 20 k
f - Frequency - Hz
f - Frequency - Hz
f - Frequency - Hz
Figure 10.
Figure 11.
Figure 12.
TOTAL HARMONIC DISTORTION
SUPPLY VOLTAGE REJECTION
SUPPLY VOLTAGE REJECTION
+ NOISE
vs
RATIO
vs
RATIO
vs
COMMON MODE INPUT VOLTAGE
FREQUENCY
FREQUENCY
0
-10
-20
0
-10
-20
10
Gain = 5 V/V
f = 1 kHz
C = 2 µF
I
C = 2 µF
I
P
= 200 mW
R = 8 Ω
L
O
R
C
V
= 8 Ω
L
C
= 0.47 µF
(Bypass)
= 200 mV
= 0.47 µF
(Bypass)
= 200 mV
V
p-p
-30
-40
-50
-60
-70
-80
-30
-40
-50
-60
-70
-80
p-p
Inputs ac-Grounded
Inputs ac-Grounded
Gain = 1 V/V
1
V
=2. 5 V
DD
V
= 2.5 V
DD
V
V
= 5 V
DD
V
=2. 5 V
DD
0.10
0.01
V
= 5 V
DD
= 3.6 V
DD
V
= 3.6 V
DD
-90
-90
V
= 3.6 V
DD
-100
-100
20 50 100 200 500 1 k 2 k 5 k 10 k 20 k
20 50 100 200 500 1 k 2 k 5 k 10 k 20 k
0
0.5
1
1.5
2
2.5
3
3.5
f - Frequency - Hz
f - Frequency - Hz
V
- Common Mode Input Voltage - V
IC
Figure 13.
Figure 14.
Figure 15.
SUPPLY VOLTAGE REJECTION
SUPPLY VOLTAGE REJECTION
SUPPLY VOLTAGE REJECTION
RATIO
vs
RATIO
vs
RATIO
vs
FREQUENCY
FREQUENCY
COMMON MODE INPUT VOLTAGE
0
0
-10
-20
-10
f = 217 Hz
V
= 3.6 V
C = 2 µF
DD
C = 2 µF
I
-10
C
R
= 0.47 µF
-20
-30
-40
-50
-60
-70
(Bypass)
R
L
= 8 Ω
I
-20
-30
-40
-50
-60
-70
-80
= 8 Ω
R
L
= 8 Ω
L
Inputs Floating
Gain = 1 V/V
Gain = 1 V/V
Inputs ac-Grounded
Gain = 1 V/V
-30
-40
-50
-60
-70
-80
V
= 2.5 V
V
= 3.6 V
DD
DD
C
= 0
(Bypass)
C
= 0.47 µF
(Bypass)
V
=2. 5 V
DD
C
= 1 µF
(Bypass)
V
= 5 V
DD
V
= 3.6 V
DD
C
= 0.1 µF
(Bypass)
-80
-90
V
= 5 V
-90
-90
DD
-100
-100
20 50 100 200 500 1 k 2 k 5 k 10 k 20 k
f - Frequency - Hz
20 50 100 200 500 1 k 2 k 5 k 10 k 20 k
f - Frequency - Hz
0
1
2
3
4
5
V
- Common Mode Input Voltage - V
IC
Figure 16.
Figure 17.
Figure 18.
7
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SLOS364C–MARCH 2002–REVISED SEPTEMBER 2003
TYPICAL CHARACTERISTICS (continued)
GSM POWER SUPPLY
GSM POWER SUPPLY
REJECTION
vs
COMMON MODE REJECTION
REJECTION
vs
RATIO
vs
TIME
FREQUENCY
FREQUENCY
0
0
V
DD
V
V
R
= 2.5 V to 5 V
DD
C1
Frequency
217.41 Hz
-10
= 200 mV
IC
p-p
-50
-20
-30
-40
-50
-60
-70
-80
= 8 Ω
L
Gain = 1 V/V
C1 - Duty
20 %
-100
-150
C1 High
3.598 V
0
V
Shown in Figure 19
DD
C = 2 µF,
I
-50
C1 Pk-Pk
504 mV
C
= 0.47 µF,
(Bypass)
Inputs ac-Grounded
Gain = 1V/V
V
O
-100
-150
-90
-100
Ch1 100 mV/div
Ch4 10 mV/div
2 ms/div
0
200 400 600 800 1k 1.2k 1.4k1.6k1.8k 2k
20 50 100 200 500 1 k 2 k 5 k 10 k 20 k
f - Frequency - Hz
t - Time - ms
f - Frequency - Hz
Figure 19.
Figure 20.
Figure 21.
COMMON MODE REJECTION
RATIO
CLOSED LOOP GAIN/PHASE
OPEN LOOP GAIN/PHASE
vs
vs
vs
FREQUENCY
200
COMMON MODE INPUT VOLTAGE
FREQUENCY
40
30
20
10
220
180
140
100
60
200
0
Phase
V
R
= 3.6 V
DD
= 8 Ω
R
L
= 8 Ω
-10
-20
-30
-40
150
100
50
150
100
50
L
Gain = 1 V/V
Gain
Gain
0
-10
-20
-30
-40
-50
V
= 2.5 V
DD
20
-50
-60
-70
-80
0
0
V
= 5 V
DD
-20
-50
-60
-50
-100
Phase
-100
-140
-180
-220
-100
V
R
= 3.6 V
DD
= 8 Ω
L
-150
-200
-150
-200
-90
-60
-70
Gain = 1 V/V
V
= 3.6 V
DD
-100
10 100
1 k
10 k 100 k 1 M
10 M
100
1 k
10 k
100 k
1 M
10 M
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
f - Frequency - Hz
V
- Common Mode Input Voltage - V
f - Frequency - Hz
IC
Figure 22.
Figure 23.
Figure 24.
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
SUPPLY CURRENT
vs
SHUTDOWN VOLTAGE
START-UP TIME(1)
vs
BYPASS CAPACITOR
6
5
1.8
1.6
1.4
1.2
1.8
1.6
1.4
V
= 2.5 V
DD
4
3
2
1
0
1.2
1.0
0.8
V
= 3.6 V
DD
1
V
= 5 V
DD
0.8
0.6
0.4
0.2
0
0.6
0.4
0.2
0
0
0.5
(Bypass)
1
1.5
2
C
- Bypass Capacitor - µF
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9
1
2
V
- Supply Voltage - V
Voltage on SHUTDOWN Terminal - V
DD
(1)
Start-Up time is the time it takes (from a
low-to-high transition on SHUTDOWN) for the
gain of the amplifier to reach -3 dB of the final
gain.
Figure 25.
Figure 26.
Figure 27.
8
TPA6203A1
www.ti.com
SLOS364C–MARCH 2002–REVISED SEPTEMBER 2003
APPLICATION INFORMATION
shift in the mid-supply affects both positive and
negative channels equally and cancels at the
differential output. However, removing the bypass
capacitor slightly worsens power supply rejection
ratio (kSVR), but a slight decrease of kSVR may be
acceptable when an additional component can be
eliminated (see Figure 17).
FULLY DIFFERENTIAL AMPLIFIER
The TPA6203A1 is a fully differential amplifier with
differential inputs and outputs. The fully differential
amplifier consists of a differential amplifier and a
common- mode amplifier. The differential amplifier
ensures that the amplifier outputs a differential
voltage that is equal to the differential input times the
gain. The common-mode feedback ensures that the
common-mode voltage at the output is biased around
VDD/2 regardless of the common- mode voltage at the
input.
•
Better RF-immunity: GSM handsets save power
by turning on and shutting off the RF transmitter
at a rate of 217 Hz. The transmitted signal is
picked-up on input and output traces. The fully
differential amplifier cancels the signal much
better than the typical audio amplifier.
Advantages of Fully Differential Amplifiers
APPLICATION SCHEMATICS
•
Input coupling capacitors not required: A fully
differential amplifier with good CMRR, like the
TPA6203A1, allows the inputs to be biased at
voltage other than mid-supply. For example, if a
DAC has mid-supply lower than the mid-supply of
the TPA6203A1, the common-mode feedback
circuit adjusts for that, and the TPA6203A1 out-
puts are still biased at mid-supply of the
TPA6203A1. The inputs of the TPA6203A1 can
be biased from 0.5 V to VDD - 0.8 V. If the inputs
are biased outside of that range, input coupling
capacitors are required.
Figure 28 through Figure 30 show application
schematics for differential and single-ended inputs.
Typical values are shown in Table 1.
Table 1. Typical Component Values
COMPONENT
VALUE
10 kΩ
10 kΩ
0.22 µF
1 µF
RI
RF
(1)
C(BYPASS)
CS
CI
0.22 µF
•
Mid-supply bypass capacitor, C(BYPASS), not re-
quired: The fully differential amplifier does not
require a bypass capacitor. This is because any
(1) C(BYPASS) is optional
V
DD
A3
R
F
To Battery
C
s
R
I
C3
–
+
IN–
_
+
V
O+
B3
A1
In From
DAC
V
R
I
O–
C2 IN+
R
F
GND B2
B1
C1
SHUTDOWN
†
Bias
Circuitry
C
(BYPASS)
†
C
is optional
(BYPASS)
Figure 28. Typical Differential Input Application Schematic
9
TPA6203A1
www.ti.com
SLOS364C–MARCH 2002–REVISED SEPTEMBER 2003
V
DD
A3
R
F
To Battery
C
I
C
s
R
R
I
C3
IN–
–
+
_
+
V
B3
A1
O+
IN
V
I
O–
C2 IN+
C
I
R
F
GND B2
B1
C1
SHUTDOWN
†
Bias
Circuitry
C
(BYPASS)
†
C
is optional
(BYPASS)
Figure 29. Differential Input Application Schematic Optimized With Input Capacitors
V
DD
A3
R
F
To Battery
C
I
C
s
R
I
C3
IN–
_
+
V
O+ B3
IN
R
V
I
O–
A1
C2 IN+
C
I
R
F
GND B2
B1
C1
SHUTDOWN
†
Bias
Circuitry
C
(BYPASS)
†
C
is optional
(BYPASS)
Figure 30. Single-Ended Input Application Schematic
Resistor matching is very important in fully differential
amplifiers. The balance of the output on the reference
voltage depends on matched ratios of the resistors.
CMRR, PSRR, and the cancellation of the second
harmonic distortion diminishes if resistor mismatch
occurs. Therefore, it is recommended to use 1%
tolerance resistors or better to keep the performance
optimized.
Selecting Components
Resistors (RF and RI)
The input (RI) and feedback resistors (RF) set the
gain of the amplifier according to Equation 1.
Gain = R /R
F
I
(1)
RF and RI should range from 1 kΩ to 100 kΩ. Most
graphs were taken with RF = RI = 20 kΩ.
10
TPA6203A1
www.ti.com
SLOS364C–MARCH 2002–REVISED SEPTEMBER 2003
Bypass Capacitor (CBYPASS) and Start-Up Time
In this example, CI is 0.16 µF, so one would likely
choose a value in the range of 0.22 µF to 0.47 µF. A
further consideration for this capacitor is the leakage
path from the input source through the input network
(RI, CI) and the feedback resistor (RF) to the load.
This leakage current creates a dc offset voltage at the
input to the amplifier that reduces useful headroom,
especially in high gain applications. For this reason, a
ceramic capacitor is the best choice. When polarized
capacitors are used, the positive side of the capacitor
should face the amplifier input in most applications,
as the dc level there is held at VDD/2, which is likely
higher than the source dc level. It is important to
confirm the capacitor polarity in the application.
The internal voltage divider at the BYPASS pin of this
device sets
a
mid-supply voltage for internal
references and sets the output common mode
voltage to VDD/2. Adding a capacitor to this pin filters
any noise into this pin and increases the kSVR
C(BYPASS)also determines the rise time of VO+ and VO-
when the device is taken out of shutdown. The larger
the capacitor, the slower the rise time. Although the
output rise time depends on the bypass capacitor
value, the device passes audio 4 µs after taken out of
shutdown and the gain is slowly ramped up based on
.
C(BYPASS)
.
Input Capacitor (CI)
Decoupling Capacitor (CS)
The TPA6203A1 does not require input coupling
capacitors if using a differential input source that is
biased from 0.5 V to VDD - 0.8 V. Use 1% tolerance
or better gain-setting resistors if not using input
coupling capacitors.
The TPA6203A1 is a high-performance CMOS audio
amplifier that requires adequate power supply
decoupling to ensure the output total harmonic
distortion (THD) is as low as possible. Power supply
decoupling also prevents oscillations for long lead
lengths between the amplifier and the speaker. For
higher frequency transients, spikes, or digital hash on
the line, a good low equivalent-series- resistance
(ESR) ceramic capacitor, typically 0.1 µF to 1 µF,
placed as close as possible to the device VDD lead
works best. For filtering lower frequency noise
signals, a 10-µF or greater capacitor placed near the
audio power amplifier also helps, but is not required
in most applications because of the high PSRR of this
device.
In the single-ended input application an input
capacitor, CI, is required to allow the amplifier to bias
the input signal to the proper dc level. In this case, CI
and RI form a high-pass filter with the corner
frequency determined in Equation 2.
1
f
+
c
2pR C
I
I
(2)
–3 dB
USING LOW-ESR CAPACITORS
Low-ESR capacitors are recommended throughout
this applications section. A real (as opposed to ideal)
capacitor can be modeled simply as a resistor in
series with an ideal capacitor. The voltage drop
across this resistor minimizes the beneficial effects of
the capacitor in the circuit. The lower the equivalent
value of this resistance the more the real capacitor
behaves like an ideal capacitor.
f
c
The value of CI is important to consider as it directly
affects the bass (low frequency) performance of the
circuit. Consider the example where RI is 10 kΩ and
the specification calls for a flat bass response down
to 100 Hz. Equation 2 is reconfigured as Equation 3.
1
C
+
I
2pR f
c
I
(3)
11
TPA6203A1
www.ti.com
SLOS364C–MARCH 2002–REVISED SEPTEMBER 2003
DIFFERENTIAL OUTPUT VERSUS
SINGLE-ENDED OUTPUT
In a typical wireless handset operating at 3.6 V,
bridging raises the power into an 8-Ω speaker from a
singled-ended (SE, ground reference) limit of 200
mW to 800 mW. In sound power that is a 6-dB
improvement—which is loudness that can be heard.
In addition to increased power there are frequency
response concerns. Consider the single-supply SE
Figure 31 shows a Class-AB audio power amplifier
(APA) in
a fully differential configuration. The
TPA6203A1 amplifier has differential outputs driving
both ends of the load. There are several potential
benefits to this differential drive configuration, but
initially consider power to the load. The differential
drive to the speaker means that as one side is
slewing up, the other side is slewing down, and vice
versa. This in effect doubles the voltage swing on the
load as compared to a ground referenced load.
Plugging 2 × VO(PP) into the power equation, where
voltage is squared, yields 4× the output power from
the same supply rail and load impedance (see
Equation 4).
configuration shown in Figure 32.
A coupling
capacitor is required to block the dc offset voltage
from reaching the load. This capacitor can be quite
large (approximately 33 µF to 1000 µF) so it tends to
be expensive, heavy, occupy valuable PCB area, and
have
the
additional
drawback
of
limiting
low-frequency performance of the system. This
frequency-limiting effect is due to the high pass filter
network created with the speaker impedance and the
coupling capacitance and is calculated with Equation
V
O(PP)
5.
V
+
(rms)
Ǹ
1
2 2
f
+
c
2pR C
L C
(5)
2
V
(rms)
For example, a 68-µF capacitor with an 8-Ω speaker
would attenuate low frequencies below 293 Hz. The
BTL configuration cancels the dc offsets, which
eliminates the need for the blocking capacitors.
Low-frequency performance is then limited only by
the input network and speaker response. Cost and
PCB space are also minimized by eliminating the
bulky coupling capacitor.
Power +
R
L
(4)
V
DD
V
O(PP)
V
DD
V
O(PP)
2x V
O(PP)
R
L
V
DD
C
C
V
O(PP)
R
L
–V
O(PP)
–3 dB
Figure 31. Differential Output Configuration
f
c
Figure 32. Single-Ended Output and Frequency
Response
12
TPA6203A1
www.ti.com
SLOS364C–MARCH 2002–REVISED SEPTEMBER 2003
Increasing power to the load does carry a penalty of
increased internal power dissipation. The increased
dissipation is understandable considering that the
BTL configuration produces 4× the output power of
the SE configuration.
V
O
V
(LRMS)
FULLY DIFFERENTIAL AMPLIFIER
EFFICIENCY AND THERMAL INFORMATION
I
DD
Class-AB amplifiers are inefficient. The primary cause
of these inefficiencies is voltage drop across the
output stage transistors. There are two components
of the internal voltage drop. One is the headroom or
dc voltage drop that varies inversely to output power.
The second component is due to the sinewave nature
of the output. The total voltage drop can be
calculated by subtracting the RMS value of the output
voltage from VDD. The internal voltage drop multiplied
by the average value of the supply current, IDD(avg),
determines the internal power dissipation of the
amplifier.
I
DD(avg)
Figure 33. Voltage and Current Waveforms for
BTL Amplifiers
Although the voltages and currents for SE and BTL
are sinusoidal in the load, currents from the supply
are very different between SE and BTL
configurations. In an SE application the current
waveform is a half-wave rectified shape, whereas in
BTL it is a full-wave rectified waveform. This means
RMS conversion factors are different. Keep in mind
that for most of the waveform both the push and pull
transistors are not on at the same time, which
supports the fact that each amplifier in the BTL
device only draws current from the supply for half the
waveform. The following equations are the basis for
calculating amplifier efficiency.
An easy-to-use equation to calculate efficiency starts
out as being equal to the ratio of power from the
power supply to the power delivered to the load. To
accurately calculate the RMS and average values of
power in the load and in the amplifier, the current and
voltage waveform shapes must first be understood
(see Figure 33).
P
L
Efficiency of a BTL amplifier +
P
SUP
where:
2
2
V rms
L
V
V
P
2R
P
P
+
, andV
+
, therefore, P
+
L
LRMS
L
Ǹ
R
2
L
L
p
2V
V
R
p
V
P
1
p
P
L
1
p
P
+
+
sin(t) dt
[cos(t)]
0
ŕ
P
+ V
I
avg
and
I
avg +
and
p R
SUP
DD DD
DD
R
L
0
L
Therefore,
2 V
V
DD
P
P
+
SUP
p R
L
PL = Power delivered to load
substituting P and P
into equation 6,
2
L
SUP
PSUP = Power drawn from power supply
VLRMS = RMS voltage on BTL load
RL = Load resistance
VP = Peak voltage on BTL load
IDDavg = Average current drawn from the
power supply
V
P
2 R
L
p V
P
Efficiency of a BTL amplifier +
+
4 V
2 V
V
DD
DD
p R
P
L
where:
VDD = Power supply voltage
ηBTL = Efficiency of a BTL amplifier
V
+ Ǹ2 P R
L L
P
(6)
13
TPA6203A1
www.ti.com
SLOS364C–MARCH 2002–REVISED SEPTEMBER 2003
Therefore,
Given θJA, the maximum allowable junction
temperature, and the maximum internal dissipation,
the maximum ambient temperature can be calculated
with the following equation. The maximum
p Ǹ2 P
R
L
L
h
+
BTL
4 V
DD
(7)
recommended
TPA6203A1 is 125°C.
Max T Max
junction
temperature
for
the
Table 2. Efficiency and Maximum Ambient Tem-
perature vs Output Power in 5-V 8-Ω BTL Systems
T
Θ
P
A
J
JA Dmax
)
Ef-
ficienc
y
Internal
Dissi-
pation
(W)
(
+ 125 * 113 0.634 + 53.3°C
(10)
Output
Power
(W)
Power From
Supply
(W)
Max Ambient
Temperature
(°C)
Equation 10 shows that the maximum ambient
temperature is 53.3°C at maximum power dissipation
with a 5-V supply.
(%)
0.25
0.50
1.00
1.25
31.4
44.4
62.8
70.2
0.55
0.62
0.59
0.53
0.75
1.12
1.59
1.78
62
54
58
65
Table 2 shows that for most applications no airflow is
required to keep junction temperatures in the
specified range. The TPA6203A1 is designed with
thermal protection that turns the device off when the
junction temperature surpasses 150°C to prevent
damage to the IC. Also, using more resistive than 8-Ω
speakers dramatically increases the thermal
performance by reducing the output current.
Table 2 employs Equation 7 to calculate efficiencies
for four different output power levels. Note that the
efficiency of the amplifier is quite low for lower power
levels and rises sharply as power to the load is
increased resulting in a nearly flat internal power
dissipation over the normal operating range. Note that
the internal dissipation at full output power is less
than in the half power range. Calculating the
efficiency for a specific system is the key to proper
power supply design. For a 1.25-W audio system with
8-Ω loads and a 5-V supply, the maximum draw on
the power supply is almost 1.8 W.
PCB LAYOUT
In making the pad size for the BGA balls, it is
recommended
that
the
layout
use
solder-mask-defined (SMD) land. With this method,
the copper pad is made larger than the desired land
area, and the opening size is defined by the opening
in the solder mask material. The advantages normally
associated with this technique include more closely
controlled size and better copper adhesion to the
laminate. Increased copper also increases the
thermal performance of the IC. Better size control is
the result of photo imaging the stencils for masks.
Small plated vias should be placed near the center
ball connecting ball B2 to the ground plane. Added
plated vias and ground plane act as a heatsink and
increase the thermal performance of the device.
Figure 34 shows the appropriate diameters for a 2
mm X 2 mm MicroStar Junior™ BGA layout.
A final point to remember about Class-AB amplifiers
is how to manipulate the terms in the efficiency
equation to the utmost advantage when possible.
Note that in Equation 7, VDD is in the denominator.
This indicates that as VDD goes down, efficiency goes
up.
A simple formula for calculating the maximum power
dissipated, PDmax, may be used for a differential
output application:
2 V2
DD
P
+
p2 R
D max
L
(8)
It is very important to keep the TPA6203A1 external
components very close to the TPA6203A1 to limit
noise pickup. The TPA6203A1 evaluation module
(EVM) layout is shown in the next section as a layout
example.
PDmax for a 5-V, 8-Ω system is 634 mW.
The maximum ambient temperature depends on the
heat sinking ability of the PCB system. The derating
factor for the 2 mm x 2 mm Microstar Junior™
package is shown in the dissipation rating table.
Converting this to θJA:
1
1
Θ
+
+
+ 113°CńW
JA
0.0088
Derating Factor
(9)
14
TPA6203A1
www.ti.com
SLOS364C–MARCH 2002–REVISED SEPTEMBER 2003
0.38 mm
0.25 mm
0.28 mm
C1
B1
A1
VIAS to Ground Plane
C2
C3
B2
B3
Solder Mask
A3
Paste Mask (Stencil)
Copper Trace
Figure 34. MicroStar Junior™ BGA Recommended Layout
TPA6203A1 EVM PCB Layers
The following illustrations depict the TPA6203A1 EVM PCB layers and silkscreen. These drawings are enlarged
to better show the routing. Gerber plots can be obtained from any TI sales office.
Only Required
Circuitry for Most
Applications
Figure 35. TPA6203A1 EVM Top Layer (Not to scale)
15
TPA6203A1
www.ti.com
SLOS364C–MARCH 2002–REVISED SEPTEMBER 2003
Figure 36. TPA6203A1 EVM Bottom Layer (Not to scale)
16
MECHANICAL DATA
MPBG144C – JUNE 2000 – REVISED FEBRUARY 2002
GQV (S-PBGA-N8)
PLASTIC BALL GRID ARRAY
2,10
1,90
SQ
1,00 TYP
0,50
C
B
A
1,00 TYP
0,50
1
2
3
A1 Corner
Bottom View
0,77
0,71
1,00 MAX
Seating Plane
0,08
0,35
0,25
0,25
0,15
M
0,05
4201040/E 01/02
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. MicroStar Junior configuration
D. Falls within JEDEC MO-225
MicroStar Junior is a trademark of Texas Instruments.
1
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