TPA6138A2PWR [TI]
增益可调的 40mW 立体声模拟输入耳机放大器 | PW | 14 | -40 to 85;
| 型号： | TPA6138A2PWR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 增益可调的 40mW 立体声模拟输入耳机放大器 | PW | 14 | -40 to 85 放大器 光电二极管 消费电路 商用集成电路 音频放大器 视频放大器 |
| 文件： | 总15页 (文件大小：600K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPA6100A2D
www.ti.com
SLOS269B–JUNE 2000–REVISED SEPTEMBER 2004
50-mW ULTRALOW VOLTAGE STEREO HEADPHONE AUDIO POWER AMPLIFIER
FEATURES
D PACKAGE
(TOP VIEW)
•
•
•
•
•
•
•
•
50-mW Stereo Output
Low Supply Current . . . 0.75 mA
Low Shutdown Current . . . 50 nA
Pin Compatible With LM4881 and TPA102
Pop Reduction Circuitry
BYPASS
GND
SHUTDOWN
IN2–
IN1–
V 1
1
2
3
4
8
7
6
5
O
(1)
V
DD
V 2
O
Internal Midrail Generation
Thermal and Short-Circuit Protection
Surface-Mount Packaging
DGK PACKAGE
(TOP VIEW)
– MSOP and SOIC
BYPASS
GND
SHUTDOWN
IN2–
IN1–
1
2
3
4
8
7
6
5
•
1.6-V to 3.6-V Supply Voltage Range
V 1
O
V
DD
V 2
O
(1) The polarity of the SHUTDOWN pin is reversed.
DESCRIPTION
The TPA6100A2D is a stereo audio power amplifier packaged in either an 8-pin SOIC package or an 8-pin
MSOP package capable of delivering 50 mW of continuous RMS power per channel into 16-Ω loads. Amplifier
gain is externally configured by a means of three resistors per input channel and does not require external
compensation for settings of 1 to 10.
The TPA6100A2D is optimized for battery applications because of its low supply current, shutdown current, and
THD+N. To obtain the low-supply voltage range, the TPA6100A2D biases BYPASS to VDD/4. A resistor with a
resistance equal to RF must be added from the inputs to ground to allow the output to be biased at VDD/2.
When driving a 16-Ω load with 45-mW output power from 3.3 V, THD+N is 0.04% at 1 kHz, and less than 0.2%
across the audio band of 20 Hz to 20 kHz. For 28 mW into 32-Ω loads, the THD+N is reduced to less than 0.03%
at 1 kHz, and is less than 0.2% across the audio band of 20 Hz to 20 kHz.
TYPICAL APPLICATION CIRCUIT
V
6
7
R
DD
F
V
DD
Audio
Input
C
V
DD
/4
S
R
I
IN1−
8
1
V 1
O
−
+
R
C
I
C
C
BYPASS
C
C
B
Audio
Input
R
I
IN2−
4
V 2
O
−
+
5
2
R
C
I
C
SHUTDOWN
Bias
3
From Shutdown
Control Circuit
Control
R
F
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2000–2004, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
TPA6100A2D
www.ti.com
SLOS269B–JUNE 2000–REVISED SEPTEMBER 2004
These devices have limited built-in ESD protection. The leads should be shorted together or the device
placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
AVAILABLE OPTIONS
PACKAGED DEVICE
MSOP
SYMBOLIZATION
TA
SMALL OUTLINE (D)
TPA6100A2D
MSOP(DGK)
–40°C to 85°C
TPA6100A2DGK
AJL
Terminal Functions
TERMINAL
I/O
DESCRIPTION
NAME
NO.
BYPASS
1
I
Tap to voltage divider for internal mid-supply bias supply. BYPASS is set at VDD/4. Connect to a 0.1-µF
to 1-µF low-ESR capacitor for best performance.
GND
2
8
4
3
6
7
5
I
I
GND is the ground connection.
IN1-
IN1- is the inverting input for channel 1.
IN2- is the inverting input for channel 2.
Active-low input. When held low, the device is placed in a low supply current mode.
VDD is the supply voltage terminal.
IN2-
I
SHUTDOWN
VDD
I
I
VO1
O
O
VO1 is the audio output for channel 1.
VO2
VO2 is the audio output for channel 2.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)(1)
UNIT
4 V
VDD
VI
Supply voltage
Input voltage
–0.3 V to VDD + 0.3 V
Internally limited
–40°C to 150°C
–65°C to 150°C
260°C
Continuous total power dissipation
Operating junction temperature range
Storage temperature range
TJ
Tstg
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
(1) Stresses beyond thoselisted under "absolute maximum ratings” may cause permanent damage to thedevice. These are stress ratings
only, and functional operation of the deviceat these or any other conditions beyond those indicated under "recommendedoperating
conditions” is not implied. Exposure to absolute-maximum-ratedconditions for extended periods may affect devicereliability.
DISSIPATION RATING TABLE
T
A ≤ 25°C
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING POWER RATING
TA = 85°C
PACKAGE
POWER RATING
D
710 mW
5.68 mW/°C
3.75 mW/°C
454 mW
300 mW
369 mW
244 mW
DGK
469 mW
RECOMMENDED OPERATING CONDITIONS
MIN
1.6
MAX UNIT
VDD Supply voltage
3.6
85
V
TA Operating free-air temperature
VIH High-level input voltage
VIL Low-level input voltage
–40
°C
SHUTDOWN
SHUTDOWN
0.6 x VDD
V
0.25 x VDD
2
TPA6100A2D
www.ti.com
SLOS269B–JUNE 2000–REVISED SEPTEMBER 2004
DC ELECTRICAL CHARACTERISTICS
at TA = 25°C, VDD = 3.6 V (Unless otherwise noted)
PARAMETER
TEST CONDITIONS
AV = 2 V/V
MIN
TYP MAX
UNIT
mV
dB
VOO
Output offset voltage
5
72
40
PSRR
IDD
Power supply rejection ratio
Supply current
VDD = 3.0 V to 3.6 V
SHUTDOWN = 3.6 V
SHUTDOWN = 0 V
0.75
2.0
mA
nA
IDD(SD)
Supply current in SHUTDOWN mode
High-level input current (SHUTDOWN)
Low-level input current (SHUTDOWN)
Input impedance (IN1-, IN2-)
50 250
|IIH
|
VDD = 3.6 V, VI = VDD
VDD = 3.6 V, VI = 0 V
1
µA
|IIL|
ZI
1
µA
> 1
MΩ
AC OPERATING CHARACTERISTICS
VDD = 3.3 V, TA = 25°C, RL = 16 Ω
PARAMETER
TEST CONDITIONS
THD ≤ 0.1%, f = 1 kHz
PO = 45 mW, 20 Hz–20 kHz
G = 1, THD < 0.5%
f = 1 kHz
MIN
TYP
MAX
UNIT
PO
Output power (each channel)
50
0.2%
> 20
52
mW
THD+N Total harmonic distortion + noise
BOM
kSVR
SNR
Vn
Maximum output power BW
Supply ripple rejection
kHz
dB
Signal-to-noise ratio
PO = 50 mW
90
dB
Noise output voltage (no noise-weighting filter)
28
µV(rms)
AC OPERATING CHARACTERISTICS
VDD = 3.3 V, TA = 25°C, RL = 32 Ω
PARAMETER
TEST CONDITIONS
THD ≤ 0.1%, f = 1 kHz
PO = 30 mW, 20 Hz–20 kHz
G = 1, THD < 0.2%
f = 1 kHz
MIN
TYP
35
MAX
UNIT
PO
Output power (each channel)
Total harmonic distortion + noise
Maximum output power BW
Supply ripple rejection
mW
THD+N
BOM
kSVR
SNR
Vn
0.2%
> 20
52
kHz
dB
Signal-to-noise ratio
PO = 35 mW
91
dB
Noise output voltage (no noise-weighting filter)
28
µV(rms)
3
TPA6100A2D
www.ti.com
SLOS269B–JUNE 2000–REVISED SEPTEMBER 2004
DC ELECTRICAL CHARACTERISTICS
at TA = 25°C, VDD = 1.6 V (Unless otherwise noted)
PARAMETER
TEST CONDITIONS
AV = 2 V/V
MIN
TYP
5
MAX
40
UNIT
mV
VOO
Output offset voltage
PSRR
IDD
Power supply rejection ratio
Supply current
VDD = 1.5 V to 1.7 V
SHUTDOWN = 1.6 V
SHUTDOWN = 0 V
VDD = 1.6 V, VI= VDD
VDD = 1.6 V, VI= 0 V
80
1.2
50
dB
mA
nA
1.5
250
1
IDD(SD)
Supply current in SHUTDOWN mode
High-level input current (SHUTDOWN)
Low-level input current (SHUTDOWN)
Input impedance (IN1-, IN2-)
|IIH
|
µA
|IIL|
ZI
1
µA
> 1
MΩ
AC OPERATING CHARACTERISTICS
VDD = 1.6 V, TA = 25°C, RL = 16 Ω
PARAMETER
TEST CONDITIONS
THD≤ 0.1%, f = 1 kHz
PO = 9.5 mW, 20 Hz–20 kHz
G = 0 dB, THD < 0.4%
f = 1 kHz
MIN
TYP
9.5
MAX
UNIT
PO
Output power (each channel)
Total harmonic distortion + noise
Maximum output power BW
Supply ripple rejection
mW
THD+N
BOM
kSVR
SNR
Vn
0.4%
> 20
53
kHz
dB
Signal-to-noise ratio
PO = 9.5 mW
86
dB
Noise output voltage (no noise-weighting filter)
18
µV(rms)
AC OPERATING CHARACTERISTICS
VDD = 1.6 V, TA = 25°C, RL = 32 Ω
PARAMETER
TEST CONDITIONS
THD≤ 0.1%, f = 1 kHz
PO = 6.5 mW, 20 Hz–20 kHz
G = 0 dB, THD < 0.3%
f = 1 kHz
MIN
TYP
7.1
MAX
UNIT
PO
Output power (each channel)
Total harmonic distortion + noise
Maximum output power BW
Supply ripple rejection
mW
THD+N
BOM
kSVR
SNR
Vn
0.3%
> 20
53
kHz
dB
Signal-to-noise ratio
PO = 7.1 mW
88
dB
Noise output voltage (no noise-weighting filter)
18
µV(rms)
4
TPA6100A2D
www.ti.com
SLOS269B–JUNE 2000–REVISED SEPTEMBER 2004
APPLICATION INFORMATION
GAIN SETTING RESISTORS, RF, RI,and R
The voltage gain for the TPA6100A2D is set by resistors RF and RI according to Equation 1.
R
R
F
F
Gain + * ǒ Ǔor Gain (dB) + 20 log ǒ Ǔ
R
R
I
I
(1)
Given that the TPA6100A2D is an MOS amplifier, the input impedance is high. Consequently, input leakage
currents are not generally a concern, although noise in the circuit increases as the value of RF increases. In
addition, a certain range of RF values is required for proper start-up operation of the amplifier. Taken together, it
is recommended that the effective impedance seen by the inverting node of the amplifier be set between 5 kΩ
and 20 kΩ. The effective impedance is calculated in Equation 2.
R R
F
I
Effective Impedance +
R ) R
F
I
(2)
As an example, consider an input resistance of 20 kΩ and a feedback resistor of 20 kΩ. The gain of the amplifier
would be –1 and the effective impedance at the inverting terminal would be 10 kΩ, which is within the
recommended range.
For high-performance applications, metal film resistors are recommended because they tend to have lower noise
levels than carbon resistors. For values of RF above 50 kΩ, the amplifier tends to become unstable due to a pole
formed from RF and the inherent input capacitance of the MOS input structure. For this reason, a small
compensation capacitor of approximately 5 pF should be placed in parallel with RF. In effect, this creates a
low-pass filter network with the cutoff frequency defined in Equation 3.
1
f
+
c
2pR C
F
F
(3)
For example, if RF is 100 kΩ and CF is 5 pF, then fc is 318 kHz, which is well outside the audio range.
For maximum signal swing and output power at low supply voltages like 1.6 V to 3.3 V, BYPASS is biased to
VDD/4. However, to allow the output to be biased at VDD/2, a resistor, R, equal to RF must be placed from the
negative input to ground.
INPUT CAPACITOR, CI
In the typical application, an input capacitor, CI, is required to allow the amplifier to bias the input signal to the
proper dc level for optimum operation. In this case, CI and RI form a high-pass filter with the corner frequency
determined in Equation 4.
1
f
+
c
2pR C
I
I
(4)
The value of CI is important to consider, as it directly affects the bass (low-frequency) performance of the circuit.
Consider the example where RI is 20 kΩ and the specification calls for a flat bass response down to 20 Hz.
Equation 4 is reconfigured as Equation 5.
1
C +
I
2pR f
c
I
(5)
In this example, CI is 0.4 µF, so one would likely choose a value in the range of 0.47 µF to 1 µF. A further
consideration for this capacitor is the leakage path from the input source through the input network (RI, CI) and
the feedback resistor (RF) to the load. This leakage current creates a dc offset voltage at the input to the amplifier
that reduces useful headroom, especially in high-gain applications (>10). For this reason a low-leakage tantalum
or ceramic capacitor is the best choice. When polarized capacitors are used, the positive side of the capacitor
should face the amplifier input in most applications, as the dc level there is held at VDD/4, which is likely higher
than the source dc level. It is important to confirm the capacitor polarity in the application.
5
TPA6100A2D
www.ti.com
SLOS269B–JUNE 2000–REVISED SEPTEMBER 2004
APPLICATION INFORMATION (continued)
POWER SUPPLY DECOUPLING, CS
The TPA6100A2D is a high-performance CMOS audio amplifier that requires adequate power supply decoupling
to ensure that the output total harmonic distortion (THD) is as low as possible. Power supply decoupling also
prevents oscillations for long lead lengths between the amplifier and the speaker. The optimum decoupling is
achieved by using two capacitors of different types that target different types of noise on the power supply leads.
For higher frequency transients, spikes, or digital hash on the line, a good low equivalent-series-resistance (ESR)
ceramic capacitor, typically 0.1 µF, placed as close as possible to the device VDD lead, works best. For filtering
lower frequency noise signals, a larger aluminum electrolytic capacitor of 10 µF or greater placed near the power
amplifier is recommended.
MIDRAIL BYPASS CAPACITOR, CB
The midrail bypass capacitor (CB) serves several important functions. During start-up, CB determines the rate at
which the amplifier starts up. This helps to push the start-up pop noise into the subaudible range (so low it can
not be heard). The second function is to reduce noise produced by the power supply caused by coupling into the
output drive signal. This noise is from the midrail generation circuit internal to the amplifier. The capacitor is fed
from a 55-kΩ source inside the amplifier. To keep the start-up pop as low as possible, the relationship shown in
Equation 6 should be maintained.
1
1
ǒC 55 kΩǓ v ǒC RIǓ
B
I
(6)
As an example, consider a circuit where CB is 1 µF, CI is 1 µF, and RI is 20 kΩ. Inserting these values into
Equation 6 results in: 18.18 ≤ 50 which satisfies the rule. Bypass capacitor (CB) values of 0.47-µF to 1-µF
ceramic or tantalum low-ESR capacitors are recommended for the best THD and noise performance.
OUTPUT COUPLING CAPACITOR, CC
In the typical single-supply, single-ended (SE) configuration, an output coupling capacitor (CC) is required to
block the dc bias at the output of the amplifier, thus preventing dc currents in the load. As with the input coupling
capacitor, the output coupling capacitor and impedance of the load form a high-pass filter governed by
Equation 7.
1
f
+
c
2pR C
L
C
(7)
The main disadvantage, from a performance standpoint, is that the typically small load impedances drive the
low-frequency corner higher. Large values of CC are required to pass low frequencies into the load. Consider the
example where a CC of 68 µF is chosen and loads vary from 32 Ω to 47 kΩ. Table 1 summarizes the frequency
response characteristics of each configuration.
Table 1. Common Load Impedances vs Low Frequency
Output Characteristics in SE Mode
RL
CC
LOWEST FREQUENCY
32 Ω
68 µF
68 µF
68 µF
73 Hz
0.23 Hz
0.05 Hz
10,000 Ω
47,000 Ω
As Table 1 indicates, headphone response is adequate and drive into line level inputs (a home stereo for
example) is good.
The output coupling capacitor required in single-supply, SE mode also places additional constraints on the
selection of other components in the amplifier circuit. With the rules described earlier still valid, add the following
relationship:
6
TPA6100A2D
www.ti.com
SLOS269B–JUNE 2000–REVISED SEPTEMBER 2004
1
1
1
ǒC 55 kΩǓ v ǒC R Ǔ Ơ
R C
L
C
B
I I
(8)
USING LOW-ESR CAPACITORS
Low-ESR capacitors are recommended throughout this application. A real capacitor can be modeled simply as a
resistor in series with an ideal capacitor. The voltage drop across this resistor minimizes the beneficial effects of
the capacitor in the circuit. The lower the equivalent value of this resistance, the more the real capacitor behaves
like an ideal capacitor.
3.3-V VERSUS 1.6-V OPERATION
The TPA6100A2D was designed for operation over a supply range of 1.6 V to 3.6 V. There are no special
considerations for 1.6-V versus 3.3-V operation as far as supply bypassing, gain setting, or stability. The most
important consideration is that of output power. Each amplifier can produce a maxium output voltage swing within
a few hundred millivolts of the rails with a 10-kΩ load. However, this voltage swing decreases as the load
resistance decreases and the rDS(on) as the output stage transistors becomes more significant. For example, for a
32-Ω load, the maximum peak output voltage with VDD = 1.6 V is approximately 0.7 V with no clipping distortion.
This reduced voltage swing effectively reduces the maximum undistorted output power.
7
PACKAGE OPTION ADDENDUM
www.ti.com
16-Aug-2012
PACKAGING INFORMATION
Status (1)
Eco Plan (2)
MSL Peak Temp (3)
Samples
Orderable Device
Package Type Package
Drawing
Pins
Package Qty
Lead/
Ball Finish
(Requires Login)
TPA6100A2D
TPA6100A2DG4
TPA6100A2DGK
TPA6100A2DGKG4
TPA6100A2DGKR
TPA6100A2DGKRG4
TPA6100A2DR
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
D
D
8
8
8
8
8
8
8
8
75
75
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
VSSOP
VSSOP
VSSOP
VSSOP
SOIC
DGK
DGK
DGK
DGK
D
80
Green (RoHS
& no Sb/Br)
80
Green (RoHS
& no Sb/Br)
2500
2500
2500
2500
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
TPA6100A2DRG4
SOIC
D
Green (RoHS
& no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
16-Aug-2012
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
16-Aug-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPA6100A2DGKR
TPA6100A2DR
VSSOP
SOIC
DGK
D
8
8
2500
2500
330.0
330.0
12.4
12.4
5.3
6.4
3.4
5.2
1.4
2.1
8.0
8.0
12.0
12.0
Q1
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
16-Aug-2012
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TPA6100A2DGKR
TPA6100A2DR
VSSOP
SOIC
DGK
D
8
8
2500
2500
358.0
367.0
335.0
367.0
35.0
35.0
Pack Materials-Page 2
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