TPA6132A2_17 [TI]
25-mW DirectPath Stereo Headphone Amplifier With Pop Suppression;
| 型号： | TPA6132A2_17 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 25-mW DirectPath Stereo Headphone Amplifier With Pop Suppression |
| 文件： | 总22页 (文件大小：1002K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPA6132A2
www.ti.com ........................................................................................................................................................................................... SLOS597–DECEMBER 2008
25-mW DIRECTPATH™ STEREO HEADPHONE AMPLIFIER WITH POP SUPPRESSION
1
FEATURES
DESCRIPTION
23
•
Patented DirectPath™ Technology Eliminates
Need for DC-Blocking Capacitors
The TPA6132A2 (sometimes referred to as TPA6132)
is a DirectPath™ stereo headphone amplifier that
eliminates the need for external dc-blocking output
capacitors. Differential stereo inputs and built-in
resistors set the device gain, further reducing external
component count. Gain is selectable at –6 dB, 0 dB,
3 dB or 6 dB. The amplifier drives 25 mW into 16 Ω
speakers from a single 2.3 V supply. The TPA6132A2
(TPA6132) provides a constant maximum output
power independent of the supply voltage, thus
facilitating the design for prevention of acoustic
shock.
–
–
Outputs Biased at 0 V
Excellent Low Frequency Fidelity
•
Active Click and Pop Suppression
2.1 mA Typical Supply Current
•
•
Fully Differential or Single-Ended Inputs
–
Built-In Resistors Reduces Component
Count
–
Improves System Noise Performance
•
Constant Maximum Output Power from 2.3 V
to 5.5 V Supply
The TPA6132A2 (TPA6132) features fully differential
inputs to reduce system noise pickup between the
audio source and the headphone amplifier. The high
power supply noise rejection performance and
differential architecture provides increased RF noise
immunity. For single-ended input signals, connect
INL+ and INR+ to ground.
–
Simplifies Design to Prevent Acoustic
Shock
•
•
•
Improved RF Noise Immunity
MicrosoftTM Windows VistaTM Compliant
High Power Supply Noise Rejection
–
–
100 dB PSRR at 217 Hz
90 dB PSRR at 10 kHz
The device has built-in pop suppression circuitry to
completely eliminate disturbing pop noise during
turn-on and turn-off. The amplifier outputs have
short-circuit and thermal-overload protection along
with ±8 kV HBM ESD protection, simplifying end
equipment compliance to the IEC 61000-4-2 ESD
standard.
•
•
•
•
•
Wide Power Supply Range: 2.3 V to 5.5 V
Gain Settings: –6 dB, 0 dB, 3 dB, and 6 dB
Short-Circuit and Thermal-Overload Protection
±8 kV HBM ESD Protected Outputs
Small Package Available
The TPA6132A2 (TPA6132) operates from a single
2.3 V to 5.5 V supply with 2.1 mA of typical supply
current. Shutdown mode reduces supply current to
less than 1 µA.
–
16-Pin, 3 mm × 3 mm Thin QFN
APPLICATIONS
•
•
•
•
Smart Phones / Cellular Phones
Notebook Computers
CD / MP3 Players
OUTR+
OUTR-
OUTL+
OUTL-
INR+
INR-
OUTR
OUTL
CODEC
TPA6132A2
INL+
INL-
Portable Gaming
SGND
PGND
ENABLE
EN
G0
GAIN0
GAIN1
VBAT
G1
VDD
HPVSS
CPN
HPVDD
CPP
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
3
DirectPath is a trademark of Texas Instruments.
Windows Vista is a trademark of Microsoft Corporation.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2008, Texas Instruments Incorporated
TPA6132A2
SLOS597–DECEMBER 2008........................................................................................................................................................................................... www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
FUNCTIONAL BLOCK DIAGRAM
VDD
HPVDD
Supply
Control
2.2 mF
PGND
HPVDD
–
INL-
Resistor
Array
+
OUTL
INL+
Short-Circuit
Protection
HPVSS
Thermal
Protection
HPVDD
–
INR-
Resistor
Array
+
OUTR
INR+
HPVDD
HPVSS
CPP
Charge
Pump
G0
G1
1 mF
Click-and-Pop
Suppression
Gain
Select
CPN
HPVSS
1 mF
SGND
EN
2
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Product Folder Link(s) :TPA6132A2
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DEVICE PINOUT
RTE (QFN) PACKAGE
(TOP VIEW)
1
2
3
4
12
11
10
9
INL-
INL+
INR+
INR-
HPVDD
CPP
PGND
CPN
PIN FUNCTIONS
PIN
I/O/P
PIN DESCRIPTION
NAME
INL-
QFN
1
I
I
Inverting left input for differential signals; left input for single-ended signals
Non-inverting left input for differential signals. Connect to ground for single-ended input applications
Non-inverting right input for differential signals. Connect to ground for single-ended input applications
Inverting right input for differential signals; right input for single-ended signals
Right headphone amplifier output. Connect to right terminal of headphone jack
Gain select
INL+
INR+
INR-
2
3
I
4
I
OUTR
G0
5
O
I
6
G1
7
I
Gain select
HPVSS
CPN
8
P
P
P
P
P
I
Charge pump output and negative power supply for output amplifiers; connect 1µF capacitor to GND
Charge pump negative flying cap. Connect to negative side of 1µF capacitor between CPP and CPN
Ground
9
PGND
CPP
10
11
12
13
14
15
16
–
Charge pump positive flying cap. Connect to positive side of 1µF capacitor between CPP and CPN
Positive power supply for headphone amplifiers. Connect to a 2.2µF capacitor. Do not connect to VDD
Amplifier enable. Connect to logic low to shutdown; connect to logic high to activate
Positive power supply for TPA6132A2
HPVDD
EN
VDD
P
I
SGND
OUTL
Amplifier reference voltage. Connect to ground terminal of headphone jack
Left headphone amplifier output. Connect to left terminal of headphone jack
O
P
Thermal
Pad
Solder the exposed metal pad on the TPA6132A2RTE QFN package to the landing pad on the PCB.
Connect the landing pad to ground or leave it electrically unconnected (floating).
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BOARD LAYOUT CONCEPT
Enable
Control
To Battery
2.2 mF
2.2 mF
1
2
12
11
10
9
Paddle
Soldered /
Matched Board Layout for
Differential Input Signals
Electrical Float
3
4
1 mF
1 mF
Gain
Control
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range, TA = 25°C (unless otherwise noted)
VALUE / UNIT
–0.3 V to 6.0 V
Supply voltage, VDD
Headphone amplifier supply voltage, HPVDD (do not connect to external supply)
–0.3 V to 1.9 V
VI
Input voltage (INR+, INR-, INL+, INL-)
Output continuous total power dissipation
HPVSS –0.3 V to HPVDD + 0.3 V
See Dissipation Rating Table
–40°C to 85°C
TA Operating free-air temperature range
TJ Operating junction temperature range
–40°C to 150°C
–65°C to 85°C
Tstg Storage temperature range
OUTL, OUTR
All Other Pins
8 kV
ESD Protection – HBM
2 kV
ORDERING GUIDE
TA
PACKAGED DEVICES(1)
PART NUMBER(2)
TPA6132A2RTER
TPA6132A2RTET
SYMBOL
–40°C to 85°C
16-pin, 3 mm × 3 mm Thin QFN
AIWI
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
Web site at www.ti.com.
(2) The RTE packages is only available taped and reeled. The suffix “R” indicates a reel of 3000, the suffix “T” indicates a reel of 250
4
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DISSIPATION RATINGS TABLE
T
A ≤ 25°C
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
(1)
PACKAGE
DERATING FACTOR
POWER RATING
RTE (QFN)
2050 mW
48.7 °C/W
1130 mW
821 mW
(1) See JEDEC Standard 51-3 for Low-K board, JEDEC Standard 51-7 for High-K board, and JEDEC Standard 51-12 for using package
thermal information. See JEDEC document page for downloadable copies: http://www.jedec.org/download/default.cfm.
RECOMMENDED OPERATING CONDITIONS
MIN
2.3
MAX
UNIT
V
Supply voltage, VDD
5.5
VIH
VIL
High-level input voltage; EN, G0, G1
Low-level input voltage; EN, G0, G1
Voltage applied to Output; OUTR, OUTL (when EN = 0 V)
Operating free-air temperature
1.3
V
0.6
3.6
85
V
–0.3
–40
V
TA
°C
ELECTRICAL CHARACTERISTICS
TA = 25°C (unless otherwise noted)
PARAMETER
Output offset voltage
TEST CONDITIONS
MIN
TYP
MAX
UNIT
mV
dB
–0.5
0.5
Power supply rejection ratio
VDD = 2.3 V to 5.5 V
100
High-level output current (EN, G0, G1)
Low-level output current (EN, G0, G1)
1
1
µA
µA
VDD = 2.3 V, No load, EN = VDD
VDD = 3.6 V, No load, EN = VDD
VDD = 5.5 V, No load, EN = VDD
EN = 0 V, VDD = 2.3 V to 5.5 V
2.1
2.1
2.2
0.7
3.1
3.1
3.2
1.2
mA
µA
Supply Current
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OPERATING CHARACTERISTICS
VDD = 3.6 V , TA = 25°C, RL = 16 Ω (unless otherwise noted)
PARAMETER
TEST CONDITIONS
THD = 1%, f = 1 kHz
MIN
TYP
25
MAX
UNIT
mW
PO
VO
Output power(1) (Outputs in phase)
Output voltage(1) (Outputs in phase)
THD = 1%, f = 1 kHz, RL = 32 Ω
THD = 1%, VDD = 3.6 V, f = 1 kHz, RL = 100 Ω
G0 = 0 V, G1 = 0 V, (–6 dB)
22
1.1
VRMS
–0.45
–0.95
–0.5 –0.55
–1.0 –1.05
G0 ≥ 1.3 V, G1 = 0 V, (0 dB)
G0 = 0 V, G1 ≥ 1.3 V, (3 dB)
G0 ≥ 1.3 V, G1 ≥ 1.3 V, (6 dB)
Between Left and Right channels
G0 = 0 V, G1 = 0 V, (–6 dB)
AV
Closed-loop voltage gain (OUT / IN–)
Gain matching
V/V
–1.36 –1.41 –1.46
–1.95
–2.0 –2.05
1%
ΔAv
26.4
G0 ≥ 1.3 V, G1 = 0 V, (0 dB)
G0 = 0 V, G1 ≥ 1.3 V, (3 dB)
G0 ≥ 1.3 V, G1 ≥ 1.3 V, (6 dB)
19.8
Input impedance (per input pin)
16.5
RIN
kΩ
13.2
Input impedance in shutdown
(per input pin)
EN = 0 V
10
VCM
Input common-mode voltage range
Output impedance in shutdown
–0.5
1.5
V
Ω
EN = 0 V
50
80
Input-to-output attenuation in shutdown EN = 0 V
200 mVpp ripple, f = 217 Hz
dB
-100
-90
kSVR
AC-power supply rejection ratio
dB
200 mVpp ripple, f = 10 kHz
PO = 20 mW, f = 1 kHz
0.02%
THD+N Total harmonic distortion plus noise(2)
PO = 25 mW into 32 Ω, VDD = 5.5 V, f = 1 kHz
PO = 20 mW; G0 ≥ 1.3 V, G1 = 0 V, (AV = 0 dB)
A-weighted
0.01%
100
5.5
SNR
En
Signal-to-noise ratio
dB
µVRMS
kHz
ms
Noise output voltage
Charge pump switching frequency
Start-up time from shutdown
Crosstallk
fosc
tON
1200
1275
5
1350
PO = 20 mW, f = 1 kHz
Threshold
–80
150
20
dB
°C
Thermal shutdown
Hysteresis
°C
(1) Per output channel
(2) A-weighted
6
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TYPICAL CHARACTERISTICS
TA = 25°C, VDD = 3.6 V, Gain = 0 dB, EN = 3.6 V, CHPVDD = CHPVSS = 2.2 µF, CINPUT = CFLYING = 1 µF, Outputs in
Phase
TOTAL HARMONIC DISTORTION + NOISE vs
OUTPUT POWER
TOTAL HARMONIC DISTORTION + NOISE vs
OUTPUT POWER
10
10
R = 32 W,
L
R
= 16 W,
L
f = 1kHz
f = 1kHz
V
= 2.5 V, In Phase
DD
V
= 2.5 V, In Phase
DD
V
= 3.6 V, In Phase
DD
V
= 3.6 V, In Phase
DD
1
1
V
= 2.5 V, Out of Phase
= 3.6 V, Out of Phase
DD
V
= 2.5 V, Out of Phase
= 3.6 V, Out of Phase
DD
V
V
DD
DD
0.1
0.1
0.01
0.01
0.1
1
10
- Output Power per Channel - mW
50
0.1
1
10
- Output Power per Channel - mW
50
P
P
O
O
Figure 1.
Figure 2.
TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY
1
TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY
1
R
V
= 16 W,
R
V
= 16 W,
L
L
= 2.5 V
= 3.6 V
DD
DD
P
= 1 mW per Channel
O
P
= 1 mW per Channel
O
0.1
0.1
P
= 20 mW per Channel
O
0.01
0.01
P
= 10 mW per Channel
O
P
P
= 4 mW per Channel
= 10 mW per Channel
O
O
0.001
0.001
20
100
1k
10k
20k
20
100
1k
10k
20k
f - Frequency - Hz
f - Frequency - Hz
Figure 3.
Figure 4.
TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY
TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY
1
1
R
V
= 32 W,
R
V
= 16 W,
L
L
= 2.5 V
= 5 V
DD
DD
P
= 1 mW per Channel
O
P
= 1 mW per Channel
O
0.1
0.1
P
= 20 mW per Channel
O
P
= 4 mW per Channel
O
0.01
0.01
P
= 10 mW per Channel
O
P
= 10 mW per Channel
O
0.001
0.001
20
100
1k
10k 20k
20
100
1k
10k
20k
f - Frequency - Hz
f - Frequency - Hz
Figure 5.
Figure 6.
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TYPICAL CHARACTERISTICS (continued)
TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY
1
TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY
1
R
V
= 32 W,
R
V
= 32 W,
L
L
= 5 V
= 3.6 V
DD
DD
P
= 1 mW per Channel
O
P
= 1 mW per Channel
O
0.1
0.1
P
= 10 mW per Channel
O
P
= 20 mW per Channel
O
0.01
0.01
P
= 20 mW per Channel
P
= 10 mW per Channel
O
O
0.001
0.001
20
100
1k
10k
20k
20
100
1k
10k 20k
f - Frequency - Hz
f - Frequency - Hz
Figure 7.
Figure 8.
OUTPUT POWER vs SUPPLY VOLTAGE
OUTPUT POWER vs SUPPLY VOLTAGE
50
50
R
= 16 W
R
= 32 W
L
L
45
40
35
30
25
20
15
10
45
40
35
30
25
20
15
10
THD+N = 10%
THD+N = 10%
THD+N = 1%
THD+N = 1%
5
0
5
0
2.5
3
3.5
4
4.5
5
5.5
2.5
3
3.5
4
4.5
5
5.5
V
- Supply Voltage - V
V
- Supply Voltage - V
DD
DD
Figure 9.
Figure 10.
OUTPUT POWER vs LOAD RESISTANCE
OUTPUT POWER vs LOAD RESISTANCE
30
25
20
40
HPVSS and Flying Cap = 1 mF
HPVSS and Flying Cap = 2.2 mF
V
= 3.6 V, 10% THD+N
DD
10
V
= 2.5 V, 10% THD+N
DD
15
10
V
= 2.5 V, 1% THD+N
DD
HPVSS and Flying Cap = 0.47 mF
V
= 3.6 V, 1% THD+N
DD
5
0
THD+N = 1%,
= 3.6 V
f = 1 kHz
V
DD
1
10
100
1000
10
100
200
R
- Load Resistance - W
R
- Load Resistance - W
L
L
Figure 11.
Figure 12.
8
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TYPICAL CHARACTERISTICS (continued)
OUTPUT VOLTAGE vs SUPPLY VOLTAGE
SUPPLY VOLTAGE REJECTION RATIO vs FREQUENCY
2
1.8
1.6
1.4
1.2
1
f = 1 kHz,
THD+N = 1%
-10
-30
-50
-70
R
= 16 W
L
Load = 600 W
Load = 32 W
0.8
0.6
0.4
0.2
0
V
= 5 V
V
= 2.5 V
DD
DD
Load = 16 W
V
= 3.6 V
DD
-90
-110
20
100
1k
10k
20k
2.5
3
3.5
4
4.5
5
5.5
f - Frequency - Hz
V
- Supply Voltage - V
DD
Figure 13.
Figure 14.
SUPPLY VOLTAGE REJECTION RATIO vs FREQUENCY
QUIESCENT SUPPLY CURRENT vs SUPPLY VOLTAGE
10
EN = 1.3 V,
No Load
-10
-30
-50
-70
9
8
7
6
5
4
3
2
R
= 32 W
L
V
= 3.6 V
DD
V
= 5 V
DD
V
= 2.5 V
DD
-90
1
0
-110
20
100
1k
10k
20k
2.5
3
3.5
4
4.5
5
5.5
f - Frequency - Hz
V
- Supply Voltage - V
DD
Figure 15.
Figure 16.
SUPPLY CURRENT vs TOTAL OUTPUT POWER
SUPPLY CURRENT vs TOTAL OUTPUT POWER
100
10
1
100
10
1
R
= 16 W,
R
= 32 W,
L
L
f = 1kHz
f = 1kHz
V
= 3 V
DD
V
= 5 V
DD
V
= 5 V
DD
V
= 3.6 V
V
= 2.5 V
DD
DD
V
= 3 V
DD
V
= 3.6 V
V
= 2.5 V
DD
DD
0.001
0.01
0.1 1
- Total Output Power - mW
10
50
0.001
0.01
0.1 1
- Total Output Power - mW
10
50
P
P
O
O
Figure 17.
Figure 18.
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TYPICAL CHARACTERISTICS (continued)
CROSSTALK vs FREQUENCY
OUTPUT SPECTRUM vs FREQUENCY
0
-20
-40
Single Channel,
Load = 16 W,
= 3.6 V
-10
-30
R
= 16 W,
L
V
Power = 15 mW,
= 3.6 V
DD
V
DD
-50
-70
-60
-80
-90
-100
-110
-130
-150
-120
-140
0
5000
10000
15000
20000
20
100
1k
10k
20k
f - Frequency - Hz
f - Frequency - Hz
Figure 19.
Figure 20.
STARTUP WAVEFORMS vs TIME
SHUTDOWN WAVEFORMS vs TIME
5
4
5
4
Load = 16 W,
= 3.6 V,
V
EN
DD
V = 0.5 V
EN
at 20 kHz
RMS
I
3
3
2
2
1
1
V
V
OUT
OUT
0
0
-1
-1
Load = 16 W,
= 3.6 V,
V
DD
V = 0.5 V
-2
-3
-2
-3
at 1 kHz
I
RMS
8
0
50
100
150
200
0
2
4
6
10
t - Time - ms
t - Time - ms
Figure 21.
Figure 22.
10
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APPLICATION INFORMATION
APPLICATION CIRCUIT
0.22 µF x 4
INR+
OUTR
INR-
TPA2012D2
INL+
OUTL
INL-
0.22 µF x 4
ABB
OUTR+
OUTR–
OUTL+
OUTL–
INR+
INR-
or
OUTR
OUTL
TLV320AIC33
TLV320AIC3104
TLV320DAC32
PCM1774
INL+
INL-
TPA6132A2
SGND
PGND
ENABLE
GAIN0
EN
G0
GAIN1
G1
VBAT
PVDD
HPVSS
CPN
HPVDD
2.2 µF
CPP
1 µF
2.2 µF
1 µF
Figure 23. Typical Application Configuration with Differential Input Signals
1 µF
RIGHT IN
LEFT IN
INR-
INR+
OUTR
OUTL
TPA6132A2
INL-
1 µF
INL+
SGND
PGND
ENABLE
GAIN0
GAIN1
VBAT
EN
G0
G1
PVDD
HPVSS
CPN
HPVDD
2.2 µF
CPP
1 µF
2.2 µF
1 µF
Figure 24. Typical Application Configuration with Single-Ended Input Signals
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GAIN CONTROL
The TPA6132A2 has four gain settings which are controlled with pins G0 and G1. The following table gives an
overview of the gain function.
G0 VOLTAGE
≤ 0.5 V
G1 VOLTAGE
≤ 0.5 V
AMPLIFIER GAIN
–6 dB
0 dB
3 dB
6 dB
≥ 1.3 V
≤ 0.5 V
≤ 0.5 V
≥ 1.3 V
≥ 1.3 V
≥ 1.3 V
Table 1. Windows Vista™ Premium Mobile Mode Specifications
Windows Premium Mobile Vista
Device Type
Requirement
TPA6132A2 Typical Performance
Specifications
THD+N
≤ –65 dB FS [20 Hz, 20 kHz]
–75 dB FS[20 Hz, 20 kHz]
–100 dB FS A-Weight
Analog Speaker Line Jack
(RL = 10 kΩ, FS = 0.707
Vrms)
Dynamic Range with Signal
Present
≤ –80 dB FS A-Weight
Line Output Crosstalk
THD+N
≤ –60 dB [20 Hz, 20 kHz]
–90 dB [20 Hz, 20 kHz]
≤ –45 dB FS [20 Hz, 20 kHz]
–65 dB FS [20 Hz, 20 kHz]
Analog Headphone Out Jack
(RL = 32Ω, FS = 0.300
Vrms)
Dynamic Range with Signal
Present
≤ –80 dB FS A-Weight
–94 dB FS A-Weight
Headphone Output Crosstalk
≤ –60 dB [20 Hz, 20 kHz]
–90 dB [20 Hz, 20 kHz]
HEADPHONE AMPLIFIERS
Single-supply headphone amplifiers typically require dc-blocking capacitors to remove dc bias from their output
voltage. The top drawing in Figure 25 illustrates this connection. If dc bias is not removed, large dc current will
flow through the headphones which wastes power, clip the output signal, and potentially damage the
headphones.
These dc-blocking capacitors are often large in value and size. Headphone speakers have a typical resistance
between 16 Ω and 32 Ω. This combination creates a high-pass filter with a cutoff frequency as shown in
Equation 1, where RL is the load impedance, CO is the dc-block capacitor, and fC is the cutoff frequency.
1
f
=
c
2pR C
L
O
(1)
For a given high-pass cutoff frequency and load impedance, the required dc-blocking capacitor is found as:
1
CO
=
2p ¦C RL
(2)
Reducing fC improves low frequency fidelity and requires a larger dc-blocking capacitor. To achieve a 20 Hz
cutoff with 16 Ω headphones, CO must be at least 500 µF. Large capacitor values require large packages,
consuming PCB area, increasing height, and increasing cost of assembly. During start-up or shutdown the
dc-blocking capacitor has to be charged or discharged. This causes an audible pop on start-up and power-down.
Large dc-blocking capacitors also reduce audio output signal fidelity.
Two different headphone amplifier architectures are available to eliminate the need for dc-blocking capacitors.
The Capless amplifier architecture is similar provides a reference voltage to the headphone connector shield pin
as shown in the middle drawing of Figure 25. The audio output signals are centered around this reference
voltage, which is typically half of the supply voltage to allow symmetrical output voltage swing.
When using a Capless amplifier do not connect the headphone jack shield to any ground reference or large
currents will result. This makes Capless amplifiers ineffective for plugging non-headphone accessories into the
headphone connector. Capless amplifiers are useful only with floating GND headphones.
12
Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s) :TPA6132A2
TPA6132A2
www.ti.com ........................................................................................................................................................................................... SLOS597–DECEMBER 2008
Conventional
C
O
V
OUT
C
O
GND
Capless
V
OUT
GND
V
BIAS
DirectPath™
V
DD
GND
V
SS
Figure 25. Amplifier Applications
The DirectPath™ amplifier architecture operates from a single supply voltage and uses an internal charge pump
to generate a negative supply rail for the headphone amplifier. The output voltages are centered around 0 V and
are capable of positive and negative voltage swings as shown in the bottom drawing of Figure 25. DirectPath
amplifiers require no output dc-blocking capacitors. The headphone connector shield pin connects to ground and
will interface will headphones and non-headphone accessories. The TPA6132A2 is a DirectPath amplifier.
ELIMINATING TURN-ON POP AND POWER SUPPLY SEQUENCING
The TPA6132A2 has excellent noise and turn-on / turn-off pop performance. It uses an integrated click-and-pop
suppression circuit to allow fast start-up and shutdown without generating any voltage transients at the output
pins. Typical start-up time from shutdown is 5 ms.
DirectPath technology keeps the output dc voltage at 0 V even when the amplifier is powered up. The DirectPath
technology together with the active pop-and-click suppression circuit eliminates audible transients during start up
and shutdown.
Use input coupling capacitors to ensure inaudible turn-on pop. Activate the TPA6132A2 after all audio sources
have been activated and their output voltages have settled. On power-down, deactivate the TPA6132A2 before
deactivating the audio input source. The EN pin controls device shutdown: Set to 0.6 V or lower to deactivate the
TPA6132A2; set to 1.3 V or higher to activate.
Copyright © 2008, Texas Instruments Incorporated
13
Product Folder Link(s) :TPA6132A2
TPA6132A2
SLOS597–DECEMBER 2008........................................................................................................................................................................................... www.ti.com
RF AND POWER SUPPLY NOISE IMMUNITY
The TPA6132A2 employs a new differential amplifier architecture to achieve high power supply noise rejection
and RF noise rejection. RF and power supply noise are common in modern electronics. Although RF frequencies
are much higher than the 20 kHz audio band, signal modulation often falls in-band. This, in turn, modulates the
supply voltage, allowing a coupling path into the audio amplifier. A common example is the 217 Hz GSM
frame-rate buzz often heard from an active speaker when a cell phone is placed nearby during a phone call.
The TPA6132A2 has excellent rejection of power supply and RF noise, preventing audio signal degradation.
CONSTANT MAXIMUM OUTPUT POWER AND ACOUSTIC SHOCK PREVENTION
Typically the output power increases with increasing supply voltage on an unregulated headphone amplifier. The
TPA6132A2 maintains a constant output power independent of the supply voltage. Thus the design for
prevention of acoustic shock (hearing damage due to exposure to a loud sound) is simplified since the output
power will remain constant, independent of the supply voltage. This feature allows maximizing the audio signal at
the lowest supply voltage.
INPUT COUPLING CAPACITORS
Input coupling capacitors block any dc bias from the audio source and ensure maximum dynamic range. Input
coupling capacitors also minimize TPA6132A2 turn-on pop to an inaudible level.
The input capacitors are in series with TPA6132A2 internal input resistors, creating a high-pass filter. Equation 3
calculates the high-pass filter corner frequency. The input impedance, RIN, is dependent on device gain. Larger
input capacitors decrease the corner frequency. See the Operating Characteristics table for input impedance
values.
1
f
=
C
2p R
C
IN IN
(3)
For a given high-pass cutoff frequency, the minimum input coupling capacitor is found as:
1
C
=
IN
2p ¦ R
C
IN
(4)
Example: Design for a 20 Hz corner frequency with a TPA6132A2 gain of +6 dB. The Operating Characteristics
table gives RIN as 13.2 kΩ. Equation 4 shows the input coupling capacitors must be at least 0.6 µF to achieve a
20 Hz high-pass corner frequency. Choose a 0.68 µF standard value capacitor for each TPA6132A2 input (X5R
material or better is required for best performance).
Input capacitors can be removed provided the TPA6132A2 inputs are driven differentially with less than ±1 V and
the common-mode voltage is within the input common-mode range of the amplifier. Without input capacitors
turn-on pop performance may be degraded and should be evaluated in the system.
CHARGE PUMP FLYING CAPACITOR AND HPVSS CAPACITOR
The TPA6132A2 uses a built-in charge pump to generate a negative voltage supply for the headphone
amplifiers. The charge pump flying capacitor connects between CPP and CPN. It transfers charge to generate
the negative supply voltage. The HPVSS capacitor must be at least equal in value to the flying capacitor to allow
maximum charge transfer. Use low equivalent-series-resistance (ESR) ceramic capacitors (X5R material or
better is required for best performance) to maximize charge pump efficiency. Typical values are 1 µF to 2.2 µF
for the HPVSS and flying capacitors. Although values down to 0.47 µF can be used, total harmonic distortion
(THD) will increase.
14
Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s) :TPA6132A2
TPA6132A2
www.ti.com ........................................................................................................................................................................................... SLOS597–DECEMBER 2008
POWER SUPPLY AND HPVDD DECOUPLING CAPACITORS
The TPA6132A2 DirectPath headphone amplifier requires adequate power supply decoupling to ensure that
output noise and total harmonic distortion (THD) remain low. Use good low equivalent-series-resistance (ESR)
ceramic capacitors (X5R material or better is required for best performance). Place a 2.2 µF capacitor within
5 mm of the VDD pin. Reducing the distance between the decoupling capacitor and VDD minimizes parasitic
inductance and resistance, improving TPA6132A2 supply rejection performance. Use 0402 or smaller size
capacitors if possible.
For additional supply rejection, connect an additional 10 µF or higher value capacitor between VDD and ground.
This will help filter lower frequency power supply noise. The high power supply rejection ratio (PSRR) of the
TPA6132A2 makes the 10 µF capacitor unnecessary in most applications.
Connect a 2.2 µF capacitor between HPVDD and ground. This ensures the amplifier internal bias supply remains
stable and maximizes headphone amplifier performance.
WARNING:
DO NOT connect HPVDD directly to VDD or an external supply voltage. The
voltage at HPVDD is generated internally. Connecting HPVDD to an external
voltage can damage the device.
LAYOUT RECOMMENDATIONS
EXPOSED PAD ON TPA6132A2RTE
Solder the exposed metal pad on the TPA6132A2RTE QFN package to the landing pad on the PCB. Connect
the landing pad to ground or leave it electrically unconnected (floating). Do not connect the landing pad to VDD
or to any other power supply voltage.
If the pad is grounded, it must be connected to the same ground as the PGND pin (10). See the layout and
mechanical drawings at the end of the data sheet for proper sizing. Soldering the thermal pad is required for
mechanical reliability and enhances thermal conductivity of the package.
WARNING:
DO NOT connect the TPA6132A2RTE exposed metal pad to VDD or any other
power supply voltage.
GND CONNECTIONS
The SGND pin is an input reference and must be connected to the headphone ground connector pin. This
ensures no turn-on pop and minimizes output offset voltage. Do not connect more than ±0.3 V to SGND.
PGND is a power ground. Connect supply decoupling capacitors for VDD, HPVDD, and HPVSS to PGND.
POWER SUPPLY CONNECTIONS
Connect the supply voltage to the VDD pin and decouple it with an X5R or better capacitor. Connect the HPVDD
pin only to a 2.2 µF, X5R or better, capacitor. Do not connect HPVDD to an external voltage supply. Place both
capacitors within 5 mm of their associated pins on the TPA6132A2. Ensure that the ground connection of each of
the capacitors has a minimum length return path to the device. Failure to properly decouple the TPA6132A2 may
degrade audio or EMC performance.
Copyright © 2008, Texas Instruments Incorporated
15
Product Folder Link(s) :TPA6132A2
PACKAGE OPTION ADDENDUM
www.ti.com
22-Dec-2008
PACKAGING INFORMATION
Orderable Device
TPA6132A2RTER
TPA6132A2RTET
Status (1)
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
QFN
RTE
16
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
QFN
RTE
16
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
20-Dec-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) W1 (mm)
(mm) (mm) Quadrant
TPA6132A2RTER
TPA6132A2RTET
QFN
QFN
RTE
RTE
16
16
3000
250
330.0
180.0
12.4
12.4
3.3
3.3
3.3
3.3
1.1
1.1
8.0
8.0
12.0
12.0
Q2
Q2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
20-Dec-2008
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TPA6132A2RTER
TPA6132A2RTET
QFN
QFN
RTE
RTE
16
16
3000
250
346.0
190.5
346.0
212.7
29.0
31.8
Pack Materials-Page 2
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