TMP421AIDCNTG4 [TI]
±1°C Remote and Local TEMPERATURE SENSOR in SOT23-8; 【 1ΣC在SOT23-8远程和本地温度传感器
| 型号： | TMP421AIDCNTG4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | ±1°C Remote and Local TEMPERATURE SENSOR in SOT23-8 |
| 文件： | 总30页 (文件大小：645K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TMP421
TMP422
TMP423
www.ti.com
SBOS398B–JULY 2007–REVISED MARCH 2008
±1°C Remote and Local TEMPERATURE SENSOR
in SOT23-8
1
FEATURES
DESCRIPTION
234
•
SOT23-8 PACKAGE
The TMP421, TMP422, and TMP423 are remote
temperature sensor monitors with a built-in local
temperature sensor. The remote temperature sensor
diode-connected transistors are typically low-cost,
NPN- or PNP-type transistors or diodes that are an
integral part of microcontrollers, microprocessors, or
FPGAs.
•
•
•
•
•
•
•
•
±1°C REMOTE DIODE SENSOR (MAX)
±1.5°C LOCAL TEMPERATURE SENSOR (MAX)
SERIES RESISTANCE CANCELLATION
n-FACTOR CORRECTION
TWO-WIRE/SMBus™ SERIAL INTERFACE
MULTIPLE INTERFACE ADDRESSES
DIODE FAULT DETECTION
Remote accuracy is ±1°C for multiple IC
manufacturers, with no calibration needed. The
two-wire serial interface accepts SMBus write byte,
read byte, send byte, and receive byte commands to
configure the device.
RoHS COMPLIANT AND NO Sb/Br
APPLICATIONS
•
The TMP421, TMP422, and TMP423 include series
resistance cancellation, programmable non-ideality
factor, wide remote temperature measurement range
(up to +150°C), and diode fault detection.
PROCESSOR/FPGA TEMPERATURE
MONITORING
•
•
•
•
LCD/DLP®/LCOS PROJECTORS
SERVERS
The TMP421, TMP422, and TMP423 are all available
in a SOT23-8 package.
CENTRAL OFFICE TELECOM EQUIPMENT
STORAGE AREA NETWORKS (SAN)
+5V
TMP421
TMP422
TMP423
8
V+
1
1
1
7
6
SCL
SDA
DXP
DX1
DXP1
DXP2
SMBus
Controller
2
3
4
2
2
DXN
A1
DX2
3
4
3
4
DX3
DX4
DXP3
DXN
A0
GND
5
1 Channel Local
1 Channel Remote
1 Channel Local
2 Channels Remote
1 Channel Local
3 Channels Remote
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
3
4
DLP is a registered trademark of Texas Instruments.
SMBus is a trademark of Intel Corporation.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2007–2008, Texas Instruments Incorporated
TMP421
TMP422
TMP423
www.ti.com
SBOS398B–JULY 2007–REVISED MARCH 2008
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
PACKAGE INFORMATION(1)
TWO-WIRE
ADDRESS
PACKAGE
DESIGNATOR
PACKAGE
MARKING
PRODUCT
DESCRIPTION
PACKAGE-LEAD
Single Channel
Remote Junction
Temperature Sensor
TMP421
100 11xx
100 11xx
SOT23-8
DCN
DCN
DACI
DADI
Dual Channel
Remote Junction
Temperature Sensor
TMP422
SOT23-8
TMP423A
TMP423B
Triple Channel
Remote Junction
Temperature Sensor
100 1100
100 1101
SOT23-8
SOT23-8
DCN
DCN
DAEI
DAFI
(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
ABSOLUTE MAXIMUM RATINGS(1)
Over operating free-air temperature range, unless otherwise noted.
TMP421, TMP422, TMP423
UNIT
V
Power Supply, VS
Input Voltage
+7
–0.5 to VS + 0.5
–0.5 to 7
10
Pins 1, 2, 3, and 4 only
Pins 6 and 7 only
V
V
Input Current
mA
°C
°C
°C
V
Operating Temperature Range
Storage Temperature Range
Junction Temperature (TJ max)
–55 to +127
–60 to +130
+150
Human Body Model (HBM)
3000
ESD Rating
Charged Device Model (CDM)
Machine Model (MM)
1000
V
200
V
(1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not implied.
2
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Product Folder Link(s): TMP421 TMP422 TMP423
TMP421
TMP422
TMP423
www.ti.com
SBOS398B–JULY 2007–REVISED MARCH 2008
ELECTRICAL CHARACTERISTICS
At TA = –40°C to +125°C and VS = 2.7V to 5.5V, unless otherwise noted.
TMP421, TMP422, TMP423
PARAMETER
TEMPERATURE ERROR
CONDITIONS
MIN
TYP
MAX
UNIT
Local Temperature Sensor
TELOCAL
TA = –40°C to +125°C
TA = +15°C to +85°C, VS = 3.3V
±1.25
±0.25
±0.25
±1
±2.5
±1.5
±1
°C
°C
Remote Temperature Sensor(1)
TEREMOTE
TA = +15°C to +85°C, TD = –40°C to +150°C, VS = 3.3V
TA = –40°C to +100°C, TD = –40°C to +150°C, VS = 3.3V
TA = –40°C to +125°C, TD = –40°C to +150°C
VS = 2.7V to 5.5V
°C
±3
°C
±3
±5
°C
vs Supply (Local/Remote)
TEMPERATURE MEASUREMENT
Conversion Time (per channel)
Resolution
±0.2
±0.5
°C/V
100
115
130
ms
Local Temperature Sensor (programmable)
Remote Temperature Sensor
Remote Sensor Source Currents
High
12
12
Bits
Bits
Series Resistance 3kΩ Max
120
60
µA
µA
µA
µA
Medium High
Medium Low
12
Low
6
Remote Transistor Ideality Factor
SMBus INTERFACE
η
TMP421/22/23 Optimized Ideality Factor
1.008
Logic Input High Voltage (SCL, SDA)
Logic Input Low Voltage (SCL, SDA)
Hysteresis
VIH
VIL
2.1
V
V
0.8
500
0.15
3
mV
mA
V
SMBus Output Low Sink Current
SDA Output Low Voltage
Logic Input Current
6
VOL
IOUT = 6mA
0.4
+1
0 ≤ VIN ≤ 6V
–1
µA
pF
MHz
ms
µs
SMBus Input Capacitance (SCL, SDA)
SMBus Clock Frequency
SMBus Timeout
3.4
35
1
25
30
SCL Falling Edge to SDA Valid Time
DIGITAL INPUTS
Input Capacitance
3
pF
Input Logic Levels
Input High Voltage
VIH
VIL
IIN
0.7(V+)
–0.5
(V+)+0.5
0.3(V+)
1
V
V
Input Low Voltage
Leakage Input Current
POWER SUPPLY
0V ≤ VIN ≤ VS
µA
Specified Voltage Range
Quiescent Current
VS
IQ
2.7
5.5
38
V
0.0625 Conversions per Second
Eight Conversions per Second
32
400
3
µA
µA
µA
µA
µA
V
525
10
Serial Bus Inactive, Shutdown Mode
Serial Bus Active, fS = 400kHz, Shutdown Mode
Serial Bus Active, fS = 3.4MHz, Shutdown Mode
90
350
2.4
1.6
Undervoltage Lockout
Power-On Reset Threshold
TEMPERATURE RANGE
Specified Range
UVLO
POR
2.3
2.6
2.3
V
–40
–60
+125
+130
°C
°C
Storage Range
Thermal Resistance, SOT23
θJA
100
°C/W
(1) Tested with less than 5Ω effective series resistance and 100pF differential input capacitance.
Copyright © 2007–2008, Texas Instruments Incorporated
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TMP421
TMP422
TMP423
www.ti.com
SBOS398B–JULY 2007–REVISED MARCH 2008
TMP421 PIN CONFIGURATION
DCN PACKAGE
SOT23-8
(TOP VIEW)
V+
DXP
DXN
A1
1
2
3
4
8
7
6
5
SCL
TMP421
SDA
GND
A0
TMP421 PIN ASSIGNMENTS
TMP421
NO.
1
NAME
DXP
DXN
A1
DESCRIPTION
Positive connection to remote temperature sensor.
Negative connection to remote temperature sensor.
Address pin
2
3
4
A0
Address pin
5
GND
SDA
SCL
V+
Ground
6
Serial data line for SMBus, open-drain; requires pull-up resistor to V+.
Serial clock line for SMBus, open-drain; requires pull-up resistor to V+.
Positive supply voltage (2.7V to 5.5V)
7
8
TMP422 PIN CONFIGURATION
DCN PACKAGE
SOT23-8
(TOP VIEW)
V+
DX1
DX2
DX3
DX4
1
2
3
4
8
7
6
5
SCL
TMP422
SDA
GND
TMP422 PIN ASSIGNMENTS
TMP422
NO.
1
NAME
DX1
DX2
DX3
DX4
GND
SDA
SCL
V+
DESCRIPTION
Channel 1 remote temperature sensor connection pin. Also sets the TMP422 address; see Table 10.
Channel 1 remote temperature sensor connection pin. Also sets the TMP422 address; see Table 10.
Channel 2 remote temperature sensor connection pin. Also sets the TMP422 address; see Table 10.
Channel 2 remote temperature sensor connection pin. Also sets the TMP422 address; see Table 10.
Ground
2
3
4
5
6
Serial data line for SMBus, open-drain; requires pull-up resistor to V+.
Serial clock line for SMBus, open-drain; requires pull-up resistor to V+.
Positive supply voltage (2.7V to 5.5V)
7
8
4
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Product Folder Link(s): TMP421 TMP422 TMP423
TMP421
TMP422
TMP423
www.ti.com
SBOS398B–JULY 2007–REVISED MARCH 2008
TMP423 PIN CONFIGURATION
DCN PACKAGE
SOT23-8
(TOP VIEW)
V+
DXP1
DXP2
DXP3
DXN
1
2
3
4
8
7
6
5
SCL
TMP423
SDA
GND
TMP423 PIN ASSIGNMENTS
TMP423
NAME
NO.
DESCRIPTION
1
2
3
4
5
6
7
8
DXP1
DXP2
DXP3
DXN
GND
SDA
SCL
Channel 1 positive connection to remote temperature sensor.
Channel 2 positive connection to remote temperature sensor.
Channel 3 positive connection to remote temperature sensor.
Common negative connection to remote temperature sensors, Channel 1, Channel 2, Channel 3.
Ground
Serial data line for SMBus, open-drain; requires pull-up resistor to V+.
Serial clock line for SMBus, open-drain; requires pull-up resistor to V+.
Positive supply voltage (2.7V to 5.5V)
V+
Copyright © 2007–2008, Texas Instruments Incorporated
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Product Folder Link(s): TMP421 TMP422 TMP423
TMP421
TMP422
TMP423
www.ti.com
SBOS398B–JULY 2007–REVISED MARCH 2008
TYPICAL CHARACTERISTICS
At TA = +25°C and VS = +5.0V, unless otherwise noted.
REMOTE TEMPERATURE ERROR
vs TEMPERATURE
LOCAL TEMPERATURE ERROR
vs TEMPERATURE
3
2
3
2
VS = 3.3V
50 Units Shown
VS = 3.3V
TREMOTE = +25°C
30 Typical Units Shown
h = 1.008
1
1
0
0
-1
-2
-3
-1
-2
-3
-50
-25
0
25
50
75
100
125
-50
-25
0
25
50
75
100
125
Ambient Temperature, TA (°C)
Ambient Temperature, TA (°C)
Figure 1.
Figure 2.
REMOTE TEMPERATURE ERROR
vs LEAKAGE RESISTANCE
REMOTE TEMPERATURE ERROR vs SERIES RESISTANCE
(Diode-Connected Transistor, 2N3906 PNP)
2.0
60
1.5
40
20
VS = 2.7V
1.0
0.5
R -GND
R -VS
0
0
VS = 5.5V
-0.5
-1.0
-1.5
-2.0
-20
-40
-60
0
5
10
15
20
25
30
0
500
1000
1500
2000
2500
3000
3500
Leakage Resistance (MW)
RS (W)
Figure 3.
Figure 4.
REMOTE TEMPERATURE ERROR vs SERIES RESISTANCE
REMOTE TEMPERATURE ERROR
vs DIFFERENTIAL CAPACITANCE
(GND Collector-Connected Transistor, 2N3906 PNP)
2.0
3
2
1.5
VS = 2.7V
1.0
1
0.5
VS = 5.5V
0
0
-0.5
-1.0
-1.5
-2.0
-1
-2
-3
0
0.5
1.0
1.5
2.0
2.5
3.0
0
500
1000
1500
2000
2500
3000
3500
Capacitance (nF)
RS (W)
Figure 5.
Figure 6.
6
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Product Folder Link(s): TMP421 TMP422 TMP423
TMP421
TMP422
TMP423
www.ti.com
SBOS398B–JULY 2007–REVISED MARCH 2008
TYPICAL CHARACTERISTICS (continued)
At TA = +25°C and VS = +5.0V, unless otherwise noted.
TEMPERATURE ERROR
vs POWER-SUPPLY NOISE FREQUENCY
QUIESCENT CURRENT
vs CONVERSION RATE
25
500
450
400
350
300
250
200
150
100
50
Local 100mVPP Noise
20
Remote 100mVPP Noise
Local 250mVPP Noise
15
Remote 250mVPP Noise
10
5
0
VS = 5.5V
-5
-10
-15
-20
-25
VS = 2.7V
0
0
5
10
15
0.0625 0.125 0.25
0.5
1
2
4
8
Frequency (MHz)
Conversion Rate (conversions/sec)
Figure 7.
Figure 8.
SHUTDOWN QUIESCENT CURRENT
vs SCL CLOCK FREQUENCY
SHUTDOWN QUIESCENT CURRENT
vs SUPPLY VOLTAGE
500
450
400
350
300
250
200
150
100
50
8
7
6
5
4
3
2
1
0
VS = 5.5V
VS = 3.3V
1M 10M
0
1k
10k
100k
2.5
3.0
3.5
4.0
4.5
5.0
5.5
SCL CLock Frequency (Hz)
VS (V)
Figure 9.
Figure 10.
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TMP421
TMP422
TMP423
www.ti.com
SBOS398B–JULY 2007–REVISED MARCH 2008
APPLICATION INFORMATION
The TMP421 (two-channel), TMP422 (three-channel),
and TMP423 (four-channel) are digital temperature
The TMP422 requires transistors connected between
DX1 and DX2 and between DX3 and DX4. Unused
channels on the TMP422 must be connected to GND.
The TMP423 requires a transistor connected to each
positive channel (DXP1, DXP2, and DXP3), with the
base of each channel tied to the common negative,
DXN. For an unused channel, the TMP423 DXP pin
can be left open or tied to GND.
sensors that combine
a local die temperature
measurement channel and one, two, or three remote
junction temperature measurement channels in a
single SOT23-8 package. These devices are
two-wire- and SMBus interface-compatible and are
specified over a temperature range of –40°C to
+125°C. The TMP421/22/23 each contain multiple
registers for holding configuration information and
temperature measurement results.
The TMP421/22/23 SCL and SDA interface pins each
require pull-up resistors as part of the communication
bus. A 0.1µF power-supply bypass capacitor is
recommended for local bypassing. Figure 11 shows a
typical configuration for the TMP421; Figure 12
illustrates a typical application for the TMP422.
Figure 13 illustrates a typical application for the
TMP423.
For proper remote temperature sensing operation, the
TMP421 requires only
a
transistor connected
between DXP and DXN pins. If the remote channel is
not utilized, DXP can be left open or tied to GND.
+5V
Transistor-connected configuration(1)
:
0.1mF
10kW
(typ)
10kW
(typ)
Series Resistance
8
(2)
RS
V+
7
6
1
2
SCL
SDA
DXP
(3)
SMBus
Controller
(2)
CDIFF
RS
DXN
A1
TMP421
3
4
A0
GND
5
Diode-connected configuration(1)
:
(2)
RS
(3)
(2)
CDIFF
RS
(1) Diode-connected configuration provides better settling time. Transistor-connected configuration provides better series resistance
cancellation.
(2) RS (optional) should be < 1.5kΩ in most applications. Selection of RS depends on application; see the Filtering section.
(3) CDIFF (optional) should be < 1000pF in most applications. Selection of CDIFF depends on application; see the Filtering section and
Figure 6, Remote Temperature Error vs Differential Capacitance.
Figure 11. TMP421 Basic Connections
8
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TMP422
TMP423
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SBOS398B–JULY 2007–REVISED MARCH 2008
+5V
Transistor-connected configuration(1)
:
0.1mF
10kW
(typ)
10kW
(typ)
Series Resistance
8
(2)
RS
V+
7
6
1
2
DX1(4)
DX2(4)
SCL
SDA
DXP1
(3)
CDIFF
(2)
SMBus
RS
Controller
DXN1
(2)
(2)
TMP422
RS
RS
3
4
DX3(4)
DX4(4)
DXP2
(3)
CDIFF
DXN2
GND
5
Diode-connected configuration(1)
:
(2)
RS
(3)
CDIFF
(2)
RS
(1) Diode-connected configuration provides better settling time. Transistor-connected configuration provides better series resistance
cancellation.
(2) RS (optional) should be < 1.5kΩ in most applications. Selection of RS depends on application; see the Filtering section.
(3) CDIFF (optional) should be < 1000pF in most applications. Selection of CDIFF depends on application; see the Filtering section and
Figure 6, Remote Temperature Error vs Differential Capacitance.
(4) TMP422 SMBus slave address is 1001 100 when connected as shown.
Figure 12. TMP422 Basic Connections
+5V
(1)
Transistor-connected configuration
Series Resistance
:
10k
(typ)
10k
(typ)
0.1mF
8
(2)
RS
V+
1
7
6
DXP1
DXP2
SCL
SDA
(2)
(3)
SMBus
Controller
RS
CDIFF
2
(3)
CDIFF
TMP423
(2)
RS
3
4
DXP3
DXN
(3)
(2)
(2)
(2)
RS
CDIFF
RS
RS
GND
5
Diode-connected configuration(1)
:
(2)
RS
DXP
(3)
CDIFF
(2)
RS
DXN
(1) Diode-connected configuration provides better settling time. Transistor-connected configuration provides better series resistance
cancellation.
(2) RS (optional) should be < 1.5kΩ in most applications. Selection of RS depends on application; see the Filtering section.
(3) CDIFF (optional) should be < 1000pF in most applications. Selection of CDIFF depends on application; see the Filtering section and
Figure 6, Remote Temperature Error vs Differential Capacitance.
Figure 13. TMP423 Basic Connections
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SBOS398B–JULY 2007–REVISED MARCH 2008
SERIES RESISTANCE CANCELLATION
from low to high. The change in measurement range
and data format from standard binary to extended
binary occurs at the next temperature conversion. For
data captured in the extended temperature range
configuration, an offset of 64 (40h) is added to the
standard binary value, as shown in the Extended
Binary column of Table 1. This configuration allows
measurement of temperatures as low as –64°C, and
Series resistance in an application circuit that typically
results from printed circuit board (PCB) trace
resistance and remote line length is automatically
cancelled by the TMP421/22/23, preventing what
would otherwise result in a temperature offset. A total
of up to 3kΩ of series line resistance is cancelled by
the TMP421/22/23, eliminating the need for additional
characterization and temperature offset correction.
See the two Remote Temperature Error vs Series
Resistance typical characteristic curves (Figure 4 and
Figure 5) for details on the effects of series resistance
and power-supply voltage on sensed remote
temperature error.
as
high
as
+191°C;
however,
most
temperature-sensing diodes only measure with the
range of –55°C to +150°C. Additionally, the
TMP421/22/23 are rated only for ambient
temperatures ranging from –40°C to +125°C.
Parameters in the Absolute Maximum Ratings table
must be observed.
DIFFERENTIAL INPUT CAPACITANCE
Table 1. Temperature Data Format (Local and
Remote Temperature High Bytes)
The TMP421/22/23 tolerate differential input
capacitance of up to 1000pF with minimal change in
temperature error. The effect of capacitance on
sensed remote temperature error is illustrated in
Figure 6, Remote Temperature Error vs Differential
Capacitance.
LOCAL/REMOTE TEMPERATURE REGISTER
HIGH BYTE VALUE (1°C RESOLUTION)
STANDARD BINARY(1)
EXTENDED BINARY(2)
TEMP
(°C)
BINARY
HEX
C0
CE
E7
00
BINARY
HEX
00
–64
–50
–25
0
1100 0000
1100 1110
1110 0111
0000 0000
0000 0001
0000 0101
0000 1010
0001 1001
0011 0010
0100 1011
0110 0100
0111 1101
0111 1111
0111 1111
0111 1111
0111 1111
0000 0000
0000 1110
0010 0111
0100 0000
0100 0001
0100 0101
0100 1010
0101 1001
0111 0010
1000 1011
1010 0100
1011 1101
1011 1111
1101 0110
1110 1111
1111 1111
0E
27
TEMPERATURE MEASUREMENT DATA
40
Temperature measurement data may be taken over
an operating range of –40°C to +127°C for both local
and remote locations.
1
01
41
5
05
45
10
0A
19
4A
59
However, measurements from –55°C to +150°C can
be made both locally and remotely by reconfiguring
the TMP421/22/23 for the extended temperature
range, as described below.
25
50
32
72
75
4B
64
8B
A4
BD
BF
D6
EF
FF
100
125
127
150
175
191
Temperature data that result from conversions within
the default measurement range are represented in
binary form, as shown in Table 1, Standard Binary
column. Note that although the device is rated to only
measure temperatures down to –55°C, it may read
temperatures below this level. However, any
temperature below –64°C results in a data value of
–64 (C0h). Likewise, temperatures above +127°C
result in a value of 127 (7Fh). The device can be set
to measure over an extended temperature range by
changing bit 2 (RANGE) of Configuration Register 1
7D
7F
7F
7F
7F
(1) Resolution is 1°C/count. Negative numbers are represented in
two's complement format.
(2) Resolution is 1°C/count. All values are unsigned with a –64°C
offset.
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SBOS398B–JULY 2007–REVISED MARCH 2008
Standard Decimal to Binary Temperature Data
Calculation Example
Both local and remote temperature data use two
bytes for data storage. The high byte stores the
temperature with 1°C resolution. The second or low
byte stores the decimal fraction value of the
For positive temperatures (for example, +20°C):
(+20°C)/(+1°C/count) = 20 → 14h → 0001 0100
temperature and allows
a higher measurement
Convert the number to binary code with 8-bit,
right-justified format, and MSB = '0' to denote a
positive sign.
resolution, as shown in Table 2. The measurement
resolution for the both the local and remote channels
is 0.0625°C, and is not adjustable.
+20°C is stored as 0001 0100 → 14h.
Table 2. Decimal Fraction Temperature Data
Format (Local and Remote Temperature Low
Bytes)
For negative temperatures (for example, –20°C):
(|–20|)/(+1°C/count) = 20 → 14h → 0001 0100
Generate the two's complement of a negative
number by complementing the absolute value
binary number and adding 1.
TEMPERATURE REGISTER LOW BYTE VALUE
(0.0625°C RESOLUTION)
TEMP
(°C)
STANDARD AND EXTENDED BINARY
0000 0000
HEX
00
10
20
30
40
50
60
70
80
90
A0
B0
C0
D0
E0
F0
0
–20°C is stored as 1110 1100 → ECh.
0.0625
0.1250
0.1875
0.2500
0.3125
0.3750
0.4375
0.5000
0.5625
0.6250
0.6875
0.7500
0.8125
0.8750
0.9385
0001 0000
0010 0000
REGISTER INFORMATION
0011 0000
The TMP421/22/23 contain multiple registers for
holding configuration information, temperature
measurement results, and status information. These
registers are described in Figure 14 and Table 3.
0100 0000
0101 0000
0110 0000
0111 0000
POINTER REGISTER
1000 0000
1001 0000
Figure 14 shows the internal register structure of the
TMP421/22/23. The 8-bit Pointer Register is used to
address a given data register. The Pointer Register
identifies which of the data registers should respond
to a read or write command on the two-wire bus. This
register is set with every write command. A write
command must be issued to set the proper value in
1010 0000
1011 0000
1100 0000
1101 0000
1110 0000
1111 0000
the Pointer Register before executing
a
read
(1) Resolution is 0.0625°C/count. All possible values are shown.
command. Table 3 describes the pointer address of
the TMP421/22/23 registers. The power-on reset
(POR) value of the Pointer Register is 00h (0000
0000b).
Standard Binary to Decimal Temperature Data
Calculation Example
High byte conversion (for example, 0111 0011):
Convert the right-justified binary high byte to
hexadecimal.
Pointer Register
Local and Remote Temperature Registers
From hexadecimal, multiply the first number by
160 = 1 and the second number by 161 = 16.
Status Register
SDA
The sum equals the decimal equivalent.
Configuration Registers
0111 0011b → 73h → (3 × 160) + (7 × 161) = 115
One-Shot Start Register
Conversion Rate Register
N-Factor Correction Registers
Identification Registers
Software Reset
I/O
Control
Interface
Low byte conversion (for example, 0111 0000):
To convert the left-justified binary low-byte to
decimal, use bits 7 through 4 and ignore bits 3
through 0 because they do not affect the value of
the number.
SCL
0111b → (0 × 1/2)1 + (1 × 1/2)2 + (1 × 1/2)3 + (1 ×
1/2)4 = 0.4375
Figure 14. Internal Register Structure
Note that the final numerical result is the sum of the
high byte and low byte. In negative temperatures, the
unsigned low byte adds to the negative high byte to
result in a value less than the high byte (for instance,
–15 + 0.75 = –14.25, not –15.75).
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Table 3. Register Map
BIT DESCRIPTION
POINTER
(HEX)
POR (HEX)
7
6
5
4
3
2
1
0
REGISTER DESCRIPTION
(1)
00
00
LT11
LT10
LT9
LT8
LT7
LT6
LT5
LT4
Local Temperature (High Byte)
Remote Temperature 1
(High Byte)(1)
01
02
03
00
00
00
RT11
RT11
RT11
RT10
RT10
RT10
RT9
RT9
RT9
RT8
RT8
RT8
RT7
RT7
RT7
RT6
RT6
RT6
RT5
RT5
RT5
RT4
RT4
RT4
Remote Temperature 2
(High Byte)(1)(2)(3)
Remote Temperature 3
(High Byte)(1)(3)
08
09
BUSY
0
0
0
0
0
0
0
0
0
0
0
0
0
Status Register
00
SD
RANGE
Configuration Register 1
1C/3C(2)
7C(3)
/
0A
0
REN3(3)
REN2(2)(3)
REN
LEN
RC
0
0
Configuration Register 2
0B
0F
10
11
07
0
0
0
0
0
X
0
0
R2
X
R1
X
R0
X
Conversion Rate Register
One-Shot Start(4)
X
X
X
X
00
00
LT3
RT3
LT2
RT2
LT1
RT1
LT0
RT0
0
PVLD
PVLD
0
Local Temperature (Low Byte)
Remote Temperature 1 (Low Byte)
0
OPEN
Remote Temperature 2
(Low Byte)(2)(3)
12
00
RT3
RT2
RT1
RT0
0
0
PVLD
OPEN
13
21
22
23
FC
FE
00
00
00
00
RT3
NC7
NC7
NC7
X
RT2
NC6
NC6
NC6
X
RT1
NC5
NC5
NC5
X
RT0
NC4
NC4
NC4
X
0
NC3
NC3
NC3
X
0
NC2
NC2
NC2
X
PLVD
NC1
NC1
NC1
X
OPEN
NC0
NC0
NC0
X
Remote Temperature 3 (Low Byte)(3)
N Correction 1
N Correction 2(2)(3)
N Correction 3(3)
Software Reset(5)
55
21
0
1
0
1
0
1
0
1
Manufacturer ID
0
0
1
0
0
0
0
1
TMP421 Device ID
TMP422 Device ID
TMP423 Device ID
FF
0
0
1
0
0
0
1
0
0
0
1
0
0
0
1
1
(1) Compatible with Two-Byte Read; see Figure 19.
(2) TMP422.
(3) TMP423.
(4) X = undefined. Writing any value to this register initiates a one-shot start; see the One-Shot Conversion section.
(5) X = undefined. Writing any value to this register initiates a software reset; see the Software Reset section.
The TMP421/22/23 contain circuitry to assure that a
TEMPERATURE REGISTERS
low byte register read command returns data from the
same ADC conversion as the immediately preceding
high byte read command. This assurance remains
valid only until another register is read. For proper
operation, the high byte of a temperature register
should be read first. The low byte register should be
read in the next read command. The low byte register
may be left unread if the LSBs are not needed.
Alternatively, the temperature registers may be read
as a 16-bit register by using a single two-byte read
command from address 00h for the local channel
result, or from address 01h for the remote channel
result (02h for the second remote channel result, and
03h for the third remote channel). The high byte is
output first, followed by the low byte. Both bytes of
this read operation are from the same ADC
conversion. The power-on reset value of all
temperature registers is 00h.
The TMP421/22/23 have multiple 8-bit registers that
hold temperature measurement results. The local
channel and each of the remote channels have a high
byte register that contains the most significant bits
(MSBs) of the temperature analog-to-digital converter
(ADC) result and a low byte register that contains the
least significant bits (LSBs) of the temperature ADC
result. The local channel high byte address is 00h;
the local channel low byte address is 10h. The
remote channel high byte is at address 01h; the
remote channel low byte address is 11h. For the
TMP422, the second remote channel high byte
address is 02h; the second remote channel low byte
is 12h. The TMP 423 uses the same local and remote
address as the TMP421 and TMP422, with the third
remote channel high byte of 03h; the third remote
channel low byte is 13h. These registers are
read-only and are updated by the ADC each time a
temperature measurement is completed.
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STATUS REGISTER
The temperature range is set by configuring the
RANGE bit (bit 2) of the Configuration Register.
Setting this bit low configures the TMP421/22/23 for
the standard measurement range (–40°C to +127°C);
temperature conversions will be stored in the
standard binary format. Setting bit 2 high configures
the TMP421/22/23 for the extended measurement
range (–55°C to +150°C); temperature conversions
will be stored in the extended binary format (see
Table 1).
The Status Register reports the state of the
temperature ADCs. Table 4 summarizes the Status
Register bits. The Status Register is read-only, and is
read by accessing pointer address 08h.
The BUSY bit = '1' if the ADC is making a conversion;
it is set to '0' if the ADC is not converting.
CONFIGURATION REGISTER 1
The remaining bits of the Configuration Register are
reserved and must always be set to '0'. The power-on
reset value for this register is 00h.
Configuration Register 1 (pointer address 09h) sets
the temperature range and controls the shutdown
mode. The Configuration Register is set by writing to
pointer address 09h and read by reading from pointer
CONFIGURATION REGISTER 2
address 09h. Table
5 summarizes the bits of
Configuration Register 1.
Configuration Register
2 (pointer address 0Ah)
controls which temperature measurement channels
are enabled and whether the external channels have
the resistance correction feature enabled or not.
The shutdown (SD) bit (bit 6) enables or disables the
temperature measurement circuitry. If SD = '0', the
TMP421/22/23 convert continuously at the rate set in
the conversion rate register. When SD is set to '1',
the TMP421/22/23 stop converting when the current
Table
6 summarizes the bits of Configuration
Register 2.
conversion sequence is complete and enter
a
shutdown mode. When SD is set to '0' again, the
TMP421/22/23 resume continuous conversions.
When SD = '1', a single conversion can be started by
writing to the One-Shot Register. See the One-Shot
Conversion section for more information.
Table 4. Status Register Format
STATUS REGISTER (Read = 08h, Write = NA)
BIT #
BIT NAME
D7
BUSY
0(1)
D6
0
D5
0
D4
0
D3
0
D2
0
D1
0
D0
0
POR VALUE
0
0
0
0
0
0
0
(1) FOR TMP421/TMP423: The BUSY changes to '1' almost immediately (< 100µs) following power-up, as the TMP421/TMP423 begin the
first temperature conversion. It is high whenever the TMP421/TMP423 convert a temperature reading.
FOR TMP422: The BUSY bit changes to '1' approximately 1ms following power-up. It is high whenever the TMP422 converts a
temperature reading.
Table 5. Configuration Register 1 Bit Descriptions
CONFIGURATION REGISTER 1 (Read/Write = 09h, POR = 00h)
POWER-ON RESET
BIT
NAME
FUNCTION
VALUE
7
Reserved
—
0
0 = Run
1 = Shut Down
6
5, 4, 3
2
SD
Reserved
0
0
0
0
—
0 = –55°C to +127°C
1 = –55°C to +150°C
Temperature Range
Reserved
1, 0
—
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The RC bit (bit 2) enables the resistance correction
feature for the external temperature channels. If RC =
'1', series resistance correction is enabled; if RC = '0',
resistance correction is disabled. Resistance
correction should be enabled for most applications.
However, disabling the resistance correction may
yield slightly improved temperature measurement
noise performance, and reduce conversion time by
about 50%, which could lower power consumption
when conversion rates of two per second or less are
selected.
For the TMP423 only, the REN3 bit (bit 6) enables
the third external measurement channel. If REN3 =
'1', the third external channel is enabled; if REN3 =
'0', the third external channel is disabled.
The temperature measurement sequence is: local
channel, external channel 1, external channel 2,
external channel 3, shutdown, and delay (to set
conversion rate, if necessary). The sequence starts
over with the local channel. If any of the channels are
disabled, they are bypassed in the sequence.
The LEN bit (bit 3) enables the local temperature
measurement channel. If LEN = '1', the local channel
is enabled; if LEN = '0', the local channel is disabled.
CONVERSION RATE REGISTER
The Conversion Rate Register (pointer address 0Bh)
controls the rate at which temperature conversions
are performed. This register adjusts the idle time
between conversions but not the conversion timing
itself, thereby allowing the TMP421/22/23 power
dissipation to be balanced with the temperature
The REN bit (bit 4) enables external temperature
measurement for channel 1. If REN = '1', the first
external channel is enabled; if REN = '0', the external
channel is disabled.
register update rate. Table
7
describes the
For the TMP422 and TMP423 only, the REN2 bit (bit
5) enables the second external measurement
channel. If REN2 = '1', the second external channel is
enabled; if REN2 = '0', the second external channel is
disabled.
conversion rate options and corresponding current
consumption. A one-shot command can be used
during the idle time between conversions to
immediately start temperature conversions on all
enabled channels.
Table 6. Configuration Register 2 Bit Descriptions
CONFIGURATION REGISTER 2 (Read/Write = 0Ah, POR = 1Ch for TMP421; 3Ch for TMP422; 7Ch for TMP423)
POWER-ON RESET
BIT
NAME
FUNCTION
VALUE
7
Reserved
—
0
0 = External Channel 3 Disabled
1 = External Channel 3 Enabled
1 (TMP423)
0 (TMP421, TMP422)
6
5
4
3
REN3
REN2
REN
0 = External Channel 2 Disabled
1 = External Channel 2 Enabled
1 (TMP422, TMP423)
0 (TMP421)
0 = External Channel 1 Disabled
1 = External Channel 1 Enabled
1
1
0 = Local Channel Disabled
1 = Local Channel Enabled
LEN
0 = Resistance Correction Disabled
1 = Resistance Correction Enabled
2
RC
1
0
1, 0
Reserved
—
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Table 7. Conversion Rate Register
CONVERSION RATE REGISTER (Read/Write = 0Bh, POR = 07h)
AVERAGE IQ (TYP) (µA)
R7
R6
0
R5
0
R4
0
R3
0
R2
0
R1
0
R0
0
CONVERSIONS/SEC
VS = 2.7V
11
VS = 5.5V
32
0
0
0
0
0
0
0
0
0.0625
0.125
0.25
0.5
0
0
0
0
0
0
1
17
38
0
0
0
0
0
1
0
28
49
0
0
0
0
0
1
1
47
69
0
0
0
0
1
0
0
1
80
103
155
220
413
0
0
0
0
1
0
1
2
128
190
373
0
0
0
0
1
1
0
4(1)
8(2)
0
0
0
0
1
1
1
(1) Conversion rate shown is for only one or two enabled measurement channels. When three channels are enabled, the conversion rate is
2 and 2/3 conversions-per-second. When four channels are enabled, the conversion rate is 2 per second.
(2) Conversion rate shown is for only one enabled measurement channel. When two channels are enabled, the conversion rate is 4
conversions-per-second. When three channels are enabled, the conversion rate is 2 and 2/3 conversions-per-second. When four
channels are enabled, the conversion rate is 2 conversions-per-second.
I2
lnǒ Ǔ
I1
nkT
q
VBE2*VBE1
+
ONE-SHOT CONVERSION
(1)
When the TMP421/22/23 are in shutdown mode
(SD = 1 in the Configuration Register 1), a single
conversion is started on all enabled channels by
writing any value to the One-Shot Start Register,
pointer address 0Fh. This write operation starts one
conversion; the TMP421/22/23 return to shutdown
mode when that conversion completes. The value of
the data sent in the write command is irrelevant and
is not stored by the TMP421/22/23. When the
TMP421/22/23 are in shutdown mode, the conversion
sequence currently in process must be completed
before a one-shot command can be issued. One-shot
commands issued during a conversion are ignored.
The value n in Equation 1 is a characteristic of the
particular transistor used for the remote channel. The
power-on reset value for the TMP421/22/23 is n =
1.008. The value in the n-Factor Correction Register
may be used to adjust the effective n-factor according
to Equation 2 and Equation 3.
1.008 300
300 * NADJUST
neff
+
ǒ
Ǔ
(2)
300 1.008
+ 300 * ǒ
Ǔ
NADJUST
neff
(3)
The n-correction value must be stored in
two's-complement format, yielding an effective data
range from –128 to +127. The n-correction value may
be written to and read from pointer address 21h. The
n-correction value for the second remote channel
(TMP422 and TMP423) may be written and read from
pointer address 22h. The n-correction value for the
third remote channel (TMP423 only) may be written
to and read from pointer address 23h. The register
power-on reset value is 00h, thus having no effect
unless the register is written to.
n-FACTOR CORRECTION REGISTER
The TMP421/22/23 allow for a different n-factor value
to be used for converting remote channel
measurements to temperature. The remote channel
uses sequential current excitation to extract
a
differential VBE voltage measurement to determine
the temperature of the remote transistor. Equation 1
describes this voltage and temperature.
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SOFTWARE RESET
address FEh. The device ID is obtained by reading
from pointer address FFh. The TMP421/22/23 each
return 55h for the manufacturer code. The TMP421
returns 21h for the device ID; the TMP422 returns
22h for the device ID; and the TMP423 returns 23h
for the device ID. These registers are read-only.
The TMP421/22/23 may be reset by writing any value
to the Software Reset Register (pointer address
FCh). This action restores the power-on reset state to
all of the TMP421/22/23 registers as well as aborts
any conversion in process. The TMP421/22/23 also
support reset via the two-wire general call address
(0000 0000). The General Call Reset section contains
more information.
BUS OVERVIEW
The TMP421/22/23 are SMBus interface-compatible.
In SMBus protocol, the device that initiates the
transfer is called a master, and the devices controlled
by the master are slaves. The bus must be controlled
by a master device that generates the serial clock
(SCL), controls the bus access, and generates the
START and STOP conditions.
Table 8. n-Factor Range
NADJUST
BINARY
HEX
7F
0A
08
DECIMAL
n
0111 1111
0000 1010
0000 1000
0000 0110
0000 0100
0000 0010
0000 0001
0000 0000
1111 1111
1111 1110
1111 1100
1111 1010
1111 1000
1111 0110
1000 0000
127
10
8
1.747977
1.042759
1.035616
1.028571
1.021622
1.014765
1.011371
1.008
To address a specific device, a START condition is
initiated. START is indicated by pulling the data line
(SDA) from a high-to-low logic level while SCL is
high. All slaves on the bus shift in the slave address
byte, with the last bit indicating whether a read or
write operation is intended. During the ninth clock
pulse, the slave being addressed responds to the
master by generating an Acknowledge and pulling
SDA low.
06
6
04
4
02
2
01
1
00
0
FF
FE
FC
FA
F8
F6
80
–1
–2
–4
–6
–8
–10
–128
1.004651
1.001325
0.994737
0.988235
0.981818
0.975484
0.706542
Data transfer is then initiated and sent over eight
clock pulses followed by an Acknowledge bit. During
data transfer SDA must remain stable while SCL is
high, because any change in SDA while SCL is high
is interpreted as a control signal.
Once all data have been transferred, the master
generates a STOP condition. STOP is indicated by
pulling SDA from low to high, while SCL is high.
GENERAL CALL RESET
The TMP421/22/23 support reset via the two-wire
General Call address 00h (0000 0000b). The
TMP421/22/23 acknowledge the General Call
address and respond to the second byte. If the
second byte is 06h (0000 0110b), the TMP421/22/23
execute a software reset. This software reset restores
the power-on reset state to all TMP421/22/23
registers, and aborts any conversion in progress. The
TMP421/22/23 take no action in response to other
values in the second byte.
SERIAL INTERFACE
The TMP421/22/23 operate only as a slave device on
either the two-wire bus or the SMBus. Connections to
either bus are made via the open-drain I/O lines, SDA
and SCL. The SDA and SCL pins feature integrated
spike suppression filters and Schmitt triggers to
minimize the effects of input spikes and bus noise.
The TMP421/22/23 support the transmission protocol
for fast (1kHz to 400kHz) and high-speed (1kHz to
3.4MHz) modes. All data bytes are transmitted MSB
first.
IDENTIFICATION REGISTERS
The TMP421/22/23 allow for the two-wire bus
controller to query the device for manufacturer and
device IDs to enable software identification of the
device at the particular two-wire bus address. The
manufacturer ID is obtained by reading from pointer
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SERIAL BUS ADDRESS
DXN connection should be left unconnected. The
polarity of the transistor for external channel 2 (pins 3
and 4) sets the least significant bit of the slave
address. The polarity of the transistor for external
channel 1 (pins 1 and 2) sets the next least
significant bit of the slave address.
To communicate with the TMP421/22/23, the master
must first address slave devices via a slave address
byte. The slave address byte consists of seven
address bits, and a direction bit indicating the intent
of executing a read or write operation.
Table 9. TMP421 Slave Address Options
Two-Wire Interface Slave Device Addresses
TWO-WIRE SLAVE
The TMP421 supports nine slave device addresses
and the TMP422 supports four slave device
addresses. The TMP423 has one of two
factory-preset slave addresses.
ADDRESS
0011 100
0011 101
0011 110
0011 111
0101 010
1001 100
1001 101
1001 110
1001 111
A1
A0
Float
0
1
Float
0
Float
Float
Float
0
The slave device address for the TMP421 is set by
the A1 and A0 pins according to Table 9.
1
Float
The slave device address for the TMP422 is set by
the connections between the external transistors and
the TMP422 according to Figure 15 and Table 10. If
one of the channels is unused, the respective DXP
connection should be connected to GND, and the
0
0
1
1
1
0
1
Table 10. TMP422 Slave Address Options
TWO-WIRE SLAVE ADDRESS
1001 100
DX1
DX2
DX3
DX4
DXP1
DXP1
DXN1
DXN1
DXN1
DXN1
DXP1
DXP1
DXP2
DXN2
DXP2
DXN2
DXN2
DXP2
DXN2
DXP2
1001 101
1001 110
1001 111
SCL
SDA
V+
DX1
DX2
DX3
DX4
V+
SCL
SDA
GND
DX1
DX2
DX3
DX4
V+
DX1
V+
SCL
SDA
GND
DX1
DX2
DX3
DX4
V+
SCL
SDA
GND
Q0
Q2
SCL
SDA
GND
Q4
DX2
DX3
DX4
Q6
Q3
Q5
Q7
Q1
Address = 1001100
Address = 1001101
Address = 1001110
Address = 1001111
Figure 15. TMP422 Connections for Device Address Setup
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The TMP422 checks the polarity of the external
transistor at power-on, or after software reset, by
forcing current to pin 1 while connecting pin 2 to
approximately 0.6V. If the voltage on pin 1 does not
pull up to near the V+ of the TMP422, pin 1 functions
as DXP for channel 1, and the second LSB of the
slave address is '0'. If the voltage on pin 1 does pull
up to near V+, the TMP422 forces current to pin 2
while connecting pin 1 to 0.6V. If the voltage on pin 2
does not pull up to near V+, the TMP422 uses pin 2
for DXP of channel 1, and sets the second LSB of the
slave address to '1'. If both pins are shorted to GND
or if both pins are open, the TMP422 uses pin 1 as
DXP and sets the address bit to '0'. This process is
then repeated for channel 2 (pins 3 and 4).
READ/WRITE OPERATIONS
Accessing a particular register on the TMP421/22/23
is accomplished by writing the appropriate value to
the Pointer Register. The value for the Pointer
Register is the first byte transferred after the slave
address byte with the R/W bit low. Every write
operation to the TMP421/22/23 requires a value for
the Pointer Register (see Figure 17).
When reading from the TMP421/22/23, the last value
stored in the Pointer Register by a write operation is
used to determine which register is read by a read
operation. To change which register is read for a read
operation, a new value must be written to the Pointer
Register. This transaction is accomplished by issuing
a slave address byte with the R/W bit low, followed
by the Pointer Register byte; no additional data are
required. The master can then generate a START
condition and send the slave address byte with the
R/W bit high to initiate the read command. See
Figure 19 for details of this sequence. If repeated
reads from the same register are desired, it is not
necessary to continually send the Pointer Register
bytes, because the TMP421/22/23 retain the Pointer
Register value until it is changed by the next write
operation. Note that register bytes are sent MSB first,
followed by the LSB.
If the TMP422 is to be used with transistors that are
located on another IC (such as a CPU, DSP, or
graphics processor), it is recommended to use pin 1
or pin 3 as DXP to ensure correct address detection.
If the other IC has a lower supply voltage or is not
powered when the TMP422 tries to detect the slave
address, a protection diode may turn on during the
detection process and the TMP422 may incorrectly
choose the DXP pin and corresponding slave
address. Using pin 1 and/or pin 3 for transistors that
are on other ICs ensures correct operation
independent of supply sequencing or levels.
Read operations should be terminated by issuing a
Not-Acknowledge command at the end of the last
byte to be read. For a single-byte operation, the
master should leave the SDA line high during the
Acknowledge time of the first byte that is read from
the slave. For a two-byte read operation, the master
must pull SDA low during the Acknowledge time of
the first byte read, and should leave SDA high during
the Acknowledge time of the second byte read from
the slave.
The TMP423 has a factory-preset slave address. The
TMP423A slave address is 1001100b, and the
TMP423B slave address is 1001101b. The
configuration of the DXP and DXN channels are
independent of the address. Unused DXP channels
can be left open or tied to GND.
18
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SBOS398B–JULY 2007–REVISED MARCH 2008
TIMING DIAGRAMS
Data Transfer: The number of data bytes transferred
between a START and a STOP condition is not
limited and is determined by the master device. The
receiver acknowledges data transfer.
The
TMP421/22/23
are
two-wire
and
SMBus-compatible. Figure 16 to Figure 19 describe
the timing for various operations on the
TMP421/22/23. Parameters for Figure 16 are defined
in Table 11. Bus definitions are:
Acknowledge: Each receiving device, when
addressed, is obliged to generate an Acknowledge
bit. A device that acknowledges must pull down the
SDA line during the Acknowledge clock pulse in such
a way that the SDA line is stable low during the high
period of the Acknowledge clock pulse. Setup and
hold times must be taken into account. On a master
receive, data transfer termination can be signaled by
the master generating a Not-Acknowledge on the last
byte that has been transmitted by the slave.
Bus Idle: Both SDA and SCL lines remain high.
Start Data Transfer: A change in the state of the
SDA line, from high to low, while the SCL line is high,
defines a START condition. Each data transfer
initiates with a START condition. Denoted as S in
Figure 16.
Stop Data Transfer: A change in the state of the
SDA line from low to high while the SCL line is high
defines
terminates with
a
STOP condition. Each data transfer
repeated START or STOP
a
condition. Denoted as P in Figure 16.
t(LOW)
tR
tF
t(HDSTA)
SCL
t(SUSTO)
t(HDSTA)
t(HIGH)
t(SUSTA)
t(SUDAT)
t(HDDAT)
SDA
t(BUF)
P
S
S
P
Figure 16. Two-Wire Timing Diagram
Table 11. Timing Characteristics for Figure 16
FAST MODE
HIGH-SPEED MODE
PARAMETER
MIN
0.001
600
MAX
MIN
0.001
160
MAX
UNIT
SCL Operating Frequency
f(SCL)
t(BUF)
0.4
3.4
MHz
ns
Bus Free Time Between STOP and START Condition
Hold time after repeated START condition. After this period, the first clock
is generated.
t(HDSTA)
100
100
ns
Repeated START Condition Setup Time
STOP Condition Setup Time
Data Hold Time
t(SUSTA)
t(SUSTO)
t(HDDAT)
t(SUDAT)
t(LOW)
t(HIGH)
tF
100
100
0(1)
100
100
0(2)
10
ns
ns
ns
ns
ns
ns
ns
Data Setup Time
100
1300
600
SCL Clock LOW Period
SCL Clock HIGH Period
Clock/Data Fall Time
160
60
300
300
160
160
Clock/Data Rise Time
for SCL ≤ 100kHz
tR
ns
tR
1000
(1) For cases with fall time of SCL less than 20ns and/or the rise or fall time of SDA less than 20ns, the hold time should be greater than
20ns.
(2) For cases with a fall time of SCL less than 10ns and/or the rise or fall time of SDA less than 10ns, the hold time should be greater than
10ns.
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1
9
1
9
SCL
¼
SDA
1
0
0
1
1
0
0(1) R/W
P7 P6 P5 P4 P3
P2 P1
P0
¼
Start By
Master
ACK By
ACK By
TMP421/22/23
TMP421/22/23
Frame 2 Pointer Register Byte
Frame 1 Two-Wire Slave Address Byte
1
9
SCL
(Continued)
SDA
D7 D6 D5 D4 D3 D2 D1 D0
(Continued)
ACK By
Stop By
Master
TMP421/22/23
Frame 3 Data Byte 1
(1) Slave address 1001100 shown.
Figure 17. Two-Wire Timing Diagram for Write Word Format
1
9
1
9
¼
¼
SCL
SDA
1
0
0
1
1
0
0(1)
R/W
P7
P6
P5
P4
P3
P2
P1
P0
Start By
Master
ACK By
ACK By
TMP421/22/23
TMP421/22/23
Frame 1 Two-Wire Slave Address Byte
Frame 2 Pointer Register Byte
1
9
1
9
SCL
¼
¼
(Continued)
SDA
1
0
0(1)
1
0
0
1
R/W
D7
D6
D5
D4 D3
D2
D1
D0
(Continued)
Start By
Master
ACK By
From
TMP421/22/23
NACK By
Master(2)
TMP421/22/23
Frame 3 Two-Wire Slave Address Byte
Frame 4 Data Byte 1 Read Register
(1) Slave address 1001100 shown.
(2) Master should leave SDA high to terminate a single-byte read operation.
Figure 18. Two-Wire Timing Diagram for Single-Byte Read Format
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1
9
1
9
¼
SCL
SDA
1
0
0
1
1
0
0(1)
R/W
P7
P6
P5
P4
P3
P2
P1
P0
¼
Start By
Master
ACK By
ACK By
TMP421/22/23
TMP421/22/23
Frame 1 Two-Wire Slave Address Byte
Frame 2 Pointer Register Byte
1
9
1
9
SCL
¼
(Continued)
SDA
0(1)
¼
ACK By
1
0
1
0
0
1
R/W
D7
D6
D5
D4 D3
D2
D1
D0
(Continued)
Start By
Master
ACK By
From
TMP421/22/23
TMP421/22/23
Master
Frame 3 Two-Wire Slave Address Byte
Frame 4 Data Byte 1 Read Register
1
9
SCL
(Continued)
SDA
D7 D6
D5
D4
D3
D2
D1
D0
(Continued)
From
NACK By Stop By
Master(2)
Master
TMP421/22/23
Frame 5 Data Byte 2 Read Register
(1) Slave address 1001100 shown.
(2) Master should leave SDA high to terminate a two-byte read operation.
Figure 19. Two-Wire Timing Diagram for Two-Byte Read Format
HIGH-SPEED MODE
TIMEOUT FUNCTION
In order for the two-wire bus to operate at frequencies
above 400kHz, the master device must issue a
High-Speed mode (Hs-mode) master code (0000
1xxx) as the first byte after a START condition to
switch the bus to high-speed operation. The
TMP421/22/23 do not acknowledge this byte, but
switch the input filters on SDA and SCL and the
output filter on SDA to operate in Hs-mode, allowing
transfers at up to 3.4MHz. After the Hs-mode master
code has been issued, the master transmits a
two-wire slave address to initiate a data transfer
operation. The bus continues to operate in Hs-mode
until a STOP condition occurs on the bus. Upon
receiving the STOP condition, the TMP421/22/23
switch the input and output filters back to fast mode
operation.
The TMP421/22/23 reset the serial interface if either
SCL or SDA are held low for 30ms (typical) between
a START and STOP condition. If the TMP421/22/23
are holding the bus low, the device releases the bus
and waits for a START condition. To avoid activating
the timeout function, it is necessary to maintain a
communication speed of at least 1kHz for the SCL
operating frequency.
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SHUTDOWN MODE (SD)
DX4 (TMP422), to minimize the effects of noise.
However, a bypass capacitor placed differentially
across the inputs of the remote temperature sensor is
recommended to make the application more robust
against unwanted coupled signals. The value of this
capacitor should be between 100pF and 1nF. Some
applications attain better overall accuracy with
additional series resistance; however, this increased
accuracy is application-specific. When series
resistance is added, the total value should not be
greater than 3kΩ. If filtering is needed, suggested
component values are 100pF and 50Ω on each input;
exact values are application-specific.
The TMP421/22/23 Shutdown Mode allows the user
to save maximum power by shutting down all device
circuitry other than the serial interface, reducing
current consumption to typically less than 3µA; see
Figure 10, Shutdown Quiescent Current vs Supply
Voltage. Shutdown Mode is enabled when the SD bit
(bit 6) of Configuration Register 1 is high; the device
shuts down once the current conversion is completed.
When SD is low, the device maintains a continuous
conversion state.
SENSOR FAULT
REMOTE SENSING
The TMP421 can sense a fault at the DXP input
resulting from incorrect diode connection. The
TMP421/22/23 can all sense an open circuit.
Short-circuit conditions return a value of –64°C. The
detection circuitry consists of a voltage comparator
that trips when the voltage at DXP exceeds
(V+) – 0.6V (typical). The comparator output is
continuously checked during a conversion. If a fault is
detected, the OPEN bit (bit 0) in the temperature
result register is set to '1' and the rest of the register
bits should be ignored.
The TMP421/22/23 are designed to be used with
either discrete transistors or substrate transistors built
into processor chips and ASICs. Either NPN or PNP
transistors can be used, as long as the base-emitter
junction is used as the remote temperature sense.
NPN transistors must be diode-connected. PNP
transistors
can
either
be
transistor-
or
diode-connected (see Figure 11, Figure 12, and
Figure 13).
Errors in remote temperature sensor readings are
typically the consequence of the ideality factor and
current excitation used by the TMP421/22/23 versus
the manufacturer-specified operating current for a
When not using the remote sensor with the TMP421,
the DXP and DXN inputs must be connected together
to prevent meaningless fault warnings. When not
using a remote sensor with the TMP422, the DX pins
should be connected (refer to Table 10) such that
DXP connections are grounded and DXN connections
are left open (unconnected). Unused TMP423 DXP
pins can be left open or connected to GND.
given transistor. Some manufacturers specify
high-level and low-level current for
a
the
temperature-sensing substrate transistors. The
TMP421/22/23 use 6µA for ILOW and 120µA for IHIGH
.
The ideality factor (n) is a measured characteristic of
a remote temperature sensor diode as compared to
an ideal diode. The TMP421/22/23 allow for different
n-factor values; see the N-Factor Correction Register
section.
UNDERVOLTAGE LOCKOUT
The TMP421/22/23 sense when the power-supply
voltage has reached a minimum voltage level for the
ADC to function. The detection circuitry consists of a
voltage comparator that enables the ADC after the
power supply (V+) exceeds 2.45V (typical). The
comparator output is continuously checked during a
conversion. The TMP421/22/23 do not perform a
temperature conversion if the power supply is not
valid. The PVLD bit (bit 1, see Table 3) of the
individual Local/Remote Temperature Register is set
to '1' and the temperature result may be incorrect.
The ideality factor for the TMP421/22/23 is trimmed
to be 1.008. For transistors that have an ideality
factor that does not match the TMP421/22/23,
Equation 4 can be used to calculate the temperature
error. Note that for the equation to be used correctly,
actual temperature (°C) must be converted to kelvins
(K).
n * 1.008
1.008
ǒ
ǒ
273.15 ) T °C
Ǔ
Ǔ
+ ǒ
Ǔ
TERR
(4)
FILTERING
Where:
Remote junction temperature sensors are usually
implemented in a noisy environment. Noise is most
often created by fast digital signals, and it can corrupt
measurements. The TMP421/22/23 have a built-in
65kHz filter on the inputs of DXP and DXN
(TMP421/TMP423), or on the inputs of DX1 through
n = ideality factor of remote temperature sensor
T(°C) = actual temperature
TERR = error in TMP421/22/23 because n ≠ 1.008
Degree delta is the same for °C and K
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For n = 1.004 and T(°C) = 100°C:
power dissipated as a result of exciting the remote
temperature sensor is negligible because of the small
currents used. For a 5.5V supply and maximum
conversion rate of eight conversions per second, the
TMP421/22/23 dissipate 2.3mW (PDIQ = 5.5V ×
415µA). A θJA of 100°C/W causes the junction
temperature to rise approximately +0.23°C above the
ambient.
1.004 * 1.008
ǒ
Ǔ
+ ǒ
Ǔ
TERR
273.15 ) 100°C
1.008
TERR + 1.48°C
(5)
If a discrete transistor is used as the remote
temperature sensor with the TMP421/22/23, the best
accuracy can be achieved by selecting the transistor
according to the following criteria:
LAYOUT CONSIDERATIONS
Remote temperature sensing on the TMP421/22/23
measures very small voltages using very low
currents; therefore, noise at the IC inputs must be
1. Base-emitter voltage > 0.25V at 6µA, at the
highest sensed temperature.
2. Base-emitter voltage < 0.95V at 120µA, at the
minimized.
Most
applications
using
the
lowest sensed temperature.
TMP421/22/23 will have high digital content, with
several clocks and logic level transitions creating a
noisy environment. Layout should adhere to the
following guidelines:
3. Base resistance < 100Ω.
4. Tight control of VBE characteristics indicated by
small variations in hFE (that is, 50 to 150).
1. Place the TMP421/22/23 as close to the remote
junction sensor as possible.
Based on these criteria, two recommended
small-signal transistors are the 2N3904 (NPN) or
2N3906 (PNP).
2. Route the DXP and DXN traces next to each
other and shield them from adjacent signals
through the use of ground guard traces; see
Figure 20. If a multilayer PCB is used, bury these
traces between ground or VDD planes to shield
MEASUREMENT ACCURACY AND THERMAL
CONSIDERATIONS
The temperature measurement accuracy of the
TMP421/22/23 depends on the remote and/or local
temperature sensor being at the same temperature
as the system point being monitored. Clearly, if the
temperature sensor is not in good thermal contact
with the part of the system being monitored, then
there will be a delay in the response of the sensor to
a temperature change in the system. For remote
temperature-sensing applications using a substrate
transistor (or a small, SOT23 transistor) placed close
to the device being monitored, this delay is usually
not a concern.
them from extrinsic noise sources.
(0.127mm) PCB traces are recommended.
5
mil
3. Minimize additional thermocouple junctions
caused by copper-to-solder connections. If these
junctions are used, make the same number and
approximate
locations
of
copper-to-solder
connections in both the DXP and DXN
connections to cancel any thermocouple effects.
4. Use a 0.1µF local bypass capacitor directly
between the V+ and GND of the TMP421/22/23;
see Figure 21. Minimize filter capacitance
between DXP and DXN to 1000pF or less for
optimum measurement performance. This
capacitance includes any cable capacitance
between the remote temperature sensor and the
TMP421/22/23.
The
local
temperature
sensor
inside
the
TMP421/22/23 monitors the ambient air around the
device. The thermal time constant for the
TMP421/22/23 is approximately two seconds. This
constant implies that if the ambient air changes
quickly by 100°C, it would take the TMP421/22/23
about 10 seconds (that is, five thermal time
constants) to settle to within 1°C of the final value. In
most applications, the TMP421/22/23 package is in
electrical, and therefore thermal, contact with the
printed circuit board (PCB), as well as subjected to
forced airflow. The accuracy of the measured
temperature directly depends on how accurately the
PCB and forced airflow temperatures represent the
temperature that the TMP421/22/23 is measuring.
Additionally, the internal power dissipation of the
TMP421/22/23 can cause the temperature to rise
above the ambient or PCB temperature. The internal
5. If the connection between the remote
temperature sensor and the TMP421/22/23 is
less than 8 in (20.32 cm) long, use a twisted-wire
pair connection. Beyond 8 in, use a twisted,
shielded pair with the shield grounded as close to
the TMP421/22/23 as possible. Leave the remote
sensor connection end of the shield wire open to
avoid ground loops and 60Hz pickup.
6. Thoroughly clean and remove all flux residue in
and around the pins of the TMP421/22/23 to
avoid temperature offset readings as a result of
leakage paths between DXP or DXN and GND,
or between DXP or DXN and V+.
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V+
DXP
DXN
GND
Ground or V+ layer
on bottom and/or
top, if possible.
NOTE: Use minimum 5 mil (0.127mm) traces with 5 mil spacing.
Figure 20. Suggested PCB Layer Cross-Section
0.1mF Capacitor
0.1mF Capacitor
GND
GND
PCB Via
PCB Via
V+
V+
DXP
DXN
A1
1
2
3
4
8
7
6
5
DX1
DX2
DX3
DX4
1
2
3
4
8
7
6
5
A0
TMP421
TMP422
0.1mF Capacitor
GND
PCB Via
V+
DXP1
DXP2
DXP3
DXN
1
2
3
4
8
7
6
5
TMP423
Figure 21. Suggested Bypass Capacitor Placement and Trace Shielding
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PACKAGE OPTION ADDENDUM
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11-Jul-2008
PACKAGING INFORMATION
Orderable Device
TMP421AIDCNR
TMP421AIDCNRG4
TMP421AIDCNT
TMP421AIDCNTG4
TMP422AIDCNR
TMP422AIDCNRG4
TMP422AIDCNT
TMP422AIDCNTG4
TMP423AIDCNR
TMP423AIDCNRG4
TMP423AIDCNT
TMP423AIDCNTG4
TMP423BIDCNR
TMP423BIDCNRG4
TMP423BIDCNT
TMP423BIDCNTG4
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOT-23
DCN
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
DCN
DCN
DCN
DCN
DCN
DCN
DCN
DCN
DCN
DCN
DCN
DCN
DCN
DCN
DCN
3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
11-Jul-2008
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
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In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Sep-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) W1 (mm)
(mm) (mm) Quadrant
TMP421AIDCNR
TMP421AIDCNT
TMP422AIDCNR
TMP422AIDCNT
TMP423AIDCNR
TMP423AIDCNT
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
DCN
DCN
DCN
DCN
DCN
DCN
8
8
8
8
8
8
3000
250
179.0
179.0
179.0
179.0
179.0
179.0
8.4
8.4
8.4
8.4
8.4
8.4
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
1.4
1.4
1.4
1.4
1.4
1.4
4.0
4.0
4.0
4.0
4.0
4.0
8.0
8.0
8.0
8.0
8.0
8.0
Q3
Q3
Q3
Q3
Q3
Q3
3000
250
3000
250
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Sep-2008
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TMP421AIDCNR
TMP421AIDCNT
TMP422AIDCNR
TMP422AIDCNT
TMP423AIDCNR
TMP423AIDCNT
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
DCN
DCN
DCN
DCN
DCN
DCN
8
8
8
8
8
8
3000
250
195.0
195.0
195.0
195.0
195.0
195.0
200.0
200.0
200.0
200.0
200.0
200.0
45.0
45.0
45.0
45.0
45.0
45.0
3000
250
3000
250
Pack Materials-Page 2
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