TMCS1101A3BQDT [TI]
具有内部基准的精密隔离电流传感器 | D | 8 | -40 to 125;型号: | TMCS1101A3BQDT |
厂家: | TEXAS INSTRUMENTS |
描述: | 具有内部基准的精密隔离电流传感器 | D | 8 | -40 to 125 传感器 |
文件: | 总47页 (文件大小:2806K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
TMCS1101-Q1
SBOSA44 – JUNE 2021
TMCS1101-Q1 AEC-Q100, 1.5% Precision, Basic Isolation Hall-Effect Current Sensor
With ±600-V Working Voltage
1 Features
3 Description
•
AEC-Q100 qualified for automotive applications
– Temperature Grade 1: –40°C to 125°C, TA
Functional Safety-Capable
– Documentation available to aid functional safety
system design
Total error: ±0.51% typical, ±1.15% maximum,
–40°C to 85°C
– Sensitivity error: ±0.5%
– Offset error: 9 mA
– Offset drift: 0.04 mA/°C
– Linearity error: 0.05%
Lifetime and environmental drift: <±0.5%
3-kVRMS isolation rating
The TMCS1101-Q1 is a galvanically isolated Hall-
effect current sensor capable of DC or AC current
measurement with high accuracy, excellent linearity,
and temperature stability. A low-drift, temperature-
compensated signal chain provides < 1.5% full-scale
error across the device temperature range.
•
•
The input current flows through an internal 1.8-mΩ
conductor that generates a magnetic field measured
by an integrated Hall-effect sensor. This structure
eliminates external concentrators and simplifies
design. Low conductor resistance minimizes power
loss and thermal dissipation. Inherent galvanic
insulation provides a 600-V lifetime working voltage
and 3-kVRMS basic isolation between the current path
and circuitry. Integrated electrical shielding enables
excellent common-mode rejection and transient
immunity.
•
•
•
•
•
•
•
•
Robust 600-V lifetime working voltage
Bidirectional and unidirectional current sensing
Zero drift internal reference
Operating supply range: 3 V to 5.5 V
Signal bandwidth: 80 kHz
The output voltage is proportional to the input current
with four sensitivity options. Fixed sensitivity allows
the TMCS1101-Q1 to operate from a single 3-V to
5.5-V power supply, eliminates ratiometry errors, and
improves supply noise rejection. The current polarity
is considered positive when flowing into the positive
input pin. Both unidirectional and bidirectional sensing
variants are available.
Multiple sensitivity options:
– TMCS1101A1B/U-Q1: 50 mV/A
– TMCS1101A2B/U-Q1: 100 mV/A
– TMCS1101A3B/U-Q1: 200 mV/A
– TMCS1101A4B/U-Q1: 400 mV/A
Safety related certifications
•
– UL 1577 Component Recognition Program
– IEC/CB 62368-1
The TMCS1101-Q1 draws a maximum supply current
of 6 mA, and all sensitivity options are specified over
the operating temperature range of –40°C to +125°C.
2 Applications
•
•
•
•
•
Motor and load control
Inverter and H-bridge current measurements
Power factor correction
Overcurrent protection
DC and AC power monitoring
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
TMCS1101-Q1
SOIC (8)
4.90 mm × 3.90 mm
(1) For all available packages, see the package option
addendum at the end of the data sheet.
Passive / PFC
Rectifier
Bridge Driver
DC V+
TMCS1101-Q1
Loads
TMCS1101-Q1
AC
TMCS1101-Q1
DC V–
Current
Sense
Current
Sense
Current
Sense
Control
Control
Controller
Typical Application
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TMCS1101-Q1
SBOSA44 – JUNE 2021
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Table of Contents
1 Features............................................................................1
2 Applications.....................................................................1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Device Comparison.........................................................3
6 Pin Configuration and Functions...................................3
7 Specifications.................................................................. 4
7.1 Absolute Maximum Ratings ....................................... 4
7.2 ESD Ratings .............................................................. 4
7.3 Recommended Operating Conditions ........................4
7.4 Thermal Information ...................................................4
7.5 Power Ratings ............................................................5
7.6 Insulation Specifications ............................................ 5
7.7 Safety-Related Certifications ..................................... 6
7.8 Safety Limiting Values ................................................6
7.9 Electrical Characteristics ............................................7
7.10 Typical Characteristics............................................10
8 Parameter Measurement Information..........................16
8.1 Accuracy Parameters................................................16
8.2 Transient Response Parameters.............................. 19
8.3 Safe Operating Area................................................. 21
9 Detailed Description......................................................24
9.1 Overview...................................................................24
9.2 Functional Block Diagram.........................................24
9.3 Feature Description...................................................24
9.4 Device Functional Modes..........................................30
10 Application and Implementation................................31
10.1 Application Information........................................... 31
10.2 Typical Application.................................................. 34
11 Power Supply Recommendations..............................36
12 Layout...........................................................................37
12.1 Layout Guidelines................................................... 37
12.2 Layout Example...................................................... 38
13 Device and Documentation Support..........................39
13.1 Device Support....................................................... 39
13.2 Documentation Support.......................................... 39
13.3 Receiving Notification of Documentation Updates..39
13.4 Support Resources................................................. 39
13.5 Trademarks.............................................................39
13.6 Electrostatic Discharge Caution..............................39
13.7 Glossary..................................................................39
14 Mechanical, Packaging, and Orderable
Information.................................................................... 39
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
DATE
REVISION
NOTES
June 2021
*
Initial release.
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5 Device Comparison
Table 5-1. Device Comparison
ZERO CURRENT OUTPUT
VOLTAGE,
SENSITIVITY
IIN LINEAR MEASUREMENT RANGE(1)
PRODUCT
ΔVOUT / ΔIIN+, IN–
50 mV/A
VOUT,0A
VS = 5 V
±46 A(2)
±23 A(2)
±11.5 A
±5.75 A
VS = 3.3 V
±29 A(2)
TMCS1101A1B-Q1
TMCS1101A2B-Q1
TMCS1101A3B-Q1
TMCS1101A4B-Q1
TMCS1101A1U-Q1
TMCS1101A2U-Q1
TMCS1101A3U-Q1
TMCS1101A4U-Q1
100 mV/A
200 mV/A
400 mV/A
50 mV/A
±14.5 A
0.5 × VS
±7.25 A
--
–9 A → 86 A(2)
–4.5 A → 43A(2)
–5.6 A → 55.4A(2)
–2.8 A → 27.7 A(2)
–1.4 A → 13.85 A
--
100 mV/A
200 mV/A
400 mV/A
0.1 × VS
–2.25 A → 21.5 A(2)
–1.12 A → 10.75 A
(1) Linear range limited by swing to supply and ground.
(2) Current levels must remain below both allowable continuous DC/RMS and transient peak current safe operating areas to not exceed
device thermal limits. See the Safe Operating Area section.
6 Pin Configuration and Functions
IN+
IN+
INœ
INœ
1
2
3
4
8
7
6
5
VS
VOUT
NC
GND
Not to scale
Figure 6-1. D Package 8-Pin SOIC Top View
Table 6-1. Pin Functions
PIN
NAME
I/O
DESCRIPTION
NO.
1
IN+
IN+
Analog input
Analog input
Analog input
Analog input
Analog
Input current positive pin
Input current positive pin
Input current negative pin
Input current negative pin
Ground
2
3
IN–
4
IN–
5
GND
No connect. Pin can tolerate a capacitive or resistive connection to GND or VS
(recommend short to GND if acceptable).
6
NC
No Connect
7
8
VOUT
VS
Analog output
Analog
Output voltage
Power supply
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7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
GND – 0.3
GND – 0.3
GND – 0.3
–65
MAX
6
UNIT
V
VS
Supply voltage
NC Input
NC
(VS) + 0.3
(VS) + 0.3
150
V
Analog output
VOUT
V
TJ
Junction temperature
Storage temperature
°C
°C
Tstg
–65
150
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress
ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under
Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability.
7.2 ESD Ratings
VALUE
UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
±2000
V(ESD)
Electrostatic discharge
V
Charged-device model (CDM), per JEDEC specification JESD22-
C101(2)
±1000
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
(1)
VIN+,VIN–
VS
Input voltage
–600
600
VPK
Operating supply voltage, TMCS1101A1B/U-Q1-
A3B/U-Q1
3
5
5
5.5
V
VS
Operating supply voltage, TMCS1101A4B/U-Q1
Operating free-air temperature
4.5
5.5
V
(2)
TA
–40
125
°C
(1) VIN+ and VIN– refer to the voltage at input current pins IN+ and IN–, relative to pin 5 (GND).
(2) Input current safe operating area is constrained by junction temperature. Recommended condition based on the TMCS1101EVM. Input
current rating is derated for elevated ambient temperatures.
7.4 Thermal Information
TMCS1101 -Q1 (2)
THERMAL METRIC(1)
D (SOIC)
8 PINS
36.6
UNIT
RθJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJC(top)
RθJB
50.7
9.6
ΨJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
–0.1
ΨJB
11.7
RθJC(bot)
N/A
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
(2) Applies when device mounted on TMCS1101EVM. For more details, see the Safe Operating Area section.
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7.5 Power Ratings
VS = 5.5 V, TA = 125℃, TJ = 150℃, device soldered on TMCS1101EVM.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
PD
Maximum power dissipation (both sides)
673
mW
Maximum power dissipation (current input,
side-1)
PD1
PD2
IIN = 16 A
640
33
mW
mW
Maximum power dissipation by (side-2)
VS = 5.5 V, IQ = 6mA, no VOUT load
7.6 Insulation Specifications
PARAMETER
TEST CONDITIONS
VALUE
UNIT
GENERAL
CLR
CPG
External clearance(1)
Shortest terminal-to-terminal distance through air
4
4
mm
mm
Shortest terminal-to-terminal distance across the
package surface
External creepage(1)
DTI
CTI
Distance through the insulation
Comparative tracking index
Material group
Minimum internal gap (internal clearance)
DIN EN 60112; IEC 60112
60
>400
II
µm
V
Rated mains voltage ≤ 150 VRMS
Rated mains voltage ≤ 300 VRMS
AC voltage (bipolar)
I-IV
I-III
600
Overvoltage category
VIORM
Maximum repetitive peak isolation voltage
VPK
VRMS
VDC
AC voltage (sine wave); Time Dependent
Dielectric Breakdown test, see Insulation Lifetime.
424
600
VIOWM
Maximum working isolation voltage
DC voltage
VTEST = VIOTM = 4242VPK, t = 60 s (qualification);
VTEST = 1.2 × VIOTM = 5090VPK, t = 1 s (100%
production)
VIOTM
Maximum transient isolation voltage
Maximum surge isolation voltage(2)
4242
6000
≤5
VPK
Test method per IEC 62368-1, 1.2/50 µs
waveform,
VTEST = 1.3 × VIOSM = 7800VPK (qualification)
VIOSM
VPK
Method a: After I/O safety test subgroup 2/3,
Vini = VIOTM = 4242VPK, tini = 60 s;
Vpd(m) = 1.2 × VIORM = 700VPK, tm = 10 s
Method a: After environmental tests subgroup 1,
Vini = VIOTM = 4242VPK, tini = 60 s;
Vpd(m) = 1.2 × VIORM = 700VPK, tm = 10 s
≤5
qpd
Apparent charge(3)
pC
Method b3: At routine test (100% production) and
preconditioning (type test)
Vini = 1.2 × VIOTM = 5090VPK, tini = 1 s;
Vpd(m) = 1.2 × VIOTM = 5090VPK, tm = 1 s
≤5
CIO
RIO
Barrier capacitance, input to output(4)
Isolation resistance, input to output(4)
Pollution degree
VIO = 0.4 sin (2πft), f = 1 MHz
VIO = 500 V, TA = 25°C
0.6
>1012
>1011
>109
2
pF
Ω
VIO = 500 V, 100°C ≤ TA ≤ 125°C
VIO = 500 V at TS = 150°C
Ω
Ω
UL 1577
VTEST = VISO, t = 60 s (qualification); VTEST = 1.2 ×
VISO
Withstand isolation voltage
VISO
,
3000
VRMS
t = 1 s (100% production)
(1) Apply creepage and clearance requirements according to the specific equipment isolation standards of an application. Take care
to maintain the creepage and clearance distance of the board design to make sure that the mounting pads of the isolator on the
printed-circuit board do not reduce this distance. Creepage and clearance on a printed-circuit board become equal in certain cases.
Techniques such as inserting grooves, ribs, or both on a printed circuit board are used to help increase these specifications.
(2) Testing is carried out in air or oil to determine the intrinsic surge immunity of the isolation barrier.
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(3) Apparent charge is electrical discharge caused by a partial discharge (pd).
(4) All pins on each side of the barrier tied together creating a two-terminal device
7.7 Safety-Related Certifications
UL
UL 1577 Component Recognition Program
File number: E181974
Certified according to IEC 62368-1 CB
Certificate number: US-36733-UL
7.8 Safety Limiting Values
Safety limiting intends to minimize potential damage to the isolation barrier upon failure of input or output circuitry.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
RθJA = 36.6°C/W, TJ = 150°C, TA = 25°C, see Thermal
Derating Curve, Side 1.
IS
IS
Safety input current (side 1)(1)
30
A
Safety input, output, or supply
current (side 2)(1)
RθJA = 36.6°C/W, VI = 5 V, TJ = 150°C, TA = 25°C,
see Thermal Derating Curve, Side 2.
0.68
Safety input, output, or total
power(1)
RθJA = 36.6°C/W, TJ = 150°C, TA = 25°C, see Thermal
Derating Curve, Both Sides.
PS
TS
3.4
W
Safety temperature(1)
150
℃
(1) The maximum safety temperature, TS, has the same value as the maximum junction temperature, TJ, specified for the device. The
IS and PS parameters represent the safety current and safety power respectively. The maximum limits of IS and PS should not be
exceeded. These limits vary with the ambient temperature, TA.
The junction-to-air thermal resistance, RθJA, in the Thermal Information table is that of a device installed on the TMCS1101EVM. Use
these equations to calculate the value for each parameter:
TJ = TA + RθJA × P, where P is the power dissipated in the device.
TJ(max) = TS = TA + RθJA × PS, where TJ(max) is the maximum allowed junction temperature.
PS = IS × VI, where VI is the maximum input voltage.
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7.9 Electrical Characteristics
at TA = 25°C, VS = 5 V (unless otherwise noted)
PARAMETERS
TEST CONDITIONS
MIN
TYP
MAX
UNIT
OUTPUT
TMCS1101A1B-Q1
50
100
mV/A
mV/A
mV/A
mV/A
mV/A
mV/A
mV/A
mV/A
TMCS1101A2B-Q1
TMCS1101A3B-Q1
200
TMCS1101A4B-Q1
400
Sensitivity(7)
TMCS1101A1U-Q1
50
TMCS1101A2U-Q1
100
TMCS1101A3U-Q1
200
TMCS1101A4U-Q1
400
0.05 V ≤ VOUT ≤ VS – 0.2 V, TA= 25ºC
±0.3%
±0.8%
±0.8%
Sensitivity error
TMCS1101A1U-Q1, 0.05 V ≤ VOUT ≤ 3 V,
TA= 25ºC
±0.3%
Sensitivity error, including lifetime and
environmental drift (5)
0.05 V ≤ VOUT ≤ VS – 0.2 V, TA= 25ºC
-0.47% ±1.02%
0.05 V ≤ VOUT ≤ VS – 0.2 V, TA= –40ºC to
+85ºC
±0.5%
±0.5%
±1%
±1%
TMCS1101A1U-Q1, 0.05 V ≤ VOUT ≤ 3 V,
TA= –40ºC to +85ºC
Sensitivity error
0.05 V ≤ VOUT ≤ VS – 0.2 V, TA= –40ºC to
+125ºC
±0.6% ±1.25%
±0.6% ±1.25%
TMCS1101A1U-Q1, 0.05 V ≤ VOUT ≤ 3 V,
TA= –40ºC to +125ºC
VOUT = 0.5 V to VS – 0.5 V
±0.05%
±0.05%
Nonlinearity error
TMCS1101A1U-Q1, VOUT = 0.5 V to 3 V
TMCS1101A1B-Q1
±1
±1
±4.5
±6
mV
mV
mV
mV
mV
mV
mV
mV
TMCS1101A2B-Q1
TMCS1101A3B-Q1
±1.3
±2.4
±1.2
±1
±9
TMCS1101A4B-Q1
±21
±5
VOE
Output voltage offset error(1)
TMCS1101A1U-Q1
TMCS1101A2U-Q1
±8
TMCS1101A3U-Q1
±2.3
±12.4
±5.4
±3.5
±7.4
±27.6
±7
±10
±28
TMCS1101A4U-Q1
TMCS1101A1B-Q1, TA= –40ºC to +125ºC
TMCS1101A2B-Q1, TA= –40ºC to +125ºC
TMCS1101A3B-Q1, TA= –40ºC to +125ºC
TMCS1101A4B-Q1, TA= –40ºC to +125ºC
TMCS1101A1U-Q1, TA= –40ºC to +125ºC
TMCS1101A2U-Q1, TA= –40ºC to +125ºC
TMCS1101A3U-Q1, TA= –40ºC to +125ºC
TMCS1101A4U-Q1, TA= –40ºC to +125ºC
±14 µV/℃
±21 µV/℃
±37 µV/℃
±140 µV/℃
±16 µV/℃
±22 µV/℃
±41 µV/℃
±144 µV/℃
Output voltage offset drift
±9
±14
±36
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at TA = 25°C, VS = 5 V (unless otherwise noted)
PARAMETERS
TEST CONDITIONS
TMCS1101A1B-Q1
MIN
TYP
±20
±10
±6.5
±6
MAX
UNIT
mA
mA
mA
mA
mA
mA
mA
mA
±90
±60
TMCS1101A2B-Q1
TMCS1101A3B-Q1
±45
TMCS1101A4B-Q1
±52.5
±100
±80
IOS
Offset error, RTI(1) (3)
TMCS1101A1U-Q1
±24
±10
±11.5
±31
±108
±35
±37
±69
±140
±90
±70
±90
TMCS1101A2U-Q1
TMCS1101A3U-Q1
±50
TMCS1101A4U-Q1
±70
TMCS1101A1B-Q1, TA= –40ºC to +125ºC
TMCS1101A2B-Q1, TA= –40ºC to +125ºC
TMCS1101A3B-Q1, TA= –40ºC to +125ºC
TMCS1101A4B-Q1, TA= –40ºC to +125ºC
TMCS1101A1U-Q1, TA= –40ºC to +125ºC
TMCS1101A2U-Q1, TA= –40ºC to +125ºC
TMCS1101A3U-Q1, TA= –40ºC to +125ºC
TMCS1101A4U-Q1, TA= –40ºC to +125ºC
±280 µA/°C
±210 µA/°C
±185 µA/°C
±350 µA/°C
±320 µA/°C
±220 µA/°C
±205 µA/°C
±360 µA/°C
Offset error temperature drift, RTI(3)
VS = 3 V to 5.5 V, TMCS1101A1B/U-Q1-
A3B/U-Q1, TA= –40ºC to +125ºC
±1
±1
±3 mV/V
PSRR
Power-supply rejection ratio
VS = 4.5 V to 5.5 V, TMCS1101A4B/U-
Q1, TA= –40ºC to +125ºC
±6.5 mV/V
CMTI
Common mode transient immunity
Common mode rejection ratio, RTI(3)
50
5
kV/µs
uA/V
CMRR
DC to 60Hz
(1)
Zero current VOUT
TMCS1101A<1-4>U-Q1
TMCS1101A<1-4>B-Q1
TMCS1101A1B-Q1
TMCS1101A2B-Q1
TMCS1101A3B-Q1
TMCS1101A4B-Q1
TMCS1101A1U-Q1
TMCS1101A2U-Q1
TMCS1101A3U-Q1
TMCS1101A4U-Q1
0.1*VS
0.5*VS
380
V/V
(1)
Zero current VOUT
V/V
μA/√Hz
μA/√Hz
μA/√Hz
μA/√Hz
μA/√Hz
μA/√Hz
μA/√Hz
μA/√Hz
330
300
225
Noise density, RTI(3)
380
330
300
225
INPUT
RIN
Input conductor resistance
IN+ to IN–
1.8
4.4
mΩ
Input conductor resistance temperature
drift
TA= –40ºC to +125ºC
μΩ/°C
G
Magnetic coupling factor
TA= 25ºC
1.1
30
mT/A
A
TA= 25ºC
TA= 85ºC
25
A
IIN,max
Allowable continuous RMS current (4)
TA= 105ºC
22.5
16
A
TA= 125ºC
A
NC (Pin 6) input impedance
Over allowable range, GND < VNC < VS
1
MΩ
VOLTAGE OUTPUT
ZOUT Closed loop output impedance
f = 1 Hz to 1 kHz
f = 10 kHz
0.2
2
Ω
Ω
Maximum capacitive load
No sustained oscillation
1
nF
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at TA = 25°C, VS = 5 V (unless otherwise noted)
PARAMETERS
TEST CONDITIONS
MIN
TYP
MAX
UNIT
mA
V
Short circuit output current
VOUT short to ground, short to VS
RL = 10 kΩ to GND, TA= –40ºC to +125ºC
90
Swing to VS power-supply rail
VS – 0.02 VS – 0.1
VGND
+
Swing to GND
RL = 10 kΩ to GND, TA= –40ºC to +125ºC
VGND + 5
mV
10
FREQUENCY RESPONSE
BW
SR
Bandwidth(6)
–3-dB Bandwidth
80
kHz
Slew rate of output amplifier during single
transient step.
Slew rate(6)
1.5
V/µs
Time between the input current step
reaching 90% of final value to the sensor
output reaching 90% of its final value, for
a 1V output transition.
tr
Response time(6)
6.5
4
µs
µs
Time between the input current step
reaching 10% of final value to the sensor
output reaching 10% of its final value, for
a 1V output transition.
tp
Propagation delay(6)
Time between the input current step
reaching 90% of final value to the sensor
output reaching 90% of its final value.
Input current step amplitude is twice full
scale output range.
tr,SC
Current overload response time(6)
5
µs
Time between the input current step
reaching 10% of final value to the sensor
output reaching 10% of its final value.
Input current step amplitude is twice full
scale output range.
tp,SC
Current overload propagation delay(6)
Current overload recovery time
3
µs
µs
Time from end of current causing output
saturation condition to valid output
15
POWER SUPPLY
IQ Quiescent current
Power on time
TA = 25ºC
4.5
25
5.5
6
mA
mA
ms
TA = –40ºC to +125ºC
Time from VS > 3 V to valid output
(1) Excludes effect of external magnetic fields. See the Accuracy Parameters section for details to calculate error due to external magnetic
fields.
(2) Excluding magnetic coupling from layout deviation from recommended layout. See the Layout section for more information.
(3) RTI = referred-to-input. Output voltage is divided by device sensitivity to refer signal to input current. See the Parameter Measurement
Information section.
(4) Thermally limited by junction temperature. Applies when device mounted on TMCS1101EVM. For more details, see the Safe Operating
Area section.
(5) Lifetime and environmental drift specifications based on three lot AEC-Q100 qualification stress test results. Typical values are
population mean+1σ from worst case stress test condition. Min/max are tested device population mean±6σ; devices tested in AEC-
Q100 qualification stayed within min/max limits for all stress conditions. See Lifetime and Environmental Stability section for more
details.
(6) Refer to the Transient Response section for details of frequency and transient response of the device.
(7) Centered parameter based on TMCS1101EVM PCB layout. See Layout section. Device must be operated below maximum junction
temperature.
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7.10 Typical Characteristics
0.8
0.6
0.4
0.2
0
0.6
0.4
0.2
0
A1B
A2B
A3B
A4B
A1U
A2U
A3U
A4U
-0.2
-0.4
-0.6
-0.8
-1
-0.2
-0.4
-0.6
-0.8
-50
-25
0
25
Temperature (°C)
50
75
100
125
150
-50
-25
0
25
Temperature (°C)
50
75
100
125
150
Figure 7-1. TMCS1101AxB-Q1 Sensitivity Error vs
Temperature
Figure 7-2. TMCS1101AxU-Q1 Sensitivity Error vs
Temperature
150
150
A1B
A2B
A3B
A4B
A1U
A2U
A3U
A4U
125
125
100
75
100
75
50
50
25
25
0
0
-25
-50
-75
-100
-125
-150
-25
-50
-75
-100
-125
-150
-50
-25
0
25
Temperature (°C)
50
75
100
125
150
-50
-25
0
25
Temperature (°C)
50
75
100
125
150
Figure 7-3. TMCS1101AxB-Q1 Input Offset Current Figure 7-4. TMCS1101AxU-Q1 Input Offset Current
vs Temperature vs Temperature
0.3
0.24
0.18
0.12
0.06
0
0.25
A1B
A2B
A3B
A4B
A1U
A2U
A3U
A4U
0.2
0.15
0.1
0.05
0
-50
-25
0
25
Temperature (°C)
50
75
100
125
150
-50
-25
0
25
Temperature (°C)
50
75
100
125
150
TMCS1101AxB-Q1
TMCS1101AxU-Q1
Figure 7-5. Non-Linearity vs. Temperature
Figure 7-6. Non-Linearity vs. Temperature
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D028
D033
Sensitivity Error (%)
Sensitivity Error (%)
TMCS1101AxB-Q1
TMCS1101AxU-Q1
Figure 7-7. Sensitivity Error Production
Distribution
Figure 7-8. Sensitivity Error Production
Distribution
D029
D034
IOS (mA)
IOS (mA)
TMCS1101A1B-Q1
TMCS1101A1U-Q1
Figure 7-9. Input Offset Current Production
Distribution
Figure 7-10. Input Offset Current Production
Distribution
D030
D035
IOS (mA)
IOS (mA)
TMCS1101A2B-Q1
TMCS1101A2U-Q1
Figure 7-11. Input Offset Current Production
Distribution
Figure 7-12. Input Offset Current Production
Distribution
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D031
D036
IOS (mA)
IOS (mA)
TMCS1101A3B-Q1
TMCS1101A3U-Q1
Figure 7-13. Input Offset Current Production
Distribution
Figure 7-14. Input Offset Current Production
Distribution
D032
D037
IOS (mA)
IOS (mA)
TMCS1101A4B-Q1
TMCS1101A4U-Q1
Figure 7-15. Input Offset Current Production
Distribution
Figure 7-16. Input Offset Current Production
Distribution
4
3
30
0
2
-30
1
0
-60
-1
-2
-3
-90
-120
-150
-180
-4
All gains 80kHz -3dB
-5
-6
10
100
1k 10k
Frequency (Hz)
100k
1M
10
100
1k
Frequency (Hz)
10k
100k
Figure 7-17. Sensitivity vs. Frequency, All Gains
Normalized to 1 Hz
Figure 7-18. Phase vs. Frequency, All Gains
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VS
100
10
1
(VS) – 0.5
(VS) – 1
(VS) – 1.5
(VS) – 2
–
(VS) 2.5
(VS) – 3
GND + 3
GND + 2.5
GND + 2
GND + 1.5
GND + 1
GND + 0.5
GND
0
20
40
60
80
100
120
140
160
Output Current (mA)
0.1
10
100
1k 10k
Frequency (Hz)
100k
1M
Figure 7-20. Output Impedance vs. Frequency
Figure 7-19. Output Swing vs. Output Current
5.2
400
A1B/U
A2B/U
A3B/U
A4B/U
5
350
300
250
200
4.8
4.6
4.4
4.2
A1
A2
A3
A4
150
10
100
1k
Frequency (Hz)
10k
100k
-50
-25
0
25
50
75
Temperature (°C)
100
125
150
Figure 7-22. Input-Referred Noise vs. Frequency
Figure 7-21. Quiescent Current vs. Temperature
90
75
60
45
30
15
0
4
90
75
60
45
30
15
0
4
IIN
V1
V2
3.5
3
3.5
3
2.5
2
2.5
2
1.5
1
1.5
1
IIN
V1
V2
-15
0.5
-15
0.5
Time (4ms/div)
Time (4ms/div)
Figure 7-23. Voltage Output Step, Rising
Figure 7-24. Voltage Output Step, Falling
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70
60
50
40
30
20
10
0
6
IIN
VOUT
5
4
3
2
1
0
-1
-2
-10
Time (4ms/div)
Figure 7-26. Startup Transient Response
Figure 7-25. Current Overload Response
2.4
2.3
2.2
2.1
2
1.9
1.8
1.7
1.6
1.5
1.4
-50
-25
0
25
50
75
Temperature (°C)
100
125
150
Figure 7-27. Input Conductor Resistance vs. Temperature
7.10.1 Insulation Characteristics Curves
35
30
25
20
15
10
5
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0
0
20
40
60
Ambient Temperature (°C)
80
100
120
140
160
0
20
40
60
Ambient Temperature (°C)
80
100
120
140
160
Figure 7-28. Thermal Derating Curve for Safety-
Limiting Current, Side 1
Figure 7-29. Thermal Derating Curve for Safety-
Limiting Current, Side 2
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4
3.5
3
2.5
2
1.5
1
0.5
0
0
20
40
60
80
100
Ambient Temperature (°C)
120
140
160
Figure 7-30. Thermal Derating Curve for Safety-Limiting Power
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8 Parameter Measurement Information
8.1 Accuracy Parameters
The ideal first-order transfer function of the TMCS1101-Q1 is given by Equation 1, where the output voltage is
a linear function of input current. The accuracy of the device is quantified both by the error terms in the transfer
function parameters, as well as by nonidealities that introduce additional error terms not in the simplified linear
model. See Total Error Calculation Examples for example calculations of total error, including all device error
terms.
where
•
•
•
•
VOUT is the analog output voltage.
S is the ideal sensitivity of the device.
IIN is the isolated input current.
VREF is the voltage applied to the reference voltage input.
VOUT = S × IIN + VOUT,0A
(1)
where
•
•
•
•
VOUT is the analog output voltage.
S is the ideal sensitivity of the device.
IIN is the isolated input current.
VOUT,0A is the zero current output voltage for the device variant.
8.1.1 Sensitivity Error
Sensitivity is the proportional change in the sensor output voltage due to a change in the input conductor
current. This sensitivity is the slope of the first-order transfer function of the sensor, as shown in Figure 8-1. The
sensitivity of the TMCS1101-Q1 is tested and calibrated at the factory for high accuracy.
VOUT (V)
VOUT, 0 A + VFS+
VNL
S = Slope (V/A)
best fit linear
VOUT, 0 A
VOUT, 0 A
VOE
0.1xVS (AxU)
0.5xVS (AxB)
VOUT, 0 A œ VFSœ
IFSœ
IFS+
IIN (A)
Figure 8-1. Sensitivity, Offset, and Nonlinearity Error
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Deviation from ideal sensitivity is quantified by sensitivity error, defined as the percent variation of the best-fit
measured sensitivity from the ideal sensitivity. When specified over a temperature range, this is the worst-case
sensitivity error at any temperature within the range.
eS = [(Sfit – Sideal) / Sideal] × 100%
(2)
where
•
•
•
eS is the sensitivity error.
Sfit is the best fit sensitivity.
SIdeal is the ideal sensitivity.
8.1.2 Offset Error and Offset Error Drift
Offset error is the deviation from the ideal output voltage with zero input current through the device. Offset error
can be referred to the output as a voltage error VOE or referred to the input as a current offset error IOS. Offset
error is a single error source, however, and must only be included once in error calculations.
The output voltage offset error of the TMCS1101-Q1 is the deviation of the measured VOUT with zero input
current from the ideal value of the zero current output voltage. This ideal voltage is either 10% of VS for
unidirectional devices (AxU) or 50% of VS for bidirectional devices (AxB), as shown in Equation 3 and Equation
4, respectively.
VOE = VOUT,0A - VS * 0.1
(3)
VOE = VOUT,0A - VS * 0.5
(4)
where
•
VOUT,0A is the device output voltage with zero input current.
The offset error includes errors in the internal reference, the magnetic offset of the Hall sensor and any offset
voltage errors of the signal chain.
The input referred (RTI) offset error is the output voltage offset error divided by the sensitivity of the device,
shown in Equation 5. Refer the offset error to the input of the device to allow for easier total error calculations
and direct comparison to input current levels. No matter how the calculations are done, the error sources
quantified by VOE and IOS are the same, and should only be included once for error calculations.
IOS = VOE / S
(5)
Offset error drift is the change in the input-referred offset error per degree Celsius change in ambient
temperature. This parameter is reported in µA/°C. To convert offset drift to an absolute offset for a given change
in temperature, multiply the drift by the change in temperature and convert to percentage, as in Equation 6.
mA
èC
≈
«
’
IOS,25èC + IOS,drift ∆
ì DT
÷
◊
eI
% =
)
(
OS,DT
I
IN
(6)
where
•
•
IOS,drift is the specified input-referred device offset drift.
ΔT is the temperature range from 25°C.
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8.1.3 Nonlinearity Error
Nonlinearity is the deviation of the output voltage from a linear relationship to the input current. Nonlinearity
voltage, as shown in Figure 8-1, is the maximum voltage deviation from the best-fit line based on measured
parameters, calculated by Equation 7.
VNL = VOUT,MEAS – (IMEAS × Sfit + VOUT,0A
)
(7)
where
•
•
•
•
VOUT,MEAS is the voltage output at maximum deviation from best fit.
IMEAS is the input current at maximum deviation from best fit.
Sfit is the best-fit sensitivity of the device.
VOUT,0A is the device zero current output voltage.
Nonlinearity error (eNL) for the TMCS1101-Q1 is the nonlinearity voltage specified as a percentage of the
full-scale output range (VFS), as shown in Equation 8.
VNL
eNL = 100% *
VFS
(8)
8.1.4 Power Supply Rejection Ratio
Power supply rejection ratio (PSRR) is the change in device offset due to variation of supply voltage from the
nominal 5 V. The error contribution at the input current of interest can be calculated by Equation 9.
PSRR * (VS - 5)
S
ePSRR(%) =
I
IN
(9)
where
•
•
VS is the operational supply voltage.
S is the device sensitivity.
8.1.5 Common-Mode Rejection Ratio
Common-mode rejection ratio (CMRR) quantifies the effective input current error due to a varying voltage on
the isolated input of the device. Due to magnetic coupling and galvanic isolation of the current signal, the
TMCS1101-Q1 has very high rejection of input common-mode voltage. Percent error contribution from input
common-mode variation can be calculated by Equation 10.
CMRR * VCM
eCMRR(%) =
I
IN
(10)
where
•
VCM is the maximum operational AC or DC voltage on the input of the device.
8.1.6 External Magnetic Field Errors
The TMCS1101-Q1 does not have stray field-rejection capabilities, so external magnetic fields from adjacent
high-current traces or nearby magnets can impact the output measurement. The total sensitivity (S) of the device
is comprised of the initial transformation of input current to magnetic field quantified as the magnetic coupling
factor (G), as well as the sensitivity of the Hall element and the analog circuitry that is factory calibrated to
provide a final sensitivity. The output voltage is proportional to the input current by the device sensitivity, as
defined in Equation 11.
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S = G * SHall * AV
where
(11)
•
•
•
•
S is the TMCS1101-Q1 sensitivity in mV/A.
G is the magnetic coupling factor in mT/A.
SHall is the sensitivity of the Hall plate in mV/mT.
AV is the calibrated analog circuitry gain in V/V.
An external field, BEXT, is measured by the Hall sensor and signal chain, in addition to the field generated by the
leadframe current, and is added as an extra input term in the total output voltage function:
VOUT = BEXT * SHall * AV +I * G* SHall * AV + VOUT,0A
IN
(12)
Observable from Equation 12 is that the impact of an external field is an additional equivalent input current
signal, IBEXT, shown in Equation 13. This effective additional input current has no dependence on Hall or analog
circuitry sensitivity, so all gain variants have equivalent input-referred current error due to external magnetic
fields.
BEXT
IB
=
EXT
G
(13)
This additional current error generates a percentage error defined by Equation 14.
BEXT
G
eB (%) =
EXT
I
IN
(14)
8.2 Transient Response Parameters
The transient response of the TMCS1101-Q1 is impacted by the 250 kHz sampling rate as defined in Transient
Response. Figure 8-2 shows the TMCS1101-Q1 response to an input current step sufficient to generate a 1V
output change. The typical 4us sampling window can be observed as a periodic step. This sampling window
dominates the response of the device, and the response will have some probabilistic nature due to alignment of
the input step and the sampling window interval.
90
75
60
45
30
15
0
4
3.5
3
2.5
2
1.5
1
IIN
V1
V2
-15
0.5
Time (4ms/div)
Figure 8-2. Transient Step Response
8.2.1 Slew Rate
Slew rate (SR) is defined as the VOUT rate of change for a single integration step’s output transition, as shown
in Figure 8-3. Because the device often requires two sampling windows to reach a full 90% settling of its final
value, this slew rate is not equal to the 10%-90% transition time for the full output swing.
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Input Current
Input Current
Input Current
tr
tr
tr
90%
90%
90%
4ꢀs Sample
Window
4ꢀs Sample
Window
SR
4ꢀs Sample
Window
VOUT response
1V
1V
1V
VOUT response
SR
SR
tp
VOUT response
10%
tp
10%
tp
10%
Figure 8-3. Small Current Input Step Transient Response
8.2.2 Propagation Delay and Response Time
Propagation delay is the time period between the input current waveform reaching 10% of its final value and
VOUT reaching 10% of its final value. This propagation delay is heavily dependent upon the alignment of the
input current step and the sampling period of the TMCS1101-Q1, as shown for several different sampling
window cases in Figure 8-3.
Response time is the time period between the input current reaching 90% of its final value and the output
reaching 90% of its final value, for an input current step sufficient to cause a 1-V transition on the output. Figure
8-3 shows the response time of the TMCS1101-Q1 under three different time cases. Unless a step input occurs
directly during the beginning of one sampling window the response time will include two sampling intervals.
8.2.3 Current Overload Parameters
Current overload response parameters are the transient behavior of the TMCS1101-Q1 to an input current step
consistent with a short circuit or fault event. Tested amplitude is twice the full scale range of the device, or 10V /
Sensitivity in V/A. Under these conditions, the TMCS1101-Q1 output will respond faster than in the case of a
small input current step due to the higher input amplitude signal. Response time and propagation delay are
measured in a similar manner to the case of a small input current step, as shown in Figure 8-4.
Input Current
tr
90%
û IIN =
10 V / S
VOUT response
SR
10%
tp
Figure 8-4. Current Overload Transient Response
Current overload recovery time is the required time for the device output to exit a saturated condition and return
to normal operation. The transient response of the device during this recovery period from a current overload is
shown in Current Overload Response.
8.2.4 CMTI, Common-Mode Transient Immunity
CMTI is the capability of the device to tolerate a rising/falling voltage step on the input without disturbance on
the output signal. The device is specified for the maximum common-mode transition rate under which the output
signal will not experience a greater than 200-mV disturbance that lasts longer than 1 µs. Higher edge rates than
the specified CMTI can be supported with sufficient filtering or blanking time after common-mode transitions.
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8.3 Safe Operating Area
The isolated input current safe operating area (SOA) of the TMCS1101-Q1 is constrained by self-heating due
to power dissipation in the input conductor. Depending upon the use case, the SOA is constrained by multiple
conditions, including exceeding maximum junction temperature, Joule heating in the leadframe, or leadframe
fusing under extremely high currents. These mechanisms depend on pulse duration, amplitude, and device
thermal states.
Current SOA strongly depends on the thermal environment and design of the system-level board. Multiple
thermal variables control the transfer of heat from the device to the surrounding environment, including air
flow, ambient temperature, and printed-circuit board (PCB) construction and design. All ratings are for a single
TMCS1101-Q1 device on the TMCS1101EVM, with no air flow in the specified ambient temperature conditions.
Device use profiles must satisfy both continuous conduction and short-duration transient SOA capabilities for the
thermal environment under which the system will be operated.
8.3.1 Continuous DC or Sinusoidal AC Current
The longest thermal time constants of device packaging and PCBs are in the order of seconds; therefore,
any continuous DC or sinusoidal AC periodic waveform with a frequency higher than 1 Hz can be evaluated
based on the RMS continuous-current level. The continuous-current capability has a strong dependence upon
the operating ambient temperature range expected in operation. Figure 8-5 shows the maximum continuous
current-handling capability of the device on the TMCS1101EVM. Current capability falls off at higher ambient
temperatures because of the reduced thermal transfer from junction-to-ambient and increased power dissipation
in the leadframe. By improving the thermal design of an application, the SOA can be extended to higher currents
at elevated temperatures. Using larger and heavier copper power planes, providing air flow over the board, or
adding heat sinking structures to the area of the device can all improve thermal performance.
35
30
25
20
15
10
-55
-35
-15
5
25
45
65
85
105 125
Ambient Temperature (èC)
D012
Figure 8-5. Maximum Continuous RMS Current vs. Ambient Temperature
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8.3.2 Repetitive Pulsed Current SOA
For applications where current is pulsed between a high current and no current, the allowable capabilities
are limited by short-duration heating in the leadframe. The TMCS1101-Q1 can tolerate higher current ranges
under some conditions, however, for repetitive pulsed events, the current levels must satisfy both the pulsed
current SOA and the RMS continuous current constraint. Pulse duration, duty cycle, and ambient temperate all
impact the SOA for repetitive pulsed events. Maximum Repetitive Pulsed Current vs. Pulse Duration, Maximum
Repetitive Pulsed Current vs. Pulse Duration, Maximum Repetitive Pulsed Current vs. Pulse Duration, and
Maximum Repetitive Pulsed Current vs. Pulse Duration illustrate repetitive stress levels based on test results
from the TMCS1101EVM under which parametric performance and isolation integrity was not impacted post-
stress for multiple ambient temperatures. At high duty cycles or long pulse durations, this limit approaches the
continuous current SOA for a RMS value defined by Equation 15.
I
= I
* D
IN,RMS
IN,P
(15)
where
•
•
•
IIN,RMS is the RMS input current level
IIN,P is the pulse peak input current
D is the pulse duty cycle
250
200
150
100
50
160
140
120
100
80
1%
5%
10%
25%
50%
75%
1%
5%
10%
25%
50%
75%
60
40
20
0
0.001
0
0.001
0.01
0.1
Current Pulse Duration (s)
1
10
0.01
0.1
Current Pulse Duration (s)
1
10
D016
D017
TA = 25°C
TA = 85°C
Figure 8-6. Maximum Repetitive Pulsed Current vs. Figure 8-7. Maximum Repetitive Pulsed Current vs.
Pulse Duration Pulse Duration
140
120
100
80
120
100
80
60
40
20
0
1%
5%
10%
25%
50%
75%
1%
5%
10%
25%
50%
75%
60
40
20
0
0.001
0.01
0.1
Current Pulse Duration (s)
1
10
0.001
0.01
0.1
Current Pulse Duration (s)
1
10
D018
D019
TA = 105°C
TA = 125°C
Figure 8-8. Maximum Repetitive Pulsed Current vs. Figure 8-9. Maximum Repetitive Pulsed Current vs.
Pulse Duration
Pulse Duration
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8.3.3 Single Event Current Capability
Single higher-current events that are shorter duration can be tolerated by the TMCS1101-Q1, because the
junction temperature does not reach thermal equilibrium within the pulse duration. Figure 8-10 shows the short-
circuit duration curve for the device for single current-pulse events, where the leadframe resistance changes
after stress. This level is reached before a leadframe fusing event, but should be considered an upper limit for
short duration SOA. For long-duration pulses, the current capability approaches the continuous RMS limit at the
given ambient temperature.
1000
100
TA = 25°C
TA = 125°C
10
0.001
0.01
0.1
Pulse Duration (s)
1
10
D004
Figure 8-10. Single-Pulse Leadframe Capability
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9 Detailed Description
9.1 Overview
The TMCS1101-Q1 is a precision Hall-effect current sensor, featuring a 600-V basic isolation working voltage,
< 1.5% full-scale error across temperature, and device options providing both unidirectional and bidirectional
current sensing. Input current flows through a conductor between the isolated input current pins. The conductor
has a 1.8-mΩ resistance at room temperature for low power dissipation and a 20-A RMS continuous current
handling capability up to 105°C ambient temperature on the TMCS1101EVM. The low-ohmic leadframe path
reduces power dissipation compared to alternative current measurement methodologies, and does not require
any external passive components, isolated supplies, or control signals on the high-voltage side. The magnetic
field generated by the input current is sensed by a Hall sensor and amplified by a precision signal chain.
The device can be used for both AC and DC current measurements and has a bandwidth of 80 kHz. There
are multiple fixed-sensitivity device variants for a wide option of linear sensing ranges, and the TMCS1101-Q1
can operate with a low voltage supply from 3 V to 5.5 V. The TMCS1101-Q1 is optimized for high accuracy
and temperature stability, with both offset and sensitivity compensated across the entire operating temperature
range.
9.2 Functional Block Diagram
VS
Temperature
Compensation
----------------------
Offset Cancellation
Hall
Element
Bias
IN+
Precision
Amplifier
Output
Amplifier
VOUT
VS
INœ
Reference
Sampling
GND
GND
9.3 Feature Description
9.3.1 Current Input
Input current to the TMCS1101-Q1 passes through the isolated side of the package leadframe through the
IN+ and IN– pins. The current flow through the package generates a magnetic field that is proportional to the
input current, and measured by a galvanically isolated, precision, Hall sensor IC. As a result of the electrostatic
shielding on the Hall sensor die, only the magnetic field generated by the input current is measured, thus limiting
input voltage switching pass-through to the circuitry. This configuration allows for direct measurement of currents
with high-voltage transients without signal distortion on the current-sensor output. The leadframe conductor has
a nominal resistance of 1.8 mΩ at 25°C, and has a typical positive temperature coefficient as defined in the
Electrical Characteristics table.
9.3.2 Input Isolation
The separation between the input conductor and the Hall sensor die due to the TMCS1101-Q1 construction
provides inherent galvanic isolation between package pins 1-4 and pins 5-8. Insulation capability is defined
according to certification agency definitions and using industry-standard test methods as defined in the Insulation
Specifications table. Assessment of device lifetime working voltages follow the VDE 0884-11 standard for basic
insulation, requiring time-dependent dielectric breakdown (TDDB) data-projection failure rates of less than 1000
part per million (ppm), and a minimum insulation lifetime of 20 years. The VDE standard also requires an
additional safety margin of 20% for working voltage, and a 30% margin for insulation lifetime, translating into a
minimum required lifetime of 26 years at 509 VRMS for the TMCS1101-Q1.
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Figure 9-1 shows the intrinsic capability of the isolation barrier to withstand high-voltage stress over the lifetime
of the device. Based on the TDDB data, the intrinsic capability of these devices is 424 VRMS with a lifetime of
> 100 years. Other factors such as operating environment and pollution degree can further limit the working
voltage of the component in an end system.
Figure 9-1. Insulation Lifetime
9.3.3 High-Precision Signal Chain
The TMCS1101-Q1 uses a precision, low-drift signal chain with proprietary sensor linearization techniques to
provide a highly accurate and stable current measurement across the full temperature range of the device. The
device is fully tested and calibrated at the factory to account for any variations in either silicon or packaging
process variations. The full signal chain provides a fixed sensitivity voltage output that is proportional to the
current through the leadframe of the isolated input.
9.3.3.1 Temperature Stability
The TMCS1101-Q1 includes a proprietary temperature compensation technique which results in significantly
improved parametric drift across the full temperature range. This compensation technique accounts for changes
in ambient temperature, self-heating, and package stress. A zero-drift signal chain architecture and Hall sensor
temperature stabilization methods enable stable sensitivity and minimize offset errors across temperature, and
drastically improves system-level performance across the required operating conditions.
Figure 9-2 and Figure 9-3 show the offset error across the full device ambient temperature range. Figure
9-4 and Figure 9-5 show the typical sensitivity. There are no other external components introducing errors
sources; therefore, the high intrinsic accuracy and stability over temperature directly translates to system-level
performance. As a result of this high precision, even a system with no calibration can reach < 1.5% of total error
current-sensing capability.
150
125
100
75
150
125
100
75
A1B
A2B
A3B
A4B
A1U
A2U
A3U
A4U
50
50
25
25
0
0
-25
-50
-75
-100
-125
-150
-25
-50
-75
-100
-125
-150
-50
-25
0
25
Temperature (°C)
50
75
100
125
150
-50
-25
0
25
Temperature (°C)
50
75
100
125
150
Figure 9-2. Offset Error Drift Across Temperature
(B Variants)
Figure 9-3. Offset Error Drift Across Temperature
(U Variants)
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0.8
0.6
0.4
0.2
0
0.6
0.4
0.2
0
A1B
A2B
A3B
A4B
A1U
A2U
A3U
A4U
-0.2
-0.4
-0.6
-0.8
-1
-0.2
-0.4
-0.6
-0.8
-50
-25
0
25
Temperature (°C)
50
75
100
125
150
-50
-25
0
25
Temperature (°C)
50
75
100
125
150
Figure 9-4. Sensitivity Drift Across Temperature (B Figure 9-5. Sensitivity Drift Across Temperature (U
Variants)
Variants)
9.3.3.2 Lifetime and Environmental Stability
The same compensation techniques used in the TMCS1101-Q1 to reduce temperature drift also greatly reduce
lifetime drift due to aging, stress, and environmental conditions. Typical magnetic sensors suffer from up to 2%
to 3% of sensitivity drift due to aging at high operating temperatures. The TMCS1101-Q1 has greatly improved
lifetime drift, as defined in the Electrical Characteristics for total sensitivity error measured after the worst
case stress test during a three lot AEC-Q100 qualification. All other stress tests prescribed by an AEC-Q100
qualification caused lower than the specified sensitivity error, and were within the bounds specified within the
Electrical Characteristics table. Figure 9-6 shows the total sensitivity error after the worst-case stress test, a
Highly Accelerated Stress Test (HAST) at 130°C and 85% relative humidity (RH), while Figure 9-7 and Figure
9-8 show the sensitivity and offset error drift after a 1000 hour, 125°C high temperature operating life stress
test as specified by AEC-Q100. This test mimics typical device lifetime operation, and shows the likely device
performance variation due to aging is vastly improved compared to typical magnetic sensors.
160
140
120
100
80
200
180
160
140
120
100
80
60
60
40
40
20
20
0
-1% -.8% -.6% -.4% -.2% 0% .2% .4% .6% .8% 1%
0
-1% -.8% -.6% -.4% -.2% 0% .2% .4% .6% .8% 1%
D020
D021
Sensitivity Drift (%)
Figure 9-6. Sensitivity Error After 130°C, 85% RH
HAST
Sensitivity Drift (%)
Figure 9-7. Sensitivity Error Drift After AEC-Q100
High Temperature Operating Life Stress Test
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120
100
80
60
40
20
0
-50 -40 -30 -20 -10
0
10
20
30
40
50
D022
IOS Drift (mA)
Figure 9-8. Input-Referred Offset Drift After AEC-Q100 High Temperature Operating Life Stress Test
9.3.3.3 Frequency Response
The TMCS1101-Q1 signal chain has a spectral response atypical of a linear analog system due to its discrete
time sampling. The 250-kHz sampling interval implies an effective Nyquist frequency of 125 kHz, which limits
spectral response to below this frequency. Higher frequency content than this frequency will be aliased down to
lower spectrums.
The TMCS1101-Q1 bandwidth is defined by the –3-dB spectral response of the entire signal chain which is
constrained by the sampling frequency. Normalized gain and phase plots across frequency are shown below in
Figure 9-9 and Figure 9-10, all variants have the same bandwidth and phase response. Signal content beyond
the 3-dB bandwidth level will still have significant fundamental frequency transmission through the signal chain,
but at increasing distortion levels
4
3
30
0
2
-30
1
0
-60
-1
-2
-3
-4
-5
-6
-90
-120
-150
-180
All gains 80kHz -3dB
10
100
1k 10k
Frequency (Hz)
100k
1M
10
100
1k
Frequency (Hz)
10k
100k
Figure 9-9. Normalized Gain, All Variants
Figure 9-10. Normalized Phase, All Variants
9.3.3.4 Transient Response
The TMCS1101-Q1 signal chain includes a precision analog front end followed by a sampled integrator. At the
end of each integration cycle, the signal propagates to the output. Depending on the alignment of a change
in input current relative to the sampling window, the output might not settle to the final signal until the second
integration cycle. Figure 9-11 shows a typical output waveform response to a 10-kHz sine wave input current.
For a slowly varying input current signal, the output is a discrete time representation with a phase delay of the
integration sampling window. Adding a first order filter of 100 kHz effectively smooths the output waveform with
minimal impact to phase response.
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5.5
5
6
VOUT
Input Current
VOUT, 100 kHz Filter
5
4.5
4
4
3
3.5
3
2
1
2.5
2
0
-1
-2
-3
-4
1.5
1
0.5
0
-5
.00025
0
.00005
.0001
.00015
.0002
Time (s)
D015
Figure 9-11. Response Behavior to 10-kHz Sine Wave Input Current
Figure 9-12 shows two transient waveforms to an input-current step event, but occurring at different times during
the sampling interval. In both cases, the full transition of the output takes two sampling intervals to reach the
final output value. The timing of the current event relative to the sampling window determines the proportional
amplitude of the first and second sampling intervals.
90
75
60
45
30
15
0
4
3.5
3
2.5
2
1.5
1
IIN
V1
V2
-15
0.5
Time (4ms/div)
Figure 9-12. Transient Response to Input-Current Step Sufficient for 1-V Output Swing
The output value is effectively an average over the sampling window; therefore, a large-enough current transient
can drive the output voltage to near the full scale range in the first sample response. This condition is likely to
be true in the case of a short-circuit or fault event. Figure 9-13 shows an input-current step twice the full scale
measurable range with two output voltage responses illustrating the effect of the sampling window. The relative
timing and size of the input current transition determines both the time and amplitude of the first output transition.
In either case, the total response time is slightly longer than one integration period.
70
60
50
40
30
20
10
0
6
5
4
3
2
1
0
IIN
V1
V2
-1
-2
-10
Time (4ms/div)
Figure 9-13. Transient Response to a Large Input Current Step
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9.3.4 Internal Reference Voltage
The device has an internal resistor divider from the analog supply VS that determines the zero-current output
voltage, VOUT,0A. This zero-current output level along with sensitivity determine the measurable input current
range of the device, and allows for unidirectional or bidirectional sensing, as described in the Absolute Maximum
Ratings table. The TMCS1101AxB-Q1 variants have a zero-current output set by Equation 16, while the
TMCS1101AxU-Q1 devices have a zero-current output voltage set by Equation 17.
VOUT,0A = VS × 0.5
VOUT,0A = VS × 0.1
(16)
(17)
These respective reference voltages enable a bidirectional measurable current range for the TMCS1101A2B-Q1
devices and a unidirectional measurement range for the TMCS1101A2U-Q1 devices, as shown in Figure 9-14.
Figure 9-14. Output Voltage Relationship to Input Current for TMCS1101A2B-Q1 and TMCS1101A2U-Q1
9.3.5 Current-Sensing Measurable Ranges
The TMCS1101-Q1 measurable input current range depends on the device variant, as well as the analog supply
VS. The output voltage is limited by VOUT swing to either supply or ground. The linear output swing range to both
VS and GND is calculated by equations Equation 18 and Equation 19.
VOUT,max = VS – SwingVS
VOUT,min = SwingGND
(18)
(19)
Rearranging the transfer function of the device to solve for input current and substituting VOUT,max and VOUT,min
yields maximum and minimum measurable input current ranges described by Equation 20 and Equation 21.
IIN,MAX+ = (VOUT,max – VOUT,0A) / S
IIN,MAX- = (VOUT,0A – VOUT,min) / S
(20)
(21)
where
•
•
•
•
IIN,MAX+ is the maximum linear measurable positive input current.
IIN,MAX- is the maximum linear measurable negative input current.
S is the sensitivity of the device variant.
VOUT,0A is the appropriate zero current output voltage.
TMCS1101AxB-Q1 variants accommodate bidirectional current sensing by creating zero-current output voltage
equal to half of the supply (VS) potential, while TMCS1101AxU-Q1 variants provide most of the measurable
range for positive currents.
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9.4 Device Functional Modes
9.4.1 Power-Down Behavior
As a result of the inherent galvanic isolation of the device, very little consideration must be paid to powering
down the device, as long as the limits in the Absolute Maximum Ratings table are not exceeded on any pins.
The isolated current input and the low-voltage signal chain can be decoupled in operational behavior, as either
can be energized with the other shut down, as long as the isolation barrier capabilities are not exceeded.
The low-voltage power supply can be powered down while the isolated input is still connected to an active
high-voltage signal or system.
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10 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification,
and TI does not warrant its accuracy or completeness. TI’s customers are responsible for
determining suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.
10.1 Application Information
The key feature sets of the TMCS1101-Q1 provide significant advantages in any application where an isolated
current measurement is required.
•
•
Galvanic isolation provides a high isolated working voltage and excellent immunity to input voltage transients.
Hall based measurement simplifies system level solution without the need for a power supply on the high
voltage (HV) side.
•
•
An input current path through the low impedance conductor minimizes power dissipation.
Excellent accuracy and low temperature drift eliminate the need for multipoint calibrations without sacrificing
system performance.
•
A wide operating supply range enables a single device to function across a wide range of voltage levels.
These advantages increase system-level performance while minimizing complexity for any application where
precision current measurements must be made on isolated currents. Specific examples and design requirements
are detailed in the following section.
10.1.1 Total Error Calculation Examples
Total error can be calculated for any arbitrary device condition and current level. Error sources considered
should include input-referred offset current, power-supply rejection, input common-mode rejection, sensitivity
error, nonlinearity, and the error caused by any external fields. Compare each of these error sources in
percentage terms, as some are significant drivers of error and some have inconsequential impact to current
error. Offset (Equation 22), CMRR (Equation 24), PSRR (Equation 23), and external field error (Equation 25) are
all referred to the input, and so, are divided by the actual input current IIN to calculate percentage errors. For
calculations of sensitivity error and nonlinearity error, the percentage limits explicitly specified in the Electrical
Characteristics table can be used.
IOS
eI (%) =
OS
I
IN
(22)
PSRR * (VS - 5)
S
ePSRR(%) =
I
IN
(23)
CMRR * VCM
eCMRR(%) =
I
IN
(24)
BEXT
G
eB (%) =
EXT
I
IN
(25)
When calculating error contributions across temperature, only the input offset current and sensitivity error
contributions vary significantly. For determining offset error over a given temperature range (ΔT), use Equation
26 to calculate total offset error current. Sensitivity error is specified for both –40°C to 85°C and –40°C to 125°C.
The appropriate specification should be used based on application operating ambient temperature range.
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mA
èC
≈
«
’
IOS,25èC + IOS,drift ∆
ì DT
÷
◊
eI
% =
)
(
OS,DT
I
IN
(26)
To accurately calculate the total expected error of the device, the contributions from each of the individual
components above must be understood in reference to operating conditions. To account for the individual error
sources that are statistically uncorrelated, a root sum square (RSS) error calculation should be used to calculate
total error. For the TMCS1101-Q1, only the input referred offset current (IOS), CMRR, and PSRR are statistically
correlated. These error terms are lumped in an RSS calculation to reflect this nature, as shown in Equation 27
for room temperature and Equation 28 for across a given temperature range. The same methodology can be
applied for calculating typical total error by using the appropriate error term specification.
+ ePSRR + eCMRR 2 + e
2 + eS2 + eNL
2
eRSS(%) =
e
IOS
BEXT
(27)
+ ePSRR + eCMRR 2 + e
2 + eS,DT2 + eNL
BEXT
2
eRSS,DT(%) =
e
IOS,DT
(28)
The total error calculation has a strong dependence on the actual input current; therefore, always calculate
total error across the dynamic range that is required. These curves asymptotically approach the sensitivity and
nonlinearity error at high current levels, and approach infinity at low current levels due to offset error terms with
input current in the denominator. Key figures of merit for any current-measurement system include the total error
percentage at full-scale current, as well as the dynamic range of input current over which the error remains
below some key level. Figure 10-1 illustrates the RSS maximum total error as a function of input current for a
TMCS1101A2B at room temperature and across the full temperature range with VS of 5 V.
10
RSS Max Error, 25°C
RSS Max Error, œ40°C to 85°C
9
RSS Max Error, œ40°C to 125°C
8
7
6
5
4
3
2
1
0
0
5
10 15
Input Current (A)
20
25
D008
Figure 10-1. RSS Error vs. Input Current
10.1.1.1 Room Temperature Error Calculations
For room-temperature total-error calculations, specifications across temperature and drift are ignored. As an
example, consider a TMCS1101-Q1 A1B with a supply voltage (VS) of 3.3 V and a worst-case common-mode
excursion of 600 V to calculate operating-point-specific parameters. Consider a measurement error due to an
external magnetic field of 30 µT, roughly the Earth's magnetic field strength. The full-scale current range of the
device in specified conditions is slightly greater than 33 A; therefore, calculate error at both 25 A and 12.5 A
to highlight error dependence on the input-current level. Table 10-1 shows the individual error components and
RSS maximum total error calculations at room temperature under the conditions specified. Relative to other
errors, the additional error from CMRR is negligible, and can typically be ignored for total error calculations.
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Table 10-1. Total Error Calculation: Room Temperature Example
% TOTAL ERROR AT % TOTAL ERROR AT
ERROR COMPONENT
SYMBOL
EQUATION
IIN = 25 A
IIN = 12.5 A
IOS
eI (%) =
Input offset error
eIos
0.36%
0.72%
OS
I
IN
PSRR * (VS - 5)
S
ePSRR(%) =
PSRR error
ePSRR
0.41%
0.82%
I
IN
CMRR * VCM
eCMRR(%) =
CMRR error
eCMRR
0.01%
0.11%
0.02%
0.22%
I
IN
BEXT
G
External Field error
eBext
eB (%) =
EXT
I
IN
Sensitivity error
eS
Specified in Electrical Characteristics
Specified in Electrical Characteristics
0.8%
0.8%
Nonlinearity error
eNL
0.05%
0.05%
+ ePSRR + eCMRR 2 + e
2 + eS2 + eNL
2
RSS total error
eRSS
1.12%
1.77%
eRSS(%) =
e
IOS
BEXT
10.1.1.2 Full Temperature Range Error Calculations
To calculate total error across any specific temperature range, Equation 27 and Equation 28 should be used for
RSS maximum total errors, similar to the example for room temperatures. Conditions from the example in Room
Temperature Error Calculations have been replaced with their respective equations and error components for a
–40°C to 85°C temperature range below in Table 10-2.
Table 10-2. Total Error Calculation: –40°C to 85°C Example
% MAX TOTAL
ERROR AT IIN = 12.5
A
% MAX TOTAL
ERROR AT IIN = 25 A
ERROR COMPONENT
SYMBOL
EQUATION
mA
èC
≈
«
’
IOS,25èC + IOS,drift ∆
ì DT
÷
◊
Input offset error
eIos,ΔT
0.4%
0.81%
eI
% =
)
(
OS,DT
I
IN
PSRR * (VS - 5)
S
ePSRR(%) =
PSRR error
ePSRR
0.41%
0.82%
I
IN
CMRR * VCM
eCMRR(%) =
CMRR error
eCMRR
0.01%
0.11%
0.02%
0.22%
I
IN
BEXT
G
External Field error
eBext
eB (%) =
EXT
I
IN
Sensitivity error
eS,ΔT
eNL
Specified in Electrical Characteristics
Specified in Electrical Characteristics
1%
1%
Nonlinearity error
0.05%
0.05%
+ ePSRR + eCMRR 2 + eB 2 + eS,DT2 + eNL
1.3%
1.94%
2
RSS total error
eRSS,ΔT
eRSS,DT(%) =
e
IOS,DT
EXT
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10.2 Typical Application
Inline sensing of inductive load currents, such as motor phases, provides significant benefits to the performance
of a control systems, allowing advanced control algorithms and diagnostics with minimal postprocessing. A
primary challenge to inline sensing is that the current sensor is subjected to full HV supply-level PWM transients
driving the load. The inherent isolation of an in-package Hall-effect current sensor topology helps overcome this
challenge, providing high common-mode immunity, as well as isolation between the high-voltage motor drive
levels and the low-voltage control circuitry. Figure 10-2 illustrates the use of the TMCS1101-Q1 in such an
application, driving the inductive load presented by a three phase motor.
5 V
VS
V+
IN+
IN–
VOUT
TMCS1101-Q1
GND
2.5 V
VREF
TMCS1101-Q1
TMCS1101-Q1
V-
Figure 10-2. Inline Motor Phase Current Sensing
10.2.1 Design Requirements
For current sensing of a three-phase motor application, make sure to provide linear sensing across the expected
current range, and make sure that the device remains within working thermal constraints. A single TMCS1101-
Q1 for each phase can be used, or two phases can be measured, and the third phase calculated on the motor-
controller host processor. For this example, consider a nominal supply of 5 V but a minimum of 4.9 V to include
for some supply variation. Maximum output swings are defined according to TMCS1101-Q1 specifications, and a
full-scale current measurement of ±20 A is required.
Table 10-3. Example Application Design Requirements
DESIGN PARAMETER
EXAMPLE VALUE
VS,nom
VS,min
IIN,FS
5 V
4.9 V
±20 A
10.2.2 Detailed Design Procedure
The primary design parameter for using the TMCS1101-Q1 is selecting the correct sensitivity variant, and
because positive and negative current must be measured a bidirectional variant should be selected (A1B-A4B).
Further consideration of noise and integration with an ADC can be explored, but is beyond the scope of this
application design example. The TMCS1101AxB-Q1 transfer function is effectively a transimpedance with a
variable offset set by VOUT,0A, which is internally set to half of the analog supply as defined by Equation 29.
VOUT = IIN × S + VOUT,0A = IIN × S + VS × .05
(29)
Design of the sensing solution focuses on maximizing the sensitivity of the device while maintaining linear
measurement over the expected current input range. The TMCS1101-Q1 has a slightly smaller linear output
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range to the supply than to ground; therefore, the measurable current range is always constrained by the
positive swing to supply, SwingVS. To account for the operating margin, consider the minimum possible supply
voltage VS,min. With the previous parameters, the maximum linear output voltage range is the range between
VOUT,max and VOUT,0A, as defined by Equation 30.
VOUT,max – VOUT,0A = VS,min – SwingVS – 0.5 × VS,min
(30)
Design parameters for this example application are shown in Table 10-4 along with the calculated output range.
Table 10-4. Example Application Design Parameters
DESIGN PARAMETER
EXAMPLE VALUE
SwingVS
0.2 V
VOUT,max
4.7 V
VOUT,0A at VS,min
VOUT,max – VOUT,0A
2.45 V
2.25 V
These design parameters result in a maximum positive linear output voltage swing of 2.25 V. To determine which
sensitivity variant of the TMCS1101-Q1 most fully uses this linear range, calculate the maximum current range
by Equation 31 for a bidirectional current (IB,MAX).
IB,max = (VOUT,max – VOUT,0A) / SA<x>
(31)
where
SA<x> is the sensitivity of the relevant A1-A4 variant.
•
Table 10-5 shows such calculation for each gain variant of the TMCS1101-Q1 with the appropriate sensitivities.
Table 10-5. Maximum Full-Scale Current Ranges With 2.25-V Positive Output Swing
SENSITIVITY VARIANT
TMCS1101A1B-Q1
TMCS1101A2B-Q1
TMCS1101A3B-Q1
TMCS1101A4B-Q1
SENSITIVITY
IB,MAX
50 mV/A
±45 A
100 mV/A
200 mV/A
400 mV/A
±22.5 A
±11.25 A
±5.6 A
In general, the highest sensitivity variant that provides for the desired full-scale current range is selected. For the
design parameters in this example, the TMCS1101A2B-Q1 with a sensitivity of 0.1 V/A is the proper selection
because the maximum calculated ±22.5-A linear measurable range is sufficient for the desired ±20-A full-scale
current.
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10.2.3 Application Curve
The transfer function of the TMCS1101-Q1 linear sensing range for these design parameters is shown in Figure
10-3.
5
23 A, 4.8 V
4.5
4
3.5
0 A, 2.5 V
3
2.5
2
1.5
1
-24.5 A, 0.05 V
0.5
0
-25 -20 -15 -10
-5
Input Current (A)
0
5
10
15
20
25
D001
Figure 10-3. Application Example Design Transfer Curve
11 Power Supply Recommendations
The TMCS1101-Q1 only requires a power supply (VS) on the low-voltage isolated side, which powers the analog
circuitry independent of the isolated current input. VS determines the full-scale output range of the analog output
VOUT, and can be supplied with any voltage between 3 V and 5.5 V. The TMCS1101-Q1 zero-current output
voltage is derived from verses using a resistor divider; therefore, take care to optimize the power supply path
for both noise and stability across temperature to provide the highest precision measurement. To filter noise in
the power-supply path, place a low-ESR decoupling capacitor of 0.1 µF between VS and GND pins as close
as possible to the supply and ground pins of the device. To compensate for noisy or high-impedance power
supplies, add more decoupling capacitance.
The TMCS1101-Q1 power supply VS can be sequenced independently of current flowing through the input.
However, there is a typical 25-ms delay between VS reaching the recommended operating voltage and the
analog output being valid. Within this delay VOUT transfers from a high impedance state to the active drive state,
during which time the output voltage could transition between GND and VS. If this behavior must be avoided, a
stable supply voltage to VS should be provided for longer than 25 ms prior to applying input current.
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12 Layout
12.1 Layout Guidelines
The TMCS1101-Q1 is specified for a continuous current handling capability on the TMCS1101EVM, which
uses 3-oz copper pour planes. This current capability is fundamentally limited by the maximum device junction
temperature and the thermal environment, primarily the PCB layout and design. To maximize current-handling
capability and thermal stability of the device, take care with PCB layout and construction to optimize the
thermal capability. Efforts to improve the thermal performance beyond the design and construction of the
TMCS1101EVM can result in increased continuous-current capability due to higher heat transfer to the ambient
environment. Keys to improving thermal performance of the PCB include:
•
•
•
•
Use large copper planes for both input current path and isolated power planes and signals.
Use heavier copper PCB construction.
Place thermal via farms around the isolated current input.
Provide airflow across the surface of the PCB.
The TMCS1101-Q1 senses external magnetic fields, so make sure to minimize adjacent high-current traces in
close proximity to the device. The input current trace can contribute additional magnetic field to the sensor if the
input current traces are routed parallel to the vertical axis of the package. Figure 12-1 illustrates the most optimal
input current routing into the TMCS1101-Q1. As the angle that the current approaches the device deviates from
0° to the horizontal axis, the current trace contributes some additional magnetic field to the sensor, increasing
the effective sensitivity of the device. If current must be routed parallel to the package vertical axis, move the
routing away from the package to minimize the impact to the sensitivity of the device. Terminate the input current
path directly underneath the package lead footprint, and use a merged copper input trace for both the IN+ and
IN– inputs.
IIN,}ꢀ
}
IN+
IN+
INœ
INœ
1
2
3
4
8
7
6
5
VS
IIN,0ꢀ
VOUT
NC
IIN,0ꢀ
GND
}
IIN,}ꢀ
Figure 12-1. Magnetic Field Generated by Input Current Trace
In addition to thermal and magnetic optimization, make sure to consider the PCB design required creepage and
clearance for system-level isolation requirements. Maintain required creepage between solder stencils, as shown
in Figure 12-2, if possible. If not possible to maintain required PCB creepage between the two isolated sides at
board level, add additional slots or grooves to the board. If more creepage and clearance is required for system
isolation levels than is provided by the package, the entire device and solder mask can be encapsulated with an
overmold compound to meet system-level requirements.
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Cu Plane
Solder Mask Creepage
VS
Cu Plane
Cu Plane
IN+
VOUT
NC
INœ
GND
Cu Plane
Figure 12-2. Layout for System Creepage Requirements
12.2 Layout Example
An example layout, shown in Figure 12-3, is from the TMCS1101EVM. Device performance is targeted for
thermal and magnetic characteristics of this layout, which provides optimal current flow from the terminal
connectors to the device input pins while large copper planes enhance thermal performance.
Figure 12-3. Recommended Board Top (Left) and Bottom (Right) Plane Layout
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13 Device and Documentation Support
13.1 Device Support
13.1.1 Development Support
For development tool support see the following:
•
•
•
TMCS1101EVM
TMCS1101 TI-TINA Model
TMCS1101 TINA-TI Reference Design
13.2 Documentation Support
13.2.1 Related Documentation
For related documentation see the following:
•
•
Texas Instruments, TMCS1101EVM User's Guide
Texas Instruments, Enabling Precision Current Sensing Designs with Nonratiometric Magnetic Current
Sensors
•
•
Texas Instruments, Low-Drift, Precision, In-Line Isolated Magnetic Motor Current Measurements
Texas Instruments, Isolation Glossary
13.3 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Subscribe to updates to register and receive a weekly digest of any product information that has changed. For
change details, review the revision history included in any revised document.
13.4 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
13.5 Trademarks
TI E2E™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
13.6 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
13.7 Glossary
TI Glossary
This glossary lists and explains terms, acronyms, and definitions.
14 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OUTLINE
D0008B
SOIC - 1.75 mm max height
SCALE 2.800
SMALL OUTLINE INTEGRATED CIRCUIT
C
SEATING PLANE
.228-.244 TYP
[5.80-6.19]
.004 [0.1] C
A
PIN 1 ID AREA
6X .050
[1.27]
8
1
2X
.189-.197
[4.81-5.00]
NOTE 3
.150
[3.81]
4X (0 -15 )
4
5
8X .012-.020
[0.31-0.51]
B
.150-.157
[3.81-3.98]
NOTE 4
.069 MAX
[1.75]
.010 [0.25]
C A B
.005-.010 TYP
[0.13-0.25]
4X (0 -15 )
SEE DETAIL A
.010
[0.25]
.004-.010
[0.11-0.25]
0 - 8
.016-.050
[0.41-1.27]
DETAIL A
TYPICAL
.041
[1.04]
4221445/C 02/2019
NOTES:
1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches.
Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed .006 [0.15], per side.
4. This dimension does not include interlead flash.
5. Reference JEDEC registration MS-012, variation AA.
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EXAMPLE BOARD LAYOUT
D0008B
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT
8X (.055)
[1.4]
8X (.061 )
[1.55]
SEE
DETAILS
SEE
DETAILS
SYMM
SYMM
1
1
8
8
8X (.024)
[0.6]
8X (.024)
[0.6]
SYMM
SYMM
(R.002 ) TYP
[0.05]
(R.002 )
[0.05]
TYP
5
5
4
4
6X (.050 )
[1.27]
6X (.050 )
[1.27]
(.213)
[5.4]
(.217)
[5.5]
HV / ISOLATION OPTION
.162 [4.1] CLEARANCE / CREEPAGE
IPC-7351 NOMINAL
.150 [3.85] CLEARANCE / CREEPAGE
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:6X
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
EXPOSDE
METAL
EXPOSED
METAL
.0028 MIN
[0.07]
ALL AROUND
.0028 MAX
[0.07]
ALL AROUND
SOLDER MASK
DEFINED
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4221445/C 02/2019
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
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EXAMPLE STENCIL DESIGN
D0008B
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT
8X (.061 )
[1.55]
8X (.055)
[1.4]
SYMM
SYMM
1
1
8
8
5
8X (.024)
[0.6]
8X (.024)
[0.6]
SYMM
SYMM
(R.002 ) TYP
[0.05]
(R.002 )
[0.05]
TYP
5
4
4
6X (.050 )
[1.27]
6X (.050 )
[1.27]
(.217)
[5.5]
(.213)
[5.4]
HV / ISOLATION OPTION
.162 [4.1] CLEARANCE / CREEPAGE
IPC-7351 NOMINAL
.150 [3.85] CLEARANCE / CREEPAGE
SOLDER PASTE EXAMPLE
BASED ON .005 INCH [0.127 MM] THICK STENCIL
SCALE:6X
4221445/C 02/2019
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
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PACKAGE OPTION ADDENDUM
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26-Jun-2021
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TMCS1101A1BQDRQ1
TMCS1101A1UQDRQ1
TMCS1101A2BQDRQ1
TMCS1101A2UQDRQ1
TMCS1101A3BQDRQ1
TMCS1101A3UQDRQ1
TMCS1101A4BQDRQ1
TMCS1101A4UQDRQ1
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
D
D
D
D
D
D
D
D
8
8
8
8
8
8
8
8
2500 RoHS & Green
2500 RoHS & Green
2500 RoHS & Green
2500 RoHS & Green
2500 RoHS & Green
2500 RoHS & Green
2500 RoHS & Green
2500 RoHS & Green
SN
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
Q01A1B
SN
SN
SN
SN
SN
SN
SN
Q01A1U
Q01A2B
Q01A2U
Q01A3B
Q01A3U
Q01A4B
Q01A4U
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
26-Jun-2021
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TMCS1101-Q1 :
Catalog : TMCS1101
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
27-Jun-2021
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TMCS1101A1BQDRQ1
TMCS1101A1UQDRQ1
TMCS1101A2BQDRQ1
TMCS1101A2UQDRQ1
TMCS1101A3BQDRQ1
TMCS1101A3UQDRQ1
TMCS1101A4BQDRQ1
TMCS1101A4UQDRQ1
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
D
D
D
D
D
D
D
D
8
8
8
8
8
8
8
8
2500
2500
2500
2500
2500
2500
2500
2500
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
12.4
12.4
12.4
12.4
12.4
12.4
12.4
12.4
6.4
6.4
6.4
6.4
6.4
6.4
6.4
6.4
5.2
5.2
5.2
5.2
5.2
5.2
5.2
5.2
2.1
2.1
2.1
2.1
2.1
2.1
2.1
2.1
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
27-Jun-2021
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TMCS1101A1BQDRQ1
TMCS1101A1UQDRQ1
TMCS1101A2BQDRQ1
TMCS1101A2UQDRQ1
TMCS1101A3BQDRQ1
TMCS1101A3UQDRQ1
TMCS1101A4BQDRQ1
TMCS1101A4UQDRQ1
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
D
D
D
D
D
D
D
D
8
8
8
8
8
8
8
8
2500
2500
2500
2500
2500
2500
2500
2500
350.0
350.0
350.0
350.0
350.0
350.0
350.0
350.0
350.0
350.0
350.0
350.0
350.0
350.0
350.0
350.0
43.0
43.0
43.0
43.0
43.0
43.0
43.0
43.0
Pack Materials-Page 2
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standards, and any other safety, security, or other requirements. These resources are subject to change without notice. TI grants you
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Copyright © 2021, Texas Instruments Incorporated
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