TLV3603DCKR [TI]
TLV3601, TLV3603 325 MHz High-Speed Comparator with 2.5 ns Propagation Delay;
| 型号： | TLV3603DCKR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | TLV3601, TLV3603 325 MHz High-Speed Comparator with 2.5 ns Propagation Delay |
| 文件： | 总32页 (文件大小：2409K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TLV3601, TLV3603
SNOSDB1B – JUNE 2021 – REVISED NOVEMBER 2021
TLV3601, TLV3603 325 MHz High-Speed Comparator
with 2.5 ns Propagation Delay
1 Features
3 Description
•
•
•
•
•
•
•
Fast propagation delay: 2.5 ns
Low overdrive dispersion: 600 ps
High toggle frequency: 325 MHz
Narrow pulse width detection capability: 1.25 ns
Push-pull output
Wide supply range: 2.4 V to 5.5 V
Input common-mode range extends 200 mV
beyond both rails
Low input offset voltage: ±5 mV
Known startup condition at output
TLV3603 specific features:
– Adjustable hysteresis control pin
– Latch function
Packages: TLV3601 (5-Pin SC70), TLV3603 (6-Pin
SC70)
Functional Safety Capable
– Documentation available to aid functional safety
system design [TLV3601]
– Documentation available to aid functional safety
system design [TLV3603]
The TLV3601 and TLV3603 are 325 MHz, high-speed
comparators with rail-to-rail inputs and a propagation
delay of 2.5 ns. The combination of fast response and
wide operating voltage range make the comparators
suitable for narrow signal pulse detection and data
and clock recovery applications in LIDAR, range
finders, and line receivers.
The push-pull (single-ended ) outputs of the TLV3601
and TLV3603 simplify and save cost on board-
to-board wiring for I/O interfaces while reducing
power consumption when compared to alternative
high-speed differential output comparators. They can
directly interface most prevailing digital controllers and
IO expanders in the downstream circuit.
•
•
•
•
•
The TLV3601 is available in tiny 5-pin SC70 package
which makes it well suited for space constrained
equipment. TLV3603 is packaged in a 6-pin SC70
package and maintains the same speed and size
as TLV3601 while offering the additional features
of adjustable hysteresis control and output latch
capability.
2 Applications
•
•
•
Laser distance meter
Device Information
Clock and Data Recovery
High speed trigger function in oscilloscope and
logic analyzer
Distance sensing in LIDAR
Drone vision
PART NUMBER
TLV3601
TLV3603
PACKAGE (1)
BODY SIZE (NOM)
SC70 (5)
1.25 mm × 2.00 mm
SOT-23 (5) (Preview) 2.90 mm x 1.60 mm
SC70 (6) 1.25 mm × 2.00 mm
•
•
•
High speed differential line receiver
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
TLV3601
TLV3603
VCC
VCC
+
+
OPA858
TLV3603
+
LE/HYST
VEE
VEE
+
TDC
LE/HYST
Functional Block Diagrams
VBIAS
TLV3603 Application Circuit
VREF
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TLV3601, TLV3603
SNOSDB1B – JUNE 2021 – REVISED NOVEMBER 2021
www.ti.com
Table of Contents
1 Features............................................................................1
2 Applications.....................................................................1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 4
6.1 Absolute Maximum Ratings........................................ 4
6.2 ESD Ratings............................................................... 4
6.3 Recommended Operating Conditions.........................4
6.4 Thermal Information....................................................4
6.5 Electrical Characteristics.............................................5
6.6 Timing Diagrams ........................................................6
6.7 Typical Characteristics................................................7
7 Detailed Description......................................................15
7.1 Overview...................................................................15
7.2 Functional Block Diagram.........................................15
7.3 Feature Description...................................................15
7.4 Device Functional Modes..........................................15
8 Application and Implementation..................................17
8.1 Application Information............................................. 17
8.2 Typical Application.................................................... 18
9 Power Supply Recommendations................................22
10 Layout...........................................................................23
10.1 Layout Guidelines................................................... 23
10.2 Layout Example...................................................... 23
11 Device and Documentation Support..........................24
11.1 Device Support........................................................24
11.2 Receiving Notification of Documentation Updates..24
11.3 Support Resources................................................. 24
11.4 Trademarks............................................................. 24
11.5 Electrostatic Discharge Caution..............................24
11.6 Glossary..................................................................24
12 Mechanical, Packaging, and Orderable
Information.................................................................... 24
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (August 2021) to Revision B (November 2021)
Page
•
•
•
Remove Preview from TLV3603.........................................................................................................................1
Add DBV package option for TLV3601 in Preview ............................................................................................ 1
Added typical performance curves..................................................................................................................... 7
Changes from Revision * (June 2021) to Revision A (August 2021)
Page
•
Production Data Release....................................................................................................................................1
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5 Pin Configuration and Functions
OUT
VEE
1
2
3
5
4
VCC
IN+
IN-
Figure 5-1. DCK, DBV Package
5-Pin SC70, SOT-23
Top View
VCC
6
5
1
2
3
OUT
VEE
LE/HYS
IN-
4
IN+
Figure 5-2. DCK Package
6-Pin SC70
Top View
Table 5-1. Pin Functions
PIN
I/O
DESCRIPTION
NAME
IN+
TLV3601
TLV3603
3
4
3
4
I
I
Non-inverting input
Inverting input
IN–
Output
(Push-pull)
OUT
1
1
O
VEE
2
5
-
2
6
5
I
I
I
Negative power supply
Positive power supply
VCC
LE/HYS
Adjustable hysteresis control and latch
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
–0.3
MAX
6
UNIT
V
Input Supply Voltage: VCC – VEE
Input Voltage (IN+, IN–)(2)
VEE – 0.3
VCC + 0.3
V
Differential Input Voltage (VDI = IN+ – IN–)
Output Voltage (OUT)(3)
–(VCC – VEE + 0.3) + (VCC –VEE + 0.3)
V
VEE – 0.3
VEE – 0.3
VCC + 0.3
VCC + 0.3
±10
V
Latch and Hysteresis Control (LE/HYS)
Current into Input pins (IN+, IN–, LE/HYS)(2)
Current into Output pins (OUT)(3)
Junction temperature, TJ
V
mA
mA
°C
°C
±50
150
Storage temperature, Tstg
–65
150
(1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply
functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions.
If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully
functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.
(2) Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.3 V beyond the supply rails must
be current-limited to 10 mA or less.
(3) Output terminals are diode-clamped to the power-supply rails. Output signals that can swing more than 0.3 V beyond the supply rails
must be current-limited to 50 mA or less.
6.2 ESD Ratings
VALUE
±2000
±1000
UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
Charged-device model (CDM), per ANSI/ESDA/JEDEC JS-002(2)
Electrostatic
discharge
V(ESD)
V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
2.4
MAX
UNIT
Input Supply Voltage: VCC – VEE
Input Voltage Range (IN+, IN–)
Latch and Hysteresis Control (LE/HYS)
Ambient temperature, TA
5.5
VCC + 0.3
VCC + 0.3
125
V
V
VEE – 0.3
VEE – 0.3
–40
V
°C
6.4 Thermal Information
TLV3601
DCK (SC70)
5 PINS
TLV3601
TLV3603
DCK (SC70)
6 PINS
THERMAL METRIC
DBV (SOT-23)
5 PINS
UNIT
RθJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
187.5
176.5
165.1
°C/W
°C/W
Rθ
139.2
N/A
74.7
N/A
129.1
N/A
JC(top)
Rθ
Junction-to-case (bottom) thermal resistance
°C/W
JC(bottom
)
RθJB
ψJT
Junction-to-board thermal resistance
65.8
43.0
65.5
43.4
16.7
43.1
58.9
39.4
58.7
°C/W
°C/W
°C/W
Junction-to-top characterization parameter
Junction-to-board characterization parameter
ψJB
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6.5 Electrical Characteristics
VCC = 2.5, 3.3 and 5 V, VEE = 0 V, VCM = VEE + 300 mV, CL = 5 pF probe capacitance, typical at TA = 25°C (unless otherwise
noted).
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
DC Input Characteristics
VIO
Input offset voltage
TA = –40°C to +125℃
–5
±0.5
±3.0
5
mV
dVIO/dT
Input offset voltage drift
μV/°C
Input common mode voltage
range
VCM
TA = –40℃ to +125℃
TA = –40℃ to +125℃
VEE – 0.2
1.5
VCC + 0.2
5(1)
V
VHYST (TLV3601)
Input hysteresis voltage
Input capacitance
3
1
mV
pF
CIN
RDM
RCM
IB
Input differential mode resistance
Input common mode resistance
Input bias current
67
kΩ
MΩ
uA
uA
dB
dB
5
TA = –40℃ to +125℃
1
5
IOS
Input offset current
±0.03
80
CMRR
PSRR
Common-mode rejection ratio
Power-supply rejection ratio
VCM = VEE – 0.2V to VCC + 0.2V
VCC = 2.4 to 5.5V
80
DC Output Characteristics
ISOURCE = 1 mA
TA = –40℃ to +125℃
VOH
Output high voltage from VCC
60
60
30
30
80
80
mV
mV
mA
mA
ISINK = 1 mA
TA = –40℃ to +125℃
VOL
Output low voltage from VEE
Output Short-Circuit Current -
Source
ISC_SOURCE
TA = –40℃ to +125℃
TA = –40℃ to +125℃
10
10
Output Short-Circuit Current -
Sink
ISC_SINK
Power Supply
ICC (TLV3601)
Output being high
TA = –40℃ to +125℃
quiescent current
4.9
7
mA
Output being high
TA = –40℃ to +125℃
ICC (TLV3603)
quiescent current
5.7
2.1
7.8
mA
V
VPOR (postive)
AC Characteristics
tPD
Power-On Reset Voltage
Propagation delay
Propagation delay
VOVERDRIVE = VUNDERDRIVE = 50mV
2.5
3.5(1)
4.5(1)
ns
ns
VOVERDRIVE = VUNDERDRIVE = 50mV
TA = –40℃ to +125℃
tPD
tCM_DISPERSION
Common dispersion
Overdrive dispersion
Underdrive dispersion
Rise time
VCM varied from VEE to VCC
Overdrive varied from 10 mV to 125 mV
Underdrive varied from 10mV to 125 mV
10% to 90%
80
600
330
0.75
0.75
ps
ps
ps
ns
ns
tOD_DISPERSION
tUD_DISPERSION
tR
tF
Fall time
90% to 10%
VIN = 100mVP-P
fIN = 100MHz, Jitter BW = 10Hz – 50MHz
,
tJITTER
RMS Jitter
4
325
ps
MHz
ns
VIN = 200 mVPP Sine Wave,
When output high reaches 90% of VCC - VEE
or output low reaches 10% of VCC - VEE
fTOGGLE
Input toggle frequency
Minimum allowed input pulse
width
VOVERDRIVE = VUNDERDRIVE = 50mV
PWOUT = 90% of PWIN
PulseWidth
1.25
Latching/Adjustable Hysteresis
VHYST
VHYST
VHYST
VHYST
VIH_LE
VIL_LE
Input hysteresis voltage
VHYST = Logic High
RHYST = Floating
RHYST = 150 kΩ
0
3
mV
mV
mV
mV
V
Input hysteresis voltage
Input hysteresis voltage
Input hysteresis voltage
LE pin input high level
LE pin input low level
30
60
RHYST = 56 kΩ
TA = –40℃ to +125℃
TA = –40℃ to +125℃
VEE + 1.5
VEE + 0.35
V
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6.5 Electrical Characteristics (continued)
VCC = 2.5, 3.3 and 5 V, VEE = 0 V, VCM = VEE + 300 mV, CL = 5 pF probe capacitance, typical at TA = 25°C (unless otherwise
noted).
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VLE = VCC
TA = –40℃ to +125℃
IIH_LE
IIL_LE
LE pin input leakage current
15
uA
VLE = VEE
,
LE pin input leakage current
40
uA
TA = –40℃ to +125℃
tSETUP
tHOLD
tPL
Latch setup time
Latch hold time
–1.4
7.2
7
ns
ns
ns
Latch to OUT delay
(1) Ensured by characterization
6.6 Timing Diagrams
VOVERDRIVE
VUNDERDRIVE
IN-
VUNDERDRIVE
VOVERDRIVE
IN+
tPLH
tPHL
tR
tF
90%
50%
10%
VOUT
Figure 6-1. General Timing Diagram
V
OD = 125mV
V
OD = 10mV
IN-
IN+
DISPERSION
VOUT
Figure 6-2. Overdrive Dispersion
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6.7 Typical Characteristics
At TA = 25°C, VCC - VEE = 2.5 V to 5 V, VCM = 300 mV, RHYST = 150 kΩ (TLV3603 only), and input overdrive = 50 mV, unless
otherwise noted.
2
1.5
1
3.2
3.1
3
0.5
0
-0.5
-1
2.9
VCC = 2.5V
VCC = 3.3V
VCC = 5V
For 33 units
2.8
-1.5
-40 -25 -10
5
20 35 50 65 80 95 110 125
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (C)
Temperature (C)
Figure 6-4. TLV3601 Hysteresis vs. Temperature
Figure 6-3. TLV3601 Offset vs. Temperature
1.8
1.4
1
0.6
0.2
-0.2
-0.6
-1
For 33 units
-0.2 0.1 0.4 0.7
1
1.3 1.6 1.9 2.2 2.5 2.7
Input Common-Mode Voltage (V)
Figure 6-6. TLV3601 Hysteresis vs. Common-Mode, 2.5 V
Figure 6-5. TLV3601 Offset vs. Common-Mode, 2.5 V
5
4.5
4
1.8
1.4
1
3.5
3
0.6
0.2
-0.2
-0.6
2.5
2
1.5
-40C
1
25C
85C
125C
0.5
For 33 units
2.8 3.3
0
-0.2
-1
-0.2
0.3
0.8
1.3
1.8
2.3
2.8
3.3
0.3
0.8
1.3
1.8
2.3
Input Common Mode Voltage (V)
Input Common-Mode Voltage (V)
Figure 6-8. TLV3601 Hysteresis vs. Common-Mode, 3.3 V
Figure 6-7. TLV3601 Offset vs. Common-Mode, 3.3 V
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6.7 Typical Characteristics (continued)
At TA = 25°C, VCC - VEE = 2.5 V to 5 V, VCM = 300 mV, RHYST = 150 kΩ (TLV3603 only), and input overdrive = 50 mV, unless
otherwise noted.
5
4.5
4
1.8
1.4
1
3.5
3
0.6
0.2
-0.2
-0.6
-1
2.5
2
1.5
1
-40C
25C
85C
0.5
0
125C
For 33 units
-0.2 0.3 0.8 1.3 1.8 2.3 2.8 3.3 3.8 4.3 4.8 5.2
Input Common Mode Voltage (V)
-0.2 0.3 0.8 1.3 1.8 2.3 2.8 3.3 3.8 4.3 4.8 5.2
Input Common-Mode Voltage (V)
Figure 6-10. TLV3601 Hysteresis vs. Common-Mode, 5 V
Figure 6-9. TLV3601 Offset vs. Common-Mode, 5 V
40
38
36
34
32
30
2
1.5
1
0.5
0
28
-0.5
-1
VCC = 2.5V
VCC = 3.3V
VCC = 5V
26
24
For 33 units
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (C)
-1.5
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (C)
Figure 6-12. TLV3603 Hysteresis vs. Temperature
Figure 6-11. TLV3603 Offset vs. Temperature
1.8
1.4
1
40
38
36
34
32
30
28
26
24
-40C
25C
85C
125C
0.6
0.2
-0.2
-0.6
-1
For 33 units
-0.2 0.1 0.4 0.7
1
1.3 1.6 1.9 2.2 2.5 2.7
Input Common-Mode Voltage (V)
-0.2 0.1 0.4 0.7
1
1.3 1.6 1.9 2.2 2.5 2.7
Input Common-Mode Voltage (V)
Figure 6-13. TLV3603 Offset vs. Common-Mode, 2.5 V
Figure 6-14. TLV3603 Hysteresis vs. Common-Mode, 2.5 V
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6.7 Typical Characteristics (continued)
At TA = 25°C, VCC - VEE = 2.5 V to 5 V, VCM = 300 mV, RHYST = 150 kΩ (TLV3603 only), and input overdrive = 50 mV, unless
otherwise noted.
1.8
1.4
1
40
38
36
34
32
30
28
26
24
-40C
25C
85C
125C
0.6
0.2
-0.2
-0.6
-1
For 33 units
2.8 3.3
-0.2
0.3
0.8
1.3
1.8
2.3
-0.2
0.3
0.8
1.3
1.8
2.3
2.8
3.3
Input Common-Mode Voltage (V)
Input Common-Mode Voltage (V)
Figure 6-15. TLV3603 Offset vs. Common-Mode, 3.3 V
Figure 6-16. TLV3603 Hysteresis vs. Common-Mode, 3.3 V
1.8
40
-40C
25C
85C
125C
38
36
34
32
30
28
26
24
1.4
1
0.6
0.2
-0.2
-0.6
For 33 units
-1
-0.2 0.3 0.8 1.3 1.8 2.3 2.8 3.3 3.8 4.3 4.8 5.2
Input Common-Mode Voltage (V)
-0.2 0.3 0.8 1.3 1.8 2.3 2.8 3.3 3.8 4.3 4.8 5.2
Input Common-Mode Voltage (V)
Figure 6-17. TLV3603 Offset vs. Common-Mode, 5 V
Figure 6-18. TLV3603 Hysteresis vs. Common-Mode, 5 V
80
80
-40C
-40C
25C
85C
125C
25C
85C
125C
70
60
50
40
30
20
10
0
70
60
50
40
30
20
10
0
0
200
400
600
800
1,000
0
200
400
600
800
1,000
RHYST (k)
RHYST (k)
Figure 6-19. TLV3603 Hysteresis vs. Resistance, 2.5 V
Figure 6-20. TLV3603 Hysteresis vs. Resistance, 3.3 V
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6.7 Typical Characteristics (continued)
At TA = 25°C, VCC - VEE = 2.5 V to 5 V, VCM = 300 mV, RHYST = 150 kΩ (TLV3603 only), and input overdrive = 50 mV, unless
otherwise noted.
80
-40C
25C
85C
125C
70
60
50
40
30
20
10
0
0
200
400
600
800
1,000
RHYST (k)
Figure 6-21. TLV3603 Hysteresis vs. Resistance, 5 V
Figure 6-22. Bias Current vs. Input Voltage, 2.5 V
8
6
4
2
0
-2
-4
-6
-8
-40C
25C
85C
125C
-0.2
0.3
0.8
1.3
1.8
2.3
2.8
3.3
Input Voltage (V)
Figure 6-24. Bias Current vs. Input Voltage, 5 V
Figure 6-23. Bias Current vs. Input Voltage, 3.3 V
10
1
100m
10m
1m
-40C
25C
85C
125C
100
1m
10m
100m
Output Sourcing Current (A)
Figure 6-26. Output Voltage vs. Output Sinking Current, 2.5 V
Figure 6-25. Output Voltage vs. Output Sourcing Current, 2.5 V
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6.7 Typical Characteristics (continued)
At TA = 25°C, VCC - VEE = 2.5 V to 5 V, VCM = 300 mV, RHYST = 150 kΩ (TLV3603 only), and input overdrive = 50 mV, unless
otherwise noted.
Figure 6-28. Output Voltage vs. Output Sinking Current, 3.3 V
Figure 6-27. Output Voltage vs. Output Sourcing Current, 3.3 V
Figure 6-30. Output Voltage vs. Output Sinking Current, 5 V
Figure 6-29. Output Voltage vs. Output Sourcing Current, 5 V
5.5
5.5
5.3
5.1
5.3
5.1
4.9
4.9
-40C
-40C
4.7
4.7
25C
25C
85C
125C
85C
125C
4.5
4.5
2
2.5
3
3.5
4
4.5
5
5.5
2
2.5
3
3.5
4
4.5
5
5.5
Supply Voltage (V)
Supply Voltage (V)
Figure 6-31. TLV3601 Supply Current vs. Voltage (Output Low)
Figure 6-32. TLV3601 Supply Current vs. Voltage (Output High)
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6.7 Typical Characteristics (continued)
At TA = 25°C, VCC - VEE = 2.5 V to 5 V, VCM = 300 mV, RHYST = 150 kΩ (TLV3603 only), and input overdrive = 50 mV, unless
otherwise noted.
Figure 6-33. TLV3601 Supply Current vs. Temp (Output Low)
Figure 6-34. TLV3601 Supply Current vs. Temp (Output High)
6.2
6.2
6
6
5.8
5.8
5.6
5.6
-40C
-40C
5.4
5.4
25C
25C
85C
125C
85C
125C
5.2
5.2
2
2.5
3
3.5
4
4.5
5
5.5
2
2.5
3
3.5
4
4.5
5
5.5
Supply Voltage (V)
Supply Voltage (V)
Figure 6-35. TLV3603 Supply Current vs. Voltage (Output Low)
Figure 6-36. TLV3603 Supply Current vs. Voltage (Output High)
6.2
6.2
6
5.8
5.6
6
5.8
5.6
5.4
5.4
VCC = 2.5V
VCC = 2.5V
VCC = 3.3V
VCC = 3.3V
VCC = 5V
VCC = 5V
5.2
-40 -25 -10
5.2
-40 -25 -10
5
20 35 50 65 80 95 110 125
5
20 35 50 65 80 95 110 125
Temperature (C)
Temperature (C)
Figure 6-37. TLV3603 Supply Current vs. Temp (Output Low)
Figure 6-38. TLV3603 Supply Current vs. Temp (Output High)
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6.7 Typical Characteristics (continued)
At TA = 25°C, VCC - VEE = 2.5 V to 5 V, VCM = 300 mV, RHYST = 150 kΩ (TLV3603 only), and input overdrive = 50 mV, unless
otherwise noted.
4.5
4
4.5
4
-40C
25C
85C
125C
-40C
25C
85C
125C
3.5
3
3.5
3
2.5
2
2.5
2
1.5
1.5
10
20 30 40 50 70 100
200 300 500 7001000
10
20 30 40 50 70 100
200 300 500 7001000
Input Overdrive (mV)
Input Overdrive (mV)
Figure 6-40. Propagation Delay, High to Low, 2.5 V
4.5
Figure 6-39. Propagation Delay, Low to High, 2.5 V
-40C
25C
85C
125C
4
3.5
3
2.5
2
1.5
10
20 30 40 50 70 100
200 300 500 7001000
Input Overdrive (mV)
Figure 6-41. Propagation Delay, Low to High, 3.3 V
Figure 6-42. Propagation Delay, High to Low, 3.3 V
Figure 6-43. Propagation Delay, Low to High, 5 V
Figure 6-44. Propagation Delay, High to Low, 5 V
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6.7 Typical Characteristics (continued)
At TA = 25°C, VCC - VEE = 2.5 V to 5 V, VCM = 300 mV, RHYST = 150 kΩ (TLV3603 only), and input overdrive = 50 mV, unless
otherwise noted.
10
10
8
8
6
6
4
4
2
2
tPHL
tPLH
tPHL
tPLH
0
0
0
10
20
30
40
50
60
70
80
90 100
0
10
20
30
40
50
60
70
80
90 100
Output Capacitive Load (pF)
Output Capacitive Load (pF)
Figure 6-45. Propagation Delay vs. Load Capacitance, 3.3 V
Figure 6-46. Propagation Delay vs. Load Capacitance, 5 V
Figure 6-47. Minimum Pulse Width vs. Temperature
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7 Detailed Description
7.1 Overview
The TLV3601 and TLV3603 are high-speed comparators with single-ended (push-pull) output stages. The fast
response time of these comparators make them well suited for applications that require narrow pulse width
detection or high toggle frequencies. The TLV3601 is available in a 5-pin SC70, while the TLV3603 is packaged
in a 6-pin SC70 package.
7.2 Functional Block Diagram
TLV3601
TLV3603
VCC
VCC
+
+
LE/HYST
VEE
VEE
7.3 Feature Description
The TLV3601 and TLV3603 are single channel, high speed comparators with a typical propagation delay of 2.5
ns and push-pull outputs. The minimum pulse width detection capability is 1.25 ns and the typical toggle rate is
325 MHz. These comparators are well-suited for distance measurement applications that utilize a time-of-flight
arechitecture as well as systems that suffer from capacitive loading and require data and clock recovery. In
addition to their high speed, the TLV3601 and TLV3603 offer rail-to-rail input stages capable of operating up to
200 mV beyond each power supply rail combined with a maximum 5 mV input offset. The TLV3603 also provides
adjustable hysteresis via an external resistor for noise suppression or a latching mode to hold the output of the
comparators.
7.4 Device Functional Modes
The TLV3601 has a single functional mode and is active when the power supply voltage is greater than 2.4V.
The TLV3603 has two modes of operation. The first is an active mode where the output reflects the condition
at the inputs when an external resistor is connected to ground on the LE/HYS pin. The second is a latch mode
where the output is held at its last active state when the LE/HYS pin is pulled low. The TLV3603 returns to active
mode after a short delay when the pin is pulled high.
7.4.1 Inputs
The TLV3601 and TLV3603 feature input stages capable of operating 200 mV below negative power supply
(ground) and 200 mV beyond the positive supply voltage, allowing for zero cross detection and maximizing input
dynamic range given a certain power supply. The input stages are protected from conditions where the voltage
on either pin exceeds this level by internal ESD protection diodes to VCC and VEE. To avoid damaging the
inputs when exceeding the recommended input voltage range, an external resistor should be used to limit the
current.
7.4.2 Push-Pull (Single-Ended) Output
The TLV3601 and TLV3603 outputs have excellent drive capability and are designed to connect directly
to CMOS logic input devices. Likewise, the comparator output stages can drive capacitive loads. Transient
performance parameters in the Electrical Characteristics Tables and Typical Characteristics section are for a
load of 5pF, corresponding to a standard CMOS load. Device performance for larger capacitive loads can be
found in the typical performance curves titled Propagation Delay vs Capacitive Load. For optimal speed and
performance, output load capacitance should be reduced as much as possible.
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7.4.3 Known Startup Condition
The TLV3601 and TLV3603 have a Power-on-Reset (POR) circuit which provides system designers a known
start-up condition for the output of the comparators. When the power supply (VCC) is ramping up or ramping
down, the POR circuit will be active when VCC is below VPOR. When active, the POR circuit holds the output low
at VEE. When VCC is greater than or equal to VPOR as stated in Section 6.5 , the comparator output reflects the
state of the input pins.
Figure 7-1 shows how the TLV3601/TLV3603 output responds for VCC rising. The input is configured with a
logic high input to highlight the transition from the POR circuit control (logic low output) to a standard comparator
operation where the output reflects the input condition. Note how the output goes high when VCC reaches 2.1V.
Figure 7-1. TLV3601/TLV3603 Output for VCC Rising
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8 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification,
and TI does not warrant its accuracy or completeness. TI’s customers are responsible for
determining suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.
8.1 Application Information
8.1.1 Adjustable Hysteresis
As a result of a comparator’s high open loop gain, there is a small band of input differential voltage where the
output can toggle back and forth between “logic high” and “logic low” states. This can cause design challenges
for inputs with slow rise and fall times or systems with excessive noise. These challenges can be overcome by
adding hysteresis to the comparator.
Since the TLV3601 only has a minimal amount of internal hysteresis, external hysteresis can be applied in the
form of a positive feedback loop that adjusts the trip point of the comparator depending on its current output
state. See the Implementing Hysteresis section for more details.
The TLV3603 on the other hand has a LE/HYS pin that can be used to increase or eliminate the internal
hysteresis of the comparator. In order to increase the internal hysteresis of the TLV3603, connect a single
resistor as shown in the adjusting hysteresis figure between the LE/HYS pin and VEE. A curve of hysteresis
versus resistance is provided below to provide guidance in setting the desired amount of hysteresis. Likewise,
for applications where no hysteresis is desired, the LE/HYS pin can be connected to VCC.
VCC
TLV3603
IN+
+
OUT
IN-
LE/HYS
VEE
Figure 8-1. Adjustable Hysteresis with an External Resistor
80
-40C
25C
85C
125C
70
60
50
40
30
20
10
0
0
200
400
600
800
1,000
RHYST (k)
Figure 8-2. VHYST (mV) vs RHYST (kΩ), VCC = 5 V
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8.1.2 Capacitive Loads
For capacitive loads under 100 pF, the propagation delay has minimum change (see Propagation Delay vs.
Capacitive Load). However, excessive capacitive loading under high switching frequencies may increase supply
current, propagation delay, or induce decreased slew rate.
8.1.3 Latch Functionality
The latch pin for the TLV3603 holds the output state of the device when the voltage at the LE/HYS pin is
a logic low. This is particularly useful when the output state is intended to remain unchanged. An important
consideration of the latch functionality is the latch hold and setup times. Latch hold time is the minimum time
required (after the latch pin is asserted) for properly latching the comparator output. Likewise, latch setup time is
defined as the time that the input must be stable before the latch pin is asserted low. The figure below illustrates
when the input can transition for a valid latch. Note that the typical setup time in the EC table is negative; this is
due to the internal trace delays of the LE/HYS pin relative to the input pin trace delays. A small delay (tPL) in the
output response is shown below when the TLV3603 exits a latched output stage.
tSETUP
tHOLD
LE/HYS
Valid Input Transition
Region
Valid Input
Transition Region
Invalid Input
Transition Region
IN
Figure 8-3. Input Change Properly Latched
LE/HYS
IN
tPL
OUT
Figure 8-4. Latch Disable with Input Change
8.2 Typical Application
8.2.1 Implementing Hysteresis
A comparator may produce “chatter” (multiple transitions) at the output when there are noise or signal variations
around the reference threshold; this causes the output to change states in rapid random successions as the
comparator input goes above and below the threshold of the reference. This usually occurs when the input signal
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is moving very slowly across the switching threshold of the comparator. This problem can be prevented by using
the internal hysteresis feature of the comparator or by the addition of external hysteresis.
The TLV3603 has a LE/HYS pin that allows for variable internal hysteresis depending on the resistor value
connected between the pin and VEE, where increasing the resistance decreases the hysteresis to a minimum
level.
V
CC
5 V
TLV3603
V
IN
+
V
O
V
O
V
V
L
V
REF 2.5 V
H
0 V
2.485 V
2.515 V
LE/HYS
V
R
IN
1
150 kΩ
V
EE
Figure 8-5. Adjustable Hysteresis with a 150kΩ Resistor using TLV3603
Since the TLV3601 only has a minimal amount of internal hysteresis, external hysteresis can be added in the
form of a positive feedback loop. A non-inverting comparator with hysteresis requires a two-resistor network and
a voltage reference (VREF) at the inverting input, as shown in Figure 8-6.
5 V
V
–
+
REF 2.5 V
V
V
O
A
V
O
V
IN
V
V
L
H
R
60
1
0 V
2.485 V
2.515 V
R
V
IN
2
10 k
Figure 8-6. Non-Inverting Configuration for Hysteresis using TLV3601
8.2.1.1 Design Requirements
For this design, follow these design requirements.
Table 8-1. Design Parameters
PARAMETER
VALUE
Supply Voltage (VCC
)
5 V
VREF
VHYS
2.5 V
30 mV
2.485 V
2.515 V
Lower Threshold (VL)
Upper Threshold (VH)
8.2.1.2 Detailed Design Procedure
For the TLV3603, the hysteresis vs. resistance curve (Figure 8-2) can be used as a guidance to set the desired
amount of hysteresis. Figure 8-2 shows that for a 30-mV hysteresis, a 150 kΩ resistor must be placed from the
LE/HYS pin to VEE.
For the TLV3601, the following procedure can be used to add external hysteresis for a non-inverting
configuration. Note that VHYST << VREF, so VHYST can be ignored and is not included in the following equations
for simpler calculation.
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The equivalent resistor networks when the output is high and low are shown in Figure 8-7.
V
Low
V
High
CC
O
O
V
V
H
R
R
2
1
2
V
= V
V = V
A REF
A
REF
R
R
1
V
L
Figure 8-7. Equivalent Resistor Networks for Non-Inverting Configuration with Hysteresis
When VIN is less than VREF, the output is low. For the output to switch from low to high, VIN must rise above the
VH threshold. Use Equation 1 to calculate VH.
VH = (R1 x VREF/R2) + VREF
(1)
When VIN is greater than VREF, the output is high. For the comparator to switch back to a low state, VIN must
drop below the VL threshold. Use Equation 2 to calculate VL.
VL = [VREF (R1 + R2) - VCC x R1] / R2
(2)
The hysteresis of this circuit is the difference between VH and VL, as shown in Equation 3.
ΔVIN = VHYS = (VCC x R1/R2)
(3)
Select a value for R2. Plug in given values for VCC, VREF, VH, and VL . For the given example, R2 = 10 kΩ, and
R1 is solved as 60 Ω.
For more information, please see Application Notes SNOA997 "Inverting Comparator with Hysteresis Circuit",
SBOA313 "Non-Inverting Comparator With Hysteresis Circuit", SBOA219 "Comparator with and without
hysteresis circuit".
8.2.1.3 Application Curve
V
(V)
IN
Figure 8-8. Hysteresis Transfer Curve using TLV3601/TLV3603
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8.2.2 Optical Receiver
The TLV3601 and TLV3603 can be used in conjunction with a high speed amplifier such as the OPA858 to
create an optical receiver as shown in the figure below. The photodiode is connected to a bias voltage and is
being driven with a pulsed laser. The OPA858 takes the current conducting through the diode and translates
it into a voltage for a high speed comparator to detect. The TLV3601 and TLV3603 will then output the proper
output signal according to the threshold set (VREF).
OPA858
TLV3603
+
+
TDC
LE/HYST
VBIAS
VREF
Figure 8-9. Optical Receiver
8.2.3 Over-Current Latch Condition
When it is important for a system to detect a brief over-current condition, it is advisable to utilize the latching
feature of the TLV3603. By latching the comparator output, the MCU is reassured not to miss the over-current
occurrence. The circuit below shows one way to implement the latching function.
When an over-current condition is detected by the TLV3603, the output will go high. The occurrence of the
output going high coupled with a logic high from the RESET signal from the MCU will create a logic low signal at
the output of the 2-channel NAND gate. This will cause the output of the TLV3603 to be held in a logic high state
(latched), thus allowing the MCU to detect the fault condition regardless of how narrow the over-current condition
persists. The addition of the NAND gate also provides a means of clearing the latch state of the comparator once
the MCU is done processing the event. This is accomplished by the MCU passing a logic low state to the NAND
input causing the LE/HYS pin of the comparator to be returned to a logic high state. The TLV3603 latched status
is cleared and the TLV3603 output can continue to track the status of the input pins.
System
IS
TLV3603
+
ALERT
+
MCU
VREF
LE/HYS
RS
RESET
Figure 8-10. Over-Current Latched Output Circuit
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8.2.4 External Trigger Function for Oscilloscopes
Below is a typical configuration for creating an external trigger on oscilliscopes. The user adjusts the trigger level
by programming a DAC that the TLV3601 and TLV3603 can use as a reference. The input from an oscilloscope
channel is then compared to the trigger reference voltage, and the comparator sends a signal to a downstream
FPGA to begin a capture.
VCC = 5V
+
Trigger Input
+
–
FPGA
TLV3601
-
VIN
DAC
Figure 8-11. External Trigger Function
9 Power Supply Recommendations
The TLV3601 and TLV3603 are specified for operation from 2.4 V to 5.5 V. While most applications will require
single supply operation where VEE is connected to the ground plane and VCC is connected to the intended
power supply level, the comparators can also be operated with split supplies. One caution when using split
supplies is that the output logic levels are determined by the VCC and VEE levels. For example, if split supplies
of +/- 2.5V are used, the output levels will be 2.5V and -2.5V accordingly. In addition, the logic level of the
LE/HYS pin will also be referenced to VEE. This means that the external hysteresis resistor on the TLV3603
needs to be connected between the LE/HYS pin and VEE (not to ground) for proper operation.
Regardless of single supply or split supply operation, proper decoupling capacitors are required. It is
recommended to use a scheme of multiple, low-ESR ceramic capacitors from the supply pins to the ground
plane for optimum performance. A good combination would be 100 pF, 10 nF, and 1 uF with the lowest value
capacitor closest to the comparator.
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10 Layout
10.1 Layout Guidelines
Comparators are very sensitive to input noise. For best results, adhere to the following layout guidelines.
1. Use a printed-circuit-board (PCB) with a good, unbroken, low-inductance ground plane. Proper grounding
(use of a ground plane) helps maintain specified device performance.
Likewise, high performance board materials such as Rogers or high speed FR4 is also recommended.
2. Place a decoupling capacitor (100-pF ceramic, surface-mount capacitor) between VCC and
VEE as close to the device as possible. Using multiple bypass capacitors in different decade ranges such as
100-pF, 100-nF, and 1-µF provides the best noise reduction across frequency ranges.
3. On the inputs and the output, keep lead lengths as short and minimize capacitive coupling to the traces by
having a keepout area around the traces that is 3x the width of the traces. It is also recommended to keep
inputs away from the output.
4. Solder the device directly to the PCB rather than using a socket.
10.2 Layout Example
Figure 10-1. TLV3603 Layout Example
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11 Device and Documentation Support
11.1 Device Support
11.1.1 Development Support
LIDAR Pulsed Time of Flight Reference Design
11.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Subscribe to updates to register and receive a weekly digest of any product information that has changed. For
change details, review the revision history included in any revised document.
11.3 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
11.4 Trademarks
TI E2E™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
11.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
11.6 Glossary
TI Glossary
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TLV3601DCKR
TLV3601DCKT
TLV3603DCKR
TLV3603DCKT
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SC70
SC70
SC70
SC70
DCK
DCK
DCK
DCK
5
5
6
6
3000 RoHS & Green
250 RoHS & Green
3000 RoHS & Green
250 RoHS & Green
NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 125
-40 to 125
-40 to 125
-40 to 125
1JF
1JF
1JI
NIPDAU
NIPDAU
NIPDAU
1JI
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
Addendum-Page 1
PACKAGE OPTION ADDENDUM
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3-Dec-2021
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TLV3601, TLV3603 :
Automotive : TLV3601-Q1, TLV3603-Q1
•
NOTE: Qualified Version Definitions:
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
•
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
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TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TLV3601DCKR
TLV3601DCKT
TLV3603DCKR
TLV3603DCKT
SC70
SC70
SC70
SC70
DCK
DCK
DCK
DCK
5
5
6
6
3000
250
180.0
180.0
180.0
180.0
8.4
8.4
8.4
8.4
2.47
2.47
2.47
2.47
2.3
2.3
2.3
2.3
1.25
1.25
1.25
1.25
4.0
4.0
4.0
4.0
8.0
8.0
8.0
8.0
Q3
Q3
Q3
Q3
3000
250
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
4-Dec-2021
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TLV3601DCKR
TLV3601DCKT
TLV3603DCKR
TLV3603DCKT
SC70
SC70
SC70
SC70
DCK
DCK
DCK
DCK
5
5
6
6
3000
250
183.0
183.0
183.0
183.0
183.0
183.0
183.0
183.0
20.0
20.0
20.0
20.0
3000
250
Pack Materials-Page 2
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