TLV2254QDREP_技术文档

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SGLS217B − NOVEMBER 2003 − REVISED JUNE 2006

D

Controlled Baseline

− One Assembly/Test Site, One Fabrication

Site

D Output Swing Includes Both Supply Rails

D Low Noise . . . 19 nV/√Hz Typ at f = 1 kHz

D Low Input Bias Current . . . 1 pA Typ

D

Extended Temperature Performance of

−40°C to 125°C

Enhanced Diminishing Manufacturing

Sources (DMS) Support

D Fully Specified for Both Single-Supply and

Split-Supply Operation

D Very Low Power . . . 34 µA Per Channel

(Typ)

Enhanced Product-Change Notification

D Common-Mode Input Voltage Range

†

Qualification Pedigree

Includes Negative Rail

ESD Protection Exceeds 2000 V Per

D Low Input Offset Voltage:

MIL-STD-883, Method 3015; Exceeds 150 V

(TLV2252/52A) and 100 V (TLV2254/54A)

Using Machine Model (C = 200 pF, R = 0)

850 µV Max at T = 25°C

A

D Wide Supply Voltage Range:

2.7 V to 16 V

†

Component qualification in accordance with JEDEC and industry

standards to ensure reliable operation over an extended

temperature range. This includes, but is not limited to, Highly

Accelerated Stress Test (HAST) or biased 85/85, temperature

cycle, autoclave or unbiased HAST, electromigration, bond

intermetallic life, and mold compound life. Such qualification

testing should not be viewed as justifying use of this component

beyond specified performance and environmental limits.

D Macromodel Included

HIGH-LEVEL OUTPUT VOLTAGE

description/ordering information

vs

HIGH-LEVEL OUTPUT CURRENT

The TLV2252 and TLV2254 are dual and

quadruple low-voltage operational amplifiers from

Texas Instruments. Both devices exhibit rail-to-rail

output performance for increased dynamic range

in single- or split-supply applications. The

TLV225x family consumes only 34 µA of supply

current per channel. This micropower operation

makes them good choices for battery-powered

applications. This family is fully characterized at

3 V and 5 V and is optimized for low-voltage

applications. The noise performance has been

dramatically improved over previous generations

of CMOS amplifiers. The TLV225x has a noise

level of 19 nV/√Hz at 1kHz, four times lower than

competitive micropower solutions.

3

2.5

2

V

DD

= 3 V

T

A

= −40°C

T

A

= 25°C

1.5

1

T

A

= 85°C

T

A

= 125°C

0.5

0

The TLV225x, exhibiting high input impedance

and low noise, are excellent for small-signal

conditioning for high-impedance sources, such as

piezoelectric transducers. Because of the micro-

power dissipation levels combined with 3-V

operation, these devices work well in hand-held

0

200

400

600

800

|I | − High-Level Output Current − µA

OH

Figure 1

monitoring and remote-sensing applications. In addition, the rail-to-rail output feature with single or split supplies

makes this family a great choice when interfacing with analog-to-digital converters (ADCs). For precision

applications, the TLV225xA family is available and has a maximum input offset voltage of 850 µV.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

Advanced LinCMOS is a trademark of Texas Instruments.

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Copyright  2003 − 2006, Texas Instruments Incorporated

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1

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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ꢖꢊ ꢗ ꢁꢆꢀꢔ ꢆꢖꢊꢗ ꢁ

SGLS217B − NOVEMBER 2003 − REVISED JUNE 2006

description/ordering information (continued)

The TLV2252/2254 also make great upgrades to the TLV2322/2424 in standard designs. They offer increased

output dynamic range, lower noise voltage, and lower input offset voltage. This enhanced feature set allows

them to be used in a wider range of applications. For applications that require higher output drive and wider input

voltage range, see the TLV2432 and TLV2442 devices. If your design requires single amplifiers, please see the

TLV2211/21/31 family. These devices are single rail-to-rail operational amplifiers in the SOT-23 package. Small

size and low power consumption make them ideal for high density, battery-powered equipment.

ORDERING INFORMATION

V

max

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

IO

†

PACKAGE

T

A

AT 25°C

SOIC (D)

Tape and reel

TLV2252AQDREP

TLV2252AQPWREP

TLV2252QDREP

2252AE

850 µV

‡

TSSOP (PW)

SOIC (D)

2252EP

1500 µV

850 µV

‡

TSSOP (PW)

SOIC (D)

TLV2252QPWREP

−40°C to 125°C

TLV2254AQDREP

TLV2254AEP

TLV2254EP

‡

TSSOP (PW)

SOIC (D)

TLV2254AQPWREP

TLV2254QDREP

1500 µV

‡

TLV2254QPWREP

TSSOP (PW)

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available

at www.ti.com/sc/package.

Product preview

TLV2252, TLV2252A

D OR PW PACKAGE

(TOP VIEW)

TLV2254, TLV2254A

D PACKAGE

TLV2254, TLV2254A

PW PACKAGE

(TOP VIEW)

1

1OUT

1IN−

1IN+

/GND

V

1OUT

1IN −

1IN +

4OUT

4IN −

4IN +

1

2

3

4

8

7

6

5

14

1

2

3

4

5

6

7

14

13

12

11

10

9

DD+

1OUT

1IN−

1IN+

4OUT

4IN−

4IN+

2OUT

2IN−

2IN+

V

/GND

DD+

DD −

V

DD−

V

/GND

DD+

DD−

2IN +

2IN −

2OUT

3IN +

3IN −

3OUT

2IN+

2IN−

3IN+

3IN−

3OUT

7

8

2OUT

2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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ꢖꢊꢗ ꢁꢆ ꢀꢔ ꢆꢖ ꢊ ꢗꢁ

SGLS217B − NOVEMBER 2003 − REVISED JUNE 2006

•

3

POST OFFICE BOX 655303 DALLAS, TEXAS 75265

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SGLS217B − NOVEMBER 2003 − REVISED JUNE 2006

†

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage, V

(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 V

DD

Differential input voltage, V (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input voltage range, V (any input, see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

V

ID

DD

− 0.3 V to V

I

DD−

DD+

Input current, I (each input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 mA

I

Output current, I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA

O

Total current into V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA

DD+

DD−

Total current out of V

Duration of short-circuit current (at or below 25°C) (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Unlimited

Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table

Operating free-air temperature range, T

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 125°C

A

Storage temperature range, T

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C

stg

Lead temperature 1,6 mm (1/16 in) from case for 10 s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. All voltage values, except differential voltages, are with respect to V

.

DD −

2. Differential voltages are at the noninverting input with respect to the inverting input. Excessive current flows when input is brought

below V − 0.3 V.

DD−

3. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum

dissipation rating is not exceeded.

DISSIPATION RATING TABLE

T

≤ 25°C

DERATING FACTOR

T

= 85°C

T = 125°C

A

POWER RATING

A

PACKAGE

POWER RATING

ABOVE T = 25°C

POWER RATING

A

D−8

D−14

725 mW

5.8 mW/°C

7.6 mW/°C

4.2 mW/°C

5.6 mW/°C

377 mW

145 mW

950 mW

494 mW

190 mW

PW−8

PW−14

525 mW

273 mW

105 mW

700 mW

364 mW

140 mW

recommended operating conditions

MIN

MAX

UNIT

V

Supply voltage, V

ꢀ ꢁ ꢂꢂ ꢃ ꢄꢅ ꢂ ꢆꢇ

Input voltage range, V

2.7

8

DD

V

−1.3

V

I

DD−

DD+

Common-mode input voltage, V

IC

−1.3

V

DD−

−40

DD+

Operating free-air temperature, T

125

°C

A

NOTE 1: All voltage values, except differential voltages, are with respect to V

DD −

.

4

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ꢖꢊꢗ ꢁꢆ ꢀꢔ ꢆꢖ ꢊ ꢗꢁ

SGLS217B − NOVEMBER 2003 − REVISED JUNE 2006

TLV2252 electrical characteristics at specified free-air temperature, V

noted)

= 3 V (unless otherwise

DD

TLV2252

TLV2252A

UNIT

†

PARAMETER

TEST CONDITIONS

T

A

MIN

TYP MAX

200 1500

1750

MIN

TYP MAX

25°C

200

850

V

=

= 0,

1.5 V,

V

R

= 0,

= 50 Ω

S

DD

O

IC

V

IO

Input offset voltage

µV

Full range

1000

V

=

= 0,

V

R

= 0,

IC

Temperature coefficient

of input offset voltage

25°C

to 85°C

DD

O

α

VIO

0.5

µV/°C

= 50 Ω

S

Input offset voltage

long-term drift

(see Note 4)

V

=

= 0,

1.5 V,

V

R

= 0,

= 50 Ω

DD

O

IC

S

25°C

0.003

0.5

µV/mo

25°C

125°C

25°C

0.5

1

60

1000

60

1000

60

V

=

= 0,

1.5 V,

V

R

= 0,

= 50 Ω

DD

O

IC

I

Input offset current

Input bias current

pA

IO

S

1

V

=

= 0,

V

R

= 0,

= 50 Ω

DD

O

IC

IB

125°C

1000

S

0

to

2

−0.3

to

2.2

0

to

2

−0.3

to

2.2

25°C

Common-mode input

voltage range

V

R

= 50 Ω,

|V | ≤ 5 mV

IO

V

ICR

OH

OL

S

0

to

1.7

0

to

1.7

Full range

I

= −20 µA

= −75 µA

2.98

OH

25°C

2.9

2.8

2.9

2.8

High-level

output voltage

Full range

= −150 µA

25°C

V

IC

= 1.5 V,

I

= 50 µA

10

OL

25°C

100

150

165

300

100

150

165

300

V

IC

= 1.5 V,

= 500 µA

Low-level

output voltage

OL

Full range

25°C

mV

200

250

800

200

250

800

V

IC

I

= 1 ꢈA

OL

Full range

25°C

100

10

100

10

‡

R

= 100 kΩ

Large-signal differential

voltage amplification

V

IC

V

O

= 1.5 V,

= 1 V to 2 V

L

Full range

25°C

A

VD

V/mV

‡

= 1 MΩ

Differential

input resistance

12

10

12

10

Ω

r

25°C

i(d)

i(c)

Common-mode

input resistance

12

10

12

10

Common-mode

input capacitance

c

z

f = 10 kHz

f = 25 kHz,

8

pF

Ω

i(c)

o

Closed-loop

output impedance

A

= 10

220

75

220

77

V

25°C

Full range

25°C

65

60

80

65

60

80

Common-mode

rejection ratio

V

O

= 1.5 V,

V

R

= 0 to 1.7 V,

= 50 Ω

IC

S

CMRR

dB

µA

95

68

100

68

Supply-voltage rejection

ratio (∆V

DD

V

= 2.7 V to 8 V,

DD

k

SVR

/∆V

IO

)

V

IC

= V

/2,

No load

Full range

25°C

DD

125

150

125

150

I

Supply current

V

O

= 1.5 V,

No load

DD

Full range

†

‡

Full range is −40°C to 125°C.

Referenced to 1.5 V

NOTE 4: Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at T = 150°C extrapolated

A

to T = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.

A

5

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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ꢖꢊ ꢗ ꢁꢆꢀꢔ ꢆꢖꢊꢗ ꢁ

SGLS217B − NOVEMBER 2003 − REVISED JUNE 2006

TLV2252 operating characteristics at specified free-air temperature, V

= 3 V

DD

TLV2252

TLV2252A

†

PARAMETER

TEST CONDITIONS

UNIT

T

A

MIN

TYP MAX

MIN

TYP MAX

25°C

0.07

0.1

0.07

0.1

‡

V

C

= 0.8 V to 1.4 V,

‡

= 100 pF

R

= 100 kΩ ,

L

O

L

SR

Slew rate at unity gain

V/µs

Full

range

0.05

f = 10 Hz

f = 1 kHz

35

19

35

19

Equivalent input noise

voltage

nV/√Hz

µV

V

25°C

n

Peak-to-peak

equivalent input

noise voltage

f = 0.1 Hz to 1 Hz

f = 0.1 Hz to 10 Hz

0.6

1.1

0.6

1.1

V

I

N(PP)

Equivalent input noise

current

25°C

0.6

fA/√Hz

n

‡

Gain-bandwidth

product

f = 1 kHz,

‡

R

= 50 kΩ ,

L

0.187

MHz

C

= 100 pF

L

Maximum

output-swing

bandwidth

V

R

= 1 V,

= 50 kΩ ,

A

C

= 1,

= 100 pF

O(PP)

L

V

L

B

25°C

60

kHz

dB

OM

‡

Phase margin

at unity gain

‡

φ

m

25°C

63°

R

= 50 kΩ ,

C

= 100 pF

L

‡

Gain margin

15

= 50 kΩ ,

= 100 pF

†

‡

Full range is −40°C to 125°C.

Referenced to 1.5 V

6

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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ꢇ

ꢈ

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ꢊ

ꢋ

ꢌ

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ꢁ

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ꢂꢇ ꢖꢘ ꢁ ꢔ ꢙꢆꢈꢔ ꢙ ꢇꢖ ꢔ ꢈꢇꢖ ꢊꢀ ꢗꢔ ꢚꢊꢁ ꢊꢓ ꢈ ꢁꢗ ꢛꢗ ꢇꢖ ꢕ

ꢒ

ꢓ

ꢔ

ꢕ 

ꢖꢊꢗ ꢁꢆ ꢀꢔ ꢆꢖ ꢊ ꢗꢁ

SGLS217B − NOVEMBER 2003 − REVISED JUNE 2006

TLV2252 electrical characteristics at specified free-air temperature, V

noted)

= 5 V (unless otherwise

DD

TLV2252

TLV2252A

UNIT

†

PARAMETER

TEST CONDITIONS

T

A

MIN

TYP MAX

200 1500

1750

MIN

TYP MAX

25°C

200

850

V

=

2.5 V,

V

R

= 0,

= 50 Ω

S

DD

O

IC

V

IO

Input offset voltage

µV

= 0,

Full range

1000

V

=

= 0,

2.5 V,

Temperature coefficient

of input offset voltage

25°C

to 85°C

V

R

= 0,

= 50 Ω

DD

O

IC

S

α

0.5

µV/°C

VIO

V

=

= 0,

Input offset voltage long-

term drift (see Note 4)

V

R

= 0,

= 50 Ω

DD

O

IC

25°C

0.003

0.5

µV/mo

S

25°C

125°C

25°C

0.5

1

60

1000

60

1000

60

V

=

= 0,

2.5 V,

V

R

= 0,

= 50 Ω

DD

O

IC

I

Input offset current

Input bias current

pA

IO

S

1

V

=

= 0,

V

R

= 0,

= 50 Ω

DD

O

IC

IB

S

125°C

1000

0

to

4

−0.3

to

4.2

0

to

4

−0.3

to

4.2

25°C

Common-mode

input voltage range

V

|V | ≤ 5 mV,

IO

R

= 50 Ω

V

ICR

OH

OL

S

0

to

3.5

0

to

3.5

Full range

I

= −20 µA

= −75 µA

4.98

4.94

4.98

4.94

OH

25°C

4.9

4.8

4.9

4.8

High-level

output voltage

Full range

= −150 µA

25°C

4.88

0.01

0.09

4.88

0.01

0.09

V

IC

= 2.5 V,

I

= 50 µA

OL

25°C

0.15

0.3

0.15

0.3

V

= 2.5 V,

= 500 µA

Low-level

output voltage

IC

OL

Full range

25°C

V

0.2

350

0.2

350

V

IC

I

= 1 ꢈA

OL

Full range

25°C

0.3

100

10

100

10

‡

R

= 100 kΩ

Large-signal differential

voltage amplification

V

IC

V

O

= 2.5 V,

= 1 V to 4 V

L

Full range

25°C

A

VD

V/mV

‡

1700

= 1 MΩ

Differential

input resistance

12

10

12

10

Ω

r

25°C

i(d)

i(c)

Common-mode

input resistance

12

10

12

10

Common-mode

input capacitance

c

z

f = 10 kHz

f = 25 kHz,

8

pF

Ω

i(c)

o

Closed-loop

output impedance

A

= 10

200

83

200

83

V

25°C

Full range

25°C

70

80

70

80

Common-mode

rejection ratio

V

IC

V

O

= 0 to 2.7 V,

= 2.5 V,

CMRR

dB

R

= 50 Ω

S

95

Supply-voltage rejection

ratio (∆V

DD

V

= 4.4 V to 8 V,

DD

k

SVR

/∆V

IO

)

V

IC

= V

/2,

No load

Full range

DD

†

‡

Full range is −40°C to 125°C.

Referenced to 2.5 V

NOTE 4: Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at T = 150°C extrapolated

A

to T = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.

A

7

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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ꢊ

ꢆ

ꢇ

ꢈ

ꢜ

ꢊ

ꢋ

ꢌ

ꢍ

ꢎ

ꢏ

ꢐ

ꢋ

ꢁ

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ꢂ ꢇꢖꢘ ꢁ ꢔꢙꢆꢈ ꢔꢙꢇ ꢖ ꢔ ꢈꢇ ꢖꢊꢀꢗ ꢔ ꢚꢊ ꢁ ꢊꢓꢈ ꢁꢗ ꢛ ꢗꢇꢖꢕ

ꢒ

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ꢖ

ꢊ

ꢗ

ꢁ

ꢆ

ꢀ

ꢔ

ꢆ

ꢖ

ꢊ

ꢗ

ꢁ

SGLS217B − NOVEMBER 2003 − REVISED JUNE 2006

TLV2252 electrical characteristics at specified free-air temperature, V

noted) (continued)

= 5 V (unless otherwise

DD

TLV2252

TLV2252A

UNIT

†

PARAMETER

TEST CONDITIONS

T

A

MIN

TYP MAX

MIN

TYP MAX

25°C

70

125

150

70

125

150

I

Supply current

V

O

= 2.5 V,

No load

µA

DD

Full range

†

Full range is −40°C to 125°C for Q level part.

TLV2252 operating characteristics at specified free-air temperature, V

= 5 V

DD

TLV2252

TLV2252A

†

PARAMETER

TEST CONDITIONS

UNIT

V/µs

T

A

MIN

TYP MAX MIN

TYP MAX

25°C

0.07

0.12

0.07

0.05

0.12

V

R

= 1.25 V to 2.75 V,

O

L

SR

Slew rate at unity gain

Full

range

‡

= 100 kΩ , C = 100 pF

L

0.05

f = 10 Hz

f = 1 kHz

25°C

36

19

36

19

Equivalent input

noise voltage

nV/√Hz

V

n

Peak-to-peak

equivalent input

noise voltage

f = 0.1 Hz to 1 Hz

f = 0.1 Hz to 10 Hz

25°C

0.7

1.1

0.7

1.1

V

I

µV

N(PP)

Equivalent input

noise current

25°C

0.6

fA/√Hz

n

V

= 0.5 V to 2.5 V,

A

= 1

0.2%

1%

0.2%

1%

O

V

Total harmonic

distortion plus noise

f = 20 kHz,

THD+N

A

V

= 10

‡

R

= 50 kΩ

L

‡

f = 50 kHz,

R

= 50 kΩ ,

L

Gain-bandwidth product

25°C

0.2

30

0.2

30

MHz

kHz

‡

C

= 100 pF

L

Maximum output-swing

bandwidth

V

= 2 V,

= 50 kΩ ,

A

= 1,

O(PP)

V

B

OM

‡

R

C

= 100 pF

L

Phase margin

at unity gain

‡

φ

m

25°C

63°

= 50 kΩ ,

C

‡

Gain margin

15

dB

= 50 kΩ ,

†

‡

Full range is −40°C to 125°C.

Referenced to 2.5 V

8

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁꢂꢃ ꢃ ꢄ ꢅ ꢆꢇꢈꢉ ꢀ ꢁꢂꢃ ꢃꢄ ꢅꢊ ꢆꢇ ꢈ

ꢜ

ꢊ

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ꢂꢇ ꢖꢘ ꢁ ꢔ ꢙꢆꢈꢔ ꢙ ꢇꢖ ꢔ ꢈꢇꢖ ꢊꢀ ꢗꢔ ꢚꢊꢁ ꢊꢓ ꢈ ꢁꢗ ꢛꢗ ꢇꢖ ꢕ

ꢒ

ꢓ

ꢔ

ꢕ 

ꢖꢊꢗ ꢁꢆ ꢀꢔ ꢆꢖ ꢊ ꢗꢁ

SGLS217B − NOVEMBER 2003 − REVISED JUNE 2006

TLV2254 electrical characteristics at specified free-air temperature, V

noted)

= 3 V (unless otherwise

DD

TLV2254

TLV2254A

UNIT

†

PARAMETER

TEST CONDITIONS

T

A

MIN

TYP MAX

200 1500

1750

MIN

TYP MAX

25°C

200

850

V

=

= 0,

1.5 V,

V

R

= 0,

= 50 Ω

DD

O

IC

S

V

IO

Input offset voltage

µV

Full range

1000

Temperature coefficient

of input offset voltage

V

=

= 0,

V

R

= 0,

= 50 Ω

25°C

to 125°C

DD

O

IC

α

VIO

0.5

µV/°C

S

Input offset voltage

long-term drift

(see Note 4)

V

=

= 0,

1.5 V,

V

R

= 0,

= 50 Ω

DD

O

IC

S

25°C

0.003

0.5

µV/mo

25°C

125°C

25°C

0.5

1

60

1000

60

1000

60

V

=

= 0,

1.5 V,

V

R

= 0,

= 50 Ω

DD

O

IC

I

Input offset current

Input bias current

pA

IO

S

1

V

=

= 0,

V

R

= 0,

= 50 Ω

DD

O

IC

IB

125°C

1000

S

0

to

2

−0.3

to

2.2

0

to

2

−0.3

to

2.2

25°C

Common-mode

input voltage range

V

R

= 50 Ω,

|V | ≤ 5 mV

IO

V

ICR

S

0

to

1.7

0

to

1.7

Full range

I

= −20 µA

= −75 µA

2.98

OH

25°C

2.9

2.8

2.9

2.8

High-level

output voltage

V

OH

Full range

= −150 µA

25°C

V

IC

= 1.5 V,

I

= 50 µA

10

OL

25°C

100

150

165

300

100

150

165

300

V

IC

= 1.5 V,

= 500 µA

Low-level

output voltage

OL

Full range

25°C

mV

OL

200

225

800

200

225

800

V

IC

I

= 1 ꢈA

OL

Full range

25°C

100

10

100

10

‡

R

= 100 kΩ

Large-signal differential

voltage amplification

V

IC

V

O

= 1.5 V,

= 1 V to 2 V

L

Full range

25°C

A

VD

V/mV

‡

= 1 MΩ

Differential input

resistance

12

10

12

10

r

25°C

Ω

i(d)

i(c)

Common-mode

input resistance

12

10

12

10

Common-mode

input capacitance

c

z

f = 10 kHz

f = 25 kHz,

8

pF

Ω

i(c)

o

Closed-loop

output impedance

A

= 10

220

75

220

77

V

25°C

65

60

65

60

Common-mode

rejection ratio

V

R

= 0 to 1.7 V,

= 50 Ω

V

O

= 1.5 V,

IC

S

CMRR

dB

Full range

Supply-voltage

rejection ratio

25°C

80

95

80

100

V

= 2.7 V to 8 V,

= V

DD

IC

k

SVR

/2,

No load

Full range

(∆V

DD

/∆V )

IO

†

‡

Full range is −40°C to 125°C.

Referenced to 1.5 V

NOTE 4: Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at T = 150°C extrapolated

A

to T = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.

A

9

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁꢂ ꢃ ꢃꢄ ꢅ ꢆꢇꢈꢉ ꢀ ꢁꢂ ꢃ ꢃꢄ ꢅ ꢊꢆꢇ ꢈ

ꢜ

ꢊ

ꢋ

ꢌ

ꢍ

ꢎ

ꢏ

ꢐ

ꢋ

ꢁ

ꢑ

ꢎ

ꢂ ꢇꢖꢘ ꢁ ꢔꢙꢆꢈ ꢔꢙꢇ ꢖ ꢔ ꢈꢇ ꢖꢊꢀꢗ ꢔ ꢚꢊ ꢁ ꢊꢓꢈ ꢁꢗ ꢛ ꢗꢇꢖꢕ

ꢒ

ꢓ

ꢔ

ꢕ 

ꢖ

ꢊ

ꢗ

ꢁ

ꢆ

ꢀ

ꢔ

ꢆ

ꢖ

ꢊ

ꢗ

ꢁ

SGLS217B − NOVEMBER 2003 − REVISED JUNE 2006

TLV2254 electrical characteristics at specified free-air temperature, V

noted) (continued)

= 3 V (unless otherwise

DD

TLV2254

TLV2254A

UNIT

†

PARAMETER

TEST CONDITIONS

T

A

MIN

TYP MAX

MIN

TYP MAX

25°C

135

250

300

135

250

300

Supply current

(four amplifiers)

I

V

O

= 1.5 V,

No load

µA

DD

Full range

†

Full range is −40°C to 125°C for Q level part.

TLV2254 operating characteristics at specified free-air temperature, V

= 3 V

DD

TLV2254

TLV2254A

TYP

†

PARAMETER

TEST CONDITIONS

UNIT

V/µs

T

A

MIN

TYP

MAX

MIN

MAX

V

R

C

= 0.5 V to 1.7 V,

0.07

0.1

0.07

0.1

O

L

25°C

‡

= 100 kΩ ,

SR

Slew rate at unity gain

Equivalent input noise voltage

‡

Full range

0.05

= 100 pF

f = 10 Hz

35

19

35

19

nV/√Hz

V

n

25°C

f = 1 kHz

f = 0.1 Hz to 1 Hz

f = 0.1 Hz to 10 Hz

0.6

1.1

0.6

1.1

0.6

Peak-to-peak equivalent

input noise voltage

V

I

25°C

µV

N(PP)

Equivalent input noise current

fA/√Hz

n

f = 1 kHz,

‡

R

C

= 50 kΩ ,

Gain-bandwidth product

25°C

0.187

60

0.187

60

MHz

L

‡

= 100 pF

V

A

R

= 1 V,

O(PP)

= 1,

Maximum output-swing

bandwidth

V

B

OM

kHz

‡

= 50 kΩ ,

L

‡

C

= 100 pF

‡

R

C

= 50 kΩ ,

L

φ

m

Phase margin at unity gain

Gain margin

25°C

63°

‡

= 100 pF

‡

R

C

= 50 kΩ ,

L

15

dB

‡

= 100 pF

†

‡

Full range is −40°C to 125°C for Q level part.

Referenced to 1.5 V

10

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ

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ꢈ

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ꢀ

ꢁ

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ꢄ

ꢅ

ꢊ

ꢆ

ꢇ

ꢈ

ꢜ

ꢊ

ꢋ

ꢌ

ꢍ

ꢎ

ꢏ

ꢐ

ꢋ

ꢁ

ꢑ

ꢎ

ꢂꢇ ꢖꢘ ꢁ ꢔ ꢙꢆꢈꢔ ꢙ ꢇꢖ ꢔ ꢈꢇꢖ ꢊꢀ ꢗꢔ ꢚꢊꢁ ꢊꢓ ꢈ ꢁꢗ ꢛꢗ ꢇꢖ ꢕ

ꢒ

ꢓ

ꢔ

ꢕ 

ꢖꢊꢗ ꢁꢆ ꢀꢔ ꢆꢖ ꢊ ꢗꢁ

SGLS217B − NOVEMBER 2003 − REVISED JUNE 2006

TLV2254 electrical characteristics at specified free-air temperature, V

noted)

= 5 V (unless otherwise

DD

TLV2254

TLV2254A

UNIT

†

PARAMETER

TEST CONDITIONS

T

A

MIN

TYP MAX

200 1500

1750

MIN

TYP MAX

25°C

200

850

V

=

= 0,

2.5 V,

V

R

= 0,

= 50 Ω

DD

O

IC

S

V

IO

Input offset voltage

µV

Full range

1000

Temperature coefficient

of input offset voltage

V

=

= 0,

V

R

= 0,

= 50 Ω

25°C

to 125°C

DD

O

IC

α

VIO

0.5

µV/°C

S

Input offset voltage

long-term drift

(see Note 4)

V

=

= 0,

2.5 V,

V

R

= 0,

= 50 Ω

DD

O

IC

S

25°C

0.003

0.5

µV/mo

25°C

125°C

25°C

0.5

1

60

1000

60

1000

60

V

=

= 0,

2.5 V,

V

R

= 0,

= 50 Ω

DD

O

IC

I

Input offset current

Input bias current

pA

IO

S

1

V

=

= 0,

V

R

= 0,

= 50 Ω

DD

O

IC

IB

125°C

1000

S

0

to

4

−0.3

to

4.2

0

to

4

−0.3

to

4.2

25°C

Common-mode

input voltage range

V

|V | ≤ 5 mV,

IO

R

= 50 Ω

V

ICR

S

0

to

3.5

0

to

3.5

Full range

I

= −20 µA

= −75 µA

4.98

4.94

4.98

4.94

OH

25°C

4.9

4.8

4.9

4.8

High-level

output voltage

V

OH

Full range

= −150 µA

25°C

4.88

0.01

0.09

4.88

0.01

0.09

V

IC

= 2.5 V,

I

= 50 µA

OL

25°C

0.15

0.3

0.15

0.3

V

= 2.5 V,

= 500 µA

Low-level

output voltage

IC

OL

Full range

25°C

V

OL

0.2

350

0.2

350

V

IC

I

= 1 ꢈA

OL

Full range

25°C

0.3

100

10

100

10

‡

R

= 100 kΩ

Large-signal differential

voltage amplification

V

IC

V

O

= 2.5 V,

= 1 V to 4 V

L

Full range

25°C

A

VD

V/mV

‡

1700

= 1 MΩ

Differential input

resistance

12

10

12

10

r

25°C

Ω

i(d)

i(c)

Common-mode

input resistance

12

10

12

10

Common-mode

input capacitance

c

z

f = 10 kHz

f = 25 kHz,

8

pF

Ω

i(c)

o

Closed-loop

output impedance

A

= 10

200

83

200

83

V

25°C

70

Common-mode

rejection ratio

V

R

= 0 to 2.7 V,

= 50 Ω

V

= 2.5 V,

IC

O

CMRR

dB

Full range

S

Supply-voltage

rejection ratio

25°C

80

95

80

95

V

= 4.4 V to 8 V,

DD

IC

k

dB

SVR

= V

DD

/2,

No load

Full range

(∆V

DD

/∆V )

IO

†

‡

Full range is −40°C to 125°C.

Referenced to 2.5 V

NOTE 4: Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at T = 150°C extrapolated

A

to T = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.

A

11

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ

ꢁ

ꢂ

ꢃ

ꢄ

ꢅ

ꢆ

ꢇ

ꢈ

ꢉ

ꢀ

ꢁ

ꢂ

ꢃ

ꢄ

ꢅ

ꢊ

ꢆ

ꢇ

ꢈ

ꢜ

ꢊ

ꢋ

ꢌ

ꢍ

ꢎ

ꢏ

ꢐ

ꢋ

ꢁ

ꢑ

ꢎ

ꢂ ꢇꢖꢘ ꢁ ꢔꢙꢆꢈ ꢔꢙꢇ ꢖ ꢔ ꢈꢇ ꢖꢊꢀꢗ ꢔ ꢚꢊ ꢁ ꢊꢓꢈ ꢁꢗ ꢛ ꢗꢇꢖꢕ

ꢒ

ꢓ

ꢔ

ꢕ 

ꢖꢊ ꢗ ꢁꢆꢀꢔ ꢆꢖꢊꢗ ꢁ

SGLS217B − NOVEMBER 2003 − REVISED JUNE 2006

TLV2254 electrical characteristics at specified free-air temperature, V

noted) (continued)

= 5 V (unless otherwise

DD

TLV2254

TLV2254A

UNIT

†

PARAMETER

TEST CONDITIONS

T

A

MIN

TYP MAX

MIN

TYP MAX

25°C

140

250

300

140

250

300

Supply current

(four amplifiers)

I

V

O

= 2.5 V,

No load

µA

DD

Full range

†

Full range is −40°C to 125°C.

TLV2254 operating characteristics at specified free-air temperature, V

= 5 V

DD

TLV2254

TLV2254A

†

PARAMETER

TEST CONDITIONS

UNIT

V/µs

T

A

MIN

TYP MAX

MIN

TYP MAX

0.07

0.12

0.07

0.12

25°C

‡

Slew rate

at unity gain

V

O

= 0.5 V to 3.5 V,

R

= 100 kΩ ,

L

SR

Full

range

‡

C = 100 pF

L

0.05

f = 10 Hz

f = 1 kHz

36

19

36

19

Equivalent input

noise voltage

nV/√Hz

V

n

25°C

Peak-to-peak

equivalent input

noise voltage

f = 0.1 Hz to 1 Hz

f = 0.1 Hz to 10 Hz

0.7

1.1

0.7

1.1

V

I

25°C

µV

N(PP)

Equivalent input

noise current

0.6

fA/√Hz

n

Total harmonic

distortion plus

noise

V

= 0.5 V to 2.5 V,

A

= 1

0.2%

1%

0.2%

1%

O

V

f = 20 kHz,

R

THD+N

25°C

A

V

= 10

‡

= 50 kΩ

L

‡

Gain-bandwidth

product

f = 50 kHz,

R

= 50 kΩ ,

L

25°C

0.2

30

0.2

30

MHz

kHz

‡

C

= 100 pF

L

Maximum output-

swing bandwidth

V

= 2 V,

= 50 kΩ ,

A

= 1,

O(PP)

V

B

OM

‡

R

C

= 100 pF

L

Phase margin

at unity gain

‡

φ

m

25°C

63°

= 50 kΩ ,

C

= 100 pF

‡

Gain margin

15

dB

= 50 kΩ ,

= 100 pF

†

‡

Full range is −40°C to 125°C for Q level part.

Referenced to 2.5 V

12

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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ꢇ

ꢈ

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ꢀ

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ꢄ

ꢅ

ꢊ

ꢆ

ꢇ

ꢈ

ꢜ

ꢊ

ꢋ

ꢌ

ꢍ

ꢎ

ꢏ

ꢐ

ꢋ

ꢁ

ꢑ

ꢎ

ꢂꢇ ꢖꢘ ꢁ ꢔ ꢙꢆꢈꢔ ꢙ ꢇꢖ ꢔ ꢈꢇꢖ ꢊꢀ ꢗꢔ ꢚꢊꢁ ꢊꢓ ꢈ ꢁꢗ ꢛꢗ ꢇꢖ ꢕ

ꢒ

ꢓ

ꢔ

ꢕ 

ꢖꢊꢗ ꢁꢆ ꢀꢔ ꢆꢖ ꢊ ꢗꢁ

SGLS217B − NOVEMBER 2003 − REVISED JUNE 2006

TYPICAL CHARACTERISTICS

Table of Graphs

FIGURE

Distribution

vs Common-mode voltage

2−5

V

Input offset voltage

IO

6, 7

8−11

12

α

VIO

Input offset voltage temperature coefficient

Input bias and input offset currents

Distribution

I

/I

vs Free-air temperature

IB IO

vs Supply voltage

vs Free-air temperature

13

14

V

I

Input voltage

V

High-level output voltage

vs High-level output current

vs Low-level output current

vs Frequency

15, 18

16, 17, 19

20

OH

Low-level output voltage

OL

Maximum peak-to-peak output voltage

O(PP)

vs Supply voltage

vs Free-air temperature

21

22

I

Short-circuit output current

OS

V

Differential input voltage

vs Output voltage

vs Load resistance

23, 24

25

ID

A

VD

Differential voltage amplification

vs Frequency

vs Free-air temperature

26, 27

28, 29

A

Large-signal differential voltage amplification

Output impedance

VD

o

z

vs Frequency

30, 31

vs Frequency

vs Free-air temperature

32

33

CMRR

Common-mode rejection ratio

vs Frequency

vs Free-air temperature

34, 35

36

k

Supply-voltage rejection ratio

Supply current

SVR

I

vs Supply voltage

37, 38

DD

vs Load capacitance

vs Free-air temperature

39

40

SR

Slew rate

V

Inverting large-signal pulse response

Voltage-follower large-signal pulse response

Inverting small-signal pulse response

Voltage-follower small-signal pulse response

Equivalent input noise voltage

41, 42

43, 44

45, 46

47, 48

49, 50

51

O

n

vs Frequency

Over a 10-s period

vs Frequency

Input noise voltage

Integrated noise voltage

52

THD+N

Total harmonic distortion plus noise

53

vs Supply voltage

vs Free-air temperature

54

55

Gain-bandwidth product

Phase margin

vs Frequency

vs Load capacitance

26, 27

56

φ

m

Gain margin

vs Load capacitance

57

58

59

B

1

Unity-gain bandwidth

Overestimation of phase margin

13

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ꢜ

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ꢎ

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ꢋ

ꢁ

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ꢂ ꢇꢖꢘ ꢁ ꢔꢙꢆꢈ ꢔꢙꢇ ꢖ ꢔ ꢈꢇ ꢖꢊꢀꢗ ꢔ ꢚꢊ ꢁ ꢊꢓꢈ ꢁꢗ ꢛ ꢗꢇꢖꢕ

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

ꢖꢊ ꢗ ꢁꢆꢀꢔ ꢆꢖꢊꢗ ꢁ

SGLS217B − NOVEMBER 2003 − REVISED JUNE 2006

TYPICAL CHARACTERISTICS

DISTRIBUTION OF TLV2252

INPUT OFFSET VOLTAGE

DISTRIBUTION OF TLV2252

INPUT OFFSET VOLTAGE

20

15

10

20

15

10

1020 Amplifiers From 1 Wafer Lot

V

T

=

1.5 V

V

DD

=

2.5 V

T = 25°C

A

DD

= 25°C

A

5

0

5

0

−1.6

−0.8

0

0.8

1.6

−1.6

−0.8

0

0.8

1.6

V

IO

− Input Offset Voltage − mV

V

IO

− Input Offset Voltage − mV

Figure 2

Figure 3

DISTRIBUTION OF TLV2254

INPUT OFFSET VOLTAGE

DISTRIBUTION OF TLV2254

INPUT OFFSET VOLTAGE

35

30

25

20

15

35

30

682 Amplifiers From 1 Wafer Lot

V

T

=

1.5 V

V

T

=

2.5 V

DD

= 25°C

A

25

20

15

10

5

10

5

0

−1.6

−0.8

0

0.8

1.6

−1.6

−0.8

0

0.8

1.6

V

IO

− Input Offset Voltage − mV

V

IO

− Input Offset Voltage − mV

Figure 4

Figure 5

14

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ꢂꢇ ꢖꢘ ꢁ ꢔ ꢙꢆꢈꢔ ꢙ ꢇꢖ ꢔ ꢈꢇꢖ ꢊꢀ ꢗꢔ ꢚꢊꢁ ꢊꢓ ꢈ ꢁꢗ ꢛꢗ ꢇꢖ ꢕ

ꢒ

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ꢖꢊꢗ ꢁꢆ ꢀꢔ ꢆꢖ ꢊ ꢗꢁ

SGLS217B − NOVEMBER 2003 − REVISED JUNE 2006

TYPICAL CHARACTERISTICS

†

INPUT OFFSET VOLTAGE

vs

COMMON-MODE INPUT VOLTAGE

1

V

R

T

= 5 V

= 50 Ω

= 25°C

V

R

T

= 3 V

= 50 Ω

= 25°C

DD

S

A

DD

S

A

0.8

0.6

0.4

0.2

0.6

0.4

0.2

0

−0.2

−0.4

0

−0.2

−0.4

−0.6

−0.8

−0.6

−0.8

−1

0

1

2

3

4

5

0

1

2

3

V

IC

− Common-Mode Input Voltage − V

V

IC

− Common-Mode Input Voltage − V

Figure 6

Figure 7

DISTRIBUTION OF TLV2252 INPUT OFFSET

VOLTAGE TEMPERATURE COEFFICIENT

DISTRIBUTION OF TLV2252 INPUT OFFSET

VOLTAGE TEMPERATURE COEFFICIENT

†

25

20

15

25

20

15

62 Amplifiers From 1 Wafer Lot

V

=

2.5 V

P Package

= 25°C to 85°C

V

=

1.5 V

P Package

= 25°C to 85°C

DD

T

A

10

5

10

5

0

−2

0

−2

−1

0

1

2

−1

0

1

2

α

− Temperature Coefficient − µV/°C

α

− Temperature Coefficient − µV/°C

VIO

Figure 8

Figure 9

†

For all curves where V

DD

= 5 V, all loads are referenced to 2.5 V. For all curves where V

DD

= 3 V, all loads are referenced to 1.5 V.

15

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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ꢜ

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ꢂ ꢇꢖꢘ ꢁ ꢔꢙꢆꢈ ꢔꢙꢇ ꢖ ꢔ ꢈꢇ ꢖꢊꢀꢗ ꢔ ꢚꢊ ꢁ ꢊꢓꢈ ꢁꢗ ꢛ ꢗꢇꢖꢕ

ꢒ

ꢓ

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ꢕ



ꢖꢊ ꢗ ꢁꢆꢀꢔ ꢆꢖꢊꢗ ꢁ

SGLS217B − NOVEMBER 2003 − REVISED JUNE 2006

TYPICAL CHARACTERISTICS

DISTRIBUTION OF TLV2254 INPUT OFFSET

VOLTAGE TEMPERATURE COEFFICIENT

DISTRIBUTION OF TLV2254 INPUT OFFSET

VOLTAGE TEMPERATURE COEFFICIENT

25

20

15

10

25

20

15

10

62 Amplifiers From 1 Wafer Lot

V

=

1.5 V

P Package

= 25°C to 85°C

DD

V

=

2.5 V

P Package

= 25°C to 85°C

DD

T

A

T

A

5

0

5

0

−2

−1

0

1

2

−2

−1

0

1

2

α

− Temperature Coefficient

α

− Temperature Coefficient

VIO

of Input Offset Voltage − µV/°C

Figure 10

Figure 11

INPUT VOLTAGE

vs

SUPPLY VOLTAGE

†

INPUT BIAS AND INPUT OFFSET CURRENTS

vs

FREE-AIR TEMPERATURE

2.5

35

30

25

R

T

= 50 Ω

= 25°C

V

= 2.5 V

= 0

= 50 Ω

S

A

DD

IC

O

2

1.5

1

R

S

0.5

0

20

15

10

5

| V | ≤5 mV

IO

−0.5

−1

I

IB

−1.5

−2

I

IO

−2.5

0

25

1

1.5

2

2.5

3

3.5

4

45

65

85

105

125

| V

DD

| − Supply Voltage − V

T

A

− Free-Air Temperature − °C

Figure 12

Figure 13

†

Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

16

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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ꢂꢇ ꢖꢘ ꢁ ꢔ ꢙꢆꢈꢔ ꢙ ꢇꢖ ꢔ ꢈꢇꢖ ꢊꢀ ꢗꢔ ꢚꢊꢁ ꢊꢓ ꢈ ꢁꢗ ꢛꢗ ꢇꢖ ꢕ

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ꢖꢊꢗ ꢁꢆ ꢀꢔ ꢆꢖ ꢊ ꢗꢁ

SGLS217B − NOVEMBER 2003 − REVISED JUNE 2006

TYPICAL CHARACTERISTICS

†‡

INPUT VOLTAGE

vs

HIGH-LEVEL OUTPUT VOLTAGE

vs

FREE-AIR TEMPERATURE

HIGH-LEVEL OUTPUT CURRENT

5

4

3

2

1

3

2.5

2

V

DD

= 5 V

V

= 3 V

DD

T

= −40°C

= 25°C

A

T

A

| V | ≤5 mV

IO

1.5

1

T

= 85°C

A

T

A

= 125°C

0

0.5

0

−1

−55 −35 −15

5

25

45

65 85 105 125

0

200

400

600

800

T

A

− Free-Air Temperature − °C

| I

OH

| − High-Level Output Current − µA

Figure 14

Figure 15

†‡

‡

LOW-LEVEL OUTPUT VOLTAGE

vs

LOW-LEVEL OUTPUT VOLTAGE

vs

LOW-LEVEL OUTPUT CURRENT

1.4

1.2

1

1.2

1

V

T

= 3 V

V

= 3 V

= 1.5 V

DD

= 25°C

DD

IC

A

T

= 125°C

= 85°C

A

V

= 0

IC

0.8

0.6

0.4

0.2

0

T

A

0.8

0.6

V

IC

= 0.75 V

T

= 25°C

A

V

IC

= 1.5 V

0.4

T

A

= − 40°C

0.2

0

1

2

3

4

5

0

1

2

3

4

5

I − Low-Level Output Current − mA

OL

I

− Low-Level Output Current − mA

OL

Figure 16

Figure 17

†

‡

Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

For all curves where V = 5 V, all loads are referenced to 2.5 V. For all curves where V = 3 V, all loads are referenced to 1.5 V.

DD DD

17

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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ꢈ

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ꢀ

ꢁ

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ꢅ

ꢊ

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ꢖꢊ ꢗ ꢁꢆꢀꢔ ꢆꢖꢊꢗ ꢁ

SGLS217B − NOVEMBER 2003 − REVISED JUNE 2006

TYPICAL CHARACTERISTICS

†‡

HIGH-LEVEL OUTPUT VOLTAGE

vs

LOW-LEVEL OUTPUT VOLTAGE

vs

HIGH-LEVEL OUTPUT CURRENT

LOW-LEVEL OUTPUT CURRENT

5

4

3

1.4

1.2

V

= 5 V

V

= 5 V

DD

= 2.5 V

DD

T

= 125°C

A

IC

1

T

= −40°C

= 25°C

= 85°C

T

A

= 85°C

A

0.8

T

A

= 25°C

T

A

0.6

0.4

0.2

0

2

1

0

T

A

T

= −40°C

A

T

= 125°C

A

0

200

400

600

800

0

1

2

3

4

5

6

| I

OH

| − High-Level Output Current − µA

I

− Low-Level Output Current − mA

OL

Figure 18

Figure 19

‡

SHORT-CIRCUIT OUTPUT CURRENT

MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE

vs

SUPPLY VOLTAGE

FREQUENCY

10

9

8

7

6

5

4

3

2

1

5

R = 50 kΩ

V

= 5 V

I

DD

T

= 25°C

A

4

V

= −100 mV

ID

3

2

V

= 3 V

V

= V /2

DD

O

T

= 25°C

A

V

IC

= V /2

DD

1

0

V

= 100 mV

0

ID

−1

2

3

4

5

6

7

8

2

3

4

5

10

V

− Supply Voltage − V

DD

f − Frequency − Hz

Figure 20

Figure 21

†

‡

Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

For all curves where V

= 5 V, all loads are referenced to 2.5 V. For all curves where V

= 3 V, all loads are referenced to 1.5 V.

DD

18

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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ꢁ

ꢂ

ꢃ

ꢄ

ꢅ

ꢆ

ꢇ

ꢈ

ꢉ

ꢀ

ꢁ

ꢂ

ꢃ

ꢄ

ꢅ

ꢊ

ꢆ

ꢇ

ꢈ

ꢜ

ꢊ

ꢋ

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ꢖꢊꢗ ꢁꢆ ꢀꢔ ꢆꢖ ꢊ ꢗꢁ

SGLS217B − NOVEMBER 2003 − REVISED JUNE 2006

TYPICAL CHARACTERISTICS

‡

†

DIFFERENTIAL INPUT VOLTAGE

SHORT-CIRCUIT OUTPUT CURRENT

vs

OUTPUT VOLTAGE

FREE-AIR TEMPERATURE

11

1000

800

V

= 3 V

V

= 2.5 V

DD

R = 50 kΩ

O

10

9

=

5 V

I

DD

V

T

= 1.5 V

= 25°C

IC

600

A

8

V

ID

= −100 mV

400

7

6

5

4

200

0

−200

−400

−600

−800

3

2

1

V

ID

= 100 mV

0

−1

−75

−1000

0

0.5

1

1.5

2

2.5

3

−50 −25

0

25

50

75

100 125

V

O

− Output Voltage − V

T

A

− Free-Air Temperature − °C

Figure 22

Figure 23

‡

DIFFERENTIAL INPUT VOLTAGE

†‡

DIFFERENTIAL VOLTAGE AMPLIFICATION

vs

OUTPUT VOLTAGE

LOAD RESISTANCE

1000

800

4

10

3

10

2

10

1

10

V

T

= 2 V

V

R

= 5 V

O(PP)

= 25°C

DD

IC

L

= 2.5 V

= 50 kΩ

= 25°C

A

600

T

A

400

V

DD

= 5 V

V

200

0

= 3 V

DD

−200

−400

−600

−800

−1000

1

10

2

3

10

1

10

0

1

2

3

4

5

V

O

− Output Voltage − V

R

− Load Resistance − kΩ

L

Figure 24

Figure 25

†

‡

Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

For all curves where V = 5 V, all loads are referenced to 2.5 V. For all curves where V = 3 V, all loads are referenced to 1.5 V.

DD DD

19

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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ꢈ

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ꢀ

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ꢂ

ꢃ

ꢄ

ꢅ

ꢊ

ꢆ

ꢇ

ꢈ

ꢜ

ꢊ

ꢋ

ꢌ

ꢍ

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ꢏ

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ꢒ

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ꢖꢊ ꢗ ꢁꢆꢀꢔ ꢆꢖꢊꢗ ꢁ

SGLS217B − NOVEMBER 2003 − REVISED JUNE 2006

TYPICAL CHARACTERISTICS

†

LARGE-SIGNAL DIFFERENTIAL VOLTAGE

AMPLIFICATION AND PHASE MARGIN

vs

FREQUENCY

80

60

180°

135°

V

R

= 5 V

= 50 kΩ

DD

L

C = 100 pF

T

A

= 25°C

40

90°

45°

Phase Margin

20

0

Gain

0°

−20

−40

−45°

−90°

3

4

5

6

7

10

†

f − Frequency − Hz

Figure 26

LARGE-SIGNAL DIFFERENTIAL VOLTAGE

AMPLIFICATION AND PHASE MARGIN

vs

FREQUENCY

80

60

180°

135°

V

= 3 V

DD

R = 50 kΩ

L

C = 100 pF

T

A

= 25°C

40

90°

45°

Phase Margin

20

0

Gain

0°

−20

−40

−45°

−90°

3

4

5

6

7

10

f − Frequency − Hz

Figure 27

†

For all curves where V

DD

= 5 V, all loads are referenced to 2.5 V. For all curves where V

= 3 V, all loads are referenced to 1.5 V.

DD

20

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ

ꢁ

ꢂ

ꢃ

ꢄ

ꢅ

ꢆ

ꢇ

ꢈ

ꢉ

ꢀ

ꢁ

ꢂ

ꢃ

ꢄ

ꢅ

ꢊ

ꢆ

ꢇ

ꢈ

ꢜ

ꢊ

ꢋ

ꢌ

ꢍ

ꢎ

ꢏ

ꢐ

ꢋ

ꢁ

ꢑ

ꢎ

ꢂꢇ ꢖꢘ ꢁ ꢔ ꢙꢆꢈꢔ ꢙ ꢇꢖ ꢔ ꢈꢇꢖ ꢊꢀ ꢗꢔ ꢚꢊꢁ ꢊꢓ ꢈ ꢁꢗ ꢛꢗ ꢇꢖ ꢕ

ꢒ

ꢓ

ꢔ

ꢕ 

ꢖ

ꢊ

ꢗ

ꢁ

ꢆ

ꢀ

ꢔ

ꢆ

ꢖ

ꢊ

ꢗ

ꢁ

SGLS217B − NOVEMBER 2003 − REVISED JUNE 2006

TYPICAL CHARACTERISTICS

†‡

LARGE-SIGNAL DIFFERENTIAL

VOLTAGE AMPLIFICATION

vs

VOLTAGE AMPLIFICATION

vs

FREE-AIR TEMPERATURE

4

3

4

3

10

V

= 5 V

= 2.5 V

= 1 V to 4 V

DD

IC

O

V

= 3 V

= 1.5 V

= 0.5 V to 2.5 V

DD

IC

O

R

= 1 MΩ

L

R

= 1 MΩ

= 50 kΩ

L

R

= 50 kΩ

L

2

1

10

1

10

−75 −50 −25

0

25

50

75

100 125

−75 −50 −25

0

25

50

75 100 125

T

A

− Free-Air Temperature − °C

T

A

− Free-Air Temperature − °C

Figure 28

Figure 29

‡

OUTPUT IMPEDANCE

vs

FREQUENCY

1000

100

10

1000

100

10

V

T

= 5 V

= 25°C

V

T

= 3 V

= 25°C

DD

A

DD

A

= 100

V

A

= 100

V

A

= 10

= 1

A

= 10

= 1

V

1

A

V

A

V

0.1

10

0.1

10

2

3

4

5

6

2

3

4

5

6

10

f− Frequency − Hz

Figure 30

Figure 31

†

‡

Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

For all curves where V = 5 V, all loads are referenced to 2.5 V. For all curves where V = 3 V, all loads are referenced to 1.5 V.

DD DD

21

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SGLS217B − NOVEMBER 2003 − REVISED JUNE 2006

TYPICAL CHARACTERISTICS

†‡

†

COMMON-MODE REJECTION RATIO

vs

FREE-AIR TEMPERATURE

FREQUENCY

100

80

94

92

90

88

86

84

82

V

= 5 V

= 2.5 V

T

A

= 25°C

DD

IC

V

= 3 V

= 1.5 V

DD

IC

V

DD

= 5 V

60

40

20

0

V

DD

= 3 V

80

4

5

6

10

1

2

3

10

− 75 − 50 − 25

0

25

50

75 100

125

T

A

− Free-Air Temperature − °C

f − Frequency − Hz

Figure 32

Figure 33

†

SUPPLY-VOLTAGE REJECTION RATIO

vs

FREQUENCY

100

80

100

80

60

40

20

V

T

= 3 V

V

T

= 5 V

= 25°C

DD

= 25°C

DD

A

k

SVR+

A

60

k

SVR+

k

SVR−

40

k

SVR−

20

0

−20

1

2

3

4

5

6

10

6

1

2

3

4

5

10

f − Frequency − Hz

Figure 34

Figure 35

†

‡

For all curves where V

DD

= 5 V, all loads are referenced to 2.5 V. For all curves where V

Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

= 3 V, all loads are referenced to 1.5 V.

DD

22

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SGLS217B − NOVEMBER 2003 − REVISED JUNE 2006

TYPICAL CHARACTERISTICS

TLV2252

SUPPLY CURRENT

†

SUPPLY-VOLTAGE REJECTION RATIO

vs

FREE-AIR TEMPERATURE

SUPPLY VOLTAGE

110

105

120

100

80

60

40

20

0

V

= 2.7 V to 8 V

DD

= V = V /2

DD

V

= 0

O

IC

O

No Load

T

= −40°C

= 85°C

A

100

95

T

A

T

A

= 25°C

90

−75 −50 −25

0

25

50

75 100

125

0

1

2

3

4

5

6

7

8

T

A

− Free-Air Temperature − °C

V

DD

− Supply Voltage − V

Figure 36

Figure 37

TLV2254

SUPPLY CURRENT

†

‡

SLEW RATE

vs

SUPPLY VOLTAGE

LOAD CAPACITANCE

0.2

0.18

0.16

0.14

0.12

0.1

240

200

160

120

80

V

= 5 V

DD

= −1

V

= 0

O

A

V

A

No Load

T

= 25°C

T

= −40°C

A

SR−

T

= 85°C

A

SR+

T

A

= 25°C

0.08

0.06

0.04

40

0.02

0

1

2

3

4

10

0

1

2

3

4

5

6

7

8

10

| V

DD

| − Supply Voltage − V

C

− Load Capacitance − pF

L

Figure 38

Figure 39

†

‡

Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

For all curves where V = 5 V, all loads are referenced to 2.5 V. For all curves where V = 3 V, all loads are referenced to 1.5 V.

DD DD

23

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SGLS217B − NOVEMBER 2003 − REVISED JUNE 2006

TYPICAL CHARACTERISTICS

†‡

SLEW RATE

vs

FREE-AIR TEMPERATURE

0.2

INVERTING LARGE-SIGNAL PULSE

†

RESPONSE

3

2.5

2

V

= 5 V

= 50 kΩ

= 100 pF

= 1

DD

V

= 3 V

= 50 kΩ

= 100 pF

= −1

DD

R

C

A

L

V

R

C

A

L

V

0.16

T

A

= 25°C

SR−

0.12

0.08

1.5

1

SR+

0.04

0

0.5

0

10 20 30 40 50 60 70 80 90 100

−75 −50 −25

0

25

50

75 100 125

T

A

− Free-Air Temperature − °C

t − Time − µs

Figure 40

Figure 41

INVERTING LARGE-SIGNAL PULSE

VOLTAGE-FOLLOWER LARGE-SIGNAL

†

RESPONSE

PULSE RESPONSE

5

3

2.5

2

V

R

C

A

= 5 V

V

= 3 V

= 50 kΩ

= 100 pF

= 1

DD

L

DD

= 50 kΩ

= 100 pF

= −1

R

C

A

T

L

V

4

3

2

V

= 25°C

T

A

= 25°C

A

1.5

1

0

0.5

0

10 20 30 40 50 60 70 80 90 100

0

10 20 30 40 50 60 70 80 90 100

t − Time − µs

Figure 42

Figure 43

†

‡

Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

For all curves where V

= 5 V, all loads are referenced to 2.5 V. For all curves where V

= 3 V, all loads are referenced to 1.5 V.

DD

24

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SGLS217B − NOVEMBER 2003 − REVISED JUNE 2006

TYPICAL CHARACTERISTICS

VOLTAGE-FOLLOWER LARGE-SIGNAL

INVERTING SMALL-SIGNAL

†

PULSE RESPONSE

0.95

0.9

5

4

V

= 5 V

= 50 kΩ

= 100 pF

= 1

V

R

C

A

= 3 V

DD

L

DD

L

R

C

A

= 50 kΩ

= 100 pF

= −1

V

A

V

T

= 25°C

T

A

= 25°C

0.85

0.8

3

2

0.75

0.7

1

0

0.65

0.6

0

10

20

30

40

50

0

10 20 30 40 50 60 70 80 90 100

t − Time − µs

Figure 44

Figure 45

VOLTAGE-FOLLOWER SMALL-SIGNAL

INVERTING SMALL-SIGNAL

†

PULSE RESPONSE

0.95

2.65

2.6

V

= 3 V

= 50 kΩ

= 100 pF

= 1

V

= 5 V

DD

L

DD

L

R

C

A

R

C

A

= 50 kΩ

= 100 pF

= −1

0.9

0.85

0.8

V

A

V

A

T

= 25°C

T

= 25°C

2.55

2.5

0.75

0.7

2.45

2.4

0.65

0.6

0

10

20

30

40

50

0

10

20

30

40

50

t − Time − µs

Figure 46

Figure 47

†

For all curves where V

DD

= 5 V, all loads are referenced to 2.5 V. For all curves where V = 3 V, all loads are referenced to 1.5 V.

DD

25

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SGLS217B − NOVEMBER 2003 − REVISED JUNE 2006

TYPICAL CHARACTERISTICS

†

EQUIVALENT INPUT NOISE VOLTAGE

vs

VOLTAGE-FOLLOWER SMALL-SIGNAL

†

FREQUENCY

PULSE RESPONSE

60

50

2.65

2.6

V

R

C

= 5 V

= 50 kΩ

= 100 pF

= 1

DD

L

V

R

T

A

= 3 V

= 20 Ω

= 25°C

DD

S

A

V

A

T

= 25°C

40

30

2.55

2.5

20

10

0

2.45

2.4

1

2

3

4

10

0

10

20

30

40

50

f − Frequency − Hz

t − Time − µs

Figure 48

Figure 49

†

EQUIVALENT INPUT NOISE VOLTAGE

INPUT NOISE VOLTAGE OVER

vs

†

A 10-s PERIOD

FREQUENCY

1000

750

500

250

0

60

50

40

30

20

V

R

T

A

= 5 V

= 20 Ω

= 25°C

DD

S

V

= 5 V

DD

f = 0.1 Hz to 10 Hz

T

A

= 25°C

−250

−500

10

0

−750

−1000

1

2

3

4

10

0

2

4

6

8

10

f − Frequency − Hz

t − Time − s

Figure 50

Figure 51

†

For all curves where V

DD

= 5 V, all loads are referenced to 2.5 V. For all curves where V

= 3 V, all loads are referenced to 1.5 V.

DD

26

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SGLS217B − NOVEMBER 2003 − REVISED JUNE 2006

TYPICAL CHARACTERISTICS

†

INTEGRATED NOISE VOLTAGE

TOTAL HARMONIC DISTORTION PLUS NOISE

vs

FREQUENCY

100

1

Calculated Using Ideal Pass-Band Filter

Low Frequency = 1 Hz

A

V

= 100

T

= 25°C

A

10

0.1

A

V

= 10

1

0.01

A

V

= 1

V

R

T

A

= 5 V

= 50 kΩ

= 25°C

DD

L

0.001

0.1

1

2

3

4

5

1

10

2

3

4

5

10

1

10

f − Frequency − Hz

Figure 52

Figure 53

†‡

GAIN-BANDWIDTH PRODUCT

vs

GAIN-BANDWIDTH PRODUCT

vs

FREE-AIR TEMPERATURE

SUPPLY VOLTAGE

300

260

V

DD

= 5 V

220

210

200

f = 10 kHz

R

C

= 50 kHz

= 100 pF

L

220

180

140

100

190

180

170

−75 −50 −25

0

25

50

75

100

125

0

1

2

V

3

4

5

6

7

8

T

A

− Free-Air Temperature − °C

− Supply Voltage − V

DD

Figure 54

Figure 55

†

For all curves where V

DD

= 5 V, all loads are referenced to 2.5 V. For all curves where V = 3 V, all loads are referenced to 1.5 V.

DD

27

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SGLS217B − NOVEMBER 2003 − REVISED JUNE 2006

TYPICAL CHARACTERISTICS

PHASE MARGIN

vs

LOAD CAPACITANCE

GAIN MARGIN

vs

LOAD CAPACITANCE

75°

60°

45°

20

15

10

T

A

= 25°C

R

= 200 Ω

null

R

= 500 Ω

null

R

= 500 Ω

null

R

= 200 Ω

= 100 Ω

null

R

= 100 Ω

R

null

R

= 50 Ω

= 10 Ω

null

R

= 50 Ω

= 10 Ω

null

30°

R

null

R

null

50 kΩ

5

0

V

15°

0°

DD +

DD −

R

= 0

null

50 kΩ

R

null

R

= 0

V

−

+

null

I

C

L

T

= 25°C

A

V

1

2

3

4

10

1

2

L

3

4

5

10

C

10

C

− Load Capacitance − pF

L

Figure 56

Figure 57

†

OVERESTIMATION OF PHASE MARGIN

vs

UNITY-GAIN BANDWIDTH

vs

LOAD CAPACITANCE

25

T

= 25°C

200

175

150

A

T

A

= 25°C

R

= 500 Ω

null

20

15

10

5

125

100

R

= 100 Ω

null

R

= 200 Ω

null

R

= 50 Ω

= 10 Ω

null

75

50

R

null

25

0

10

1

2

3

4

5

10

0

10

1

2

3

4

5

10

C

10

C − Load Capacitance − pF

L

− Load Capacitance − pF

†

L

See application information

Figure 58

Figure 59

†

‡

For all curves where V

= 5 V, all loads are referenced to 2.5 V. For all curves where V

= 3 V, all loads are referenced to 1.5 V.

DD

Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

28

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SGLS217B − NOVEMBER 2003 − REVISED JUNE 2006

APPLICATION INFORMATION

driving large capacitive loads

The TLV2252 is designed to drive larger capacitive loads than most CMOS operational amplifiers. Figure 56

and Figure 57 illustrate its ability to drive loads up to 1000 pF while maintaining good gain and phase margins

(R

= 0).

null

A smaller series resistor (R ) at the output of the device (see Figure 60) improves the gain and phase margins

null

when driving large capacitive loads. Figure 55 and Figure 56 show the effects of adding series resistances of

10 Ω, 50 Ω, 100 Ω, 200 Ω, and 500 Ω. The addition of this series resistor has two effects – the first adds a zero

to the transfer function and the second reduces the frequency of the pole associated with the output load in the

transfer function.

The zero introduced to the transfer function is equal to the series resistance times the load capacitance. To

calculate the improvement in phase margin, equation 1 can be used.

–1

ǒ_{2 × π × UGBW × R}

_LǓ

(1)

∆φ

Where :

+ tan

× C

m1

null

∆φ

= improvement in phase margin

m1

UGBW = unity-gain bandwidth frequency

R

C

= output series resistance

= load capacitance

null

L

The unity-gain bandwidth (UGBW) frequency decreases as the capacitive load increases (see Figure 58). To

use equation 1, UGBW must be approximated from Figure 58.

Using equation 1 alone overestimates the improvement in phase margin as illustrated in Figure 59. The

overestimation is caused by the decrease in the frequency of the pole associated with the load, providing

additional phase shift and reducing the overall improvement in phase margin.

Using Figure 60, with equation 1 enables the designer to choose the appropriate output series resistance to

optimize the design of circuits driving large capacitance loads.

50 kΩ

V

DD+

50 kΩ

R

null

V

I

−

+

C

L

V

DD−

/GND

Figure 60. Series-Resistance Circuit

29

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁꢂ ꢃ ꢃꢄ ꢅ ꢆꢇꢈꢉ ꢀ ꢁꢂ ꢃ ꢃꢄ ꢅ ꢊꢆꢇ ꢈ

ꢜ

ꢊ

ꢋ

ꢌ

ꢍ

ꢎ

ꢏ

ꢐ

ꢋ

ꢁ

ꢑ

ꢎ

ꢂ ꢇꢖꢘ ꢁ ꢔꢙꢆꢈ ꢔꢙꢇ ꢖ ꢔ ꢈꢇ ꢖꢊꢀꢗ ꢔ ꢚꢊ ꢁ ꢊꢓꢈ ꢁꢗ ꢛ ꢗꢇꢖꢕ

ꢒ

ꢓ

ꢔ

ꢕ 

ꢖꢊ ꢗ ꢁꢆꢀꢔ ꢆꢖꢊꢗ ꢁ

SGLS217B − NOVEMBER 2003 − REVISED JUNE 2006

APPLICATION INFORMATION

macromodel information

Macromodel information provided was derived using Microsim Parts, the model generation software used

with Microsim PSpice. The Boyle macromodel (see Note 5) and subcircuit in Figure 61 are generated using

the TLV2252 typical electrical and operating characteristics at T = 25°C. Using this information, output

A

simulations of the following key parameters can be generated to a tolerance of 20% (in most cases):

D

Maximum positive output voltage swing

Maximum negative output voltage swing

Slew rate

D

Unity-gain frequency

Common-mode rejection ratio

Phase margin

Quiescent power dissipation

Input bias current

DC output resistance

AC output resistance

Short-circuit output current limit

Open-loop voltage amplification

NOTE 4: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, “Macromodeling of Integrated Circuit Operational Amplifiers,” IEEE Journal

of Solid-State Circuits, SC-9, 353 (1974).

99

DLN

3

EGND

+

−

V

CC+

92

9

FB

+

91

90

RSS

ISS

RO2

−

+

−

+

VB

DLP

RP

2

VLP

VLN

HLIM

−

+

−

10

+

−

VC

IN −

IN+

R2

C2

J1

J2

7

DP

6

53

+

−

1

VLIM

11

DC

12

RD2

GA

GCM

8

C1

RD1

60

RO1

+

−

DE

VAD

5

54

V

CC−

−

+

4

VE

OUT

.SUBCKT TLV225x 1 2 3 4 5

RD1

RD2

R01

R02

RP

RSS

VAD

VB

VC

VE

60

8

11

12

5

37.23E3

84

C1

11

6

12

7

6.369E−12

C2

25.00E−12

DC

5

53

5

DX

7

99

4

84

DE

54

90

92

4

3

71.43E3

64.52E6

−.5

DLP

DLN

DP

91

90

3

10

60

9

99

4

0

DC 0

EGND

FB

99

7

0

99

POLY (2) (3,0) (4,0) 0 .5 .5

POLY (5) VB VC VE VLP

3

53

4

DC .605

DC 0

54

7

+ VLN 0 57.62E6 −60E6 60E6 60E6 −60E6

VLIM

VLP

VLN

8

GA

6

0

6

11

10

12 26.86E−6

99 2.686E−9

91

0

DC −0.235

DC 7.5

GCM

ISS

HLIM

J1

0

92

3

10

0

DC 3.1E−6

VLIM 1K

10 JX

100.0E3

.MODEL DX D (IS=800.0E−18)

90

11

12

6

.MODEL JX PJF (IS=500.0E−15 BETA=139E−6

2

1

+ VTO=−.05)

.ENDS

J2

R2

9

Figure 61. Boyle Macromodel and Subcircuit

PSpice and Parts are trademarks of MicroSim Corporation.

30

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PACKAGE OPTION ADDENDUM

www.ti.com

18-Sep-2008

PACKAGING INFORMATION

Orderable Device

TLV2252AQDREP

TLV2252QDREP

TLV2254AQDREP

TLV2254QDREP

V62/04651-01UE

V62/04651-02UE

V62/04651-03XE

V62/04651-04XE

Status ⁽¹⁾

ACTIVE

Package Package

Pins Package Eco Plan ⁽²⁾Lead/Ball Finish MSL Peak Temp ⁽³⁾

Qty

Type

Drawing

SOIC

D

8

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

SOIC

D

8

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

14

8

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

8

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

14

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check

http://www.ti.com/productcontent for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered

at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and

package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS

compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame

retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder

temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is

provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the

accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take

reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on

incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited

information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI

to Customer on an annual basis.

OTHER QUALIFIED VERSIONS OF TLV2252-EP, TLV2252A-EP, TLV2254-EP, TLV2254A-EP :

Catalog: TLV2252, TLV2252A, TLV2254, TLV2254A

Automotive: TLV2252-Q1, TLV2252A-Q1, TLV2254-Q1, TLV2254A-Q1

Military: TLV2252M, TLV2252AM, TLV2254M, TLV2254AM

•

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

18-Sep-2008

NOTE: Qualified Version Definitions:

Catalog - TI's standard catalog product

Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects

Military - QML certified for Military and Defense Applications

•

Addendum-Page 2

PACKAGE MATERIALS INFORMATION

www.ti.com

14-Jul-2012

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device

Package Package Pins

Type Drawing

SPQ

Reel

A0

B0

K0

P1

W

Pin1

Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant

(mm) W1 (mm)

TLV2252AQDREP

TLV2252QDREP

TLV2254AQDREP

TLV2254QDREP

SOIC

D

8

2500

330.0

12.4

16.4

6.4

6.5

5.2

9.0

2.1

8.0

12.0

16.0

Q1

14

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

14-Jul-2012

*All dimensions are nominal

Device

Package Type Package Drawing Pins

SPQ

Length (mm) Width (mm) Height (mm)

TLV2252AQDREP

TLV2252QDREP

TLV2254AQDREP

TLV2254QDREP

SOIC

D

8

2500

367.0

333.2

367.0

345.9

35.0

28.6

14

Pack Materials-Page 2

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obtain the latest relevant information before placing orders and should verify that such information is current and complete. All

semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time

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TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms

and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary

to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily

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TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and

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型号：	TLV2254QDREP
厂家：	TEXAS INSTRUMENTS
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TLV2254QDREP [TI]

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