TLV1702 [TI]
双路高电压低功耗比较器;
| 型号： | TLV1702 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 双路高电压低功耗比较器 比较器 |
| 文件： | 总36页 (文件大小：1986K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Sample &
Buy
Support &
Community
Reference
Design
Product
Folder
Tools &
Software
Technical
Documents
TLV1701, TLV1702, TLV1704
ZHCSBX7D –DECEMBER 2013–REVISED JUNE 2015
TLV170x 2.2V 至 36V 微功耗比较器
1 特性
3 说明
1
•
电源范围：
+2.2V 至 +36V 或 ±1.1V 至 ±18V
TLV170x 系列器件提供宽电源范围、轨到轨输入、低
静态电流和低传播延迟。 所有这些特性均符合行业标
准，采用极小封装，借此，这些器件得以成为目前市场
上可提供的最佳通用比较器。
•
低静态电流：
每个比较器 55µA
•
•
•
•
输入共模范围包括两个电源轨
低传播延迟：560ns
集电极开路输出具有能够将输出拉至任意电压轨（最大
可高出负电源 +36V）的优势，且不受 TLV170x 电源
电压影响。
低输入偏移电压：300µV
集电极开路输出：
–
最大可高出负电源 36V 且不受电源电压影响
这些器件均可提供单通道 (TLV1701)、双通道
(TLV1702) 和四通道 (TLV1704) 三种版本。 低输入偏
移电压、低输入偏置电流、低电源电流和开集配置使得
TLV170x 系列能够灵活处理从简单电压检测到驱动单
个继电器的大多数应用。
•
•
工业温度范围：
-40°C 至 +125°C
小型封装：
–
–
–
单通道：SC70-5、SOT-23-5 和 SOT553-5
双通道：VSSOP-8、X2QFN-8
四通道：TSSOP-14
所有器件的额定工作温度均在扩展的工业温度范围
–40°C 到 +125°C 内。
2 应用范围
器件信息(1)
•
•
•
•
•
过压和欠压检测器
窗口比较器
器件型号
封装
SOT553 (5)
SC-70 (5)
封装尺寸（标称值）
1.20mm × 1.60mm
1.25mm × 2.00mm
1.60mm x 2.90mm
1.50mm x 1.50mm
3.00mm × 3.00mm
4.40mm × 5.00mm
TLV1701
过流检测器
SOT-23 (5)
X2QFN (8)
VSSOP (8)(2)
TSSOP (14)
零交叉检测器
针对以下应用的系统监控：
TLV1702
TLV1704
–
–
–
–
–
电源
白色家电
工业传感器
汽车
(1) 要了解所有可用封装，请见数据表末尾的封装选项附录。
(2) VSSOP 封装与 MSOP 封装相同。
医疗
TLV1702 作为窗口比较器
稳定传播延迟与温度
VPULLUP
1200n
18 V Low-to-High
VIN
VS
RPULLUP
VOUT
18 V High-to-Low
2.2 V Low-to-High
2.2 V High-to-Low
1000n
800n
600n
400n
200n
VTH+
VTH+
+
½
TLV1702
VTH-
_
t
t
GND
VS
VOUT
VPULLUP
VIN
+
½
TLV1702
_
VTH-
GND
VOD = 100 mV
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (C)
C020
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
English Data Sheet: SBOS589
TLV1701, TLV1702, TLV1704
ZHCSBX7D –DECEMBER 2013–REVISED JUNE 2015
www.ti.com.cn
目录
8.3 Feature Description................................................. 12
8.4 Device Functional Modes........................................ 12
Applications and Implementation ...................... 13
9.1 Application Information............................................ 13
9.2 Typical Application ................................................. 13
1
2
3
4
5
6
7
特性.......................................................................... 1
应用范围................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
Device Comparison ............................................... 4
Pin Configuration and Functions......................... 5
Specifications......................................................... 6
7.1 Absolute Maximum Ratings ...................................... 6
7.2 ESD Ratings.............................................................. 6
7.3 Recommended Operating Conditions....................... 6
7.4 Thermal Information: TLV1701 ................................. 6
7.5 Thermal Information: TLV1702 and TLV1704........... 7
7.6 Electrical Characteristics........................................... 7
7.7 Switching Characteristics.......................................... 7
7.8 Typical Characteristics.............................................. 8
Detailed Description ............................................ 11
8.1 Overview ................................................................. 11
8.2 Functional Block Diagram ....................................... 11
9
10 Power Supply Recommendations ..................... 14
11 Layout................................................................... 15
11.1 Layout Guidelines ................................................. 15
11.2 Layout Example .................................................... 15
12 器件和文档支持 ..................................................... 16
12.1 文档支持................................................................ 16
12.2 相关链接................................................................ 16
12.3 社区资源................................................................ 16
12.4 商标....................................................................... 16
12.5 静电放电警告......................................................... 16
12.6 术语表 ................................................................... 16
13 机械、封装和可订购信息....................................... 16
8
4 修订历史记录
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision C (December 2014) to Revision D
Page
•
•
已将文档状态从“混合状态”更改为“量产数据” .......................................................................................................................... 1
已将 TLV1702 RUG 封装的状态更改为量产数据.................................................................................................................... 1
Changes from Revision B (October 2014) to Revision C
Page
•
•
TLV1701 DCK 封装已从预览更改为量产数据......................................................................................................................... 1
Changed Handling Ratings table to ESD Ratings table, and moved storage temperature to Absolute Maximum
Ratings table........................................................................................................................................................................... 6
Changes from Revision A (September 2014) to Revision B
Page
•
•
•
更改了器件信息表中的脚注 2：已将 TLV1701 添加到可用器件列表中 .................................................................................. 1
Added TLV1701 to list of production data packages in footnote for the Pin Configuration and Functions section .............. 5
Added TLV1701 row to V(ESD) parameter in Handling Ratings table...................................................................................... 6
2
版权 © 2013–2015, Texas Instruments Incorporated
TLV1701, TLV1702, TLV1704
www.ti.com.cn
ZHCSBX7D –DECEMBER 2013–REVISED JUNE 2015
Changes from Original (December 2013) to Revision A
Page
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
已将文档格式更改为符合最新的数据表标准；添加了新章节并移动了现有章节...................................................................... 1
TLV1704 PW (TSSOP-14) 封装已从预览更改为量产数据...................................................................................................... 1
在集电极开路输出特性中添加了分项 ...................................................................................................................................... 1
在说明部分添加了第二段 ........................................................................................................................................................ 1
已从说明部分中删除封装信息；冗余信息 ............................................................................................................................... 1
Changed Related Products table to Device Comparison table, moved from page 1, and added TLV370x family................ 4
Added TLV1701, TLV1702 RUG, and TLV704 package drawings ........................................................................................ 5
Added thermal information for TLV1702 RUG, TLV1704 PW, and all TLV1701 packages................................................... 6
Moved switching characteristics parameters from Electrical Characteristics table to new Switching Characteristics table .. 7
Changed all typical values in Switching Characteristics table................................................................................................ 7
Changed title for Figure 1....................................................................................................................................................... 8
Changed Figure 8................................................................................................................................................................... 8
Changed Figure 9 .................................................................................................................................................................. 8
Changed Figure 10................................................................................................................................................................. 8
Changed Figure 11................................................................................................................................................................. 8
Changed Figure 12................................................................................................................................................................. 8
Changed Figure 13................................................................................................................................................................. 9
Changed Figure 14................................................................................................................................................................. 9
Changed Application Information and moved section ......................................................................................................... 13
Deleted Application Examples section ................................................................................................................................. 13
Copyright © 2013–2015, Texas Instruments Incorporated
3
TLV1701, TLV1702, TLV1704
ZHCSBX7D –DECEMBER 2013–REVISED JUNE 2015
www.ti.com.cn
5 Device Comparison
DEVICE
FEATURES
TLV3201
40-ns, 40-µA, push-pull comparator
TLV3202
TLV3501
TLV3502
TLV3401
TLV3402
TLV3404
TLV3701
TLV3702
TLV3704
REF3325
REF3330
REF3333
4.5-ns, rail-to-rail, push-pull, high-speed comparator
Nanopower open-drain output comparator
Nanopower push-pull output comparator
3.9-µA, SC70-3 voltage reference
4
Copyright © 2013–2015, Texas Instruments Incorporated
TLV1701, TLV1702, TLV1704
www.ti.com.cn
ZHCSBX7D –DECEMBER 2013–REVISED JUNE 2015
6 Pin Configuration and Functions
TLV1701
DBV (SOT-23-5), DCK (SC70-5), DRL (SOT553-5) Packages
Top View
TLV1702
RUG (X2QFN-8) Package
Top View
V+
8
IN+
V-
1
2
3
5
4
V+
1OUT
1IN±
1IN+
1
2
3
7
6
5
2OUT
2IN±
2IN+
OUT
IN±
4
TLV1702
V-
DGK (VSSOP-8) Package
Top View
TLV1704
PW (TSSOP-14) Package
Top View
1OUT
1IN±
1IN+
V-
1
2
3
4
8
7
6
5
V+
2OUT
2IN±
2IN+
2OUT
1OUT
V+
1
2
3
4
5
6
7
14 3OUT
4OUT
V-
13
12
11
10
9
1IN±
1IN+
4IN+
4IN±
2IN±
3IN+
2IN+
3IN±
8
Pin Functions
PIN
NO.
TLV1701
TLV1702
TLV1704
NAME DBV, DCK, DRL
DGK, RUG
PW
—
5
I/O
I
DESCRIPTION
IN+
1
—
3
Noninverting input
1IN+
2IN+
3IN+
4IN+
IN–
—
—
—
—
3
I
Noninverting input, channel 1
Noninverting input, channel 2
Noninverting input, channel 3
Noninverting input, channel 4
Inverting input
5
7
I
—
—
—
2
9
I
11
—
4
I
I
1IN–
2IN–
3IN–
4IN–
OUT
1OUT
2OUT
3OUT
4OUT
V+
—
—
—
—
4
I
Inverting input, channel 1
Inverting input, channel 2
Inverting input, channel 3
Inverting input, channel 4
Output
6
6
I
—
—
—
1
8
I
10
—
2
I
O
O
O
O
O
—
—
—
—
—
—
5
Output, channel 1
7
1
Output, channel 2
—
—
8
14
13
3
Output, channel 3
Output, channel 4
Positive (highest) power supply
Negative (lowest) power supply
V–
2
4
12
Copyright © 2013–2015, Texas Instruments Incorporated
5
TLV1701, TLV1702, TLV1704
ZHCSBX7D –DECEMBER 2013–REVISED JUNE 2015
www.ti.com.cn
7 Specifications
7.1 Absolute Maximum Ratings(1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
+40 (±20)
(VS+) + 0.5
±10
UNIT
V
Supply voltage
Voltage(2)
Current(2)
(VS–) – 0.5
V
Signal input pins
mA
mA
°C
Output short-circuit(3)
Continuous
Operating temperature range
Junction temperature, TJ
Storage temperature, Tstg
–55
–65
+150
150
°C
+150
°C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Input pins are diode-clamped to the power-supply rails. Input signals that can swing more than 0.5 V beyond the supply rails must be
current limited to 10 mA or less.
(3) Short-circuit to ground; one comparator per package.
7.2 ESD Ratings
VALUE
UNIT
TLV1701 and TLV1702
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
Charged-device model (CDM), per JEDEC specification JESD22-C101(2)
±2000
±1500
V(ESD)
Electrostatic discharge
V
TLV1704
V(ESD)
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
Charged-device model (CDM), per JEDEC specification JESD22-C101(2)
±1000
±1500
Electrostatic discharge
V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
2.2 (±1.1)
–40
NOM
MAX
36 (±18)
125
UNIT
V
Supply voltage VS = (VS+) – (VS–)
Specified temperature
°C
7.4 Thermal Information: TLV1701
TLV1701
DRL (SOT553) DCK (SC70)
THERMAL METRIC(1)
DBV (SOT23)
UNIT
5 PINS
271.5
115.6
89.7
5 PINS
283.6
94.1
61.3
1.9
5 PINS
233.1
156.4
60.6
RθJA
Junction-to-ambient thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJC(top) Junction-to-case (top) thermal resistance
RθJB
ψJT
Junction-to-board thermal resistance
Junction-to-top characterization parameter
Junction-to-board characterization parameter
17.6
35.7
ψJB
89.2
60.5
N/A
59.7
RθJC(bot) Junction-to-case (bottom) thermal resistance
N/A
N/A
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
6
Copyright © 2013–2015, Texas Instruments Incorporated
TLV1701, TLV1702, TLV1704
www.ti.com.cn
ZHCSBX7D –DECEMBER 2013–REVISED JUNE 2015
7.5 Thermal Information: TLV1702 and TLV1704
TLV1702
TLV1704
THERMAL METRIC(1)
RUG (QFN)
8 PINS
205.6
77.1
DGK (VSSOP) PW (TSSOP)
UNIT
8 PINS
199
14 PINS
128.1
56.5
θJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
θJCtop
θJB
89.5
107.0
2.0
120.4
22.0
69.9
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
9.1
ψJB
107.0
N/A
118.7
N/A
69.3
θJCbot
N/A
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
7.6 Electrical Characteristics
at TA = +25°C, VS = +2.2 V to +36 V, CL = 15 pF, RPULLUP = 5.1 kΩ, VCM = VS / 2, and VS = VPULLUP (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
OFFSET VOLTAGE
TA = 25°C, VS = 2.2 V
±0.5
±0.3
±3.5
±2.5
±5.5
±20
mV
mV
VOS
Input offset voltage
TA = 25°C, VS = 36 V
TA = –40°C to +125°C
TA = –40°C to +125°C
mV
dVOS/dT
PSRR
Input offset voltage drift
±4
15
20
μV/°C
μV/V
μV/V
100
Power-supply rejection ratio
TA = –40°C to +125°C
TA = –40°C to +125°C
INPUT VOLTAGE RANGE
VCM
Common-mode voltage range
(V–)
(V+)
V
INPUT BIAS CURRENT
5
15
20
nA
nA
nA
IB
Input bias current
TA = –40°C to +125°C
IOS
Input offset current
0.5
CLOAD
OUTPUT
Capacitive load drive
See Typical Characteristics
I
O ≤ 4 mA, input overdrive = 100 mV,
900
600
mV
mV
VS = 36 V
VO
Voltage output swing from rail
IO = 0 mA, input overdrive = 100 mV,
VS = 36 V
ISC
Short circuit sink current
Output leakage current
20
70
mA
nA
VIN+ > VIN–
POWER SUPPLY
VS
Specified voltage range
2.2
36
75
V
IO = 0 A
55
μA
μA
IQ
Quiescent current (per channel)
IO = 0 A, TA = –40°C to +125°C
100
7.7 Switching Characteristics
at TA = +25°C, VS = +2.2 V to +36 V, CL = 15 pF, RPULLUP = 5.1 kΩ, VCM = VS / 2, and VS = VPULLUP (unless otherwise noted)
PARAMETER
Propagation delay time, high-to-low
Propagation delay time, low-to-high
Rise time
TEST CONDITIONS
Input overdrive = 100 mV
Input overdrive = 100 mV
Input overdrive = 100 mV
Input overdrive = 100 mV
MIN
TYP
460
560
365
240
MAX
UNIT
ns
tpHL
tpLH
tR
ns
ns
tF
Fall time
ns
Copyright © 2013–2015, Texas Instruments Incorporated
7
TLV1701, TLV1702, TLV1704
ZHCSBX7D –DECEMBER 2013–REVISED JUNE 2015
www.ti.com.cn
7.8 Typical Characteristics
at TA = +25°C, VS = +5 V, RPULLUP = 5.1 kΩ, and input overdrive = 100 mV (unless otherwise noted)
75
70
65
60
55
50
45
40
35
6
4
2
0
VS = 2.2 V
VS = ±18 V
VS = ±18 V
VS = 2.2 V
Ibn
Ibp
±40 ±25 ±10
5
20 35 50 65 80 95 110 125
±50
±25
0
25
50
75
100
125
Temperature (C)
Temperature (C)
C028
C007
Figure 1. Quiescent Current vs Temperature
Figure 2. Input Bias Current vs Temperature
1
0.75
0.5
0
±2
VS = ±1.1 V
±4
±6
VS = ±18 V
±8
±10
±12
±14
±16
±18
0.25
0
VS = 2.2 V
VS = ±18 V
±50
±25
0
25
50
75
100
125
0
5
10
15
20
Temperature (C)
Output Current (mA)
C007
C011
Figure 3. Input Offset Current vs Temperature
Figure 4. Output Voltage vs Output Current
3
2
3
2
14 Typical Units Shown
13 Typical Units Shown
1
1
0
0
±1
±2
±3
±1
±2
±3
VS = ±18 V
VS = 2.2 V
0
6
12
18
24
30
36
0
0.5
1
1.5
2
Common-Mode Voltage (V)
Common-Mode Voltage (V)
C027
C028
Figure 5. Offset Voltage vs Common-Mode Voltage
Figure 6. Offset Voltage vs Common-Mode Voltage
8
Copyright © 2013–2015, Texas Instruments Incorporated
TLV1701, TLV1702, TLV1704
www.ti.com.cn
ZHCSBX7D –DECEMBER 2013–REVISED JUNE 2015
Typical Characteristics (continued)
at TA = +25°C, VS = +5 V, RPULLUP = 5.1 kΩ, and input overdrive = 100 mV (unless otherwise noted)
3
1000n
800n
600n
400n
200n
16 Typical Units Shown
18 V Low-to-High
18 V High-to-Low
2.2 V Low-to-High
2.2 V High-to-Low
2
1
0
±1
±2
±3
0
6
12
18
24
30
36
0
200
400
600
800
1000
Supply Voltage (V)
Input Overdrive (mV)
C028
C020
Figure 7. Offset Voltage vs Supply Voltage
Figure 8. Propagation Delay vs Input Overdrive
ꢆꢁꢀꢀ
ꢅꢁꢂꢀ
ꢅꢁꢀꢀ
ꢄꢁꢂꢀ
ꢄꢁꢀꢀ
ꢃꢁꢂꢀ
ꢃꢁꢀꢀ
ꢀꢁꢂꢀ
ꢀꢁꢀꢀ
1200n
1000n
800n
600n
400n
200n
2.2 V Supply
18 V Low-to-High
18 V High-to-Low
2.2 V Low-to-High
2.2 V High-to-Low
18 V Supply
tPLH
tPHL
VOD = 100 mV
20p
200p
2n
-40 -25 -10
5
20 35 50 65 80 95 110 125
Output Capacitive Load (F)
Temperature (C)
C020
C020
Figure 9. Propagation Delay vs Capacitive Load
Figure 10. Propagation Delay vs Temperature
Input Voltage
Output Voltage
tPLH = 440 ns
tPLH = 400 ns
Output Voltage
Input Voltage
VS = 36 V, Overdrive = 100 mV
Time (150 ns/div)
VS = 36 V, Overdrive = 100 mV
Time (150 ns/div)
C021
C021
Figure 11. Propagation Delay (TpLH
)
Figure 12. Propagation Delay (TpHL)
Copyright © 2013–2015, Texas Instruments Incorporated
9
TLV1701, TLV1702, TLV1704
ZHCSBX7D –DECEMBER 2013–REVISED JUNE 2015
www.ti.com.cn
Typical Characteristics (continued)
at TA = +25°C, VS = +5 V, RPULLUP = 5.1 kΩ, and input overdrive = 100 mV (unless otherwise noted)
Output Voltage
Input Voltage
tPLH = 560 ns
tPLH = 460 ns
Output Voltage
Input Voltage
VS = 2.2 V, Overdrive = 100 mV
Time (150 ns/div)
VS = 2.2 V, Overdrive = 100 mV
Time (150 ns/div)
C021
C021
Figure 13. Propagation Delay (TpLH
)
Figure 14. Propagation Delay (TpHL)
30
25
20
15
10
5
35
30
25
20
15
10
5
VS = ±18 V
Distribution Taken from 2524 Comparators
VS = 2.2 V
Distribution Taken from 2524 Comparators
0
0
Offset Voltage (mV)
Offset Voltage (mV)
C019
C019
Figure 15. Offset Voltage Production Distribution
Figure 16. Offset Voltage Production Distribution
30
VS = 2.2 V
25
20
15
10
5
Sink Current
0
0
6
12
18
24
30
36
Supply Voltage (V)
C002
Figure 17. Short-Circuit Current vs Supply Voltage
10
Copyright © 2013–2015, Texas Instruments Incorporated
TLV1701, TLV1702, TLV1704
www.ti.com.cn
ZHCSBX7D –DECEMBER 2013–REVISED JUNE 2015
8 Detailed Description
8.1 Overview
The TLV170x comparators features rail-to-rail input and output on supply voltages as high as 36 V. The rail-to-
rail input stage enables detection of signals close to the supply and ground. The open collector configuration
allows the device to be used in wired-OR configurations, such as a window comparator. A low supply current of
55 μA per channel with small, space-saving packages, makes these comparators versatile for use in a wide
range of applications, from portable to industrial.
8.2 Functional Block Diagram
V+
OUT
IN+
IN-
IN+
IN-
V-
Copyright © 2013–2015, Texas Instruments Incorporated
11
TLV1701, TLV1702, TLV1704
ZHCSBX7D –DECEMBER 2013–REVISED JUNE 2015
www.ti.com.cn
8.3 Feature Description
8.3.1 Comparator Inputs
The TLV170x are rail-to-rail input comparators, with an input common-mode range that includes the supply rails.
The TLV170x is designed to prevent phase inversion when the input pins exceed the supply voltage. Figure 18
shows the TLV170x response when input voltages exceed the supply, resulting in no phase inversion.
Output Voltage
Input Voltage
Time (5 ms/div)
C030
Figure 18. No Phase Inversion: Comparator Response to Input Voltage
(Propagation Delay Included)
8.4 Device Functional Modes
8.4.1 Setting Reference Voltage
Using a stable reference is important when setting the transition point for the TLV170x. The REF3333, as shown
in Figure 19, provides a 3.3-V reference voltage with low drift and only 3.9 μA of quiescent current.
VS
REF3333
VPULLUP
VS+
RPULLUP
GND
+
TLV1701
VOUT
_
VS-
VIN
Figure 19. Reference Voltage for the TLV170x
12
Copyright © 2013–2015, Texas Instruments Incorporated
TLV1701, TLV1702, TLV1704
www.ti.com.cn
ZHCSBX7D –DECEMBER 2013–REVISED JUNE 2015
9 Applications and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The TLV170x can be used in a wide variety of applications, such as zero crossing detectors, window
comparators, over and undervoltage detectors, and high-side voltage sense circuits.
9.2 Typical Application
Comparators are used to differentiate between two different signal levels. For example, a comparator
differentiates between an overtemperature and normal-temperature condition. However, noise or signal variation
at the comparison threshold causes multiple transitions. This application example sets upper and lower
hysteresis thresholds to eliminate the multiple transitions caused by noise.
5 V
Rp
5 k
-
+V
+
Vout
5 V
Vin
5 V
Rx
100 k
Rh
576 k
Ry
100 k
Figure 20. Comparator Schematic with Hysteresis
9.2.1 Design Requirements
The design requirements are as follows:
•
•
•
•
•
•
Supply voltage: 5 V
Input: 0 V to 5 V
Lower threshold (VL) = 2.3 V ±0.1 V
Upper threshold (VH) = 2.7 V ±0.1 V
VH – VL = 2.4 V ±0.1 V
Low power consumption
Copyright © 2013–2015, Texas Instruments Incorporated
13
TLV1701, TLV1702, TLV1704
ZHCSBX7D –DECEMBER 2013–REVISED JUNE 2015
www.ti.com.cn
Typical Application (continued)
9.2.2 Detailed Design Procedure
Make a small change to the comparator circuit to add hysteresis. Hysteresis uses two different threshold voltages
to avoid the multiple transitions introduced in the previous circuit. The input signal must exceed the upper
threshold (VH) to transition low, or below the lower threshold (VL) to transition high.
Figure 20 illustrates hysteresis on a comparator. Resistor Rh sets the hysteresis level. An open-collector output
stage requires a pullup resistor (Rp). The pullup resistor creates a voltage divider at the comparator output that
introduces an error when the output is at logic high. This error can be minimized if Rh > 100Rp.
When the output is at a logic high (5 V), Rh is in parallel with Rx (ignoring Rp). This configuration drives more
current into Ry, and raises the threshold voltage (VH) to 2.7 V. The input signal must drive above VH = 2.7 V to
cause the output to transition to logic low (0 V).
When the output is at logic low (0 V), Rh is in parallel with Ry. This configuration reduces the current into Ry, and
reduces the threshold voltage to 2.3 V. The input signal must drive below VL = 2.3 V to cause the output to
transition to logic high (5 V).
For more details on this design and other alternative devices that can be used in place of the TLV1702, refer to
Precision Design TIPD144, Comparator with Hysteresis Reference Design.
9.2.3 Application Curve
Figure 21 shows the upper and lower thresholds for hysteresis. The upper threshold is 2.76 V and the lower
threshold is 2.34 V, both of which are close to the design target.
Figure 21. TLV1701 Upper and Lower Threshold with Hysteresis
10 Power Supply Recommendations
The TLV170x is specified for operation from 2.2 V to 36 V (±1.1 to ±18 V); many specifications apply from –40°C
to +125°C. Parameters that can exhibit significant variance with regard to operating voltage or temperature are
presented in the Typical Characteristics section.
CAUTION
Supply voltages larger than 40 V can permanently damage the device; see the
Absolute Maximum Ratings.
Place 0.1-μF bypass capacitors close to the power-supply pins to reduce errors coupling in from noisy or high-
impedance power supplies. For more detailed information on bypass capacitor placement; see the Layout
Guidelines section.
14
Copyright © 2013–2015, Texas Instruments Incorporated
TLV1701, TLV1702, TLV1704
www.ti.com.cn
ZHCSBX7D –DECEMBER 2013–REVISED JUNE 2015
11 Layout
11.1 Layout Guidelines
Comparators are very sensitive to input noise. For best results, maintain the following layout guidelines:
•
•
•
Use a printed circuit board (PCB) with a good, unbroken low-inductance ground plane. Proper grounding (use
of ground plane) helps maintain specified performance of the TLV170x.
To minimize supply noise, place a decoupling capacitor (0.1-μF ceramic, surface-mount capacitor) as close
as possible to VS as shown in Figure 22.
On the inputs and the output, keep lead lengths as short as possible to avoid unwanted parasitic feedback
around the comparator. Keep inputs away from the output.
•
•
Solder the device directly to the PCB rather than using a socket.
For slow-moving input signals, take care to prevent parasitic feedback. A small capacitor (1000 pF or less)
placed between the inputs can help eliminate oscillations in the transition region. This capacitor causes some
degradation to propagation delay when the impedance is low. Run the topside ground plane between the
output and inputs.
•
Run the ground pin ground trace under the device up to the bypass capacitor, shielding the inputs from the
outputs.
11.2 Layout Example
V+
IN+
IN-
+
OUT
V-
(Schematic Representation)
Run the input traces
as far away from
the supply lines
as possible
Use low-ESR, ceramic
bypass capacitor
VS+
IN+
IN+
GND
V+
VS± or GND
V±
OUT
OUT
IN-
IN-
GND
Only needed for
dual-supply
operation
Figure 22. Comparator Board Layout
版权 © 2013–2015, Texas Instruments Incorporated
15
TLV1701, TLV1702, TLV1704
ZHCSBX7D –DECEMBER 2013–REVISED JUNE 2015
www.ti.com.cn
12 器件和文档支持
12.1 文档支持
12.1.1 相关文档
TIDU020 — 高精度设计，采用滞后参考设计的比较器。
SBOS392 — REF3333 数据手册
12.2 相关链接
表 1 列出了快速访问链接。 范围包括技术文档、支持与社区资源、工具和软件，并且可以快速访问样片或购买链
接。
表 1. 相关链接
器件
产品文件夹
请单击此处
请单击此处
请单击此处
样片与购买
请单击此处
请单击此处
请单击此处
技术文档
请单击此处
请单击此处
请单击此处
工具与软件
请单击此处
请单击此处
请单击此处
支持与社区
请单击此处
请单击此处
请单击此处
TLV1701
TLV1702
TLV1704
12.3 社区资源
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.4 商标
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.5 静电放电警告
ESD 可能会损坏该集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理措施和安装程序 , 可
能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级 , 大至整个器件故障。 精密的集成电路可能更容易受到损坏 , 这是因为非常细微的参数更改都可
能会导致器件与其发布的规格不相符。
12.6 术语表
SLYZ022 — TI 术语表。
这份术语表列出并解释术语、首字母缩略词和定义。
13 机械、封装和可订购信息
以下页中包括机械、封装和可订购信息。 这些信息是针对指定器件可提供的最新数据。 这些数据会在无通知且不
对本文档进行修订的情况下发生改变。 欲获得该数据表的浏览器版本，请查阅左侧的导航栏。
16
版权 © 2013–2015, Texas Instruments Incorporated
PACKAGE OPTION ADDENDUM
www.ti.com
21-Jul-2023
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TLV1701AIDBVR
TLV1701AIDBVT
TLV1701AIDCKR
TLV1701AIDCKT
TLV1701AIDRLR
TLV1701AIDRLT
TLV1702AIDGK
TLV1702AIDGKR
TLV1702AIRUGR
TLV1704AIPW
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOT-23
SOT-23
SC70
DBV
DBV
DCK
DCK
DRL
DRL
DGK
DGK
RUG
PW
5
5
3000 RoHS & Green
250 RoHS & Green
3000 RoHS & Green
250 RoHS & Green
4000 RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
ZAYF
ZAYF
SIR
Samples
Samples
Samples
Samples
Samples
Samples
Samples
Samples
Samples
Samples
Samples
NIPDAU
NIPDAU
5
SC70
5
NIPDAU
SIR
SOT-5X3
SOT-5X3
VSSOP
VSSOP
X2QFN
TSSOP
TSSOP
5
NIPDAUAG
NIPDAUAG
NIPDAUAG
NIPDAUAG | SN
SIS
5
250
80
RoHS & Green
RoHS & Green
SIS
8
1702
1702
FC
8
2500 RoHS & Green
8
3000 RoHS & Green Call TI | NIPDAUAG
14
14
90
RoHS & Green
NIPDAU
NIPDAU
TL1704
TL1704
TLV1704AIPWR
PW
2000 RoHS & Green
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
21-Jul-2023
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TLV1701, TLV1702, TLV1704 :
Automotive : TLV1701-Q1, TLV1702-Q1, TLV1704-Q1
•
NOTE: Qualified Version Definitions:
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
•
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
2-Jul-2023
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TLV1701AIDBVR
TLV1701AIDBVT
TLV1701AIDCKR
TLV1701AIDCKT
TLV1701AIDRLR
TLV1701AIDRLT
TLV1702AIDGKR
TLV1702AIDGKR
TLV1702AIRUGR
TLV1704AIPWR
SOT-23
SOT-23
SC70
DBV
DBV
DCK
DCK
DRL
DRL
DGK
DGK
RUG
PW
5
5
3000
250
178.0
178.0
178.0
178.0
180.0
180.0
330.0
330.0
180.0
330.0
9.0
9.0
3.23
3.23
2.4
3.17
3.17
2.5
1.37
1.37
1.2
4.0
4.0
4.0
4.0
4.0
4.0
8.0
8.0
4.0
8.0
8.0
8.0
Q3
Q3
Q3
Q3
Q3
Q3
Q1
Q1
Q2
Q1
5
3000
250
9.0
8.0
SC70
5
9.0
2.4
2.5
1.2
8.0
SOT-5X3
SOT-5X3
VSSOP
VSSOP
X2QFN
TSSOP
5
4000
250
8.4
1.98
1.98
5.3
1.78
1.78
3.4
0.69
0.69
1.4
8.0
5
8.4
8.0
8
2500
2500
3000
2000
12.4
12.4
8.4
12.0
12.0
8.0
8
5.3
3.4
1.4
8
1.6
1.6
0.66
1.6
14
12.4
6.9
5.6
12.0
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
2-Jul-2023
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TLV1701AIDBVR
TLV1701AIDBVT
TLV1701AIDCKR
TLV1701AIDCKT
TLV1701AIDRLR
TLV1701AIDRLT
TLV1702AIDGKR
TLV1702AIDGKR
TLV1702AIRUGR
TLV1704AIPWR
SOT-23
SOT-23
SC70
DBV
DBV
DCK
DCK
DRL
DRL
DGK
DGK
RUG
PW
5
5
3000
250
180.0
180.0
190.0
190.0
202.0
202.0
366.0
364.0
202.0
356.0
180.0
180.0
190.0
190.0
201.0
201.0
364.0
364.0
201.0
356.0
18.0
18.0
30.0
30.0
28.0
28.0
50.0
27.0
28.0
35.0
5
3000
250
SC70
5
SOT-5X3
SOT-5X3
VSSOP
VSSOP
X2QFN
TSSOP
5
4000
250
5
8
2500
2500
3000
2000
8
8
14
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
2-Jul-2023
TUBE
T - Tube
height
L - Tube length
W - Tube
width
B - Alignment groove width
*All dimensions are nominal
Device
Package Name Package Type
Pins
SPQ
L (mm)
W (mm)
T (µm)
B (mm)
TLV1702AIDGK
TLV1704AIPW
DGK
PW
VSSOP
TSSOP
8
80
90
330
530
6.55
10.2
500
2.88
3.5
14
3600
Pack Materials-Page 3
PACKAGE OUTLINE
DCK0005A
SOT - 1.1 max height
S
C
A
L
E
5
.
6
0
0
SMALL OUTLINE TRANSISTOR
C
2.4
1.8
0.1 C
1.4
1.1
B
1.1 MAX
A
PIN 1
INDEX AREA
1
2
5
NOTE 4
(0.15)
(0.1)
2X 0.65
1.3
2.15
1.85
1.3
4
3
0.33
5X
0.23
0.1
0.0
(0.9)
TYP
0.1
C A B
0.15
0.22
0.08
GAGE PLANE
TYP
0.46
0.26
8
0
TYP
TYP
SEATING PLANE
4214834/C 03/2023
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Refernce JEDEC MO-203.
4. Support pin may differ or may not be present.
www.ti.com
EXAMPLE BOARD LAYOUT
DCK0005A
SOT - 1.1 max height
SMALL OUTLINE TRANSISTOR
PKG
5X (0.95)
1
5
5X (0.4)
SYMM
(1.3)
2
3
2X (0.65)
4
(R0.05) TYP
(2.2)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:18X
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
EXPOSED METAL
EXPOSED METAL
0.07 MIN
ARROUND
0.07 MAX
ARROUND
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4214834/C 03/2023
NOTES: (continued)
4. Publication IPC-7351 may have alternate designs.
5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DCK0005A
SOT - 1.1 max height
SMALL OUTLINE TRANSISTOR
PKG
5X (0.95)
1
5
5X (0.4)
SYMM
(1.3)
2
3
2X(0.65)
4
(R0.05) TYP
(2.2)
SOLDER PASTE EXAMPLE
BASED ON 0.125 THICK STENCIL
SCALE:18X
4214834/C 03/2023
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
7. Board assembly site may have different recommendations for stencil design.
www.ti.com
PACKAGE OUTLINE
DBV0005A
SOT-23 - 1.45 mm max height
S
C
A
L
E
4
.
0
0
0
SMALL OUTLINE TRANSISTOR
C
3.0
2.6
0.1 C
1.75
1.45
1.45
0.90
B
A
PIN 1
INDEX AREA
1
2
5
(0.1)
2X 0.95
1.9
3.05
2.75
1.9
(0.15)
4
3
0.5
5X
0.3
0.15
0.00
(1.1)
TYP
0.2
C A B
NOTE 5
0.25
GAGE PLANE
0.22
0.08
TYP
8
0
TYP
0.6
0.3
TYP
SEATING PLANE
4214839/G 03/2023
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Refernce JEDEC MO-178.
4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.25 mm per side.
5. Support pin may differ or may not be present.
www.ti.com
EXAMPLE BOARD LAYOUT
DBV0005A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
5X (1.1)
1
5
5X (0.6)
SYMM
(1.9)
2
3
2X (0.95)
4
(R0.05) TYP
(2.6)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:15X
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
EXPOSED METAL
EXPOSED METAL
0.07 MIN
ARROUND
0.07 MAX
ARROUND
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4214839/G 03/2023
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DBV0005A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
5X (1.1)
1
5
5X (0.6)
SYMM
(1.9)
2
3
2X(0.95)
4
(R0.05) TYP
(2.6)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:15X
4214839/G 03/2023
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
PACKAGE OUTLINE
DRL0005A
SOT - 0.6 mm max height
S
C
A
L
E
8
.
0
0
0
PLASTIC SMALL OUTLINE
1.7
1.5
PIN 1
ID AREA
A
1
5
2X 0.5
1.7
1.5
2X 1
NOTE 3
4
3
1.3
1.1
0.3
0.1
0.05
TYP
0.00
B
5X
0.6 MAX
C
SEATING PLANE
0.05 C
0.18
0.08
5X
SYMM
SYMM
0.27
0.15
5X
0.1
0.05
C A B
0.4
0.2
5X
4220753/B 12/2020
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. Reference JEDEC registration MO-293 Variation UAAD-1
www.ti.com
EXAMPLE BOARD LAYOUT
DRL0005A
SOT - 0.6 mm max height
PLASTIC SMALL OUTLINE
5X (0.67)
SYMM
1
5
5X (0.3)
SYMM
(1)
2X (0.5)
4
3
(R0.05) TYP
(1.48)
LAND PATTERN EXAMPLE
SCALE:30X
0.05 MIN
AROUND
0.05 MAX
AROUND
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDERMASK DETAILS
4220753/B 12/2020
NOTES: (continued)
5. Publication IPC-7351 may have alternate designs.
6. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DRL0005A
SOT - 0.6 mm max height
PLASTIC SMALL OUTLINE
5X (0.67)
SYMM
1
5
5X (0.3)
SYMM
(1)
2X (0.5)
3
4
(R0.05) TYP
(1.48)
SOLDER PASTE EXAMPLE
BASED ON 0.1 mm THICK STENCIL
SCALE:30X
4220753/B 12/2020
NOTES: (continued)
7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
8. Board assembly site may have different recommendations for stencil design.
www.ti.com
重要声明和免责声明
TI“按原样”提供技术和可靠性数据（包括数据表）、设计资源（包括参考设计）、应用或其他设计建议、网络工具、安全信息和其他资源，
不保证没有瑕疵且不做出任何明示或暗示的担保，包括但不限于对适销性、某特定用途方面的适用性或不侵犯任何第三方知识产权的暗示担
保。
这些资源可供使用 TI 产品进行设计的熟练开发人员使用。您将自行承担以下全部责任：(1) 针对您的应用选择合适的 TI 产品，(2) 设计、验
证并测试您的应用，(3) 确保您的应用满足相应标准以及任何其他功能安全、信息安全、监管或其他要求。
这些资源如有变更，恕不另行通知。TI 授权您仅可将这些资源用于研发本资源所述的 TI 产品的应用。严禁对这些资源进行其他复制或展示。
您无权使用任何其他 TI 知识产权或任何第三方知识产权。您应全额赔偿因在这些资源的使用中对 TI 及其代表造成的任何索赔、损害、成
本、损失和债务，TI 对此概不负责。
TI 提供的产品受 TI 的销售条款或 ti.com 上其他适用条款/TI 产品随附的其他适用条款的约束。TI 提供这些资源并不会扩展或以其他方式更改
TI 针对 TI 产品发布的适用的担保或担保免责声明。
TI 反对并拒绝您可能提出的任何其他或不同的条款。IMPORTANT NOTICE
邮寄地址：Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2023，德州仪器 (TI) 公司
相关型号：
TLV1702-Q1
汽车类双路高电压、低功耗比较器Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
TI
TLV1702AIDGK
双路高电压低功耗比较器 | DGK | 8 | -40 to 125Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
TI
TLV1702AIDGKR
双路高电压低功耗比较器 | DGK | 8 | -40 to 125Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
TI
TLV1702AIRUGR
双路高电压低功耗比较器 | RUG | 8 | -40 to 125Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
TI
TLV1702AQDGKRQ1
汽车类双路高电压、低功耗比较器 | DGK | 8 | -40 to 125Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
TI
TLV1704
四路高电压低功耗比较器Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
TI
TLV1704-Q1
汽车类四路高电压、低功耗比较器Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
TI
TLV1704-SEP
采用增强型航天塑料的 2.2V 至 36V 耐辐射微功耗四路比较器Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
TI
TLV1704AIPW
四路高电压低功耗比较器 | PW | 14 | -40 to 125Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
TI
TLV1704AIPWR
四路高电压低功耗比较器 | PW | 14 | -40 to 125Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
TI
TLV1704AMPWPSEP
采用增强型航天塑料的 2.2V 至 36V 耐辐射微功耗四路比较器 | PW | 14 | -55 to 125Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
TI
TLV1704AMPWTPSEP
采用增强型航天塑料的 2.2V 至 36V 耐辐射微功耗四路比较器 | PW | 14 | -55 to 125Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
TI
©2020 ICPDF网 联系我们和版权申明