TLE2037AQDRQ1 [TI]

EXCALIBUR LOW-NOISE HIGH-SPEED PRECISION POERATIONAL AMPLIFIERS; EXCALIBUR低噪声高速精密POERATIONAL放大器
TLE2037AQDRQ1
型号: TLE2037AQDRQ1
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

EXCALIBUR LOW-NOISE HIGH-SPEED PRECISION POERATIONAL AMPLIFIERS
EXCALIBUR低噪声高速精密POERATIONAL放大器

放大器
文件: 总29页 (文件大小:526K)
中文:  中文翻译
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ꢂ ꢌꢍ ꢋꢁꢎ ꢏ ꢐꢑ ꢁꢒ ꢓꢆꢔꢒ ꢎ ꢕꢂ ꢖꢎ ꢗꢖ ꢆꢕꢘꢂ ꢂꢙ ꢘꢑ ꢂꢍꢎꢕ ꢎꢒ ꢔ ꢒ ꢘꢂꢑ ꢋꢀ ꢎꢒ ꢔꢋꢁ ꢋꢚ ꢘ ꢁꢎ ꢛꢎ ꢂꢑ ꢕ  
SGLS202A − OCTOBER 2003 – REVISED OCTOBER 2006  
D
Qualification in Accordance With  
AEC-Q100  
D
Available in Standard-Pinout Small-Outline  
Package  
D
Qualified for Automotive Applications  
D
D
Output Features Saturation Recovery  
Circuitry  
D
Customer-Specific Configuration Control  
Can Be Supported Along With  
Major-Change Approval  
Macromodels and Statistical information  
D
D
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
D PACKAGE  
(TOP VIEW)  
OFFSET N1  
IN −  
OFFSET N2  
1
2
3
4
8
7
6
5
Outstanding Combination of DC Precision  
and AC Performance:  
V
CC +  
IN +  
OUT  
NC  
Unity-Gain Bandwidth . . . 15 MHz Typ  
V
CC −  
V
. . . . 3.3 nV/Hz at f = 10 Hz Typ,  
2.5 nV/Hz at f = 1 kHz Typ  
. . . . 25 µV Max  
n
V
A
IO  
. . . 45 V/µV Typ With R = 2 k,  
VD  
L
19 V/µV Typ With R = 600 Ω  
L
Contact factory for details. Q100 qualification data available on  
request.  
description  
The TLE20x7 and TLE20x7A contain innovative circuit design expertise and high-quality process control  
techniques to produce a level of ac performance and dc precision previously unavailable in single operational  
amplifiers. Manufactured using Texas Instruments state-of-the-art Excalibur process, these devices allow  
upgrades to systems that use lower-precision devices.  
In the area of dc precision, the TLE20x7 and TLE20x7A offer maximum offset voltages of 100 µV and 25 µV,  
respectively, common-mode rejection ratio of 131 dB (typ), supply voltage rejection ratio of 144 dB (typ), and  
dc gain of 45 V/µV (typ).  
The ac performance of the TLE2027 and TLE2037 is highlighted by a typical unity-gain bandwidth specification  
of 15 MHz, 55° of phase margin, and noise voltage specifications of 3.3 nV/Hz and 2.5 nV/Hz at frequencies  
of 10 Hz and 1 kHz, respectively. The TLE2037 and TLE2037A have been decompensated for faster slew rate  
(−7.5 V/µs, typical) and wider bandwidth (50 MHz). To ensure stability, the TLE2037 and TLE2037A should be  
operated with a closed-loop gain of 5 or greater.  
ORDERING INFORMATION  
V
max  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
IO  
PACKAGE  
T
A
AT 25°C  
TLE2027AQDRQ1  
TLE2037AQDRQ1  
TLE2027QDRQ1  
TLE2037QDRQ1  
2027AQ  
25 µV  
SOIC (D)  
SOIC (D)  
Tape and reel  
Tape and reel  
2037AQ  
2027Q1  
2037Q1  
−40°C to 125°C  
100 µV  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available  
at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
ꢘꢑ ꢒ ꢙꢐ ꢍ ꢀꢎ ꢒ ꢔ ꢙ ꢋꢀꢋ ꢝꢞ ꢟ ꢠꢡ ꢢ ꢣꢤ ꢝꢠꢞ ꢝꢥ ꢦꢧ ꢡ ꢡ ꢨꢞꢤ ꢣꢥ ꢠꢟ ꢩꢧꢪ ꢫꢝꢦ ꢣꢤ ꢝꢠꢞ ꢬꢣ ꢤꢨ ꢭ  
ꢘꢡ ꢠ ꢬꢧꢦ ꢤ ꢥ ꢦ ꢠꢞ ꢟꢠ ꢡ ꢢ ꢤ ꢠ ꢥ ꢩꢨ ꢦ ꢝꢟ ꢝꢦꢣ ꢤꢝ ꢠꢞꢥ ꢩꢨ ꢡ ꢤꢮ ꢨ ꢤꢨ ꢡ ꢢꢥ ꢠꢟ ꢀꢨꢯ ꢣꢥ ꢎꢞꢥ ꢤꢡ ꢧꢢ ꢨꢞꢤ ꢥ  
ꢥ ꢤ ꢣ ꢞꢬ ꢣ ꢡꢬ ꢰ ꢣ ꢡꢡ ꢣ ꢞ ꢤꢱꢭ ꢘꢡ ꢠ ꢬꢧꢦ ꢤꢝꢠꢞ ꢩꢡ ꢠꢦ ꢨꢥ ꢥꢝ ꢞꢲ ꢬꢠꢨ ꢥ ꢞꢠꢤ ꢞꢨ ꢦꢨ ꢥꢥ ꢣꢡ ꢝꢫ ꢱ ꢝꢞꢦ ꢫꢧꢬ ꢨ  
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Copyright 2006 Texas Instruments Incorporated  
1
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ꢂ ꢌꢍꢋ ꢁ ꢎ ꢏꢐ ꢑ ꢁ ꢒꢓꢆꢔꢒ ꢎ ꢕ ꢂ ꢖꢎ ꢗ ꢖꢆꢕ ꢘꢂ ꢂ ꢙ ꢘꢑ ꢂꢍꢎꢕ ꢎꢒ ꢔ ꢒ ꢘꢂꢑ ꢋꢀ ꢎꢒ ꢔꢋꢁ ꢋꢚ ꢘꢁ ꢎꢛ ꢎꢂ ꢑꢕ  
SGLS202A − OCTOBER 2003 – REVISED OCTOBER 2006  
description (continued)  
Both the TLE20x7 and TLE20x7A are available in a wide variety of packages, including the industry-standard  
8-pin small-outline version for high-density system applications. The Q-suffix devices are characterized for  
operation from −40°C to 125°C.  
symbol  
OFFSET N1  
IN +  
+
OUT  
IN −  
OFFSET N2  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢁꢂ  
ꢇꢈ  
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ꢘꢑ ꢂꢍꢎꢕ ꢎꢒ ꢔꢳ ꢒꢘ ꢂꢑꢋꢀ ꢎꢒ ꢔꢋꢁꢳꢋꢚꢘ ꢁꢎ ꢛ ꢎꢂ ꢑꢕ  
SGLS202A − OCTOBER 2003 − REVISED OCTOBER 2006  
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
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SGLS202A − OCTOBER 2003 – REVISED OCTOBER 2006  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage, V  
Supply voltage, V  
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −19 V  
CC+  
CC−  
Differential input voltage, V (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 V  
Input voltage range, V (any input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  
ID  
V
I
CC  
Input current, I (each Input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 mA  
I
Output current, I  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA  
O
Total current into V  
Total current out of V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA  
CC+  
CC−  
Duration of short-circuit current at (or below) 25°C (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . Unlimited  
Junction temperature, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142°C  
Operating free-air temperature range, T : Q suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 125°C  
J
A
Storage temperature range, T  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . − 65°C to 150°C  
stg  
JA  
Package thermal impedance, θ (D Package) (0 LFPM) (see Note 4) . . . . . . . . . . . . . . . . . . . . . . 101°C/W  
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D package . . . . . . . . . . . . . . . . . . . . 260°C  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between V  
and V .  
CC +  
CC −  
2. Differential voltages are at IN+ with respect to IN. Excessive current flows if a differential input voltage in excess of approximately  
1.2 V is applied between the inputs, unless some limiting resistance is used.  
3. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum  
dissipation rating is not exceeded.  
4. The thermal impedance is calculated in accordance with JESD 51−7.  
recommended operating conditions  
MIN  
4
MAX  
19  
UNIT  
Supply voltage, V  
CC  
V
T
= 25°C  
11  
11  
A
Common-mode input voltage, V  
IC  
V
T
A
= Full range  
−10.2  
−40  
10.2  
125  
Operating free-air temperature, T  
°C  
A
Full range is −40°C to 125°C for Q-suffix devices.  
4
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ꢂꢌ ꢍꢋꢁ ꢎꢏꢐ ꢑ ꢁ ꢒꢓꢆꢔꢒ ꢎꢕ ꢂ ꢖꢎ ꢗ ꢖꢆ ꢕꢘ ꢂ ꢂꢙ  
ꢘꢑꢂ ꢍꢎꢕ ꢎꢒ ꢔ ꢒ ꢘꢂꢑ ꢋꢀ ꢎꢒ ꢔꢋꢁ ꢋꢚ ꢘ ꢁꢎ ꢛꢎ ꢂꢑ ꢕ  
SGLS202A − OCTOBER 2003 – REVISED OCTOBER 2006  
TLE20x7-Q1 electrical characteristics at specified free-air temperature, V  
otherwise noted)  
= 15 V (unless  
CC  
TLE20x7-Q1  
TLE20x7A-Q1  
PARAMETER  
TEST CONDITIONS  
UNIT  
T
A
MIN  
TYP  
MAX  
100  
MIN  
TYP  
MAX  
25°C  
20  
10  
25  
V
IO  
Input offset voltage  
µV  
Full range  
200  
105  
Temperature coefficient of  
input offset voltage  
α
Full range  
0.4  
1
1
0.2  
1
1
µV/°C  
µV/mo  
VIO  
Input offset voltage  
long-term drift (see Note 4)  
25°C  
0.006  
6
0.006  
6
V
IC  
= 0,  
R = 50 Ω  
S
25°C  
Full range  
25°C  
90  
150  
90  
90  
150  
90  
I
I
Input offset current  
Input bias current  
nA  
nA  
IO  
15  
15  
IB  
Full range  
150  
150  
11  
to  
−13  
to  
11  
to  
−13  
to  
25°C  
11  
13  
11  
13  
Common-mode input  
voltage range  
V
R
R
= 50 Ω  
V
ICR  
S
L
−10.3  
to  
10.3  
−10.4  
to  
10.4  
Full range  
25°C  
Full range  
25°C  
10.5  
10  
12.9  
13.2  
−13  
10.5  
10  
12.9  
13.2  
−13  
= 600 Ω  
= 2 kΩ  
Maximum positive peak  
output voltage swing  
V
V
V
V
OM +  
12  
12  
R
L
L
L
Full range  
25°C  
11  
11  
−10.5  
−10  
−10.5  
−10  
R
R
= 600 Ω  
= 2 kΩ  
Full range  
25°C  
Maximum negative peak  
output voltage swing  
OM −  
−12 −13.5  
11  
−12 −13.5  
11  
Full range  
25°C  
V
V
=
=
11 V, R = 2 kΩ  
5
2.5  
3.5  
1.8  
2
45  
10  
3.5  
8
45  
O
L
10 V, R = 2 kΩ  
Full range  
25°C  
O
L
Large-signal differential  
voltage amplification  
38  
38  
A
V/µV  
VD  
V
V
=
=
10 V, R = 1 kΩ  
L
O
Full range  
2.2  
5
10 V, R = 600 Ω  
25°C  
25°C  
19  
8
19  
8
O
L
Input capacitance  
pF  
Ci  
Open-loop output  
impedance  
z
I
O
= 0  
25°C  
50  
50  
o
25°C  
100  
96  
131  
117  
113  
131  
Common-mode rejection  
ratio  
V
R
= V  
ICR  
= 50 Ω  
min,  
IC  
S
CMRR  
dB  
Full range  
V
R
=
4 V to 18 V,  
CC  
S
25°C  
94  
90  
144  
3.8  
110  
105  
144  
3.8  
= 50 Ω  
Supply-voltage rejection  
k
dB  
SVR  
ratio (V  
CC  
/V  
IO  
)
V
R
=
4 V to 18 V,  
CC  
Full range  
= 50 Ω  
S
25°C  
5.3  
5.6  
5.3  
5.6  
I
Supply current  
V
= 0,  
No load  
mA  
CC  
O
Full range  
Full range is −40°C to 125°C.  
NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at T = 150°C extrapolated  
A
to T = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.  
A
5
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ꢘ ꢑꢂꢍ ꢎ ꢕꢎ ꢒꢔ ꢒꢘꢂ ꢑꢋꢀꢎ ꢒ ꢔꢋ ꢁ ꢋꢚ ꢘꢁ ꢎ ꢛꢎ ꢂꢑꢕ  
SGLS202A − OCTOBER 2003 – REVISED OCTOBER 2006  
TLE20x7-Q1 operating characteristics at specified free-air temperature, V  
(unless otherwise specified)  
= 15 V, T = 25°C  
A
CC  
TLE20x7-Q1  
TLE20x7A-Q1  
PARAMETER  
TEST CONDITIONS  
UNIT  
MIN  
TYP  
MAX  
MIN  
TYP  
MAX  
R
C
= 2 k,  
= 100 pF,  
TLE2027  
TLE2037  
1.7  
2.8  
1.7  
6
2.8  
L
L
6
1
7.5  
7.5  
See Figure 1  
SR  
Slew rate at unity gain  
V/µs  
R
C
= 2 k,  
= 100 pF,  
= 55°C to 125°C,  
L
L
TLE2027  
TLE2037  
1
T
A
4.4  
4.4  
See Figure 1  
R
R
= 20 ,  
= 20 ,  
f = 10 Hz  
f = 1 kHz  
3.3  
2.5  
8
3.3  
2.5  
4.5  
3.8  
Equivalent input noise  
voltage (see Figure 2)  
S
S
nV/Hz  
V
V
n
4.5  
Peak-to-peak equivalent  
input noise voltage  
f = 0.1 Hz to 10 Hz  
50  
250  
50  
130  
nV  
N(PP)  
f = 10 Hz  
f = 1 kHz  
10  
10  
Equivalent input noise  
current  
pA/Hz  
I
n
0.8  
0.8  
V
= +10 V,  
= 1,  
O
A
TLE2027  
TLE2037  
<0.002  
<0.002  
<0.002  
VD  
See Note 5  
THD  
Total harmonic distortion  
%
V
= +10 V,  
= 5,  
O
A
<0.002  
VD  
See Note 5  
TLE2027  
TLE2037  
TLE2027  
TLE2037  
TLE2027  
TLE2037  
7
13  
50  
30  
80  
55  
50  
9
13  
50  
30  
80  
55  
50  
Unity-gain bandwidth  
(see Figure 3)  
R
C
= 2 k,  
= 100 pF  
L
L
B
B
φ
MHz  
kHz  
°
1
35  
35  
Maximum output-swing  
bandwidth  
R
= 2 kΩ  
OM  
m
L
Phase margin at unity  
gain (see Figure 3)  
R
C
= 2 k,  
= 100 pF  
L
L
NOTE 5: Measured distortion of the source used in the analysis was 0.002%.  
6
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SGLS202A − OCTOBER 2003 – REVISED OCTOBER 2006  
PARAMETER MEASUREMENT INFORMATION  
2 kΩ  
R
f
15 V  
15 V  
+
V
O
V
O
R
I
+
V
I
R
= 2 kΩ  
− 15 V  
L
C
=
− 15 V  
L
20 Ω  
20 Ω  
100 pF  
(see Note A)  
NOTE A: C includes fixture capacitance.  
L
Figure 1. Slew-Rate Test Circuit  
Figure 2. Noise-Voltage Test Circuit  
R
f
10 kΩ  
15 V  
15 V  
100 Ω  
+
+
V
I
V
O
R
I
V
O
V
I
C
=
2 kΩ  
L
− 15 V  
−15 V  
2 kΩ  
C
=
100 pF  
(see Note A)  
L
100 pF  
(see Note A)  
NOTE A: C includes fixture capacitance.  
NOTES: A.  
B. For the TLE2037 and TLE2037A,  
must be 5.  
C includes fixture capacitance.  
L
L
A
VD  
Figure 3. Unity-Gain Bandwidth and  
Phase-Margin Test Circuit (TLE2027 Only)  
Figure 4. Small-Signal Pulse-  
Response Test Circuit  
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SGLS202A − OCTOBER 2003 – REVISED OCTOBER 2006  
typical values  
Typical values presented in this data sheet represent the median (50% point) of device parametric performance.  
initial estimates of parameter distributions  
In the ongoing program of improving data sheets and supplying more information to our customers, Texas  
Instruments has added an estimate of not only the typical values, but also the spread around these values.  
These are in the form of distribution bars that show the 95% (upper) points and the 5% (lower) points from the  
characterization of the initial wafer lots of this new device type (see Figure 5). The distribution bars are shown  
at the points where data was actually collected. The 95% and 5% points are used instead of 3 sigma, since  
some of the distributions are not true Gaussian distributions.  
The number of units tested and the number of different wafer lots used are on all of the graphs where distribution  
bars are shown. As noted in Figure 5, there were a total of 835 units from two wafer lots. In this case, there is  
a good estimate for the within-lot variability and a possibly poor estimate of the lot-to-lot variability. This is always  
the case on newly released products, since there can only be data available from a few wafer lots.  
The distribution bars are not intended to replace the minimum and maximum limits in the electrical tables. Each  
distribution bar represents 90% of the total units tested at a specific temperature. While 10% of the units tested  
fell outside any given distribution bar, this should not be interpreted to mean that the same individual devices  
fell outside every distribution bar.  
SUPPLY CURRENT  
vs  
FREE-AIR TEMPERATURE  
5
95% point on the distribution bar  
(5% of the devices fell above this point.)  
V
V
= 15 V  
CC  
= 0  
O
No Load  
4.5  
4
90% of the devices were within the upper  
and lower points on the distribution bar.  
Sample Size = 835 Units  
From 2 Water Lots  
5% point on the distribution bar  
(5% of the devices fell below this point.)  
3.5  
3
2.5  
− 75 − 50 − 25  
0
25 50 75 100 125 150  
T
A
− Free-Air Temperature − °C  
Figure 5. Sample Graph With Distribution Bars  
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SGLS202A − OCTOBER 2003 – REVISED OCTOBER 2006  
TYPICAL CHARACTERISTICS  
Table of Graphs  
FIGURE  
6, 7  
V
IO  
Input offset voltage  
Distribution  
Input offset voltage change  
Input offset current  
vs Time after power on  
vs Free-air temperature  
8, 9  
V  
IO  
I
IO  
10  
vs Free-air temperature  
vs Common-mode input voltage  
11  
12  
I
Input bias current  
IB  
I
I
Input current  
vs Differential input voltage  
vs Frequency  
13  
V
Maximum peak-to-peak output voltage  
14, 15  
O(PP)  
Maximum (positive/negative) peak output  
voltage  
vs Load resistance  
vs Free-air temperature  
16, 17  
18, 19  
V
OM  
vs Supply voltage  
vs Load resistance  
vs Frequency  
20  
21  
22 − 25  
26  
A
VD  
Large-signal differential voltage amplification  
vs Free-air temperature  
z
Output impedance  
vs Frequency  
vs Frequency  
vs Frequency  
27  
28  
29  
o
CMRR  
Common-mode rejection ratio  
Supply-voltage rejection ratio  
k
SVR  
vs Supply voltage  
vs Elapsed time  
vs Free-air temperature  
30, 31  
32, 33  
34, 35  
I
Short-circuit output current  
OS  
vs Supply voltage  
vs Free-air temperature  
36  
37  
I
Supply current  
CC  
Small signal  
Large signal  
38, 40  
39, 41  
Voltage-follower pulse response  
V
B
Equivalent input noise voltage  
Noise voltage (referred to input)  
vs Frequency  
42  
43  
n
Over 10-second interval  
vs Supply voltage  
vs Load capacitance  
44  
45  
Unity-gain bandwidth  
1
vs Supply voltage  
vs Load capacitance  
46  
47  
Gain bandwidth product  
Slew rate  
SR  
vs Free-air temperature  
48, 49  
vs Supply voltage  
vs Load capacitance  
vs Free-air temperature  
50, 51  
52, 53  
54, 55  
Phase margin  
Phase shift  
φ
m
vs Frequency  
22 − 25  
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SGLS202A − OCTOBER 2003 – REVISED OCTOBER 2006  
TYPICAL CHARACTERISTICS  
DISTRIBUTION  
INPUT OFFSET VOLTAGE  
INPUT OFFSET VOLTAGE CHANGE  
16  
14  
12  
10  
8
vs  
1568 Amplifiers Tested From 2 Wafer Lots  
TIME AFTER POWER ON  
V = +15 V  
CC  
T = 25°C  
12  
10  
8
A
D Package  
6
6
4
4
50 Amplifiers Tested From 2 Wafer Lots  
2
V
T
=
15 V  
2
CC  
= 25°C  
A
D Package  
0
− 120 − 90 − 60 − 30  
0
30  
60  
90  
120  
0
0
10 20  
30  
40  
50  
60  
V
IO  
− Input Offset Voltage − µV  
t − Time After Power On − s  
Figure 6  
Figure 7  
INPUT OFFSET CURRENT  
vs  
INPUT OFFSET VOLTAGE CHANGE  
vs  
FREE-AIR TEMPERATURE  
TIME AFTER POWER ON  
6
5
4
3
2
1
0
30  
25  
20  
15  
10  
5
V
V
= 15 V  
CC  
= 0  
IC  
Sample Size = 833 Units  
From 2 Wafer Lots  
50 Amplifiers Tested From 2 Wafer Lots  
V
T
A
=
15 V  
CC  
= 25°C  
P Package  
0
0
20 40 60 80 100 120 140 160 180  
t − Time After Power On − s  
Figure 8  
− 75 − 50 − 25  
0
25 50 75 100 125 150  
T
A
− Free-Air Temperature − °C  
Figure 9  
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.  
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SGLS202A − OCTOBER 2003 – REVISED OCTOBER 2006  
TYPICAL CHARACTERISTICS  
INPUT BIAS CURRENT  
INPUT BIAS CURRENT  
vs  
COMMON-MODE INPUT VOLTAGE  
vs  
FREE-AIR TEMPERATURE  
60  
50  
40  
35  
30  
25  
20  
15  
10  
5
V
T
= 15 V  
V
V
= 15 V  
CC  
CC  
= 0  
= 25°C  
A
IC  
Sample Size = 836 Units  
From 2 Wafer Lots  
40  
30  
20  
10  
0
10  
20  
0
75 50 25  
0
25 50 75 100 125 150  
−12  
− 8  
− 4  
0
4
8
12  
T
A
− Free-Air Temperature − °C  
V
IC  
− Common-Mode Input Voltage − V  
Figure 10  
Figure 11  
TLE2027  
MAXIMUM PEAK-TO-PEAK  
OUTPUT VOLTAGE  
INPUT CURRENT  
vs  
DIFFERENTIAL INPUT VOLTAGE  
vs  
FREQUENCY  
30  
25  
20  
15  
10  
5
1
0.8  
V
R
=
15 V  
CC  
L
= 2 kΩ  
V
V
T
= 15 V  
CC  
= 0  
IC  
= 25°C  
0.6  
A
0.4  
0.2  
0
T
= 125°C  
A
− 0.2  
− 0.4  
− 0.6  
− 0.8  
− 1  
T
A
= − 55°C  
0
− 1.8  
− 1.2  
− 0.6  
0
0.6  
1.2 1.8  
10 k  
100 k  
1 M  
10 M  
V
ID  
− Differential Input Voltage − V  
f − Frequency − Hz  
Figure 12  
Figure 13  
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.  
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SGLS202A − OCTOBER 2003 – REVISED OCTOBER 2006  
TYPICAL CHARACTERISTICS  
TLE2037  
MAXIMUM PEAK-TO-PEAK  
MAXIMUM POSITIVE PEAK  
OUTPUT VOLTAGE  
vs  
OUTPUT VOLTAGE  
vs  
FREQUENCY  
LOAD RESISTANCE  
30  
25  
20  
15  
10  
5
14  
12  
10  
8
V
=
15 V  
CC  
R
= 2 kΩ  
L
T
A
= 125°C  
6
4
T
A
= − 55°C  
V
= 15 V  
2
0
CC  
= 25°C  
T
A
0
10 k  
100 k  
1 M  
10 M  
100 M  
100  
1 k  
10 k  
f − Frequency − Hz  
R
− Load Resistance − Ω  
L
Figure 14  
Figure 15  
MAXIMUM POSITIVE PEAK  
MAXIMUM NEGATIVE PEAK  
OUTPUT VOLTAGE  
vs  
OUTPUT VOLTAGE  
vs  
FREE-AIR TEMPERATURE  
LOAD RESISTANCE  
13.5  
13.4  
13.3  
13.2  
13.1  
− 14  
− 12  
− 10  
− 8  
V
R
=
15 V  
CC  
L
= 2 kΩ  
Sample Size = 832 Units  
From 2 Wafer Lots  
− 6  
− 4  
13  
V
= 15 V  
CC  
= 25°C  
− 2  
0
T
A
12.9  
− 75 − 50 − 25  
0
25 50 75 100 125 150  
100  
1 k  
10 k  
R
− Load Resistance − Ω  
T
A
− Free-Air Temperature − °C  
L
Figure 16  
Figure 17  
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.  
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SGLS202A − OCTOBER 2003 – REVISED OCTOBER 2006  
TYPICAL CHARACTERISTICS  
LARGE-SIGNAL DIFFERENTIAL  
VOLTAGE AMPLIFICATION  
vs  
MAXIMUM NEGATIVE PEAK  
OUTPUT VOLTAGE  
SUPPLY VOLTAGE  
vs  
FREE-AIR TEMPERATURE  
50  
40  
30  
20  
10  
0
T
A
= 25°C  
− 13  
− 13.2  
− 13.4  
− 13.6  
V
CC  
=
15 V  
R
R
= 2 kΩ  
= 1 kΩ  
L
L
R
= 2 kΩ  
L
Sample Size = 831 Units  
From 2 Wafer Lots  
R
= 600 Ω  
L
− 13.8  
− 14  
0
4
8
12  
16  
20  
− 75 − 50 − 25  
0
25 50 75 100 125 150  
V  
CC  
− Supply Voltage − V  
T
A
− Free-Air Temperature − °C  
Figure 18  
Figure 19  
LARGE-SIGNAL DIFFERENTIAL  
VOLTAGE AMPLIFICATION  
vs  
LOAD RESISTANCE  
50  
40  
30  
20  
10  
0
V
= 15 V  
CC  
T
A
= 25°C  
100  
200  
400  
1 k  
2 k  
4 k  
10 k  
R
− Load Resistance − Ω  
L
Figure 20  
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.  
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SGLS202A − OCTOBER 2003 – REVISED OCTOBER 2006  
TYPICAL CHARACTERISTICS  
TLE2027  
LARGE-SIGNAL DIFFERENTIAL VOLTAGE  
AMPLIFICATION AND PHASE SHIFT  
vs  
FREQUENCY  
160  
140  
120  
100  
80  
75°  
Phase Shift  
100°  
125°  
150°  
175°  
200°  
225°  
250°  
275°  
A
VD  
60  
40  
V
= 15 V  
= 2 kΩ  
= 100 pF  
= 25°C  
CC  
L
L
R
C
T
20  
A
0
0.1  
100  
100 k  
100 M  
f − Frequency − Hz  
Figure 21  
TLE2037  
LARGE-SIGNAL DIFFERENTIAL VOLTAGE  
AMPLIFICATION AND PHASE SHIFT  
vs  
FREQUENCY  
75°  
160  
100°  
125°  
150°  
175°  
200°  
225°  
250°  
275°  
140  
120  
100  
80  
Phase Shift  
A
VD  
60  
V
=
15 V  
40  
CC  
R
C
= 2 kΩ  
= 100 pF  
L
L
20  
T
A
= 25°C  
0
0.1  
100  
100 k  
100 M  
f − Frequency − MHz  
Figure 22  
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SGLS202A − OCTOBER 2003 – REVISED OCTOBER 2006  
TYPICAL CHARACTERISTICS  
TLE2027  
LARGE-SIGNAL DIFFERENTIAL VOLTAGE  
AMPLIFICATION AND PHASE SHIFT  
vs  
FREQUENCY  
6
3
100°  
125°  
150°  
175°  
200°  
225°  
250°  
275°  
300°  
0
− 3  
− 6  
− 9  
− 12  
− 15  
− 18  
A
VD  
Phase Shift  
V
= 15 V  
= 2 kΩ  
= 100 pF  
= 25°C  
CC  
L
L
R
C
T
A
10  
20  
40  
70  
100  
f − Frequency − MHz  
Figure 23  
TLE2037  
LARGE-SIGNAL DIFFERENTIAL VOLTAGE  
AMPLIFICATION AND PHASE SHIFT  
vs  
FREQUENCY  
30  
100  
125  
150  
175  
200  
225  
250  
275  
300  
°
°
°
°
°
°
°
°
°
25  
20  
15  
10  
5
A
Phase Shift  
VD  
V
=
15 V  
0
CC  
R
C
T
A
= 2 kΩ  
= 100 pF  
= 25°C  
L
L
− 5  
−10  
1
2
4
10  
20  
40  
100  
f − Frequency − MHz  
Figure 24  
15  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀ ꢁ ꢂꢃ ꢄ ꢃ ꢅ ꢆꢇꢈꢉ ꢀ ꢁ ꢂ ꢃ ꢄ ꢊꢅ ꢆꢇ ꢈꢉ ꢀꢁ ꢂ ꢃ ꢄ ꢃꢅ ꢋ ꢆꢇ ꢈ ꢉ ꢀ ꢁꢂ ꢃ ꢄ ꢊ ꢅ ꢋꢆꢇ ꢈ  
ꢂ ꢌꢍꢋ ꢁ ꢎ ꢏꢐ ꢑ ꢁ ꢒꢓꢆꢔꢒ ꢎ ꢕ ꢂ ꢖꢎ ꢗ ꢖꢆꢕ ꢘꢂ ꢂ ꢙ  
ꢘ ꢑꢂꢍ ꢎ ꢕꢎ ꢒꢔ ꢒꢘꢂ ꢑꢋꢀꢎ ꢒ ꢔꢋ ꢁ ꢋꢚ ꢘꢁ ꢎ ꢛꢎ ꢂꢑꢕ  
SGLS202A − OCTOBER 2003 – REVISED OCTOBER 2006  
TYPICAL CHARACTERISTICS  
LARGE-SIGNAL DIFFERENTIAL  
VOLTAGE AMPLIFICATION  
OUTPUT IMPEDANCE  
vs  
vs  
FREE-AIR TEMPERATURE  
FREQUENCY  
60  
50  
40  
30  
100  
10  
V
= 15 V  
CC  
V
=
15 V  
CC  
= 25°C  
T
A
R
= 2 kΩ  
= 1 kΩ  
L
A
= 100  
VD  
See Note A  
1
R
L
A
VD  
= 10  
10  
100  
75 50 25  
0
25 50 75 100 125 150  
10  
100  
1 k  
f − Frequency − Hz  
NOTE A: For this curve, the TLE2027 is A  
10 k 100 k 1 M 10 M 100 M  
T
A
− Free-Air Temperature − °C  
= 1 and the  
VD  
TLE2037 is A  
VD  
= 5.  
Figure 25  
Figure 26  
COMMON-MODE REJECTION RATIO  
SUPPLY-VOLTAGE REJECTION RATIO  
vs  
vs  
FREQUENCY  
FREQUENCY  
140  
120  
100  
80  
140  
120  
100  
80  
V
=
15 V  
CC  
V
T
=
15 V  
CC  
T
A
= 25°C  
= 25°C  
A
k
SVR−  
60  
60  
k
SVR+  
40  
40  
20  
20  
0
0
10  
10  
100  
1 k  
10 k 100 k 1 M 10 M 100 M  
100  
1 k  
10 k 100 k 1 M 10 M 100 M  
f − Frequency − Hz  
f − Frequency − Hz  
Figure 27  
Figure 28  
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.  
16  
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ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢆꢇꢈ ꢉ ꢀ ꢁꢂ ꢃ ꢄ ꢊ ꢅ ꢆꢇꢈ ꢉ ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢋꢆꢇ ꢈ ꢉ ꢀ ꢁꢂ ꢃꢄ ꢊꢅ ꢋꢆ ꢇ ꢈ  
ꢂꢌ ꢍꢋꢁ ꢎꢏꢐ ꢑ ꢁ ꢒꢓꢆꢔꢒ ꢎꢕ ꢂ ꢖꢎ ꢗ ꢖꢆ ꢕꢘ ꢂ ꢂꢙ  
ꢘꢑꢂ ꢍꢎꢕ ꢎꢒ ꢔ ꢒ ꢘꢂꢑ ꢋꢀ ꢎꢒ ꢔꢋꢁ ꢋꢚ ꢘ ꢁꢎ ꢛꢎ ꢂꢑ ꢕ  
SGLS202A − OCTOBER 2003 – REVISED OCTOBER 2006  
TYPICAL CHARACTERISTICS  
SHORT-CIRCUIT OUTPUT CURRENT  
SHORT-CIRCUIT OUTPUT CURRENT  
vs  
vs  
SUPPLY VOLTAGE  
SUPPLY VOLTAGE  
44  
42  
40  
38  
36  
34  
32  
30  
42  
40  
38  
36  
34  
32  
30  
V
V
T
= −100 mV  
= 0  
= 25°C  
V
V
T
= 100 mV  
= 0  
= 25°C  
ID  
O
A
ID  
O
A
P Package  
P Package  
0
2
4
6
8
10 12 14 16 18 20  
0
2
4
6
8
10 12 14 16 18 20  
V  
− Supply Voltage − V  
V  
− Supply Voltage − V  
CC  
CC  
Figure 29  
Figure 30  
SHORT-CIRCUIT OUTPUT CURRENT  
SHORT-CIRCUIT OUTPUT CURRENT  
vs  
vs  
ELAPSED TIME  
ELAPSED TIME  
− 45  
44  
42  
40  
38  
36  
34  
V
= 15 V  
V
CC  
= 15 V  
CC  
V
V
T
= 100 mV  
V
V
T
= 100 mV  
= 0  
= 25°C  
ID  
O
A
ID  
O
A
= 0  
− 43  
− 41  
− 39  
− 37  
− 35  
= 25°C  
P Package  
P Package  
0
30  
60  
90  
120  
150  
180  
0
30  
60  
90  
120  
150  
180  
t − Elapsed Time − s  
t − Elapsed Time − s  
Figure 31  
Figure 32  
17  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀ ꢁ ꢂꢃ ꢄ ꢃ ꢅ ꢆꢇꢈꢉ ꢀ ꢁ ꢂ ꢃ ꢄ ꢊꢅ ꢆꢇ ꢈꢉ ꢀꢁ ꢂ ꢃ ꢄ ꢃꢅ ꢋ ꢆꢇ ꢈ ꢉ ꢀ ꢁꢂ ꢃ ꢄ ꢊ ꢅ ꢋꢆꢇ ꢈ  
ꢂ ꢌꢍꢋ ꢁ ꢎ ꢏꢐ ꢑ ꢁ ꢒꢓꢆꢔꢒ ꢎ ꢕ ꢂ ꢖꢎ ꢗ ꢖꢆꢕ ꢘꢂ ꢂ ꢙ  
ꢘ ꢑꢂꢍ ꢎ ꢕꢎ ꢒꢔ ꢒꢘꢂ ꢑꢋꢀꢎ ꢒ ꢔꢋ ꢁ ꢋꢚ ꢘꢁ ꢎ ꢛꢎ ꢂꢑꢕ  
SGLS202A − OCTOBER 2003 – REVISED OCTOBER 2006  
TYPICAL CHARACTERISTICS  
SHORT-CIRCUIT OUTPUT CURRENT  
SHORT-CIRCUIT OUTPUT CURRENT  
vs  
vs  
FREE-AIR TEMPERATURE  
FREE-AIR TEMPERATURE  
− 48  
− 44  
− 40  
− 36  
− 32  
− 28  
− 24  
46  
42  
38  
34  
30  
26  
V
V
V
=
15 V  
V
= 15 V  
CC  
CC  
= 100 mV  
V
ID  
V
O
= 100 mV  
= 0  
ID  
O
= 0  
P Package  
P Package  
− 75 − 50 − 25  
0
25 50 75 100 125 150  
− 75 − 50 − 25  
0
25 50 75 100 125 150  
T
A
− Free-Air Temperature − °C  
T
A
− Free-Air Temperature − °C  
Figure 33  
Figure 34  
SUPPLY CURRENT  
SUPPLY CURRENT  
vs  
vs  
FREE-AIR TEMPERATURE  
SUPPLY VOLTAGE  
6
5
4
3
2
1
0
5
4.5  
4
V
V
= 15 V  
CC  
= 0  
V
= 0  
O
O
No Load  
No Load  
Sample Size = 836 Units  
From 2 Wafer Lots  
T
= 125°C  
A
T
A
= 25°C  
T
A
= − 55°C  
3.5  
3
2.5  
0
2
4
6
8
10 12 14 16 18 20  
− 75 − 50 − 25  
0
25 50 75 100 125 150  
T
A
− Free-Air Temperature − °C  
V  
− Supply Voltage − V  
CC  
Figure 35  
Figure 36  
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.  
18  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢆꢇꢈ ꢉ ꢀ ꢁꢂ ꢃ ꢄ ꢊ ꢅ ꢆꢇꢈ ꢉ ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢋꢆꢇ ꢈ ꢉ ꢀ ꢁꢂ ꢃꢄ ꢊꢅ ꢋꢆ ꢇ ꢈ  
ꢂꢌ ꢍꢋꢁ ꢎꢏꢐ ꢑ ꢁ ꢒꢓꢆꢔꢒ ꢎꢕ ꢂ ꢖꢎ ꢗ ꢖꢆ ꢕꢘ ꢂ ꢂꢙ  
ꢘꢑꢂ ꢍꢎꢕ ꢎꢒ ꢔ ꢒ ꢘꢂꢑ ꢋꢀ ꢎꢒ ꢔꢋꢁ ꢋꢚ ꢘ ꢁꢎ ꢛꢎ ꢂꢑ ꢕ  
SGLS202A − OCTOBER 2003 – REVISED OCTOBER 2006  
TYPICAL CHARACTERISTICS  
TLE2027  
TLE2027  
VOLTAGE-FOLLOWER  
SMALL-SIGNAL  
VOLTAGE-FOLLOWER  
LARGE-SIGNAL  
PULSE RESPONSE  
PULSE RESPONSE  
100  
50  
15  
10  
V
=
15 V  
V
=
15 V  
CC  
L
L
CC  
L
L
R
C
T
= 2 kΩ  
= 100 pF  
= 25°C  
R
C
T
= 2 kΩ  
= 100 pF  
= 25°C  
A
A
See Figure 4  
See Figure 1  
5
0
0
− 5  
− 10  
− 15  
− 50  
− 100  
0
200  
400  
600 800  
1000  
0
5
10  
15  
20  
25  
t − Time − ns  
t − Time − µs  
Figure 37  
Figure 38  
TLE2037  
VOLTAGE-FOLLOWER  
LARGE-SIGNAL  
PULSE RESPONSE  
TLE2037  
VOLTAGE-FOLLOWER  
SMALL-SIGNAL  
PULSE RESPONSE  
100  
15  
10  
5
V
=
15 V  
CC  
A
R
C
= 5  
= 2 kΩ  
= 100 pF  
= 25°C  
VD  
L
L
50  
0
T
A
See Figure 1  
0
V
CC  
=
15 V  
− 5  
A
R
= 5  
= 2 kΩ  
VD  
L
− 50  
− 100  
C
= 100 pF  
= 25°C  
L
− 10  
− 15  
T
A
See Figure 4  
0
100  
200  
300  
400  
0
2
4
6
8
10  
t − Time − µs  
t − Time − ns  
Figure 39  
Figure 40  
19  
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ꢀ ꢁ ꢂꢃ ꢄ ꢃ ꢅ ꢆꢇꢈꢉ ꢀ ꢁ ꢂ ꢃ ꢄ ꢊꢅ ꢆꢇ ꢈꢉ ꢀꢁ ꢂ ꢃ ꢄ ꢃꢅ ꢋ ꢆꢇ ꢈ ꢉ ꢀ ꢁꢂ ꢃ ꢄ ꢊ ꢅ ꢋꢆꢇ ꢈ  
ꢂ ꢌꢍꢋ ꢁ ꢎ ꢏꢐ ꢑ ꢁ ꢒꢓꢆꢔꢒ ꢎ ꢕ ꢂ ꢖꢎ ꢗ ꢖꢆꢕ ꢘꢂ ꢂ ꢙ  
ꢘ ꢑꢂꢍ ꢎ ꢕꢎ ꢒꢔ ꢒꢘꢂ ꢑꢋꢀꢎ ꢒ ꢔꢋ ꢁ ꢋꢚ ꢘꢁ ꢎ ꢛꢎ ꢂꢑꢕ  
SGLS202A − OCTOBER 2003 – REVISED OCTOBER 2006  
TYPICAL CHARACTERISTICS  
NOISE VOLTAGE  
(REFERRED TO INPUT)  
OVER A 10-SECOND INTERVAL  
EQUIVALENT INPUT NOISE VOLTAGE  
vs  
FREQUENCY  
10  
8
50  
40  
V
=
15 V  
CC  
V
=
15 V  
CC  
R
= 20 Ω  
= 25°C  
S
f = 0.1 to 10 Hz  
T
A
T
A
= 25°C  
See Figure 2  
30  
Sample Size = 100 Units  
From 2 Wafer Lots  
20  
6
10  
0
4
− 10  
− 20  
− 30  
− 40  
− 50  
2
0
1
10  
100  
1 k  
10 k  
100 k  
0
2
4
6
8
10  
f − Frequency − Hz  
t − Time − s  
Figure 41  
Figure 42  
TLE2027  
UNITY-GAIN BANDWIDTH  
vs  
TLE2037  
GAIN-BANDWIDTH PRODUCT  
vs  
SUPPLY VOLTAGE  
SUPPLY VOLTAGE  
20  
18  
16  
14  
12  
10  
52  
51  
50  
R
C
T
= 2 kΩ  
= 100 pF  
= 25°C  
L
L
A
f = 100 kHz  
R
C
= 2 kΩ  
= 100 pF  
L
L
See Figure 3  
T
A
= 25°C  
49  
48  
0
2
4
6
8
10 12 14 16 18 20  
0
2
4
6
8
10 12 14 16 18 20 22  
| V  
CC  
| − Supply Voltage − V  
V  
− Supply Voltage − V  
CC  
Figure 43  
Figure 44  
20  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢆꢇꢈ ꢉ ꢀ ꢁꢂ ꢃ ꢄ ꢊ ꢅ ꢆꢇꢈ ꢉ ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢋꢆꢇ ꢈ ꢉ ꢀ ꢁꢂ ꢃꢄ ꢊꢅ ꢋꢆ ꢇ ꢈ  
ꢂꢌ ꢍꢋꢁ ꢎꢏꢐ ꢑ ꢁ ꢒꢓꢆꢔꢒ ꢎꢕ ꢂ ꢖꢎ ꢗ ꢖꢆ ꢕꢘ ꢂ ꢂꢙ  
ꢘꢑꢂ ꢍꢎꢕ ꢎꢒ ꢔ ꢒ ꢘꢂꢑ ꢋꢀ ꢎꢒ ꢔꢋꢁ ꢋꢚ ꢘ ꢁꢎ ꢛꢎ ꢂꢑ ꢕ  
SGLS202A − OCTOBER 2003 – REVISED OCTOBER 2006  
TYPICAL CHARACTERISTICS  
TLE2027  
UNITY-GAIN BANDWIDTH  
vs  
LOAD CAPACITANCE  
TLE2037  
GAIN-BANDWIDTH PRODUCT  
vs  
LOAD CAPACITANCE  
16  
12  
8
52  
51  
50  
49  
48  
V
= 15 V  
CC  
L
V
R
=
15 V  
= 2 kΩ  
L
R
T
= 2 kΩ  
= 25°C  
CC  
A
See Figure 3  
T
A
= 25°C  
4
0
100  
1000  
10000  
100  
1000  
10000  
C
− Load Capacitance − pF  
C
− Load Capacitance − pF  
L
L
Figure 45  
TLE2027  
Figure 46  
TLE2037  
SLEW RATE  
SLEW RATE  
vs  
vs  
FREE-AIR TEMPERATURE  
FREE-AIR TEMPERATURE  
3
2.8  
2.6  
2.4  
2.2  
2
10  
9
V
=
= 5  
= 2 kΩ  
= 100 pF  
15 V  
CC  
A
R
C
VD  
L
L
See Figure 1  
8
7
V
=
= 1  
= 2 kΩ  
= 100 pF  
15 V  
CC  
A
R
C
VD  
6
L
L
See Figure 1  
5
− 75 − 50 − 25  
0
25  
50  
75 100 125 150  
− 75 − 50 − 25  
0
25 50 75 100 125 150  
T
A
− Free-Air Temperature − °C  
T
A
− Free-Air Temperature − °C  
Figure 47  
Figure 48  
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.  
21  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀ ꢁ ꢂꢃ ꢄ ꢃ ꢅ ꢆꢇꢈꢉ ꢀ ꢁ ꢂ ꢃ ꢄ ꢊꢅ ꢆꢇ ꢈꢉ ꢀꢁ ꢂ ꢃ ꢄ ꢃꢅ ꢋ ꢆꢇ ꢈ ꢉ ꢀ ꢁꢂ ꢃ ꢄ ꢊ ꢅ ꢋꢆꢇ ꢈ  
ꢂ ꢌꢍꢋ ꢁ ꢎ ꢏꢐ ꢑ ꢁ ꢒꢓꢆꢔꢒ ꢎ ꢕ ꢂ ꢖꢎ ꢗ ꢖꢆꢕ ꢘꢂ ꢂ ꢙ  
ꢘ ꢑꢂꢍ ꢎ ꢕꢎ ꢒꢔ ꢒꢘꢂ ꢑꢋꢀꢎ ꢒ ꢔꢋ ꢁ ꢋꢚ ꢘꢁ ꢎ ꢛꢎ ꢂꢑꢕ  
SGLS202A − OCTOBER 2003 – REVISED OCTOBER 2006  
TYPICAL CHARACTERISTICS  
TLE2027  
PHASE MARGIN  
vs  
TLE2037  
PHASE MARGIN  
vs  
SUPPLY VOLTAGE  
SUPPLY VOLTAGE  
58°  
56°  
54°  
52°  
50°  
48°  
46°  
44°  
42°  
52°  
R
C
T
= 2 kΩ  
= 100 pF  
= 25°C  
L
L
A
A
R
C
= 5  
VD  
L
L
= 2 kΩ  
= 100 pF  
= 25°C  
50°  
48°  
See Figure 3  
T
A
46°  
44°  
42°  
40°  
38°  
0
2
4
6
8
10 12 14 16 18 20  
0
2
4
6
8
10 12 14 16 18 20 22  
| V  
CC  
| − Supply Voltage − V  
V  
− Supply Voltage − V  
CC  
Figure 49  
Figure 50  
TLE2027  
PHASE MARGIN  
vs  
TLE2037  
PHASE MARGIN  
vs  
LOAD CAPACITANCE  
LOAD CAPACITANCE  
60°  
50°  
60°  
50°  
40°  
30°  
20°  
V
= 15 V  
CC  
L
V
=
15 V  
CC  
R
T
= 2 kΩ  
= 25°C  
R
T
A
= 2 kΩ  
= 25°C  
L
A
See Figure 3  
40°  
30°  
20°  
10°  
10°  
0°  
0°  
100  
1000  
10000  
100  
1000  
C
− Load Capacitance − pF  
C
− Load Capacitance − pF  
L
L
Figure 51  
Figure 52  
22  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢆꢇꢈ ꢉ ꢀ ꢁꢂ ꢃ ꢄ ꢊ ꢅ ꢆꢇꢈ ꢉ ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢋꢆꢇ ꢈ ꢉ ꢀ ꢁꢂ ꢃꢄ ꢊꢅ ꢋꢆ ꢇ ꢈ  
ꢂꢌ ꢍꢋꢁ ꢎꢏꢐ ꢑ ꢁ ꢒꢓꢆꢔꢒ ꢎꢕ ꢂ ꢖꢎ ꢗ ꢖꢆ ꢕꢘ ꢂ ꢂꢙ  
ꢘꢑꢂ ꢍꢎꢕ ꢎꢒ ꢔ ꢒ ꢘꢂꢑ ꢋꢀ ꢎꢒ ꢔꢋꢁ ꢋꢚ ꢘ ꢁꢎ ꢛꢎ ꢂꢑ ꢕ  
SGLS202A − OCTOBER 2003 – REVISED OCTOBER 2006  
TYPICAL CHARACTERISTICS  
TLE2027  
PHASE MARGIN  
vs  
TLE2037  
PHASE MARGIN  
vs  
FREE-AIR TEMPERATURE  
FREE-AIR TEMPERATURE  
65°  
60°  
55°  
50°  
45°  
40°  
35°  
55°  
V
= 15 V  
V
CC  
=
= 5  
15 V  
CC  
L
R
T
= 2 kΩ  
= 25°C  
A
R
C
VD  
L
L
= 2 kΩ  
= 100 pF  
A
53°  
51°  
See Figure 3  
49°  
47°  
45°  
− 75 − 50 − 25  
0
25 50 75 100 125 150  
− 75 − 50 − 25  
0
25  
50  
75 100 125 150  
T
A
− Free-Air Temperature − °C  
T
A
− Free-Air Temperature − °C  
Figure 53  
Figure 54  
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.  
23  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀ ꢁ ꢂꢃ ꢄ ꢃ ꢅ ꢆꢇꢈꢉ ꢀ ꢁ ꢂ ꢃ ꢄ ꢊꢅ ꢆꢇ ꢈꢉ ꢀꢁ ꢂ ꢃ ꢄ ꢃꢅ ꢋ ꢆꢇ ꢈ ꢉ ꢀ ꢁꢂ ꢃ ꢄ ꢊ ꢅ ꢋꢆꢇ ꢈ  
ꢂ ꢌꢍꢋ ꢁ ꢎ ꢏꢐ ꢑ ꢁ ꢒꢓꢆꢔꢒ ꢎ ꢕ ꢂ ꢖꢎ ꢗ ꢖꢆꢕ ꢘꢂ ꢂ ꢙ  
ꢘ ꢑꢂꢍ ꢎ ꢕꢎ ꢒꢔ ꢒꢘꢂ ꢑꢋꢀꢎ ꢒ ꢔꢋ ꢁ ꢋꢚ ꢘꢁ ꢎ ꢛꢎ ꢂꢑꢕ  
SGLS202A − OCTOBER 2003 – REVISED OCTOBER 2006  
APPLICATION INFORMATION  
input offset voltage nulling  
The TLE2027 and TLE2037 series offers external null pins that can be used to further reduce the input offset  
voltage. The circuits of Figure 55 can be connected as shown if the feature is desired. If external nulling is not  
needed, the null pins may be left disconnected.  
1 kΩ  
V
CC +  
10 kΩ  
4.7 kΩ  
V
CC +  
4.7 kΩ  
IN −  
IN +  
+
IN −  
OUT  
OUT  
IN +  
+
V
V
CC −  
CC −  
(b) ADJUSTMENT WITH IMPROVED SENSITIVITY  
(a) STANDARD ADJUSTMENT  
Figure 55. Input Offset Voltage Nulling Circuits  
voltage-follower applications  
The TLE2027 circuitry includes input-protection diodes to limit the voltage across the input transistors; however,  
no provision is made in the circuit to limit the current if these diodes are forward biased. This condition can occur  
when the device is operated in the voltage-follower configuration and driven with a fast, large-signal pulse. It  
is recommended that a feedback resistor be used to limit the current to a maximum of 1 mA to prevent  
degradation of the device. Also, this feedback resistor forms a pole with the input capacitance of the device.  
For feedback resistor values greater than 10 k, this pole degrades the amplifier phase margin. This problem  
can be alleviated by adding a capacitor (20 pF to 50 pF) in parallel with the feedback resistor (see Figure 56).  
C
= 20 to 50 pF  
F
I 1 mA  
F
R
F
V
CC  
V
O
V
I
+
V
CC−  
Figure 56. Voltage Follower  
24  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢆꢇꢈ ꢉ ꢀ ꢁꢂ ꢃ ꢄ ꢊ ꢅ ꢆꢇꢈ ꢉ ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢋꢆꢇ ꢈ ꢉ ꢀ ꢁꢂ ꢃꢄ ꢊꢅ ꢋꢆ ꢇ ꢈ  
ꢂꢌ ꢍꢋꢁ ꢎꢏꢐ ꢑ ꢁ ꢒꢓꢆꢔꢒ ꢎꢕ ꢂ ꢖꢎ ꢗ ꢖꢆ ꢕꢘ ꢂ ꢂꢙ  
ꢘꢑꢂ ꢍꢎꢕ ꢎꢒ ꢔ ꢒ ꢘꢂꢑ ꢋꢀ ꢎꢒ ꢔꢋꢁ ꢋꢚ ꢘ ꢁꢎ ꢛꢎ ꢂꢑ ꢕ  
SGLS202A − OCTOBER 2003 – REVISED OCTOBER 2006  
APPLICATION INFORMATION  
macromodel information  
Macromodel information provided was derived using Microsim Parts, the model generation software used  
with Microsim PSpice. The Boyle macromodel (see Note 6) and subcircuit in Figure 57, Figure 58, and  
Figure 59 were generated using the TLE20x7 typical electrical and operating characteristics at 25°C. Using this  
information, output simulations of the following key parameters can be generated to a tolerance of 20% (in most  
cases):  
Maximum positive output voltage swing  
Maximum negative output voltage swing  
Slew rate  
Gain-bandwidth product  
Common-mode rejection ratio  
Phase margin  
Quiescent power dissipation  
Input bias current  
DC output resistance  
AC output resistance  
Open-loop voltage amplification  
Short-circuit output current limit  
NOTE 6: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, “Macromodeling of Integrated Circuit Operational Amplifiers”, IEEE Journal  
of Solid-State Circuits, SC-9, 353 (1974).  
99  
+
3
dln  
91  
V
egnd  
CC +  
9
92  
fb  
rc1  
11  
rc2  
12  
c1  
+
ro2 90  
hlim  
rp  
+
+ dip  
vb  
1
vip  
IN +  
IN −  
vin  
+
+
vc  
53  
Q1  
Q2  
r2  
C2  
6
7
2
dp  
13  
+
14  
ree  
re2  
cee  
vlim  
ga  
gcm  
dc  
re1  
8
10  
ro1  
lee  
de  
54  
V
CC −  
5
+
4
ve  
OUT  
Figure 57. Boyle Macromodel  
PSpice and Parts are trademarks of MicroSim Corporation.  
25  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀ ꢁ ꢂꢃ ꢄ ꢃ ꢅ ꢆꢇꢈꢉ ꢀ ꢁ ꢂ ꢃ ꢄ ꢊꢅ ꢆꢇ ꢈꢉ ꢀꢁ ꢂ ꢃ ꢄ ꢃꢅ ꢋ ꢆꢇ ꢈ ꢉ ꢀ ꢁꢂ ꢃ ꢄ ꢊ ꢅ ꢋꢆꢇ ꢈ  
ꢂ ꢌꢍꢋ ꢁ ꢎ ꢏꢐ ꢑ ꢁ ꢒꢓꢆꢔꢒ ꢎ ꢕ ꢂ ꢖꢎ ꢗ ꢖꢆꢕ ꢘꢂ ꢂ ꢙ  
ꢘ ꢑꢂꢍ ꢎ ꢕꢎ ꢒꢔ ꢒꢘꢂ ꢑꢋꢀꢎ ꢒ ꢔꢋ ꢁ ꢋꢚ ꢘꢁ ꢎ ꢛꢎ ꢂꢑꢕ  
SGLS202A − OCTOBER 2003 – REVISED OCTOBER 2006  
APPLICATION INFORMATION  
macromodel information (continued)  
q2  
12  
6
1
9
14 qx  
100.0E3  
530.5  
530.5  
−393.2  
−393.2  
3.571E6  
25  
.subckt TLE2027 1 2 3 4 5  
*
r2  
rc1  
rc2  
re1  
re2  
ree  
ro1  
ro2  
rp  
3
11  
12  
10  
10  
99  
5
c1  
11  
6
12  
7
4.003E-12  
3
c2  
20.00E-12  
13  
14  
10  
8
dc  
5
53  
5
dz  
de  
54  
90  
92  
4
dz  
dlp  
dln  
dp  
91  
90  
3
dz  
dx  
7
99  
4
25  
dz  
3
8.013E3  
egnd  
99  
0
poly(2) (3,0)  
vb  
9
0
dc  
0
(4,0) 0 5 .5  
vc  
3
53  
4
dc 2.400  
dc 2.100  
fb  
7
99  
poly(5) vb vc  
ve  
54  
7
ve vlp vln 0 954.8E6 −1E9 1E9 1E9  
−1E9  
vlim  
vlp  
vln  
8
dc  
0
91  
0
0
dc 40  
dc 40  
ga  
6
0
11 12  
92  
2.062E-3  
gcm  
.modeldx D(Is=800.0E-18)  
.modelqx NPN(Is=800.0E-18  
Bf=7.000E3)  
0
6
10 99  
531.3E-12  
iee  
10  
90  
11  
4
0
2
dc 56.01E-6  
vlim 1K  
13 qx  
.ends  
hlim  
q1  
Figure 58. TLE2027 Macromodel Subcircuit  
.subckt TLE2037 1 2 3 4 5  
*
q2  
r2  
12  
6
1
9
14 qz  
100.0E3  
471.5  
471.5  
A448  
c1  
11  
6
12  
7
4.003E−12  
rc1  
rc2  
re1  
re2  
ree  
ro1  
ro2  
rp  
3
11  
12  
10  
10  
99  
5
c2  
7.500E−12  
3
dc  
5
53  
5
dz  
13  
14  
10  
8
de  
54  
90  
92  
4
dz  
A448  
dlp  
dln  
dp  
91  
90  
3
dz  
3.555E6  
25  
25  
8.013E3  
dc 0  
dx  
dz  
7
99  
4
egnd  
99  
0
poly(2) (3,0)  
3
(4,0)  
0
.5 .5  
vb  
9
0
fb  
7
99  
poly(5) vb vc  
vc  
3
53  
4
dc 2.400  
dc 2.100  
ve vip vln 0 923.4E6 A800E6  
800E6 800E6 A800E6  
ve  
54  
7
vlim  
vlp  
vln  
.model  
.model  
8
dc  
0
ga  
6
0
0
6
4
0
2
11 12 2.121E−3  
10 99 597.7E−12  
dc 56.26E−6  
vlim 1K  
91  
0
0
dc 40  
dc 40  
gcm  
iee  
hlim  
q1  
92  
10  
90  
11  
dxD(Is=800.0E−18)  
qxNPN(Is=800.0E−18  
13 qx  
Bf=7.031E3)  
.ends  
Figure 59. TLE2037 Macromodel Subcircuit  
26  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
PACKAGE OPTION ADDENDUM  
www.ti.com  
4-Oct-2007  
PACKAGING INFORMATION  
Orderable Device  
TLE2037AQDRG4Q1  
TLE2037AQDRQ1  
TLE2037QDRG4Q1  
TLE2037QDRQ1  
Status (1)  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
Drawing  
SOIC  
D
8
8
8
8
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SOIC  
SOIC  
SOIC  
D
D
D
2500  
Pb-Free  
(RoHS)  
CU NIPDAU Level-2-250C-1 YEAR/  
Level-1-235C-UNLIM  
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2500  
Pb-Free  
(RoHS)  
CU NIPDAU Level-2-250C-1 YEAR/  
Level-1-235C-UNLIM  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check  
http://www.ti.com/productcontent for the latest availability information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and  
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS  
compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame  
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder  
temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is  
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the  
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incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited  
information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI  
to Customer on an annual basis.  
Addendum-Page 1  
IMPORTANT NOTICE  
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Applications  
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logic.ti.com  
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power.ti.com  
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