TLC5958RTQT [TI]

具有预充电 FET、LED 开路检测功能和 48k 位存储器的 48 通道、16 位 ES-PWM LED 驱动器 | RTQ | 56 | -40 to 85;
TLC5958RTQT
型号: TLC5958RTQT
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

具有预充电 FET、LED 开路检测功能和 48k 位存储器的 48 通道、16 位 ES-PWM LED 驱动器 | RTQ | 56 | -40 to 85

驱动 接口集成电路 存储 驱动器
文件: 总31页 (文件大小:1876K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
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TLC5958  
ZHCSCU5A MAY 2014REVISED SEPTEMBER 2014  
TLC5958 具有预充电场效应晶体管 (FET)LED 开路检测功能和显示数据  
存储器  
且支持 32 路多路复用的 48 通道 16 ES-PWM LED 驱动器  
1 特性  
工作温度范围:-40°C +85°C  
1
48 通道恒流灌电流输出  
2 应用范围  
具有最大亮度控制 (BC)/最大颜色亮度控制 (CC) 数  
据的灌电流:  
采用多路复用系统的 LED视频显示屏  
采用多路复用系统的 LED 信号板  
高刷新率、高密度的 LED 面板  
5VCC 时为 25mA  
3.3VCC 时为 20mA  
全局亮度控制 (BC)3 位(8 步长)  
3 说明  
每个颜色组的颜色亮度控制 (CC):  
9 位(512 步长),三组  
TLC5958 是一款 48 通道恒流灌电流驱动器,适用于  
占空比为 1 32 的多路复用系统。 每个通道都具有  
单独可调的 65536 步长脉宽调制 (PWM) 灰度 (GS)。  
使用多路复用增强型光谱 (ES) PWM 进行灰度  
(GS) 控制:16 位  
支持 32 路多路复用的 48K 位灰度数据存储器  
LED 电源电压高达 10V  
Vcc = 3.0V 5.5V  
采用 48K 位显示存储器以提升视觉刷新率,同时降低  
GS 数据写入频率。  
输出通道分为三组,每组含 16 个通道。 各组都具有  
512 步长颜色亮度控制 (CC) 功能。 全部 48 通道的最  
大电流值可通过 8 步长全局亮度控制 (BC) 功能设置。  
CC BC 可用于调节 LED 驱动器之间的亮度偏差。  
可通过一个串行接口端口访问 GSCC BC 数据。  
恒流精度  
通道之间 = ±1%(典型值),±3%(最大值)  
器件之间 = ±1%(典型值),±2%(最大值)  
数据传输速率:25MHz  
灰度时钟频率:33MHz  
LED 开路检测 (LOD)  
如需应用手册:《使用 TLC5958 构建高密度、高刷新  
率多路复用 LED 面板》,请通过电子邮件发送请求。  
热关断 (TSD)  
IREF 电阻器短路保护 (ISP)  
可快速恢复的节能模式 (PSM)  
延迟开关可防止浪涌电流  
预充电 FET 可避免重影现象  
器件信息(1)  
封装  
部件号  
TLC5958  
封装尺寸(标称值)  
VQFN (56)  
8.00mm x 8.00mm  
(1) 如需了解所有可用封装,请见数据表末尾的可订购产品附录。  
4 典型应用电路(多个菊花链 TLC5958)  
VLED  
SW  
COM  
n
COM  
n
VLED  
SW  
COM  
1
COM  
1
VLED  
SW  
COM  
0
COM  
0
X
48  
X 48  
OUTR0  
OUTB15  
SOUT  
OUTR0  
OUTB15  
SOUT  
DATA  
SCLK  
LAT  
SIN  
SIN  
TLC5958  
IC1  
VCC  
TLC5958  
ICn  
VCC  
SCLK  
LAT  
SCLK  
LAT  
VCC  
VCC  
Controller  
GCLK  
GCLK  
IREF  
GCLK  
IREF  
Thermal  
Pad  
Thermal  
Pad  
FLAGS  
READ  
IREFGND  
IREFGND  
GND  
GND  
GND  
GND  
3
1
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not necessarily include testing of all parameters.  
English Data Sheet: SLVSCE7  
 
 
 
 
 
 
TLC5958  
ZHCSCU5A MAY 2014REVISED SEPTEMBER 2014  
www.ti.com.cn  
目录  
Diagrams.................................................................. 11  
9.2 Timing Diagrams..................................................... 13  
10 Detailed Description ........................................... 14  
10.1 Overview ............................................................... 14  
10.2 Functional Block Diagram ..................................... 15  
10.3 Device Functional Modes...................................... 16  
11 Application and Implementation........................ 20  
12 Power Supply Recommendations ..................... 20  
13 Layout................................................................... 20  
13.1 Layout Guidelines ................................................. 20  
13.2 Layout Example .................................................... 20  
14 器件和文档支持 ..................................................... 21  
14.1 ....................................................................... 21  
14.2 静电放电警告......................................................... 21  
14.3 术语表 ................................................................... 21  
15 机械封装和可订购信息 .......................................... 21  
1
2
3
4
5
6
7
8
特性.......................................................................... 1  
应用范围................................................................... 1  
说明.......................................................................... 1  
典型应用电路(多个菊花链 TLC5958.................. 1  
修订历史记录 ........................................................... 2  
说明(继续) ........................................................... 3  
Pin Configuration and Functions......................... 3  
Specifications......................................................... 5  
8.1 Absolute Maximum Ratings ...................................... 5  
8.2 Handling Ratings ...................................................... 5  
8.3 Recommended Operating Conditions....................... 5  
8.4 Thermal Information ................................................. 6  
8.5 Electrical Characteristics........................................... 7  
8.6 Typical Characteristics.............................................. 9  
Parameter Measurement Information ................ 11  
9.1 Pin Equivalent Input and Output Schematic  
9
5 修订历史记录  
Changes from Original (May 2014) to Revision A  
Page  
已删除 已删除产品预览条 - 设置为生产数据;通改................................................................................................................ 1  
2
版权 © 2014, Texas Instruments Incorporated  
 
TLC5958  
www.ti.com.cn  
ZHCSCU5A MAY 2014REVISED SEPTEMBER 2014  
6 说明(继续)  
TLC5958 有一个错误标志:LED 开路检测 (LOD),可通过串行接口端口读取。 TLC5958 还具有节电模式,可在全  
部输出关闭后将总流耗设为 0.8mA(典型值)。  
7 Pin Configuration and Functions  
56 Pin  
RTQ  
TOP VIEW)  
56 55 54 53 52 51 50 49 48 47 46 45 44 43  
SOUT  
IREF  
OUTR14  
OUTG14  
OUTB14  
OUTR15  
OUTG15  
OUTB15  
OUTR0  
OUTG0  
OUTB0  
1
2
3
4
5
6
7
42  
41  
40  
39  
38  
OUTB9  
OUTG9  
OUTR9  
OUTB8  
OUTG8  
OUTR8  
OUTB7  
OUTG7  
OUTR7  
OUTB6  
OUTG6  
OUTR6  
GCLK  
37  
36  
Thermal  
PAD  
(Solder side)  
(GND terminal)  
35  
34  
33  
32  
31  
30  
29  
8
9
10  
11  
12  
13  
14  
OUTR1  
OUTG1  
OUTB1  
OUTR2  
15 16 17 18  
27 28  
19 20 21 22 23 24 25 26  
Pin Functions  
PIN  
I/O  
DESCRIPTION  
NAME  
GCLK  
GND  
NO.  
Grayscale(GS) pulse width modulation (PWM) reference clock control for OUTXn.  
Each GCLK rising edge increase the GS counter by1 for PWM control.  
29  
I
ThermalPad  
Power ground. The thermal pad must be soldered to GND on PCB.  
Maximum constant-current value setting. The OUTR0 to OUTB15 maximum constant output  
current are set to the desired values by connecting an external resistor between IREF and  
IREFGND. See equation 1 for more detail. The external resistor should be placed close to  
the device.  
IREF  
1
Analog ground. Dedicated ground pin for the external IREF resistor. This pin should be  
connected to analog ground trace which is connected to power ground near the common  
GND point of board.  
IREFGND  
LAT  
56  
27  
I
The LAT falling edge latches the data from the common shift register into the GS data  
memory or Function control(FC) register FC1 or FC2.  
8, 11, 14, 17,  
20, 23, 30,  
33, 36, 39,  
44, 47, 50,  
53 ,2, 5  
Constant current output for RED LED. Multiple outputs can be tied together to increase the  
constant current capability. Different voltages can be applied to each output. These outputs  
are turned on-off by GCLK signal and the data in GS data memory.  
OUTR0-R15  
O
Copyright © 2014, Texas Instruments Incorporated  
3
TLC5958  
ZHCSCU5A MAY 2014REVISED SEPTEMBER 2014  
www.ti.com.cn  
Pin Functions (continued)  
PIN  
I/O  
DESCRIPTION  
NAME  
NO.  
9, 12, 15, 18,  
21, 24, 31,  
34, 37, 40,  
45, 48, 51,  
54, 3, 6  
Constant current output for GREEN LED. Multiple outputs can be tied together to increase  
the constant current capability. Different voltages can be applied to each output. These  
outputs are turned on-off by GCLK signal and the data in GS data memory.  
OUTG0-G15  
O
O
10, 13, 16,  
19, 22, 25,  
32, 35, 38,  
41, 46, 49,  
52, 55, 4, 7  
Constant current output for BLUE LED. Multiple outputs can be tied together to increase the  
constant current capability. Different voltages can be applied to each output. These outputs  
are turned on-off by GCLK signal and the data in GS data memory.  
OUTB0-B15  
Serial data shift clock. Data present on SIN are shifted to the 48-bit common shift register  
LSB with the SCLK rising edge. Data in the shift register are shifted towards the MSB at  
each SCLK rising edge. The common shift register MSB appears on SOUT.  
SCLK  
SIN  
28  
I
I
Serial data input of the 48-bit common shift register. When SIN is high level, the LSB is set  
to '1' for only one SCLK input rising edge. If two SCLK rising edges are input while SIN is  
high, then the 48-bit shift register LSB and LSB+1 are set to '1'. When SIN is low, the LSB is  
set to '0' at the SCLK input rising edge.  
26  
Serial data output of the 48-bit common shift register. SOUT is connected to the MSB of the  
register.  
SOUT  
VCC  
42  
43  
O
Power-supply voltage.  
4
Copyright © 2014, Texas Instruments Incorporated  
TLC5958  
www.ti.com.cn  
ZHCSCU5A MAY 2014REVISED SEPTEMBER 2014  
8 Specifications  
8.1 Absolute Maximum Ratings  
over operating free-air temperature range (unless otherwise noted)  
(1)  
PARAMETER  
MIN  
MAX  
6.0  
UNIT  
V
(2)  
VCC  
IOUT  
Supply voltage  
Output current (dc)  
Input voltage  
VCC  
0.3  
OUTx0 to OUTx15, x=R, G, B  
SIN, SCLK, LAT, GCLK, IREF  
SOUT  
30  
mA  
V
(2)  
VIN  
–0.3  
–0.3  
–0.3  
VCC+0.3  
VCC+0.3  
11  
(2)  
VOUT  
Output voltage  
V
OUTx0 to OUTx15, x=R, G, B  
TJ(MAX)  
Operating junction temperature  
150  
°C  
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings  
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended  
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
(2) All voltage values are with respect to device ground terminal.  
8.2 Handling Ratings  
MIN  
–55  
0
MAX  
150  
UNIT  
Tstg  
Storage temperature range  
°C  
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all  
4000  
pins(2)  
Electrostatic  
discharge  
(1)  
V(ESD)  
V
Charged device model (CDM), per JEDEC specification  
JESD22-C101, all pins(3)  
0
1000  
(1) Electrostatic discharge (ESD) measures device sensitivity and immunity to damage caused by assembly line electrostatic discharges  
into the device.  
(2) Level listed above is the passing level per ANSI, ESDA, and JEDEC JS-001. JEDEC document JEP155 states that 500-V HBM allows  
safe manufacturing with a standard ESD control process.  
(3) Level listed above is the passing level per EIA-JEDEC JESD22-C101. JEDEC document JEP157 states that 250-V CDM allows safe  
manufacturing with a standard ESD control process.  
8.3 Recommended Operating Conditions  
At TA = –40°C to +85°C, unless otherwise noted  
MIN  
NOM  
MAX UNIT  
DC CHARACTERISTICS, VCC=3V to 5.5V  
VCC  
VO  
Supply voltage  
3
5.5  
V
V
Voltage applied to output  
High level input voltage  
Low level input voltage  
High level output current  
Low level output current  
OUTx0 to OUTx15, x=R, G, B  
SIN,SCLK,LAT,GCLK  
SIN,SCLK,LAT,GCLK  
SOUT  
10  
VCC  
VIH  
VIL  
IOH  
IOL  
0.7×VCC  
GND  
V
0.3×VCC  
-2  
V
mA  
mA  
SOUT  
2
OUTx0 to OUTx15, x=R, G, B,  
3V VCC 3.6V  
20  
25  
IOLC  
Constant output sink current  
mA  
OUTx0 to OUTx15, x=R, G, B,  
4V < VCC 5.5V  
TA  
TJ  
Operating free air temperature  
Operation junction temperature  
–40  
-40  
85  
°C  
°C  
125  
Copyright © 2014, Texas Instruments Incorporated  
5
TLC5958  
ZHCSCU5A MAY 2014REVISED SEPTEMBER 2014  
www.ti.com.cn  
MAX UNIT  
Recommended Operating Conditions (continued)  
At TA = –40°C to +85°C, unless otherwise noted  
MIN  
NOM  
AC CHARACTERISTICS, VCC=3V to 5.5V(1)  
FCLK(SCLK)  
FCLK(GCLK)  
tWH0  
Data shift clock frequency  
SCLK  
25  
33  
MHz  
MHz  
Grayscale control clock frequency GCLK  
SCLK  
10  
10  
15  
10  
2
tWL0  
SCLK  
Pulse duration  
GCLK  
ns  
tWH1  
tWL1  
GCLK  
tSU0  
SIN - SCLK↑  
tSU1  
LAT- SCLK↑  
LAT- SCLK↑  
3
5
ns  
tSU2  
LAT- SCLK, for READSID, READFC1,  
and READFC2  
50  
Setup time  
tSU3  
tSU4  
LAT(Vsync command) - GCLK↑  
2500  
The last LATfor no all ‘0’ data latching to  
resume normal mode – GCLK,  
PSAVE_ENA bit = ‘1b’  
50  
µS  
ns  
tSU5  
tH0  
The last GCLK- the 1st GCLKof next line  
SCLK- SIN  
20  
2
tH1  
Hold time  
SCLK- LAT↑  
2
ns  
tH2  
SCLK- LAT↓  
13  
(1) Specified by design  
8.4 Thermal Information  
TLC5958  
RTQ  
56 PINS  
27.4  
THERMAL METRIC(1)  
UNIT  
RθJA  
Junction-to-ambient thermal resistance  
RθJC(top)  
RθJB  
Junction-to-case (top) thermal resistance  
Junction-to-board thermal resistance  
13.6  
5.5  
°C/W  
ψJT  
Junction-to-top characterization parameter  
Junction-to-board characterization parameter  
Junction-to-case (bottom) thermal resistance  
0.2  
ψJB  
5.5  
RθJC(bot)  
0.8  
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.  
6
Copyright © 2014, Texas Instruments Incorporated  
TLC5958  
www.ti.com.cn  
ZHCSCU5A MAY 2014REVISED SEPTEMBER 2014  
8.5 Electrical Characteristics  
At VCC= 3.0V to 5.5V and TA= –40°C to 85°C, VLED=5.0V, Typical values are at VCC= 3.3V, TA= 25°C (unless otherwise  
noted).  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
VCC  
0.4  
UNIT  
VOH  
High  
Low  
IOH = -2mA at SOUT  
IOL= 2 mA at SOUT  
LODVTH = 00b  
LODVTH = 01b  
LODVTH = 10b  
LODVTH = 11b  
VCC–0.4  
V
Output voltage  
VOL  
V
VLOD0  
VLOD1  
VLOD2  
VLOD3  
VIREF  
IIN  
0.06  
0.2  
0.11  
0.25  
0.16  
0.3  
LED open detection threshold  
V
0.34  
0.44  
1.19  
–1  
0.39  
0.44  
0.54  
1.228  
1
0.49  
Reference voltage output  
Input current (SIN, SCLK)  
RIREF = 6.2 kΩ(1mA target), BC=0h, CCR/G/B=81h  
1.209  
V
VIN = VCC or GND  
µA  
SIN/SCLK/LAT/GSCLK=GND, GSn=0000h, BC=0h,  
CCR/G/B=81h, VOUTn = Vcc, RIREF=OPEN  
5.5  
7
7
ICC0  
ICC1  
SIN/SCLK/LAT/GSCK=GND, GSn=0000h, BC=4h,  
CCR/G/B=137h,VOUTn=Vcc, RIREF=7.5kΩ (Io=10mA target)  
9
SIN/SCLK/LAT=GND, GCLK=33MHz, TSU5 = 200nS,  
8+8 mode, GSn=FFFFh, BC=4h, CCR/G/B=137h,  
VOUTn=Vcc-1V when channel on, VOUTn=Vcc  
when channel off. RIREF=7.5kΩ (Io=10mA target)  
25  
31  
ICC2  
Supply current (Vcc)  
mA  
SIN/SCLK/LAT=GND, GCLK=33MHz, TSU5=200nS,  
8+8 mode, GSn=FFFFh, BC=7h, CCR/G/B=1F5h,  
VOUTn=Vcc-2.5V when channel on, VOUTn=Vcc  
when channel off. RIREF=7.5kΩ (Io=25mA target)  
28  
33  
ICC3  
ICC4  
In power save mode  
0.9  
1.5  
All OUTn=on, BC=0h, CCR/G/B=81h, VOUTn=VOUTfix=1V,  
RIREF=6.2kΩ(1mA target), TA = +25°C, at same color  
grouped output of OUTR0-15, OUTG0-15 and OUTB0-15  
±1%  
±3%  
Constant current error  
(OUTx0-15, x=R/G/B)  
Channel-to-  
channel(1)  
ΔIOLC0  
All OUTn=on, BC=0h, CCR/G/B=81h, VOUTn=VOUTfix=1V,  
RIREF=6.2kΩ(1mA target), TA =+25°C, at same color  
grouped output of OUTR0-15, OUTG0-15 and OUTB0-15  
±1%  
±2%  
Constant current error  
(OUTx0-15, x=R/G/B)  
Device-to-  
device(2)  
ΔIOLC1  
VCC=3.0 to 5.5V, All OUTn=on, BC=0h, CCR/G/B=81h,  
VOUTn=VOUTfix=1V, RIREF=6.2kΩ(1mA target)  
ΔIOLC2  
ΔIOLC3  
Line regulation(3)  
Load regulation(4)  
±1  
±1  
±1.5  
±1.5  
%/V  
%/V  
All OUTn=on, BC=0h, CCR/G/B=81h, VOUTn=1 to 3V,  
VOUTfix=1V, RIREF=6.2kΩ(1mA target)  
(1) The deviation of each outputs in same color group (OUTR0~15 or OUTG0~15 or OUTB0~15) from the average of same color group  
constant current. The deviation is calculated by the formula. (X=R or G or B, n=0~15)  
é
ê
ê
ê
ù
ú
IOUTXn  
D %  
( )  
=
-1 ´100  
ú
(IOUTX0 + IOUTX1+ ¼+ IOUTX14 + IOUTX15)  
16  
ú
ê
ë
ú
û
spacer  
(2) The deviation of the average of constant-current in each color group from the ideal constant-current value. (X = R or G or B) :  
é (IOUTX0 + IOUTX1 + ¼ + IOUTX15)  
ù
ú
ú
ú
- (Ideal Output Current)  
ê
16  
D %  
( )  
=
´100  
ê
Ideal Output Current  
ê
ê
ë
ú
û
Ideal current is calculated by the following equation:  
é
ê
ù
ú
V
IREF  
(W)  
Ideal Output mA = Gain ´  
´ CCR or CCG, CCB /511d, VIREF = 1.209V Typ ,  
(
)
(
)
(
)
R
ê
ë
ú
û
IREF  
Refer to Table 1 for the Gain at chosen BC.  
spacer  
(3) Line regulation is calculated by the following equation. (X=R or G or B, n=0~15):  
é
ù
(IOUTXn at VCC = 5.5V) – IOUTXn at VCC = 3.0V  
(
)
100  
D %V  
(
=
´
ê
ú
)
IOUTXn at VCC = 3.0V  
5.5V – 3V  
(
)
ê
ú
ë
û
spacer  
(4) Load regulation is calculated by the following equation. (X=R or G or B, n=0~15):  
é
ù
(IOUTXn at VOUTXn = 3V) – IOUTXn at VOUTXn = 1V  
(
)
100  
D %V  
(
=
´
ê
ú
)
IOUTXn at VOUTXn = 1V  
3V – 1V  
(
)
ê
ú
ë
û
spacer  
Copyright © 2014, Texas Instruments Incorporated  
7
TLC5958  
ZHCSCU5A MAY 2014REVISED SEPTEMBER 2014  
www.ti.com.cn  
Electrical Characteristics (continued)  
At VCC= 3.0V to 5.5V and TA= –40°C to 85°C, VLED=5.0V, Typical values are at VCC= 3.3V, TA= 25°C (unless otherwise  
noted).  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
All OUTn=on, BC=7h, CCR/G/B=1F7h, VOUTn=VOUTfix=1V,  
RIREF=7.5kΩ(25mA target), TA =+25°C, at same color  
grouped output of OUTR0-15, OUTG0-15 & OUTB0-15  
Channel-to-  
channel(1)  
Constant current error  
(OUTx0-15, x=R/G/B)  
ΔIOLC4  
±1%  
±3%  
All OUTn=on, BC=7h, CCR/G/B=1F7h, VOUTn=VOUTfix=1V,  
RIREF=7.5kΩ(25mA target), TA = +25°C, at same color  
grouped output of OUTR0-15, OUTG0-15 and OUTB0-15  
Device-to-  
device(2)  
Constant current error  
(OUTx0-15, x=R/G/B)  
ΔIOLC5  
±1%  
±2%  
±1.5  
VCC=3.0 to 5.5V, All OUTn=on, BC=7h, CCR/G/B=1F7h,  
VOUTn=VOUTfix=1V, RIREF=7.5Kohm(25mA target)  
ΔIOLC6  
ΔIOLC7  
Line regulation(3)  
Load regulation(4)  
±1  
±1  
%/V  
%/V  
All OUTn=on, BC=7h, CCR/G/B=1F7h, VOUTn=1 to 3V,  
VOUTfix=1V, RIREF=7.5kΩ(25mA target)  
±1.5  
180  
TTSD  
Thermal shutdown threshold(5)  
Thermal shutdown hysterisis  
160  
170  
10  
°C  
°C  
V
THYS  
VISP(in)  
IREF resistor short protection threshold  
0.135  
0.19  
IREF resistor short-protection release  
threshold  
V
VISP(out)  
0.325  
0.375  
RPDWN  
RPUP  
Pull-down resistor  
Pull-up resistor  
LAT  
250  
250  
500  
500  
750  
750  
kΩ  
kΩ  
V
GCLK  
All OUTn=on, BC=4h, CCR/G/B=137h, Riref=7.5kΩ.  
(Io=10mA target)  
0.32  
0.35  
(5)  
Vknee  
Knee voltage (OUTX 0~15), X=R/G/B  
(5) Specified by design.  
8
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8.6 Typical Characteristics  
VCC= 3.3V and TA= 25°C, unless otherwise noted.  
35  
35  
30  
25  
20  
15  
10  
5
1 mA  
1 mA  
5 mA  
10 mA  
20 mA  
25 mA  
5 mA  
30  
25  
20  
15  
10  
5
10 mA  
20 mA  
0
0
0.0  
0.5  
1.0  
1.5  
2.0  
0.0  
0.5  
1.0  
1.5  
2.0  
Output Voltage (V)  
Output Voltage (V)  
C001  
C002  
VCC = 5V  
CCR/G/B=1FFh,  
BC=0  
VCC = 3.3V  
CCR/G/B=1FFh,  
BC=0  
Figure 1. Output Current vs Output Voltage  
Figure 2. Output Current vs Output Voltage  
12  
10  
8
3
2
1
6
0
4
±1  
±2  
±3  
VCC = 3.3 V Min  
T
T
T
= ±40ƒC  
A
V=3.3 V Max  
CC  
2
= 25ƒC  
A
V
= 5 V Min  
CC  
= 85ƒC  
V
= 5 V Max  
A
CC  
0
0.0  
0.2  
0.4  
0.6  
0.8  
1.0  
0
5
10  
15  
20  
25  
30  
Output Voltage (V)  
Output Current (mA)  
C003  
C004  
VCC = 5V  
Temperature  
Changing  
CCR/G/B=1FFh,  
BC=0  
VOUTXn = 0.8V  
CCR/G/B=1FFh,  
BC=0  
Figure 3. Output Current vs Output Voltage  
Figure 4. Constant Current Error (CH-to-CH) vs Output  
Current  
3
2
30  
1 mA  
5 mA  
25  
10 mA  
1
20  
20 mA  
25 mA  
15  
0
±1  
±2  
±3  
10  
5
1 mA Min  
1 mA Max  
25 mA Min  
25 mA Max  
0
0
20  
40  
60  
80  
±40  
±20  
0
128  
256  
384  
512  
Ambient Temperature (ƒC)  
Color Control Data (Decimal)  
C005  
C006  
VCC = 5V  
VOUTXn = 0.8V  
CCR/G/B = 1FFh,  
BC = 0  
VCC = 5V  
VOUTXn = 0.8V  
BC = 7  
Figure 5. Constant-Current Error (CH-to-CH) vs Temperature  
Figure 6. Color Control (CC) vs Output Current  
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Typical Characteristics (continued)  
VCC= 3.3V and TA= 25°C, unless otherwise noted.  
30  
35  
30  
25  
20  
15  
10  
5
1 mA  
5 mA  
25  
10 mA  
20  
20 mA  
25 mA  
15  
10  
5
VCC=3.3V  
VCC=5V  
0
0
0
1
2
3
4
5
6
7
8
0
5
10  
15  
20  
25  
30  
Brightness Control Data (Decimal)  
Output Current (mA)  
C007  
C008  
VCC = 5V  
VOUTXn = 0.8V  
CCR/G/B = 1FFh  
VOUTXn = 0.8V  
GCLK = 33MHz,  
GSXn = FFFFh  
CCR/G/B=1FFh,  
BC=0  
Figure 8. Supply Current (Icc) vs Output Current  
Figure 7. Brightness Control (BC) vs Output Current  
30  
1.4  
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
0.0  
25  
20  
15  
10  
V
V
V
= 3 V  
V
= 3 V  
CC  
CC  
5
0
= 4 V  
V
= 4 V  
CC  
CC  
= 5.5 V  
V
= 5.5 V  
CC  
CC  
0
20  
40  
60  
80  
100  
120  
0
20  
40  
60  
80  
100  
120  
±40  
±20  
±40  
±20  
Ambient Temperature (ƒC)  
Ambient Temperature (ƒC)  
C009  
C010  
VOUTXn = 0.8V  
CCR/G/B = 137h,  
BC = 4, GCLK =  
33MHz  
GSXn = FFFFh,  
RIREF = 7.5kΩ  
(10mA target)  
VOUTXn = 0.8V  
CCR/G/B = 137h,  
BC=4  
GCLK=GND,  
GSXn=0h  
Figure 9. Supply Current (Icc) vs Temperature  
Figure 10. Supply Current in Power Save Mode (Icc)  
vs Temperature  
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9 Parameter Measurement Information  
9.1 Pin Equivalent Input and Output Schematic Diagrams  
VCC  
VCC  
LAT  
INPUT  
GND  
GND  
Figure 11. SIN, SCLK  
Figure 12. LAT  
VCC  
VCC  
GCLK  
OUTPUT  
GND  
GND  
Figure 13. GCLK  
Figure 14. SOUT  
(1) X=R or G or B, n=0~15  
OUTXn(1)  
GND  
Figure 15. OUTR0/G0/B0 Through OUTR15/G15/B15  
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Pin Equivalent Input and Output Schematic Diagrams (continued)  
9.1.1 Test Circuits  
(1) CL includes measurement probe and jig capacitance.  
(2) X=R or G or B, n=0~15  
(1) CL includes measurement probe and jig capacitance.  
RL  
VCC  
VCC  
VLED  
VCC  
VCC  
OUTXn(2)  
GND  
SOUT  
CL(1)  
CL(1)  
GND  
Figure 16. Rise Time and Fall Time Test Circuit for Figure 17. Rise Time and Fall Time Test Circuit for  
OUTXn  
SOUT  
(1) X=R or G or B, n=0~15  
V
OUTR0  
CC  
V
CC  
OUTXn(1)  
OUTB15  
VOUTXn(1)  
GND  
VOUTfix  
Figure 18. Constant Current Test Circuit for OUTXn  
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9.2 Timing Diagrams  
tWH0, WL0, WH1,tWL1,tWH2  
t
t
INPUT  
50%  
GND  
tWH  
tWL  
tSU0, SU1, SU2, SU3, SU4,tH0,tH1,tH2  
t
t
t
t
CLOCK  
INPUT(1)  
50%  
GND  
tH  
tSU  
VCC  
DATA/CONTROL  
INPUT(1)  
50%  
GND  
tSU5  
GCLK(2)  
1
2
3
255 256 257  
1
2
255 256 257  
TSU  
(1) Input pulse rise and fall time is 1~3ns  
(2) 8 + 8 mode (SEL_PWM=0)  
Figure 19. Timing Diagrams  
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10 Detailed Description  
10.1 Overview  
The TLC5958 is a 48 channels constant-current sink driver for multiplexing system with 1 to 32 duty ratio. Each  
channel has an individually-adjustable, 65536-step, pulse width modulation (PWM) grayscale (GS).  
48K bit display memory is implemented to increase the visual refresh rate and to decrease the GS data writing  
frequency.  
The TLC5958 support output current range from 1mA to 25mA, channel-to-channel accuracy is 3% max, device-  
to-device accuracy is 2% max in all current range. Besides, it implement Low Gray Scale Enhancement  
(LGSE™) technology to improve the display quality at low grayscale condition. These features make TLC5958  
more suitable for high-density multiplexing application.  
The output channels are grouped into three groups, each group has 16 channels. Each group has a 512-step  
color brightness control (CC) function. The maximum current value of all 48 channels can be set by 8-step global  
brightness control (BC) function. CC and BC can be used to adjust the brightness deviation between LED  
drivers. GS, CC, and BC data are accessible via a serial interface port.  
The TLC5958 has one error flag: LED open detection (LOD), which can be read via a serial interface port.  
Besides, The TLC5958 also have Thermal shut down(TSD) and Iref resistor short protection(ISP), which make  
sure a higher system reliability. The TLC5958 also has a power-save mode that sets the total current  
consumption to 0.8mA (typ) when all outputs are off.  
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10.2 Functional Block Diagram  
OUTG0  
OUTB0  
OUTR1  
OUTB15  
OUTG15  
OUTR0  
VCC  
VCC  
LED Open Detection (LOD)  
48  
30  
IREF  
Reference  
current  
control  
48CH Constant Current Sink  
3bit BC and 27bit CC  
Detection  
Voltage  
IREFGND  
48  
1
Programmable Group delay  
2
48  
GS Counter  
Line read counter and  
Sub-period counter  
ES-PWM Decoder and  
timing control for 48CH  
Vsync  
48  
BANK_SEL  
Line address  
for read  
Vsync  
48kbit SRAM  
BANK A  
16bit x48CH  
x 32Line  
BANK B  
16bit x48CH  
x 32Line  
48  
Address  
decoder and  
writing control  
WRTGS  
Vsync  
44bit FC1 register  
17bit FC2 register  
WRTFC  
LAT  
Command  
Decoder  
SCLK  
43  
LSB  
MSB  
READFC1/2  
48bit Common shift register  
SOUT  
SIN  
READSID  
0
47  
48  
Power  
save  
control  
To all  
analog  
circuit  
48bit LOD data  
Thermal  
Pad  
GND  
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10.3 Device Functional Modes  
After power on, all OUTXn of the TLC5958 are turned off. All the internal counters and function control registers  
(FC1/FC2) are initialized. The following list is a brief summary of the sequence to operate the TLC5958, to give  
users a general idea how the device works. After that, the function block related to each step is detailed in the  
following sections.  
1. According to required LED current, choose BC & CC code, select the current programming resistor RIREF.  
2. Send WRTFC command to set FC1/2 register value if the default value need be changed.  
3. Write GS data of all lines (max 32 lines) into one of the two memory BANKs.  
4. Send Vsync command, the BANK with the GS data written just now will be displayed.  
5. Input GCLK continuously, 257GCLK (or 513GCLK) as a segment. Between the interval of two segments,  
supply voltage should be switched from one line to next line accordingly.  
6. During the same period of step 5, GS data for next frame should be written into another BANK.  
7. When the time of one frame ends, Vsync command should be input to swap the purpose of the two BANKs.  
Repeat step 5 through 7.  
10.3.1 Brightness Control (BC) Function  
The TLC5958 is able to adjust the output current of all constant-current outputs simultaneously. This function is  
called global brightness control (BC). The global BC for all outputs is programmed with a 3-bit word, thus all  
output currents can be adjusted in 8 steps from 12.9% to 100% for a given current-programming resistor, RIREF  
(See Table 2).  
BC data can be set via the serial interface. When the BC data changes, the output current also changes  
immediately. When the device is powered on, the BC data in the function control (FC) register FC1 is set to 4h  
as the initial value.  
10.3.2 Color Brightness Control (CC) Function  
The TLC5958 is able to adjust the output current of each of the three color groups OUTR0-OUTR15, OUTG0-  
OUTG15, and OUTB0-OUTB15 separately. This function is called color brightness control (CC). For each color,  
it has 9-bit data latch CCR,CCG, or CCB in FC1 register . Thus, all color group output currents can be adjusted  
in 512 steps from 0% to 100% of the maximum output current, IOLCMax. (See the next section for more detail  
about IOLCMax). The CC data are entered via the serial interface. When the CC data change, the output current  
also changes immediately.  
When the IC is powered on, the CC data are set to ‘100h’. Equation 1 calculates the actual output current.  
Iout(mA) = IOLCMax(mA) × ( CCR/511d or CCG/511d or CCB/511d)  
(1)  
Where:  
IOLCMax = the maximum channel current for each channel, determined by BC data and RIREF (See Equation 2)  
CCR/G/B = the color brightness control value for each color group in the FC1 register (000h to 1FFh)  
Table 1 shows the CC data versus the constant-current against IOLCMax  
.
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Device Functional Modes (continued)  
Table 1. CC Data vs Current Ratio and Set Current Value  
RATIO OF OUTPUT  
CURRENT  
CC DATA (CCR or CCG or CCB)  
OUTPUT CURRENT (mA, RIREF = 7.41 k)  
TO IolcMax(%, typical)  
BC = 7h  
(IolcMax =25mA)  
BC = 0h  
(IolcMax=3.2mA)  
BINARY  
DECIMAL  
HEX  
0 0000 0000  
0 0000 0001  
0 0000 0010  
---  
0
1
00  
01  
02  
---  
0
0
0
0.2  
0.4  
---  
0.05  
0.10  
---  
0.006  
0.013  
---  
2
---  
1 0000 0000  
(Default)  
256  
(Default)  
100  
(Default)  
50.1  
12.52  
1.621  
---  
---  
---  
---  
---  
---  
1 1111 1101  
1 1111 1110  
1 1111 1111  
509  
510  
511  
1FD  
1FE  
1FF  
99.6  
99.8  
100.0  
24.90  
24.95  
25  
3.222  
3.229  
3.235  
10.3.3 Select RIREF For a Given BC  
The maximum output current per channel, IOLCMax, is determined by resistor RIREF, placed between the IREF and  
IREFGND pins, and the BC code in FC1 register. The voltage on IREF is typically 1.209V. RIREF can be  
calculated by Equation 2.  
Riref(k) = Viref(V) / IOLCMax(mA) × Gain  
(2)  
Where:  
VIREF = the internal reference voltage on IREF (1.209V, typical)  
IOLCMax is the largest current for each output at CCR/G/B=1FFh.  
Gain = the current gain at a selected BC code (See Table 2 )  
Table 2. Current Gain Versus BC Code  
BC DATA  
RATIO OF  
GAIN  
GAIN / GAIN_MAX (AT MAX  
BC)  
BINARY  
HEX  
000 (recommend)  
0 (recommend  
20.4  
40.3  
12.9%  
25.6%  
52.4%  
12.9%  
64.7%  
73.3%  
91.7%  
100%  
001  
010  
1
2
59.7  
011  
3
82.4  
100 (default)  
101  
4 (default)  
101.8  
115.4  
144.3  
157.4  
5
6
7
110  
111  
NOTE: Recommend using a smaller BC code for better performance. For noise immunity purposes, suggest RIREF < 60 kΩ  
10.3.4 Choosing BC/CC For a Different Application  
BC is mainly used for global brightness adjustment between day and night. Suggested BC is 4h, which is in the  
middle of the range, thus, one can change brightness up and down flexibly.  
CC can be used to fine tune the brightness in 512 steps, this is suitable for white balance adjustment between  
RGB color group. To get a pure white color, the general requirement for the luminous intensity ratio of R, G, B  
LED is 3:6:1. Depending on the characteristics of the LED (Electro-Optical conversion efficiency), the current  
ratio of R, G, B LED will be much different from this ratio. Usually, the Red LED needs the largest current. One  
can choose 511d (the max value) CC code for the color group that needs the largest initial current, then choose  
proper CC code for the other two color groups according to the current ratio requirement of the LED used.  
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10.3.4.1 Example 1: Red LED Current is 20mA, Green LED Needs 12mA, Blue LED needs 8mA  
1. Red LED needs the largest current, so choose 511d for CCR  
2. 511 x 12mA / 20mA = 306.6, thus choose 307d for CCG. With same method, choose 204d for CCB.  
3. According to the required red LED current, choose 7h for BC.  
4. According to Equation 2, RIREF = 1.209V/20mA x 157.4 = 9.5 kΩ  
In this example, we choose 7h for BC, instead of using the default 4h. This is because the Red LED current is  
20mA, approaching the upper limit of current range. To prevent the constant output current from exceeding the  
upper limit in case a larger BC code is input accidently, we choose the maximum BC code here.  
10.3.4.2 Example 2: Red LED Current is 5mA, Green LED Needs 2mA, Blue LED Needs 1mA.  
1. Red LED needs the largest current, so choose 511d for CCR.  
2. 511 x 2mA / 5mA = 204.4, thus choose 204d for CCG. With same method, choose 102d for CCB.  
3. According to the required blue LED current, choose 0h for BC.  
4. According to Equation 2, RIREF = 1.209V / 5mA x 20.4 = 4.93 kΩ  
In this example, we choose 0h for BC, instead of using the default 4h. This is because the Blue LED current is  
1mA, is approaching the lower limit of current range. To prevent the constant output current from exceeding the  
lower limit in case a lower BC code is input accidently, we choose the minimum BC code here. In general, if LED  
current is in the middle of the range (i.e, 10mA), one can just use the default 4h as BC code.  
10.3.5 LED Open Detection (LOD)  
The LOD function detects faults caused by an open circuit in any LED string; or, a short from OUTXn to ground  
with low impedance. It does this by comparing the OUTXn voltage to the LOD detection threshold voltage level  
set by LODVLT in the FC1 register. If the OUTXn voltage is lower than the programmed voltage, the  
corresponding output LOD bit will be set to '1' to indicate a open LED. Otherwise, the output of that LOD bit is '0'.  
LOD data output by the detection circuit are valid only during the ‘on’ period of that OUTXn output channel. The  
LOD data are always ‘0’ for outputs that are turned off.  
10.3.6 Power Save Mode (PSM)  
The power-save mode (PSM) is enabled by setting PSAVE_ENA (bit5 of FC2 register) to ‘1’. When power on,  
this bit default is ‘0’.  
When this function is enabled, if the GS data received for next frame is all ‘0’, IC will enter power save mode at  
the moment Vsync command input.  
When the IC is in power-save mode, it resumes normal mode when it detects non-zero GS data input. In power-  
save mode all analog circuits such as constant current output and the LOD circuit are not operational; the device  
total current consumption, Icc, is below 1mA.  
10.3.7 Internal Pre-Charge FET  
The internal pre-charge FET can prevent ghosting of multiplexed LED modules. One cause of this phenomenon  
is the charging current for parasitic capacitance of the OUTXn through the LED when the supply voltage switches  
from one common line to the next common line.  
To prevent this unwanted charging current, TLC5958 uses an internal FET to pull OUTXn up to VCC –1.4V  
during the common line switching period. Thus, no charging current flows through LED and ghosting is  
eliminated.  
10.3.8 Thermal Shutdown (TSD)  
The thermal shutdown (TSD) function turns off all IC constant-current outputs when the junction temperature (TJ)  
exceeds 170°C (typ). It resumes normal operation when TJ falls below 160°C (typ).  
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10.3.9 IREF Resistor Short Protection (ISP)  
The Iref resistor short protection (ISP) function prevents unwanted large currents from flowing though the  
constant-current output when the Iref resistor is shorted accidently. The TLC5958 turns off all output channels  
when the Iref pin voltage is lower than 0.19V (typ). When the Iref pin voltage goes higher than 0.325V (typ), the  
TLC5958 resumes normal operation.  
10.3.10 Noise Reduction  
Large surge currents may flow through the IC and the board on which the device is mounted if all 48 LED  
channels turned on simultaneously at the 1st GCLK rising edge. This large surge current could induce  
detrimental noise and electromagnetic interference (EMI) into other circuits.  
The TLC5958 separates the LED channels into 12 groups. Each group turns on sequentially with some delay  
between one group and the next group. By this operation, a soft-start feature provides for minimal inrush current.  
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11 Application and Implementation  
Send request via email for Application Note: Build High Density, High Refresh Rate, Multiplexing LED Panel with  
TLC5958  
12 Power Supply Recommendations  
The VCC power supply voltage should be decoupled by placing a 0.1 µF ceramic capacitor close to VCC pin and  
GND plane. Depending on panel size, several electrolytic capacitors must be placed on board equally distributed  
to get a well regulated LED supply voltage (VLED). VLED voltage ripple should be less than 5% of its nominal  
value. Furthermore, the VLED should be set to the voltage calculated by equation:  
VLED > Vf + 0.4V (10mA constant current example)  
(3)  
Where: Vf = maximum forward voltage of LED  
13 Layout  
13.1 Layout Guidelines  
1. Place the decoupling capacitor near the VCC pin and GND plane.  
2. Place the current programming resistor Riref close to IREF pin and IREFGND pin.  
3. Route the GND pattern as widely as possible for large GND currents. Maximum GND current is  
approximately 1.2A  
4. Routing between the LED cathode side and the device OUTXn pin should be as short and straight as  
possible to reduce wire inductance.  
5. The PowerPAD™ must be connected to GND plane because the pad is used as power ground pin internally,  
there will be large current flow through this pad when all channels turn on. Furthermore, this pad should be  
connected to a heat sink layer by thermal via to reduce device temperature. One suggested thermal via  
pattern is shown as below. For more information about suggested thermal via pattern and via size, see "  
PowerPAD Thermally Enhanced Package", SLMA002G.  
13.2 Layout Example  
20  
版权 © 2014, Texas Instruments Incorporated  
TLC5958  
www.ti.com.cn  
ZHCSCU5A MAY 2014REVISED SEPTEMBER 2014  
14 器件和文档支持  
14.1 商标  
LGSE, PowerPAD are trademarks of Texas Instruments.  
All other trademarks are the property of their respective owners.  
14.2 静电放电警告  
这些装置包含有限的内置 ESD 保护。 存储或装卸时,应将导线一起截短或将装置放置于导电泡棉中,以防止 MOS 门极遭受静电损  
伤。  
14.3 术语表  
SLYZ022 TI 术语表。  
这份术语表列出并解释术语、首字母缩略词和定义。  
15 机械封装和可订购信息  
以下页中包括机械封装和可订购信息。 这些信息是针对指定器件可提供的最新数据。 这些数据会在无通知且不对  
本文档进行修订的情况下发生改变。 欲获得该数据表的浏览器版本,请查阅左侧的导航栏。  
版权 © 2014, Texas Instruments Incorporated  
21  
重要声明  
德州仪器(TI) 及其下属子公司有权根据 JESD46 最新标准, 对所提供的产品和服务进行更正、修改、增强、改进或其它更改, 并有权根据  
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都遵循在订单确认时所提供的TI 销售条款与条件。  
TI 保证其所销售的组件的性能符合产品销售时 TI 半导体产品销售条件与条款的适用规范。仅在 TI 保证的范围内,且 TI 认为 有必要时才会使  
用测试或其它质量控制技术。除非适用法律做出了硬性规定,否则没有必要对每种组件的所有参数进行测试。  
TI 对应用帮助或客户产品设计不承担任何义务。客户应对其使用 TI 组件的产品和应用自行负责。为尽量减小与客户产品和应 用相关的风险,  
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TI 不对任何 TI 专利权、版权、屏蔽作品权或其它与使用了 TI 组件或服务的组合设备、机器或流程相关的 TI 知识产权中授予 的直接或隐含权  
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对于 TI 的产品手册或数据表中 TI 信息的重要部分,仅在没有对内容进行任何篡改且带有相关授权、条件、限制和声明的情况 下才允许进行  
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TI 及其代理造成的任何损失。  
在某些场合中,为了推进安全相关应用有可能对 TI 组件进行特别的促销。TI 的目标是利用此类组件帮助客户设计和创立其特 有的可满足适用  
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TI 组件未获得用于 FDA Class III(或类似的生命攸关医疗设备)的授权许可,除非各方授权官员已经达成了专门管控此类使 用的特别协议。  
只有那些 TI 特别注明属于军用等级或增强型塑料TI 组件才是设计或专门用于军事/航空应用或环境的。购买者认可并同 意,对并非指定面  
向军事或航空航天用途的 TI 组件进行军事或航空航天方面的应用,其风险由客户单独承担,并且由客户独 力负责满足与此类使用相关的所有  
法律和法规要求。  
TI 已明确指定符合 ISO/TS16949 要求的产品,这些产品主要用于汽车。在任何情况下,因使用非指定产品而无法达到 ISO/TS16949 要  
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产品  
应用  
www.ti.com.cn/telecom  
数字音频  
www.ti.com.cn/audio  
www.ti.com.cn/amplifiers  
www.ti.com.cn/dataconverters  
www.dlp.com  
通信与电信  
计算机及周边  
消费电子  
能源  
放大器和线性器件  
数据转换器  
DLP® 产品  
DSP - 数字信号处理器  
时钟和计时器  
接口  
www.ti.com.cn/computer  
www.ti.com/consumer-apps  
www.ti.com/energy  
www.ti.com.cn/dsp  
工业应用  
医疗电子  
安防应用  
汽车电子  
视频和影像  
www.ti.com.cn/industrial  
www.ti.com.cn/medical  
www.ti.com.cn/security  
www.ti.com.cn/automotive  
www.ti.com.cn/video  
www.ti.com.cn/clockandtimers  
www.ti.com.cn/interface  
www.ti.com.cn/logic  
逻辑  
电源管理  
www.ti.com.cn/power  
www.ti.com.cn/microcontrollers  
www.ti.com.cn/rfidsys  
www.ti.com/omap  
微控制器 (MCU)  
RFID 系统  
OMAP应用处理器  
无线连通性  
www.ti.com.cn/wirelessconnectivity  
德州仪器在线技术支持社区  
www.deyisupport.com  
IMPORTANT NOTICE  
邮寄地址: 上海市浦东新区世纪大道1568 号,中建大厦32 楼邮政编码: 200122  
Copyright © 2014, 德州仪器半导体技术(上海)有限公司  
PACKAGE OPTION ADDENDUM  
www.ti.com  
10-Dec-2020  
PACKAGING INFORMATION  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan  
Lead finish/  
Ball material  
MSL Peak Temp  
Op Temp (°C)  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
(6)  
TLC5958RTQR  
TLC5958RTQT  
ACTIVE  
ACTIVE  
QFN  
QFN  
RTQ  
RTQ  
56  
56  
2000 RoHS & Green  
250 RoHS & Green  
NIPDAU  
Level-3-260C-168 HR  
Level-3-260C-168 HR  
-40 to 85  
-40 to 85  
TLC5958  
TLC5958  
NIPDAU  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance  
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may  
reference these types of products as "Pb-Free".  
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.  
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based  
flame retardants must also meet the <=1000ppm threshold requirement.  
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
of the previous line and the two combined represent the entire Device Marking for that device.  
(6)  
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two  
lines if the finish value exceeds the maximum column width.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
10-Dec-2020  
Addendum-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
23-Jun-2015  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
TLC5958RTQR  
TLC5958RTQT  
QFN  
QFN  
RTQ  
RTQ  
56  
56  
2000  
250  
330.0  
180.0  
16.4  
16.4  
8.3  
8.3  
8.3  
8.3  
1.1  
1.1  
12.0  
12.0  
16.0  
16.0  
Q2  
Q2  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
23-Jun-2015  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
TLC5958RTQR  
TLC5958RTQT  
QFN  
QFN  
RTQ  
RTQ  
56  
56  
2000  
250  
367.0  
210.0  
367.0  
185.0  
38.0  
35.0  
Pack Materials-Page 2  
GENERIC PACKAGE VIEW  
RTQ 56  
8 x 8, 0.5 mm pitch  
VQFN - 1 mm max height  
PLASTIC QUAD FLATPACK - NO LEAD  
Images above are just a representation of the package family, actual package may vary.  
Refer to the product data sheet for package details.  
4224653/A  
www.ti.com  
PACKAGE OUTLINE  
VQFN - 1 mm max height  
RTQ0056G  
PLASTIC QUAD FLATPACK-NO LEAD  
8.15  
7.85  
A
B
8.15  
7.85  
PIN 1 INDEX AREA  
C
1 MAX  
SEATING PLANE  
0.08 C  
0.05  
0.00  
5.6±0.1  
(0.2) TYP  
15  
28  
52X 0.5  
14  
29  
57  
4X  
6.5  
SYMM  
5.6±0.1  
1
42  
0.30  
0.18  
56X  
PIN 1 ID  
(OPTIONAL)  
43  
56  
0.1  
C A B  
C
0.5  
0.3  
56X  
SYMM  
0.05  
4225369 / A 10/2019  
NOTES:  
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing  
per ASME Y14.5M.  
2. This drawing is subject to change without notice.  
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.  
www.ti.com  
EXAMPLE BOARD LAYOUT  
VQFN - 1 mm max height  
RTQ0056G  
PLASTIC QUAD FLATPACK-NO LEAD  
(0.78)  
(5.6)  
8X (1.33)  
6X (1.22)  
43  
56X (0.6)  
56  
1
42  
56X (0.24)  
6X (1.22)  
8X (1.33)  
52X (0.5)  
SYMM  
(7.8)  
(5.6)  
57  
(R0.05)  
TYP  
14  
29  
(Ø0.2) TYP  
VIA  
15  
28  
SYMM  
LAND PATTERN EXAMPLE  
SCALE: 10X  
0.07 MAX  
ALL AROUND  
0.07 MIN  
ALL AROUND  
SOLDER MASK  
OPENING  
METAL  
SOLDER MASK  
OPENING  
METAL UNDER  
SOLDER MASK  
NON SOLDER MASK  
SOLDER MASK  
DEFINED  
DEFINED  
(PREFERRED)  
SOLDER MASK DETAILS  
4225369 / A 10/2019  
NOTES: (continued)  
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments  
literature number SLUA271 (www.ti.com/lit/slua271).  
5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their  
locations shown on this view. it is recommended thar vias under paste be filled, plugged or tented.  
www.ti.com  
EXAMPLE STENCIL DESIGN  
VQFN - 1 mm max height  
RTQ0056G  
PLASTIC QUAD FLATPACK-NO LEAD  
(7.8)  
8X (0.665)  
8X (1.33)  
43  
56X (0.6)  
56  
56X (0.24)  
1
42  
57  
8X (1.33)  
52X (0.5)  
SYMM  
(7.8)  
8X (0.665)  
(R0.05) TYP  
16X  
(
1.13)  
14  
29  
METAL  
TYP  
15  
28  
SYMM  
SOLDER PASTE EXAMPLE  
BASED ON 0.125 mm THICK STENCIL  
EXPOSED PAD  
66% PRINTED COVERAGE BY AREA  
SCALE: 10X  
4225369 / A 10/2019  
NOTES: (continued)  
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate  
design recommendations..  
www.ti.com  
重要声明和免责声明  
TI 均以原样提供技术性及可靠性数据(包括数据表)、设计资源(包括参考设计)、应用或其他设计建议、网络工具、安全信息和其他资  
源,不保证其中不含任何瑕疵,且不做任何明示或暗示的担保,包括但不限于对适销性、适合某特定用途或不侵犯任何第三方知识产权的暗示  
担保。  
所述资源可供专业开发人员应用TI 产品进行设计使用。您将对以下行为独自承担全部责任:(1) 针对您的应用选择合适的TI 产品;(2) 设计、  
验证并测试您的应用;(3) 确保您的应用满足相应标准以及任何其他安全、安保或其他要求。所述资源如有变更,恕不另行通知。TI 对您使用  
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TI 所提供产品均受TI 的销售条款 (http://www.ti.com.cn/zh-cn/legal/termsofsale.html) 以及ti.com.cn上或随附TI产品提供的其他可适用条款的约  
束。TI提供所述资源并不扩展或以其他方式更改TI 针对TI 产品所发布的可适用的担保范围或担保免责声明。IMPORTANT NOTICE  
邮寄地址:上海市浦东新区世纪大道 1568 号中建大厦 32 楼,邮政编码:200122  
Copyright © 2020 德州仪器半导体技术(上海)有限公司  

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