TLC0820ACDWR
更新时间：2024-09-18 06:51:53
品牌：TI
描述：Advanced LinCMOS TM HIGH-SPEED 8-BIT ANALOG-TO-DIGITAL CONVERTERS USING MODIFIED FLASH TECHNIQUES
概述
规格参数
数据手册
替代型号TLC0820ACDWR 概述
Advanced LinCMOS TM HIGH-SPEED 8-BIT ANALOG-TO-DIGITAL CONVERTERS USING MODIFIED FLASH TECHNIQUES 使用改进的FLASH技术高级LinCMOS TM高速8位模拟数字转换器 AD转换器 模数转换器
TLC0820ACDWR 规格参数
| 是否无铅： | 不含铅 | 是否Rohs认证： | 符合 |
| 生命周期： | Active | 零件包装代码： | SOIC |
| 包装说明： | SOIC-20 | 针数： | 20 |
| Reach Compliance Code： | compliant | ECCN代码： | EAR99 |
| HTS代码： | 8542.39.00.01 | Factory Lead Time： | 6 weeks |
| 风险等级： | 5.03 | Is Samacsys： | N |
| 最大模拟输入电压： | 8.1 V | 最小模拟输入电压： | -0.1 V |
| 最长转换时间： | 2.5 µs | 转换器类型： | ADC, FLASH METHOD |
| JESD-30 代码： | R-PDSO-G20 | JESD-609代码： | e4 |
| 长度： | 12.8 mm | 最大线性误差 (EL)： | 0.3906% |
| 湿度敏感等级： | 1 | 模拟输入通道数量： | 1 |
| 位数： | 8 | 功能数量： | 1 |
| 端子数量： | 20 | 最高工作温度： | 70 °C |
| 最低工作温度： | 输出位码： | BINARY | |
| 输出格式： | PARALLEL, 8 BITS | 封装主体材料： | PLASTIC/EPOXY |
| 封装代码： | SOP | 封装等效代码： | SOP20,.4 |
| 封装形状： | RECTANGULAR | 封装形式： | SMALL OUTLINE |
| 峰值回流温度（摄氏度）： | 260 | 电源： | 5 V |
| 认证状态： | Not Qualified | 采样速率： | 0.4 MHz |
| 采样并保持/跟踪并保持： | TRACK | 座面最大高度： | 2.65 mm |
| 子类别： | Analog to Digital Converters | 最大压摆率： | 15 mA |
| 最小供电电压： | 4.5 V | 标称供电电压： | 5 V |
| 表面贴装： | YES | 技术： | CMOS |
| 温度等级： | COMMERCIAL | 端子面层： | Nickel/Palladium/Gold (Ni/Pd/Au) |
| 端子形式： | GULL WING | 端子节距： | 1.27 mm |
| 端子位置： | DUAL | 处于峰值回流温度下的最长时间： | NOT SPECIFIED |
| 宽度： | 7.5 mm | Base Number Matches： | 1 |
TLC0820ACDWR 数据手册
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PDF下载TLC0820AC, TLC0820AI
Advanced LinCMOS HIGH-SPEED 8-BIT ANALOG-TO-DIGITAL
CONVERTERS USING MODIFIED FLASH TECHNIQUES
SLAS064A – SEPTEMBER 1986 – REVISED JUNE 1994
Advanced LinCMOS Silicon-Gate
Technology
DB, DW, OR N PACKAGE
(TOP VIEW)
8-Bit Resolution
Differential Reference Inputs
Parallel Microprocessor Interface
ANLG IN
(LSB) D0
D1
D2
D3
WR/RDY
MODE
RD
V
CC
NC
OFLW
D7 (MSB)
D6
D5
D4
CS
REF+
REF–
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
Conversion and Access Time Over
Temperature Range
Read Mode . . . 2.5 µs Max
No External Clock or Oscillator
Components Required
On-Chip Track and Hold
Single 5-V Supply
INT
GND
TLC0820A Is Direct Replacement for
National Semiconductor ADC0820C/CC and
Analog Devices AD7820K/B/T
FN PACKAGE
(TOP VIEW)
description
The TLC0820AC and the TLC0820AI are
Advanced LinCMOS 8-bit analog-to-digital
converters each consisting of two 4-bit flash
converters, a 4-bit digital-to-analog converter, a
summing (error) amplifier, control logic, and a
result latch circuit. The modified flash technique
allows low-power integrated circuitry to complete
an 8-bit conversion in 1.18 µs over temperature.
The on-chip track-and-hold circuit has a 100-ns
sample window and allows these devices to
convert continuous analog signals having slew
rates of up to 100 mV/µs without external
sampling components. TTL-compatible 3-state
output drivers and two modes of operation allow
3
2
1
20 19
18
OFLW
D2
D3
4
5
6
7
8
D7 (MSB)
17
16
15
14
D6
D5
D4
WR/RDY
MODE
RD
9 10 11 12 13
NC–No internal connection
interfacing to a variety of microprocessors. Detailed information on interfacing to most popular microprocessors
is readily available from the factory.
AVAILABLE OPTIONS
PACKAGE
TOTAL
UNADJUSTED
ERROR
PLASTIC
SMALL OUTLINE
(DW)
PLASTIC
CHIP CARRIER
(FN)
T
A
SSOP
(DB)
PLASTIC DIP
(N)
0°C to 70°C
±1 LSB
±1 LSB
TLC0820ACDB TLC0820ACDW
TLC0820AIDW
TLC0820ACFN
TLC0820AIFN
TLC0820ACN
TLC0820AIN
–40°C to 85°C
—
Advanced LinCMOS is a trademark of Texas Instruments Incorporated.
Copyright 1994, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
2–1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC0820AC, TLC0820AI
Advanced LinCMOS HIGH-SPEED 8-BIT ANALOG-TO-DIGITAL
CONVERTERS USING MODIFIED FLASH TECHNIQUES
SLAS064A – SEPTEMBER 1986 – REVISED JUNE 1994
functional block diagram
12
REF+
REF–
4-Bit Flash
Analog-to-Digital
Converter
4
4
11
18
2
OFLW
D0 (LSB)
D1
(4 MSBs)
4
3
4
D2
Output
Latch
and
4-Bit
5
Digital-to-Analog
Converter
D3
Digital
Outputs
14
15
16
17
3-State
Buffers
D4
D5
Summing
Amplifier
4-Bit Flash
Analog-to-Digital
Converter
D6
4
D7 (MSB)
–1
+1
(4 LSBs)
1
ANLG IN
7
MODE
WR/RDY
CS
6
Timing
and
9
INT
13
8
Control
RD
2–2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC0820AC, TLC0820AI
Advanced LinCMOS HIGH-SPEED 8-BIT ANALOG-TO-DIGITAL
CONVERTERS USING MODIFIED FLASH TECHNIQUES
SLAS064A – SEPTEMBER 1986 – REVISED JUNE 1994
Terminal Functions
TERMINAL
I/O
DESCRIPTION
NAME
NO.
1
ANLG IN
CS
I
Analog input
13
2
I
Chip select. CS must be low in order for RD or WR to be recognized by the ADC.
Digital, 3-state output data, bit 1 (LSB)
D0
O
O
O
O
O
O
O
O
D1
3
Digital, 3-state output data, bit 2
D2
4
Digital, 3-state output data, bit 3
D3
5
Digital, 3-state output data, bit 4
D4
14
15
16
17
10
9
Digital, 3-state output data, bit 5
D5
Digital, 3-state output data, bit 6
D6
Digital, 3-state output data, bit 7
D7
Digital, 3-state output data, bit 8 (MSB)
Ground
GND
INT
O
Interrupt. In the write-read mode, the interrupt output (INT) going low indicates that the internal count-down delay
time, t
, is complete and the data result is in the output latch. The delay time t is typically 800 ns starting
d(int) d(int)
after the rising edge of WR (see operating characteristics and Figure 3). If RD goes low prior to the end of t
INT goes low at the end of t
d(RIL)
the rising edge of either RD or CS.
,
d(int)
and the conversion results are available sooner (see Figure 2). INT is reset by
MODE
7
I
Mode select. MODE is internally tied to GND through a 50-µA current source, which acts like a pulldown resistor.
When MODE is low, the read mode is selected. When MODE is high, the write-read mode is selected.
NC
19
18
No internal connection
OFLW
O
I
Overflow. Normally OFLW is a logical high. However, if the analog input is higher than V
the end of conversion. It can be used to cascade two or more devices to improve resolution (9 or 10 bits).
, OFLW will be low at
ref+
RD
8
Read. In the write-read mode with CS low, the 3-state data outputs D0 through D7 are activated when RD goes
low. RD can also be used to increase the conversion speed by reading data prior to the end of the internal
count-down delay time. As a result, the data transferred to the output latch is latched after the falling edge of RD.
In the read mode with CS low, the conversion starts with RD going low. RD also enables the 3-state data outputs
on completion of the conversion. RDY going into the high-impedance state and INT going low indicate completion
of the conversion.
REF–
REF+
11
12
20
6
I
I
Reference voltage. REF– is placed on the bottom of the resistor ladder.
Reference voltage. REF+ is placed on the top of the resistor ladder.
Power supply voltage
V
CC
WR/RDY
I/O Writeready. Inthewrite-readmodewithCSlow, theconversionisstartedonthefallingedgeoftheWRinputsignal.
Theresultoftheconversionisstrobedintotheoutputlatchaftertheinternalcount-downdelaytime,t ,provided
d(int)
isapproximately800ns. Inthereadmode,
thatthe RDinputdoesnotgolowpriortothistime. Thedelaytimet
d(int)
RDY (an open-drain output) goes low after the falling edge of CS and goes into the high-impedance state when
the conversion is strobed into the output latch. It is used to simplify the interface to a microprocessor system.
2–3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC0820AC, TLC0820AI
Advanced LinCMOS HIGH-SPEED 8-BIT ANALOG-TO-DIGITAL
CONVERTERS USING MODIFIED FLASH TECHNIQUES
SLAS064A – SEPTEMBER 1986 – REVISED JUNE 1994
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 V
CC
Input voltage range, all inputs (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.2 V to V +0.2 V
Output voltage range, all outputs (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.2 V to V +0.2 V
CC
CC
Operating free-air temperature range: TLC0820AC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
TLC0820AI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 85°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
Case temperature for 10 seconds: FN package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: DB, DW or N package . . . . . . . . . . . 260°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltages are with respect to network GND.
recommended operating conditions
MIN NOM
MAX
UNIT
Supply voltage, V
4.5
5
8
V
V
V
V
CC
Analog input voltage
–0.1
V
+0.1
CC
Positive reference voltage, V
V
V
CC
ref+
ref–
Negative reference voltage, V
ref–
GND
V
ref+
CS, WR/RDY, RD
MODE
2
High-level input voltage, V
V
V
= 4.75 V to 5.25 V
= 4.75 V to 5.25 V
V
IH
CC
3.5
CS, WR/RDY, RD
MODE
0.8
1.5
50
70
85
Low-level input voltage, V
V
IL
CC
Pulse duration, write in write-read mode, t
(see Figures 2, 3, and 4)
TLC0820AC
0.5
0
µs
°C
w(W)
Operating free-air temperature, T
A
TLC0820AI
–40
2–4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC0820AC, TLC0820AI
Advanced LinCMOS HIGH-SPEED 8-BIT ANALOG-TO-DIGITAL
CONVERTERS USING MODIFIED FLASH TECHNIQUES
SLAS064A – SEPTEMBER 1986 – REVISED JUNE 1994
electrical characteristics at specified operating free-air temperature, V
noted)
= 5 V (unless otherwise
CC
†
PARAMETER
TEST CONDITIONS
T
A
MIN
TYP
MAX
UNIT
V
I
= 4.75 V,
= –360 µA
CC
OH
Full range
2.4
D0–D7, INT, or
OFLW
V
V
High-level output voltage
V
OH
Full range
25°C
4.5
4.6
V
I
= 4.75 V,
= –10 µA
CC
OH
Full range
25°C
0.4
0.34
1
V
= 5.25 V,
= 1.6 mA
D0–D7, OFLW, INT,
or WR/RDY
CC
Low-level output voltage
V
OL
I
OL
CS or RD
Full range
Full range
25°C
0.005
0.1
3
WR/RDY
I
IH
High-level input current
Low-level input current
V
IH
= 5 V
0.3
200
170
µA
Full range
25°C
MODE
50
CS, WR/RDY, RD,
or MODE
I
I
V
V
= 0
Full range
–0.005
–1
µA
µA
IL
IL
Full range
25°C
3
0.3
–3
= 5 V
O
0.1
Off-state (high-impedance-state)
output current
D0–D7 or WR/RDY
OZ
Full range
25°C
V
O
= 0
–0.1
–0.3
3
Full range
25°C
CS at 5 V, V = 5 V
I
0.3
–3
I
I
Analog input current
µA
Full range
25°C
CS at 5 V, V = 0
I
–0.3
Full range
25°C
7
8.4
D0–D7, OFLW, INT,
or WR/RDY
V
= 5 V
= 0
O
O
14
–12
–9
Full range
25°C
–6
I
Short-circuit output current
mA
D0–D7 or OFLW
INT
OS
–7.2
–4.5
– 5.3
1.25
1.4
V
Full range
25°C
Full range
25°C
6
5.3
15
R
Reference resistance
Supply current
kΩ
ref
2.3
Full range
25°C
CS, WR/RDY, and
RD at 0 V
I
mA
CC
7.5
5
13
D0–D7
ANLG IN
D0–D7
C
C
Input capacitance
Output capacitance
Full range
Full range
pF
pF
i
45
5
o
†
Full range is as specified in recommended operating conditions.
2–5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC0820AC, TLC0820AI
Advanced LinCMOS HIGH-SPEED 8-BIT ANALOG-TO-DIGITAL
CONVERTERS USING MODIFIED FLASH TECHNIQUES
SLAS064A – SEPTEMBER 1986 – REVISED JUNE 1994
operating characteristics, V
noted)
= 5 V, V
= 5 V, V
= 0, t = t = 20 ns, T = 25°C (unless otherwise
CC
ref+
ref– r f A
†
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
±1/4
1
UNIT
LSB
LSB
µs
k
Supply-voltage sensitivity
V
CC
= 5 V ± 5%,
T
A
= MIN to MAX
T = MIN to MAX
A
±1/16
SVS
‡
Total unadjusted error
MODE at 0 V,
MODE at 0 V,
t
t
Conversion time, read mode
See Figure 1
1.6
2.5
conv(R)
t
t
conv(R) conv(R)
MODE at 0 V,
See Figure 1
ns
Access time, RD↓ to data valid
a(R)
+20
+50
MODE at 5 V,
C
C
C
C
= 15 pF
= 100 pF
= 15 pF
= 100 pF
190
280
L
L
L
L
t
ns
t
< t
,
,
Access time, RD↓ to data valid
Access time, RD↓ to data valid
a(R1)
a(R2)
d(WR) d(int)
210
70
320
120
See Figure 2
MODE at 5 V,
t
ns
t
> t
d(WR) d(int)
90
20
150
50
See Figure 3
t
t
Access time, INT↓ to data valid
Disable time, RD↑ to data valid
MODE at 5 V,
See Figure 4
C = 10 pF,
L
ns
ns
a(INT)
R
= 1 kΩ,
L
70
95
dis
See Figures 1, 2, 3, and 5
MODE at 5 V, = 50 pF,
See Figures 2, 3, and 4
C
L
t
t
t
Delay time, WR/RDY↑ to INT↓
800
1300
ns
ns
µs
d(int)
Delay time, to next conversion
See Figures 1, 2, 3, and 4
500
0.4
d(NC)
d(WR)
Delay time, WR/RDY↑ to RD↓ in
write-read mode
See Figure 2
MODE at 0 V,
See Figure 1
C = 50 pF,
L
t
t
t
Delay time, CS↓ to WR/RDY↓
Delay time, RD↑ to INT↑
Delay time, RD↓ to INT↓
50
125
200
100
225
290
ns
ns
ns
d(RDY)
d(RIH)
d(RIL)
C
= 50 pF,
See Figures 1, 2, and 3
< t
L
MODE at 5 V,
See Figure 2
t
,
d(WR) d(int)
MODE at 5 V,
See Figure 4
C = 50 pF,
L
Delay time, WR/RDY↑ to INT↑
t
175
0.1
270
ns
d(WIH)
Slew-rate tracking
V/µs
†
‡
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
Total unadjusted error includes offset, full-scale, and linearity errors.
2–6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC0820AC, TLC0820AI
Advanced LinCMOS HIGH-SPEED 8-BIT ANALOG-TO-DIGITAL
CONVERTERS USING MODIFIED FLASH TECHNIQUES
SLAS064A – SEPTEMBER 1986 – REVISED JUNE 1994
PARAMETER MEASUREMENT INFORMATION
CS
50%
RD
50%
50%
50%
d(NC)
t
WR/RDY
50%
With External Pullup
t
t
d(RDY)
d(RIH)
INT
50%
50%
t
conv(R)
90%
10%
90%
10%
D0–D7
t
t
a(R)
dis
Figure 1. Read-Mode Waveforms (MODE Low)
CS
CS
t
w(W)
t
w(W)
WR/RDY
50%
50%
50%
50%
50%
WR/RDY
RD
t
t
t
d(NC)
d(WR)
d(NC)
50%
50%
RD
INT
50%
50%
t
t
d(WR)
d(RIH
50%
t
d(RIL)
50%
50%
50%
INT
t
t
d(int)
d(RIH)
t
d(int)
90%
10%
90%
10%
90%
10%
90%
10%
D0–D7
D0–D7
t
t
a(R2)
a(R1)
t
dis
t
dis
Figure 2. Write-Read-Mode Waveforms
[MODE High and t < t
Figure 3. Write-Read-Mode Waveforms
[MODE High and t > t
]
]
d(int)
d(WR)
d(int)
d(WR)
2–7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC0820AC, TLC0820AI
Advanced LinCMOS HIGH-SPEED 8-BIT ANALOG-TO-DIGITAL
CONVERTERS USING MODIFIED FLASH TECHNIQUES
SLAS064A – SEPTEMBER 1986 – REVISED JUNE 1994
PARAMETER MEASUREMENT INFORMATION
CS Low
RD Low
t
w(W)
WR/RDY
INT
50%
50%
50%
t
d(WIH)
t
d(NC)
50%
50%
t
d(int)
t
a(INT)
90%
10%
D0– D7
Data Valid
Figure 4. Write-Read-Mode Waveforms
(Stand-Alone Operation, MODE High, and RD Low)
V
CC
C
= 10 pF
L
TLC0820
Input
t
r
V
CC
90%
50%
10%
RD
CS
Data
Output
RD
Dn
GND
GND
t
dis
C
1 kΩ
L
V
OH
90%
Data
Outputs
GND
t = 20 ns
r
TEST CIRCUIT
CC
VOLTAGE WAVEFORMS
V
C
= 10 pF
L
t
r
TLC0820
Input
V
CC
1 kΩ
90%
50%
10%
RD
RD
CS
Data
Output
GND
Dn
t
dis
GND
V
CC
OL
C
Data
Outputs
L
10%
V
t = 20 ns
r
VOLTAGE WAVEFORMS
Dn = D0 . . . D7
TEST CIRCUIT
Figure 5. Test Circuit and Voltage Waveforms
2–8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC0820AC, TLC0820AI
Advanced LinCMOS HIGH-SPEED 8-BIT ANALOG-TO-DIGITAL
CONVERTERS USING MODIFIED FLASH TECHNIQUES
SLAS064A – SEPTEMBER 1986 – REVISED JUNE 1994
PRINCIPLES OF OPERATION
The TLC0820AC and TLC0820AI each employ a combination of sampled-data comparator techniques and flash
techniques common to many high-speed converters. Two 4-bit flash analog-to-digital conversions are used to give
a full 8-bit output.
The recommended analog input voltage range for conversion is –0.1 V to V
+ 0.1 V. Analog input signals that are
CC
lessthanV
+1/2LSBorgreaterthanV
–1/2LSBconvertto00000000or11111111, respectively. Thereference
ref–
ref+
inputs are fully differential with common-mode limits defined by the supply rails. The reference input values define
the full-scale range of the analog input. This allows the gain of the ADC to be varied for ratiometric conversion by
changing the V
and V
voltages.
ref+
ref–
The device operates in two modes, read (only) and write-read, that are selected by MODE. The converter is set to
the read (only) mode when MODE is low. In the read mode, WR/RDY is used as an output and is referred to as the
ready terminal. In this mode, a low on WR/RDY while CS is low indicates that the device is busy. Conversion starts
on the falling edge of RD and is completed no more than 2.5 µs later when INT falls and WR/RDY returns to the
high-impedance state. Data outputs also change from high-impedance to active states at this time. After the data is
read, RD is taken high, INT returns high, and the data outputs return to their high-impedance states.
When MODE is high, the converter is set to the write-read mode and WR/RDY is referred to as the write terminal.
Taking CS and WR/RDY low selects the converter and initiates measurement of the input signal. Approximately
600 ns after WR/RDY returns high, the conversion is completed. Conversion starts on the rising edge of WR/RDY
in the write-read mode.
The high-order 4-bit flash ADC measures the input by means of 16 comparators operating simultaneously. A
high-precision 4-bit DAC then generates a discrete analog voltage from the result of that conversion. After a time
delay, a second bank of comparators does a low-order conversion on the analog difference between the input level
and the high-order DAC output. The results from each of these conversions enter an 8-bit latch and are output to the
3-state output buffers on the falling edge of RD.
2–9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC0820AC, TLC0820AI
Advanced LinCMOS HIGH-SPEED 8-BIT ANALOG-TO-DIGITAL
CONVERTERS USING MODIFIED FLASH TECHNIQUES
SLAS064A – SEPTEMBER 1986 – REVISED JUNE 1994
APPLICATION INFORMATION
CS
13
6
20
1
CS
V
5 V
CC
WR
ANLG
ANLG
IN
WR/RDY
IN
RD
8
RD
TLC0820
7
MODE
REF+
5 V
D0
D1
D2
D3
D4
D5
D6
D7
D8
OFL
2
3
D0
D1
D2
D3
D4
D5
D6
D7
12
5 V
µP
4
Bus
5
0.1 µF
14
15
16
17
11
10
REF–
GND
0.1 µF
18
OFLW
20
1
13
6
CS
V
5 V
CC
ANLG
WR/RDY
IN
8
RD
TLC0820
2
3
7
D0
MODE
REF+
5 V
12
D1
4
D2
5
0.1 µF
D3
14
15
16
17
18
D4
11
10
D5
REF–
GND
D6
D7
0.1 µF
OFLW
Figure 6. Configuration for 9-Bit Resolution
2–10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
11-Dec-2006
PACKAGING INFORMATION
Orderable Device
TLC0820ACDB
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SSOP
DB
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
70 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLC0820ACDBG4
TLC0820ACDBR
TLC0820ACDBRG4
TLC0820ACDW
TLC0820ACDWG4
TLC0820ACDWR
TLC0820ACDWRG4
TLC0820ACFN
SSOP
SSOP
SSOP
SOIC
SOIC
SOIC
SOIC
PLCC
PLCC
PLCC
PLCC
PDIP
PDIP
SOIC
SOIC
SOIC
SOIC
PLCC
PLCC
PDIP
PDIP
DB
DB
DB
DW
DW
DW
DW
FN
FN
FN
FN
N
70 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
46 Green (RoHS &
no Sb/Br)
CU SN
CU SN
CU SN
CU SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
TLC0820ACFNG3
TLC0820ACFNR
TLC0820ACFNRG3
TLC0820ACN
46 Green (RoHS &
no Sb/Br)
1000 Green (RoHS &
no Sb/Br)
1000 Green (RoHS &
no Sb/Br)
20
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
CU NIPDAU N / A for Pkg Type
TLC0820ACNE4
TLC0820AIDW
N
20
Pb-Free
(RoHS)
DW
DW
DW
DW
FN
FN
N
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLC0820AIDWG4
TLC0820AIDWR
TLC0820AIDWRG4
TLC0820AIFN
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
46 Green (RoHS &
no Sb/Br)
CU SN
Level-1-260C-UNLIM
TLC0820AIFNG3
TLC0820AIN
46 Green (RoHS &
no Sb/Br)
CU SN
Level-1-260C-UNLIM
20
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
CU NIPDAU N / A for Pkg Type
TLC0820AINE4
N
20
Pb-Free
(RoHS)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
11-Dec-2006
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,
enhancements, improvements, and other changes to its products and services at any time and to discontinue
any product or service without notice. Customers should obtain the latest relevant information before placing
orders and should verify that such information is current and complete. All products are sold subject to TI’s terms
and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI
deems necessary to support this warranty. Except where mandated by government requirements, testing of all
parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for
their products and applications using TI components. To minimize the risks associated with customer products
and applications, customers should provide adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right,
copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process
in which TI products or services are used. Information published by TI regarding third-party products or services
does not constitute a license from TI to use such products or services or a warranty or endorsement thereof.
Use of such information may require a license from a third party under the patents or other intellectual property
of the third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of information in TI data books or data sheets is permissible only if reproduction is without
alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction
of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for
such altered documentation.
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that
product or service voids all express and any implied warranties for the associated TI product or service and
is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.
Following are URLs where you can obtain information on other Texas Instruments products and application
solutions:
Products
Applications
Audio
Amplifiers
amplifier.ti.com
www.ti.com/audio
Data Converters
dataconverter.ti.com
Automotive
www.ti.com/automotive
DSP
dsp.ti.com
Broadband
Digital Control
Military
www.ti.com/broadband
www.ti.com/digitalcontrol
www.ti.com/military
Interface
Logic
interface.ti.com
logic.ti.com
Power Mgmt
Microcontrollers
power.ti.com
Optical Networking
Security
www.ti.com/opticalnetwork
www.ti.com/security
www.ti.com/telephony
www.ti.com/video
microcontroller.ti.com
Low Power Wireless www.ti.com/lpw
Telephony
Video & Imaging
Wireless
www.ti.com/wireless
Mailing Address:
Texas Instruments
Post Office Box 655303 Dallas, Texas 75265
Copyright 2006, Texas Instruments Incorporated
TLC0820ACDWR CAD模型
引脚图
封装焊盘图
TLC0820ACDWR 替代型号
| 型号 | 制造商 | 描述 | 替代类型 | 文档 |
| TLC0820ACFN | TI | Advanced LinCMOSE HIGH-SPEED 8-BIT ANALOG-TO-DIGITAL CONVERTERS USING MODIFIED FLASH TECHN | 完全替代 |
|
| TLC0820ACN | TI | Advanced LinCMOSE HIGH-SPEED 8-BIT ANALOG-TO-DIGITAL CONVERTERS USING MODIFIED FLASH TECHN | 完全替代 |
|
| TLC0820ACDBR | TI | Advanced LinCMOS TM HIGH-SPEED 8-BIT ANALOG-TO-DIGITAL CONVERTERS USING MODIFIED FLASH TEC | 完全替代 |
|
TLC0820ACDWR 相关器件
| 型号 | 制造商 | 描述 | 价格 | 文档 |
| TLC0820ACDWRG4 | TI | Advanced LinCMOS TM HIGH-SPEED 8-BIT ANALOG-TO-DIGITAL CONVERTERS USING MODIFIED FLASH TECHNIQUES | 获取价格 |
|
| TLC0820ACFN | TI | Advanced LinCMOSE HIGH-SPEED 8-BIT ANALOG-TO-DIGITAL CONVERTERS USING MODIFIED FLASH TECHNIQUES | 获取价格 |
|
| TLC0820ACFN3 | TI | IC,A/D CONVERTER,SINGLE,8-BIT,CMOS,LDCC,20PIN | 获取价格 |
|
| TLC0820ACFNG3 | TI | Advanced LinCMOS TM HIGH-SPEED 8-BIT ANALOG-TO-DIGITAL CONVERTERS USING MODIFIED FLASH TECHNIQUES | 获取价格 |
|
| TLC0820ACFNR | TI | Advanced LinCMOS TM HIGH-SPEED 8-BIT ANALOG-TO-DIGITAL CONVERTERS USING MODIFIED FLASH TECHNIQUES | 获取价格 |
|
| TLC0820ACFNRG3 | TI | Advanced LinCMOS TM HIGH-SPEED 8-BIT ANALOG-TO-DIGITAL CONVERTERS USING MODIFIED FLASH TECHNIQUES | 获取价格 |
|
| TLC0820ACI | TI | Advanced LinCMOS TM HIGH-SPEED 8-BIT ANALOG-TO-DIGITAL CONVERTERS USING MODIFIED FLASH TECHNIQUES | 获取价格 |
|
| TLC0820ACN | TI | Advanced LinCMOSE HIGH-SPEED 8-BIT ANALOG-TO-DIGITAL CONVERTERS USING MODIFIED FLASH TECHNIQUES | 获取价格 |
|
| TLC0820ACN3 | TI | IC,A/D CONVERTER,SINGLE,8-BIT,CMOS,DIP,20PIN | 获取价格 |
|
| TLC0820ACNE4 | TI | Advanced LinCMOS TM HIGH-SPEED 8-BIT ANALOG-TO-DIGITAL CONVERTERS USING MODIFIED FLASH TECHNIQUES | 获取价格 |
|
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