TL75LP05 [TI]

LOW-DROPOUT VOLTAGE REGULATORS; 低压差稳压器
TL75LP05
型号: TL75LP05
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

LOW-DROPOUT VOLTAGE REGULATORS
低压差稳压器

稳压器
文件: 总15页 (文件大小:237K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
SLVS073A − SEPTEMBER 1992 − REVISED AUGUST 1995  
Very Low-Dropout Voltage . . . Less Than  
PW PACKAGE  
(TOP VIEW)  
400 mV at 300 mA  
Standby Mode Reduces Current to a  
GND/HEAT SINK  
GND/HEAT SINK  
GND/HEAT SINK  
NC  
NC  
NC  
NC  
NC  
NC  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
Maximum of 150 µA  
Output Regulated to Within 2% Over Full  
Temperature Range  
Packaged in Thin Shrink Small-Outline  
NC  
Package  
ENABLE  
NC  
15 OUTPUT  
Only 10-µF Load Capacitor Required to  
14  
13  
12  
11  
OUTPUT  
NC  
Maintain Regulation at I = 300 mA  
O
INPUT  
INPUT  
NC  
description  
INPUT  
NC  
The TL75LPxxQ devices are low-dropout voltage  
regulators specifically targeted for use in portable  
applications. These devices generate fixed output  
voltages at loads of up to 300 mA with only  
400-mV dropout over the full temperature range.  
GND/HEAT SINK − These terminals have an internal  
connection to ground and must be grounded.  
NC − No internal connection  
The PW package is only available in left-end taped  
and reeled (order device TL75LPxxQPWLE).  
Low-dropout voltage regulators are commonly  
used in battery-powered systems such as analog  
and digital cellular phones. The TL75LPxx family  
of regulators feature a TTL/CMOS-compatible  
enable terminal, which can be used to switch the  
device into standby mode. This feature reduces  
power consumption when the instrument is not  
active. Less that 150 µA is required when the unit  
is disabled.  
typical application schematic  
V 2%  
O
INPUT  
OUTPUT  
at 300 mA  
TL75LPxxQ  
GND/  
HEAT SINK  
V
BAT  
C
= 10 µF  
0.1 µF  
O
ENABLE  
2 V  
DISABLE  
ENABLE  
A concern in many new designs is conservation of  
board space and overall reduction in equipment  
size. The thin shrink small-outline package  
(TSSOP) minimizes board area and reduces  
component height. This package has a maximum height of less than 1.1 mm (compared to the 1.75 mm of a  
standard 8-pin SO package) and dimensions of only 6.5 mm by 4.4 mm.  
All low-dropout regulators require an external capacitor at the output to maintain regulation and stability. To  
further reduce board area and cost, the TL75LPxx devices are designed to require a minimum capacitor of only  
10 µF. This is 1/10 the typical value used by many other low-dropout regulators. To simplify the task of choosing  
a suitable capacitor, TI has included in this datasheet a list of recommended capacitors for use with these  
devices.  
The TL75LPxxQ devices are characterized for operation over T = 40°C to 125°C.  
J
AVAILABLE OPTIONS  
PACKAGED DEVICES  
V
O
CHIP FORM  
(Y)  
T
J
TSSOP  
(PW)  
MIN  
TYP  
MAX  
4.75  
4.9  
4.85  
5
4.95  
5.1  
TL75LP48QPWLE  
TL75LP05QPWLE  
TL75LP08QPWLE  
TL75LP10QPWLE  
TL75LP12QPWLE  
TL75LP48Y  
TL75LP05Y  
TL75LP08Y  
TL75LP10Y  
TL75LP12Y  
40°C to 125°C  
7.84  
9.8  
8
8.16  
10.2  
12.24  
10  
12  
11.76  
The PW package is available only in tape and reel. Chip forms are tested at 25°C.  
ꢀꢣ  
Copyright 1995, Texas Instruments Incorporated  
ꢟ ꢣ ꢠ ꢟꢘ ꢙꢬ ꢛꢚ ꢞ ꢦꢦ ꢤꢞ ꢜ ꢞ ꢝ ꢣ ꢟ ꢣ ꢜ ꢠ ꢨ  
3−1  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443  
ꢁ ꢂ  
ꢀꢓ  
ꢉꢔ  
ꢓꢀꢍ  
SLVS073A − SEPTEMBER 1992 − REVISED AUGUST 1995  
functional block diagram  
INPUT  
Current  
Limiting  
ENABLE  
Enable  
OUTPUT  
+
28 V  
Bandgap  
Overvoltage/  
Thermal  
Shutdown  
GND/HEAT SINK  
TL75LPxxY chip information  
This chip, when properly assembled, displays characteristics similar to the TL75LPxx. Thermal compression  
or ultrasonic bonding can be used on the doped aluminum bonding pads. The chip can be mounted with  
conductive epoxy or a gold-silicon preform.  
(1)  
(5)  
(4)  
BONDING PAD ASSIGNMENTS  
(5)  
OUTPUT  
INPUT  
TL75LPxxY  
(6)  
OUTPUT  
SENSE  
(3)  
(2)  
(4)  
(6)  
ENABLE POWER SIGNAL  
GND GND  
CHIP THICKNESS: 11 MILS TYPICAL  
BONDING PADS: 7X7 MILS MINIMUM  
max = 150°C  
92  
T
J
TOLERANCES ARE 10%.  
ALL DIMENSIONS ARE IN MILS.  
(3)  
(1)  
(2)  
NOTE A. NOTE: SIGNAL GND and POWER  
GND must be tied together as close to  
device as possible. OUTPUT and  
OUTPUT SENSE should be tied  
together.  
123  
3−2  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443  
SLVS073A − SEPTEMBER 1992 − REVISED AUGUST 1995  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage, V , (See Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 V  
CC  
Output current, I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400 mA  
O
Operating virtual junction temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −55°C to 150°C  
J
Continuous total power dissipation (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table  
Storage temperature range, T  
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C  
stg  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTES: 1. All voltage values are with respect to network terminal ground.  
2. Refer to Figures 1 and 2 to avoid exceeding the design maximum virtual junction temperature; these ratings should not be exceeded.  
Due to variation in individual device electrical characteristics and thermal resistance, the built-in thermal overload protection may  
be activated at power levels slightly above or below the rated dissipation.  
DISSIPATION RATING TABLE  
POWER RATING  
AT  
T 25°C  
POWER RATING  
DERATING FACTOR  
ABOVE T = 25°C  
T = 70°C  
T = 85°C  
T = 125°C  
PACKAGE  
POWER RATING POWER RATING POWER RATING  
T
828 mW  
4032 mW  
2475 mW  
6.62 mW/°C  
32.2 mW/°C  
19.8 mW/°C  
530 mW  
2583 mW  
1584 mW  
431 mW  
2100 mW  
1287 mW  
166 mW  
812 mW  
495 mW  
A
PW  
T
T
C
P
R
is the thermal resistance between the junction and the device pin. To determine the virtual junction temperature (T ) relative to the device  
J
θJP  
pin temperature, the following calculations should be used: T = P x R  
is the device pin temperature at the point of contact to the printed wiring board. The R  
+ T , where P is the internal power dissipation of the device and T  
J
D
θJP  
P
D
P
for the TL75LPxx series is 50.5°C/W.  
θJP  
MAXIMUM CONTINUOUS DISSIPATION  
MAXIMUM CONTINUOUS DISSIPATION  
vs  
vs  
FREE-AIR TEMPERATURE  
CASE TEMPERATURE  
2400  
2200  
2000  
1800  
1600  
1400  
1200  
1000  
800  
4800  
4400  
4000  
3600  
3200  
2800  
2400  
2000  
1600  
1200  
800  
600  
R
= 31°C/W  
θJC  
400  
200  
400  
R
= 151°C/W  
θJA  
0
0
25  
50  
75  
100  
125  
150  
25  
50  
75  
100  
125  
150  
T
A
− Free-Air Temperature − °C  
T
C
− Case Temperature − °C  
Figure 1  
Figure 2  
3−3  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443  
ꢀꢓ  
ꢇꢊ  
SLVS073A − SEPTEMBER 1992 − REVISED AUGUST 1995  
recommended operating conditions  
MIN  
5.15  
5.3  
8.4  
10.4  
12.5  
2.0  
0
MAX  
23.0  
23.0  
23.0  
23.0  
23.0  
15.0  
0.8  
UNIT  
TL75LP48  
TL75LP05  
TL75LP08  
TL75LP10  
TL75LP12  
Input voltage, V  
V
I
High-level input voltage, ENABLE, V  
IH  
V
V
Low-level input voltage, ENABLE, V  
IL  
Output current range, I  
5
300  
mA  
°C  
O
Operating virtual junction temperature range, T  
40  
125  
J
electrical characteristics over operating virtual junction temperature range, V = 10 V, I = 300 mA,  
I
O
ENABLE = 0 V (unless otherwise noted)  
TL75LP48Q  
PARAMETER  
TEST CONDITIONS  
UNIT  
MIN  
TYP  
4.85  
10  
MAX  
Output voltage  
V = 5.35 V to 10 V  
4.75  
4.95  
25  
V
I
Input voltage regulation  
Ripple rejection  
V = 5.35 V to 10 V,  
T
J
= 25°C  
mV  
dB  
mV  
I
V = 5.6 V to 15.6 V,  
f = 120 Hz, T = 25°C  
50  
55  
I
J
Output voltage regulation  
I
I
I
I
= 5 mA to 300 mA, T = 25°C  
12  
30  
0.2  
0.3  
0.4  
O
O
O
O
J
= 100 mA  
= 200 mA  
= 300 mA  
0.12  
0.17  
0.22  
500  
2.5  
4
Dropout voltage  
V
Output noise voltage  
f = 10 Hz to 100 kHz, T = 25°C  
µV  
J
I
I
I
I
= 10 mA  
4
10  
20  
30  
25  
6
O
O
O
O
= 100 mA  
= 200 mA  
= 300 mA  
Bias current  
mA  
6
9
High-level input current, ENABLE  
Low-level input current, ENABLE  
Standby current  
ENABLE = 0.8 V  
ENABLE = 2 V  
ENABLE = 2 V  
7
µA  
µA  
µA  
0.05  
100  
150  
Pulse-testing techniques maintain the virtual junction temperature as close to the ambient temperature as possible. Thermal effects must be taken  
into account separately. All characteristics are measured with a 0.1-µF capacitor across the input and a 10-µF capacitor with equivalent series  
resistance within the guidelines shown in Figures 3 and 4 on the output. All measurements are taken with a tantalum electrolytic capacitor.  
Although not normally recommended, an aluminum electrolytic capacitor can be used. Attention must be given its ESR value, particularly at low  
temperatures.  
3−4  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443  
ꢀ ꢁꢂ ꢃ ꢁ ꢄꢅ ꢅ ꢌꢇ ꢈꢉ ꢊ ꢋ  
ꢎꢏ  
SLVS073A − SEPTEMBER 1992 − REVISED AUGUST 1995  
electrical characteristics over operating virtual junction temperature range, V = 10 V, I = 300 mA,  
I
O
ENABLE = 0 V (unless otherwise noted)  
TL75LP05Q  
PARAMETER  
TEST CONDITIONS  
UNIT  
MIN  
TYP  
5
MAX  
Output voltage  
V = 5.5 V to 10 V  
4.9  
5.1  
25  
V
I
Input voltage regulation  
Ripple rejection  
V = 5.5 V to 10 V,  
T = 25°C  
J
10  
mV  
dB  
mV  
I
V = 6 V to 16 V,  
f = 120 Hz, T = 25°C  
50  
55  
I
J
Output voltage regulation  
I
I
I
I
= 5 mA to 300 mA, T = 25°C  
12  
30  
0.2  
0.3  
0.4  
O
O
O
O
J
= 100 mA  
= 200 mA  
= 300 mA  
0.12  
0.17  
0.22  
500  
2.5  
4
Dropout voltage  
V
Output noise voltage  
f = 10 Hz to 100 kHz, T = 25°C  
µV  
J
I
I
I
I
= 10 mA  
4
10  
20  
30  
25  
6
O
O
O
O
= 100 mA  
= 200 mA  
= 300 mA  
Bias current  
mA  
6
9
High-level input current, ENABLE  
Low-level input current, ENABLE  
Standby current  
ENABLE = 0.8 V  
ENABLE = 2 V  
ENABLE = 2 V  
7
µA  
µA  
µA  
0.05  
100  
150  
Pulse-testing techniques maintain the virtual junction temperature as close to the ambient temperature as possible. Thermal effects must be taken  
into account separately. All characteristics are measured with a 0.1-µF capacitor across the input and a 10-µF capacitor with equivalent series  
resistance within the guidelines shown in Figures 3 and 4 on the output. All measurements are taken with a tantalum electrolytic capacitor.  
Although not normally recommended, an aluminum electrolytic capacitor can be used. Attention must be given its ESR value, particularly at low  
temperatures.  
electrical characteristics over operating virtual junction temperature range, V = 10 V, I = 300 mA,  
I
O
ENABLE = 0 V (unless otherwise noted)  
TL75LP08Q  
PARAMETER  
TEST CONDITIONS  
UNIT  
MIN  
TYP  
8
MAX  
Output voltage  
V = 8.6 V to 15 V  
7.84  
8.16  
40  
V
I
Input voltage regulation  
Ripple rejection  
V = 8.6 V to 15 V,  
T = 25°C  
J
12  
mV  
dB  
mV  
I
V = 9 V to 19 V,  
f = 120 Hz, T = 25°C  
50  
55  
I
J
Output voltage regulation  
I
I
I
I
= 5 mA to 300 mA, T = 25°C  
12  
40  
0.2  
0.3  
0.4  
O
O
O
O
J
= 100 mA  
= 200 mA  
= 300 mA  
0.12  
0.17  
0.22  
500  
2.5  
4
Dropout voltage  
V
Output noise voltage  
f = 10 Hz to 100 kHz, T = 25°C  
µV  
J
I
I
I
I
= 10 mA  
4
10  
20  
30  
25  
6
O
O
O
O
= 100 mA  
= 200 mA  
= 300 mA  
Bias current  
mA  
6
9
High-level input current, ENABLE  
Low-level input current, ENABLE  
Standby current  
ENABLE = 0.8 V  
ENABLE = 2 V  
ENABLE = 2 V  
7
µA  
µA  
µA  
0.05  
100  
150  
Pulse-testing techniques maintain the virtual junction temperature as close to the ambient temperature as possible. Thermal effects must be taken  
into account separately. All characteristics are measured with a 0.1-µF capacitor across the input and a 10-µF capacitor with equivalent series  
resistance within the guidelines shown in Figures 3 and 4 on the output. All measurements are taken with a tantalum electrolytic capacitor.  
Although not normally recommended, an aluminum electrolytic capacitor can be used. Attention must be given its ESR value, particularly at low  
temperatures.  
3−5  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443  
ꢀꢓ  
ꢇꢊ  
SLVS073A − SEPTEMBER 1992 − REVISED AUGUST 1995  
electrical characteristics over operating virtual junction temperature range, V = 14 V, I = 300 mA,  
I
O
ENABLE = 0 V (unless otherwise noted)  
TL75LP10Q  
PARAMETER  
TEST CONDITIONS  
UNIT  
MIN  
TYP  
10  
MAX  
Output voltage  
V = 10.6 V to 17 V  
9.8  
10.2  
43  
V
I
Input voltage regulation  
Ripple rejection  
V = 10.6 V to 17 V,  
T
J
= 25°C  
15  
mV  
dB  
mV  
I
V = 11 V to 21 V,  
f = 120 Hz, T = 25°C  
50  
55  
I
J
Output voltage regulation  
I
I
I
I
= 5 mA to 300 mA, T = 25°C  
15  
50  
0.2  
0.3  
0.4  
O
O
O
O
J
= 100 mA  
= 200 mA  
= 300 mA  
0.12  
0.17  
0.22  
1000  
2.5  
4
Dropout voltage  
V
Output noise voltage  
f = 10 Hz to 100 kHz, T = 25°C  
µV  
J
I
I
I
I
= 10 mA  
4
10  
20  
30  
25  
6
O
O
O
O
= 100 mA  
= 200 mA  
= 300 mA  
Bias current  
mA  
6
9
High-level input current, ENABLE  
Low-level input current, ENABLE  
Standby current  
ENABLE = 0.8 V  
ENABLE = 2 V  
ENABLE = 2 V  
7
µA  
µA  
µA  
0.05  
100  
150  
Pulse-testing techniques maintain the virtual junction temperature as close to the ambient temperature as possible. Thermal effects must be taken  
into account separately. All characteristics are measured with a 0.1-µF capacitor across the input and a 10-µF capacitor with equivalent series  
resistance within the guidelines shown in Figures 3 and 4 on the output. All measurements are taken with a tantalum electrolytic capacitor.  
Although not normally recommended, an aluminum electrolytic capacitor can be used. Attention must be given its ESR value, particularly at low  
temperatures.  
electrical characteristics over operating virtual junction temperature range, V = 14 V, I = 300 mA,  
I
O
ENABLE = 0 V (unless otherwise noted)  
TL75LP12Q  
PARAMETER  
TEST CONDITIONS  
UNIT  
MIN  
TYP  
MAX  
Output voltage  
V = 12.7 V to 18 V  
I
11.76  
12 12.24  
V
Input voltage regulation  
Ripple rejection  
V = 12.7 V to 18 V,  
T
= 25°C  
15  
55  
43  
mV  
dB  
mV  
I
J
V = 13 V to 23 V,  
I
f = 120 Hz, T = 25°C  
50  
J
Output voltage regulation  
I
O
I
O
I
O
I
O
= 5 mA to 300 mA, T = 25°C  
15  
60  
0.2  
0.3  
0.4  
J
= 100 mA  
= 200 mA  
= 300 mA  
0.12  
0.17  
0.22  
1000  
2.5  
4
Dropout voltage  
V
Output noise voltage  
f = 10 Hz to 100 kHz, T = 25°C  
µV  
J
I
O
I
O
I
O
I
O
= 10 mA  
4
10  
20  
30  
25  
6
= 100 mA  
= 200 mA  
= 300 mA  
Bias current  
mA  
6
9
High-level input current, ENABLE  
Low-level input current, ENABLE  
Standby current  
ENABLE = 0.8 V  
ENABLE = 2 V  
ENABLE = 2 V  
7
µA  
µA  
µA  
0.05  
100  
150  
Pulse-testing techniques maintain the virtual junction temperature as close to the ambient temperature as possible. Thermal effects must be taken  
into account separately. All characteristics are measured with a 0.1-µF capacitor across the input and a 10-µF capacitor with equivalent series  
resistance within the guidelines shown in Figures 3 and 4 on the output. All measurements are taken with a tantalum electrolytic capacitor.  
Although not normally recommended, an aluminum electrolytic capacitor can be used. Attention must be given its ESR value, particularly at low  
temperatures.  
3−6  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443  
ꢎꢏ  
SLVS073A − SEPTEMBER 1992 − REVISED AUGUST 1995  
electrical characteristics at V = 10 V, I = 300 mA, ENABLE = 0 V, T = 25°C (unless otherwise noted)  
I
O
J
TL75LP48Y  
PARAMETER  
TEST CONDITIONS  
UNIT  
MIN  
TYP  
4.85  
10  
MAX  
Output voltage  
V
Input voltage regulation  
Ripple rejection  
mV  
dB  
mV  
V
f = 120 Hz  
55  
Output voltage regulation  
Dropout voltage  
12  
0.22  
500  
9
Output noise voltage  
Bias current  
f = 10 Hz to 100 kHz  
µV  
mA  
µA  
µA  
µA  
High-level input current, ENABLE  
Low-level input current, ENABLE  
Standby current  
ENABLE = 0.8 V  
ENABLE = 2 V  
ENABLE = 2 V  
7
0.05  
100  
Pulse-testing techniques maintain the virtual junction temperature as close to the ambient temperature as possible. Thermal effects must be taken  
into account separately. All characteristics are measured with a 0.1-µF capacitor across the input and a 10-µF capacitor with equivalent series  
resistance within the guidelines shown in Figures 3 and 4 on the output. All measurements are taken with a tantalum electrolytic capacitor.  
Although not normally recommended, an aluminum electrolytic capacitor can be used. Attention must be given its ESR value, particularly at low  
temperatures.  
electrical characteristics at V = 10 V, I = 300 mA, ENABLE = 0 V, T = 25°C (unless otherwise noted)  
I
O
J
TL75LP05Y  
PARAMETER  
TEST CONDITIONS  
UNIT  
MIN  
TYP  
5
MAX  
Output voltage  
V
Input voltage regulation  
Ripple rejection  
10  
mV  
dB  
mV  
V
f = 120 Hz  
55  
Output voltage regulation  
Dropout voltage  
12  
0.22  
500  
9
Output noise voltage  
Bias current  
f = 10 Hz to 100 kHz  
µV  
mA  
µA  
µA  
µA  
High-level input current, ENABLE  
Low-level input current, ENABLE  
Standby current  
ENABLE = 0.8 V  
ENABLE = 2 V  
ENABLE = 2 V  
7
0.05  
100  
Pulse-testing techniques maintain the virtual junction temperature as close to the ambient temperature as possible. Thermal effects must be taken  
into account separately. All characteristics are measured with a 0.1-µF capacitor across the input and a 10-µF capacitor with equivalent series  
resistance within the guidelines shown in Figures 3 and 4 on the output. All measurements are taken with a tantalum electrolytic capacitor.  
Although not normally recommended, an aluminum electrolytic capacitor can be used. Attention must be given its ESR value, particularly at low  
temperatures.  
3−7  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443  
ꢁ ꢂ  
SLVS073A − SEPTEMBER 1992 − REVISED AUGUST 1995  
electrical characteristics at V = 10 V, I = 300 mA, ENABLE = 0 V, T = 25°C (unless otherwise noted)  
I
O
J
TL75LP08Y  
PARAMETER  
TEST CONDITIONS  
UNIT  
MIN  
TYP  
8
MAX  
Output voltage  
V
Input voltage regulation  
Ripple rejection  
12  
mV  
dB  
mV  
V
f = 120 Hz  
55  
Output voltage regulation  
Dropout voltage  
12  
0.22  
500  
9
Output noise voltage  
Bias current  
f = 10 Hz to 100 kHz  
µV  
mA  
µA  
µA  
µA  
High-level input current, ENABLE  
Low-level input current, ENABLE  
Standby current  
ENABLE = 0.8 V  
ENABLE = 2 V  
ENABLE = 2 V  
7
0.05  
100  
Pulse-testing techniques maintain the virtual junction temperature as close to the ambient temperature as possible. Thermal effects must be taken  
into account separately. All characteristics are measured with a 0.1-µF capacitor across the input and a 10-µF capacitor with equivalent series  
resistance within the guidelines shown in Figures 3 and 4 on the output. All measurements are taken with a tantalum electrolytic capacitor.  
Although not normally recommended, an aluminum electrolytic capacitor can be used. Attention must be given its ESR value, particularly at low  
temperatures.  
electrical characteristics at V = 14 V, I = 300 mA, ENABLE = 0 V, T = 25°C (unless otherwise noted)  
I
O
J
TL75LP10Y  
PARAMETER  
TEST CONDITIONS  
UNIT  
MIN  
TYP  
10  
MAX  
Output voltage  
V
Input voltage regulation  
Ripple rejection  
15  
mV  
dB  
mV  
V
f = 120 Hz  
55  
Output voltage regulation  
Dropout voltage  
15  
0.22  
1000  
9
Output noise voltage  
Bias current  
f = 10 Hz to 100 kHz  
µV  
mA  
µA  
µA  
µA  
High-level input current, ENABLE  
Low-level input current, ENABLE  
Standby current  
ENABLE = 0.8 V  
ENABLE = 2 V  
ENABLE = 2 V  
7
0.05  
100  
Pulse-testing techniques maintain the virtual junction temperature as close to the ambient temperature as possible. Thermal effects must be taken  
into account separately. All characteristics are measured with a 0.1-µF capacitor across the input and a 10-µF capacitor with equivalent series  
resistance within the guidelines shown in Figures 3 and 4 on the output. All measurements are taken with a tantalum electrolytic capacitor.  
Although not normally recommended, an aluminum electrolytic capacitor can be used. Attention must be given its ESR value, particularly at low  
temperatures.  
3−8  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443  
ꢀ ꢁꢂ ꢃ ꢁ ꢄꢅ ꢅ ꢌꢇ ꢈꢉ ꢊ ꢋ  
SLVS073A − SEPTEMBER 1992 − REVISED AUGUST 1995  
electrical characteristics at V = 14 V, I = 300 mA, ENABLE = 0 V, T = 25°C (unless otherwise noted)  
I
O
J
TL75LP12Y  
MIN TYP  
11.76 12 12.24  
PARAMETER  
TEST CONDITIONS  
UNIT  
MAX  
Output voltage  
V
Input voltage regulation  
Ripple rejection  
15  
55  
43  
mV  
dB  
mV  
V
f = 120 Hz  
Output voltage regulation  
Dropout voltage  
12  
60  
0.22  
500  
9
0.4  
Output noise voltage  
Bias current  
f = 10 Hz to 100 kHz  
µV  
mA  
µA  
µA  
µA  
30  
25  
High-level input current, ENABLE  
Low-level input current, ENABLE  
Standby current  
ENABLE = 0.8 V  
ENABLE = 2 V  
ENABLE = 2 V  
7
0.05  
100  
6
150  
Pulse-testing techniques maintain the virtual junction temperature as close to the ambient temperature as possible. Thermal effects must be taken  
into account separately. All characteristics are measured with a 0.1-µF capacitor across the input and a 10-µF capacitor with equivalent series  
resistance within the guidelines shown in Figures 3 and 4 on the output. All measurements are taken with a tantalum electrolytic capacitor.  
Although not normally recommended, an aluminum electrolytic capacitor can be used. Attention must be given its ESR value, particularly at low  
temperatures.  
3−9  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443  
ꢁ ꢂ  
ꢇꢊ  
SLVS073A − SEPTEMBER 1992 − REVISED AUGUST 1995  
PARAMETER MEASUREMENT INFORMATION  
The TL75LPxx series are low-dropout voltage regulators. This means that the capacitance is important to the  
performance of the regulator because it is a vital part of the control loop. The capacitor value and the equivalent series  
resistance (ESR) both affect the control loop and must be defined for the load range and the temperature range.  
Figures 3 and 4 can establish the capacitance value and ESR range for optimum regulator performance.  
Figure 3 shows the recommended range of ESR, measured at 120 Hz, for a given load with a 10-µF capacitor on the  
output. In addition, it shows a maximum ESR limit of 2 and a load-dependent minimum ESR limit.  
For applications with varying loads, the lightest load condition should be chosen since it is the worst case. Figure 4  
shows the relationship of the reciprocal of ESR to the square root of the capacitance with a minimum capacitance  
limit of 10 µF and a maximum ESR limit of 2 . Figure 4 establishes the amount that the minimum ESR limit of Figure  
3 can be adjusted for different capacitor values. For example, when the minimum load needed is 200 mA,  
Figure 3 suggests an ESR range of 0.8 to 2 for 10 µF. Figure 4 shows that changing the capacitor from  
10 µF to 400 µF can change the ESR minimum by greater than 3/0.5 (or 6). Therefore, the new minimum ESR value  
is 0.8/6 (or 0.13 ). This now allows an ESR range of 0.13 to 2 . This expanded ESR range is achieved by using  
a larger capacitor at the output. For better stability in low-current applications, it is recommended that a small  
resistance be placed in series with the capacitor (see Table 1) so that the ESR better approximates those in  
Figures 3 and 4.  
I  
L
Table 1. Compensations for Increased Stability at Low Currents  
Applied  
Load  
Current  
ESR  
TYP  
PART  
NUMBER  
ADDITIONAL  
RESISTANCE  
MANUFACTURER CAPACITANCE  
Load  
Voltage  
AVX  
15 µF  
33 µF  
0.9 Ω  
0.6 Ω  
TAJB156M010S  
1 Ω  
V  
L
V = I × ESR  
L
L
KEMET  
T491D336M010AS  
0.5 Ω  
OUTPUT CAPACITOR  
EQUIVALENT SERIES RESISTANCE  
OUTPUT CAPACITOR  
STABILITY  
vs  
vs  
LOAD CURRENT  
EQUIVALENT SERIES RESISTANCE  
0.04  
0.035  
0.03  
3
2.8  
2.6  
2.4  
2.2  
2
C
= 10 µF  
L
I
Not Recommended  
Potential Instability  
Recommended Min ESR  
This Region Not  
Recommended  
for Operation  
C = 0.1 µF  
1000 µF  
Region of  
Best Stability  
Max ESR Boundary  
0.025  
0.02  
1.8  
1.6  
1.4  
1.2  
1
400 µF  
Region of Best Stability  
200 µF  
0.015  
0.01  
Min ESR  
Boundary  
0.8  
0.6  
0.4  
0.2  
100 µF  
Potential Instability Region  
0.005  
0
22 µF  
10 µF  
10 µF  
0
0
0
0.5  
1
1.5  
2
2.5  
3
3.5  
4
4.5  
5
0.1  
0.2  
0.3  
0.4  
0.5  
1/ESR  
I
L
− Load Current − A  
Figure 3  
Figure 4  
3−10  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443  
ꢀ ꢁꢂ ꢃ ꢁ ꢄꢅ ꢅ ꢌꢇ ꢈꢉ ꢊ ꢋ  
ꢎꢏ  
SLVS073A − SEPTEMBER 1992 − REVISED AUGUST 1995  
TYPICAL CHARACTERISTICS  
Table of Graphs  
FIGURE  
Output voltage  
Input current  
vs Input voltage  
vs Input voltage  
5
6
I
I
= 10 mA  
O
= 100 mA vs Input voltage  
vs Output current  
7
O
Dropout voltage  
8
Quiescent current  
vs Output current  
9
Short-circuit protection conditions output voltage  
Load transient response  
vs Output current  
10  
11  
12  
Line transient response  
3−11  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443  
ꢁ ꢂ  
ꢇꢊ  
SLVS073A − SEPTEMBER 1992 − REVISED AUGUST 1995  
TYPICAL CHARACTERISTICS  
INPUT CURRENT  
vs  
OUTPUT VOLTAGE  
vs  
INPUT VOLTAGE  
INPUT VOLTAGE  
200  
180  
14  
12  
I
T
= 10 mA  
= 25°C  
O
J
I
T
= 10 mA  
= 25°C  
O
J
TL75LP12  
TL75LP10  
160  
140  
10  
8
TL75LP08  
120  
100  
TL75LP08  
6
4
TL75LP05  
TL75LP48  
80  
60  
40  
TL75LP10  
TL75LP05  
TL75LP12  
2
0
20  
0
TL75LP48  
0
2
4
6
8
10  
12  
14  
0
2
4
6
8
10  
12  
14  
V − Input Voltage − V  
I
V − Input Voltage − V  
I
Figure 5  
Figure 6  
DROPOUT VOLTAGE  
vs  
INPUT CURRENT  
vs  
OUTPUT CURRENT  
INPUT VOLTAGE  
250  
225  
200  
350  
300  
I
T
= 100 mA  
= 25°C  
O
J
T
J
= 25°C  
250  
200  
TL75LP08  
175  
150  
125  
100  
75  
TL75LP10  
TL75LP05  
150  
100  
TL75LP12  
TL75LP48  
50  
0
50  
0
2
4
6
8
10  
12  
14  
0
50  
100  
150  
200  
250  
300  
V − Input Voltage − V  
I
I
O
− Output Current − mA  
Figure 7  
Figure 8  
3−12  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443  
ꢀ ꢁꢂ ꢃ ꢁ ꢄꢅ ꢅ ꢌꢇ ꢈꢉ ꢊ ꢋ  
SLVS073A − SEPTEMBER 1992 − REVISED AUGUST 1995  
TYPICAL CHARACTERISTICS  
TL75LP05  
SHORT-CIRCUIT PROTECTION CONDITIONS  
OUTPUT VOLTAGE  
vs  
OUTPUT CURRENT  
QUIESCENT CURRENT  
vs  
OUTPUT CURRENT  
6
5
4
3
2
1
0
12  
10  
8
T
= 25°C  
J
I
V = 14 V  
T
J
= 25°C  
6
4
T
J
= 125°C  
T
J
= 40°C  
2
0
0.75 0.85 0.95 1.05 1.15 1.25 1.35 1.45 1.55  
0
20  
40  
60  
80  
100 120 140 160  
I
O
− Output Current − mA  
I
O
− Output Current − A  
Figure 9  
Figure 10  
LOAD TRANSIENT RESPONSE  
LINE TRANSIENT RESPONSE  
200  
V
) = V + 1 V  
I(NOM  
O
ESR = 2  
= 20 mA  
100  
I
C
L
= 10 µF  
= 25°C  
L
0
T
A
−100  
V
) = V + 1 V  
I(NOM  
O
ESR = 2  
= 10 µF  
−200  
150  
C
L
T
= 25°C  
A
100  
50  
0
−50  
0
50 100 150 200 250  
t − Time − µs  
300 350  
0
50 100 150 200 250 300 350 400  
t − Time − µs  
Figure 11  
Figure 12  
3−13  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443  
3−14  
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