TL054CN [TI]
ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS; 增强型JFET低偏移运算放大器
| 型号： | TL054CN |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS |
| 文件： | 总65页 (文件大小：1019K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
Direct Upgrades to TL07x and TL08x BiFET
Operational Amplifiers
On-Chip Offset Voltage Trimming for
Improved DC Performance and Precision
Grades Are Available (1.5 mV, TL051A)
Faster Slew Rate (20 V/µs Typ) Without
Increased Power Consumption
Available in TSSOP for Small Form-Factor
Designs
description
The TL05x series of JFET-input operational amplifiers offers improved dc and ac characteristics over the TL07x
and TL08x families of BiFET operational amplifiers. On-chip zener trimming of offset voltage yields precision
grades as low as 1.5 mV (TL051A) for greater accuracy in dc-coupled applications. Texas Instruments improved
BiFET process and optimized designs also yield improved bandwidth and slew rate without increased power
consumption. The TL05x devices are pin-compatible with the TL07x and TL08x and can be used to upgrade
existing circuits or for optimal performance in new designs.
BiFET operational amplifiers offer the inherently higher input impedance of the JFET-input transistors, without
sacrificing the output drive associated with bipolar amplifiers. This makes them better suited for interfacing with
high-impedance sensors or very low-level ac signals. They also feature inherently better ac response than
bipolar or CMOS devices having comparable power consumption.
The TL05x family was designed to offer higher precision and better ac response than the TL08x with the low
noise floor of the TL07x. Designers requiring significantly faster ac response or ensured lower noise should
consider the Excalibur TLE208x and TLE207x families of BiFET operational amplifiers.
AVAILABLE OPTIONS
PACKAGED DEVICES
CHIP
V
max
CHIP
CARRIER
(FK)
CERAMIC
DIP
CERAMIC
DIP
PLASTIC
DIP
PLASTIC
DIP
IO
SMALL
OUTLINE
(D)
‡
FORM
(Y)
T
A
AT 25°C
†
(J)
(JG)
(N)
(P)
TL051ACD
TL052ACD
TL051ACP
TL052ACP
800 µV
—
—
—
—
TL051Y
TL052Y
TL054Y
TL051CD
TL052CD
TL054ACD
TL051CP
TL052CP
0°C to 70°C
1.5 mV
—
—
—
TL054ACN
4 mV
TL054CD
—
—
—
—
—
—
TL054CN
—
—
TL051AID
TL052AID
TL051AIP
TL052AIP
800 µV
TL051ID
TL052ID
TL054AID
TL051IP
TL052IP
–40°C to 85°C
–55°C to 125°C
—
—
1.5 mV
—
—
—
—
—
—
TL054AIN
4 mV
TL054ID
TL054IN
—
—
TL051AMFK
TL052AMFK
TL051AMD
TL052AMD
TL051AMJG
TL052AMJG
TL051AMP
TL052AMP
800 µV
TL051MD
TL052MD
TL054AMD TL054AMFK
TL051MFK
TL052MFK
TL051MP
TL052MP
TL051MJG
TL052MJG
1.5 mV
4 mV
TL054AMJ
TL054MJ
TL054AMN
TL054MN
TL054MD TL054MFK
—
—
†
‡
The D packages are available taped and reeled. Add R suffix to device type (e.g., TL054CDR).
Chip forms are tested at 25°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 1997, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
description (continued)
Because BiFET operational amplifiers are designed for use with dual power supplies, care must be taken to
observe common-mode input voltage limits and output swing when operating from a single supply. DC biasing
of the input signal is required and loads should be terminated to a virtual-ground node at midsupply. Texas
Instruments TLE2426 integrated virtual ground generator is useful when operating BiFET amplifiers from single
supplies.
The TL05x are fully specified at ±15 V and ±5 V. For operation in low-voltage and/or single-supply systems,
Texas Instruments LinCMOS families of operational amplifiers (TLC-prefix) are recommended. When moving
from BiFET to CMOS amplifiers, particular attention should be paid to the slew rate and bandwidth
requirements, and also the output loading.
TL051
D, JG, OR P PACKAGE
(TOP VIEW)
TL052
D, JG, OR P PACKAGE
(TOP VIEW)
TL054
D, J, OR N PACKAGE
(TOP VIEW)
1OUT
1IN–
1IN+
4OUT
4IN–
4IN+
OFFSET N1
IN–
NC
V
OUT
1OUT
1IN–
1IN+
V
1
2
3
4
5
6
7
14
13
12
11
10
9
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
CC+
2OUT
2IN–
2IN+
CC+
IN+
V
V
V
OFFSET N2
V
CC+
CC–
CC–
CC –
2IN+
2IN–
2OUT
3IN+
3IN–
3OUT
8
TL051
TL052
TL054
FK PACKAGE
(TOP VIEW)
FK PACKAGE
(TOP VIEW)
FK PACKAGE
(TOP VIEW)
3
2
1
20 19
18
3
2 1 20 19
4IN+
NC
1IN+
4
5
6
7
8
NC
NC
18
17
16
15
14
4
5
6
7
8
NC
17
16
15
14
2OUT
NC
3
2
1
20 19
1IN –
NC
NC
V
NC
V
18
17
16
15
14
V
4
CC–
CC+
NC
IN–
NC
IN+
NC
NC
5
6
7
8
CC+
2IN –
NC
1IN+
NC
NC
3IN+
2IN+
9 10 11 12 13
OUT
NC
9 10 11 12 13
9 10 11 12 13
NC – No internal connection
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
symbol (each amplifier)
–
+
IN–
IN+
OUT
equivalent schematic (each amplifier)
V
CC+
Q10
Q2
Q3
Q15
Q16
JF3
Q7
Q6
Q11
Q13
R7
IN+
Q12
D1
R9
OUT
IN–
JF1
R5
JF2
R8
C1
Q4
Q17
Q14
Q8
Q1
Q9
Q5
OFFSET N1
R10
D2
See Note A
OFFSET N2
R4
R6
R1
R2
R3
V
CC–
NOTE A: OFFSET N1 and OFFSET N2 are only available on the TL051x.
†
ACTUAL DEVICE COMPONENT COUNT
COMPONENT
Transistors
TL051
TL052
TL054
20
10
2
34
19
3
62
37
5
Resistors
Diodes
Capacitors
1
2
4
†
These figures include all four amplifiers and all ESD, bias, and trim circuitry.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL051Y chip information
This chip, when properly assembled, displays characteristics similar to the TL051. Thermal compression or
ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductive
epoxy or a gold-silicon preform.
BONDING PAD ASSIGNMENTS
V
CC+
(7)
(7)
(6)
(3)
(2)
IN+
IN–
+
(6)
OUT
–
(4)
CC–
(1)
(5)
V
OFFSET N1
OFFSET N2
(5)
63
(4)
CHIP THICKNESS: 15 MILS TYPICAL
BONDING PADS: 4 × 4 MILS MINIMUM
T max = 150°C
J
TOLERANCES ARE ±10%.
(1)
ALL DIMENSIONS ARE IN MILS.
PIN (4) IS INTERNALLY CONNECTED
TO BACKSIDE OF CHIP.
(3)
(2)
43
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL052Y chip information
This chip, when properly assembled, displays characteristics similar to the TL052. Thermal compression or
ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductive
epoxy or a gold-silicon preform.
BONDING PAD ASSIGNMENTS
V
CC+
(8)
(7)
(8)
(1)
(6)
(5)
(3)
(2)
1IN+
1IN–
+
–
(1)
1OUT
(5)
(6)
+
2IN+
2IN–
(7)
2OUT
–
(4)
V
CC–
(4)
72
CHIP THICKNESS: 15 MILS TYPICAL
BONDING PADS: 4 × 4 MILS MINIMUM
T max = 150°C
J
TOLERANCES ARE ±10%.
ALL DIMENSIONS ARE IN MILS.
PIN (4) IS INTERNALLY CONNECTED
TO BACKSIDE OF CHIP.
(3)
(2)
66
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL054 chip information
This chip, when properly assembled, displays characteristics similar to the TL054C. Thermal compression or
ultrasonic bonding may be used on the doped-aluminum bonding pads. These chips may be mounted with
conductive epoxy or a gold-silicon preform.
BONDING PAD ASSIGNMENTS
V
CC+
(4)
(1)
(14)
(3)
(2)
1IN+
1IN–
+
–
(1)
1OUT
(2)
(3)
(13)
(12)
(5)
(6)
+
2IN+
2IN–
(7)
2OUT
3IN+
–
(10)
(9)
+
–
(8)
3OUT
3IN–
(12)
(13)
+
–
4IN+
4IN–
(14)
4OUT
(11)
V
CC–
(4)
(11)
122
CHIP THICKNESS: 15 MILS TYPICAL
BONDING PADS: 4 × 4 MILS MINIMUM
T max = 150°C
J
TOLERANCES ARE ±10%.
(5)
(6)
(10)
(9)
ALL DIMENSIONS ARE IN MILS.
PIN (11) IS INTERNALLY CONNECTED
TO BACKSIDE OF THE CHIP.
(7)
(8)
(7)
(8)
(6)
(9)
71
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
Supply voltage, V
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –18 V
CC+
CC–
Differential input voltage (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±30 V
Input voltage range, V (any input, see Notes 1 and 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±15 V
I
Input current, I (each input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±1 mA
I
Output current, I (each output) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±80 mA
O
Total current into V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160 mA
CC+
CC–
Total current out of V
Duration of short-circuit current at (or below) 25°C (see Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . unlimited
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating free-air temperature range, T : C suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
A
I suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 85°C
M suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to 125°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
Case temperature for 60 seconds: FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
Lead temperature 1,6 mm (1/16inch) from case for 10 seconds: D, N, or P package . . . . . . . . . . . . . . 260°C
Lead temperature 1,6 mm (1/16inch) from case for 60 seconds: J or JG package . . . . . . . . . . . . . . . . 300°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between V
and V
CC–.
CC+
2. Differential voltages are at IN+ with respect to IN–.
3. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 V, whichever is less.
4. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum
dissipation rating is not exceeded.
DISSIPATION RATING TABLE
T
≤ 25°C
DERATING FACTOR
T
= 70°C
T
= 85°C
T = 125°C
A
POWER RATING
A
A
A
PACKAGE
POWER RATING
ABOVE T = 25°C
POWER RATING
POWER RATING
A
D–8
D–14
FK
J
725 mW
5.8 mW/°C
7.6 mW/°C
11.0 mW/°C
11.0 mW/°C
8.4 mW/°C
12.6 mW/°C
8.0 mW/°C
464 mW
377 mW
145 mW
950 mW
608 mW
494 mW
190 mW
1375 mW
1375 mW
1050 mW
1575 mW
1000 mW
880 mW
715 mW
275 mW
880 mW
715 mW
275 mW
JG
N
672 mW
546 mW
210 mW
1008 mW
640 mW
819 mW
315 mW
P
520 mW
200 mW
recommended operating conditions
C SUFFIX
I SUFFIX
M SUFFIX
UNIT
MIN
±5
MAX
MIN
±5
MAX
MIN
±5
MAX
±15
4
Supply voltage, V
±15
4
±15
4
V
CC±
V
V
= ±5 V
–1
–1
–1
CC±
Common-mode input voltage, V
V
IC
Operating free-air temperature, T
= ±15 V
11
11
11
–11
0
–11
–40
–11
–55
CC±
70
85
125
°C
A
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL051C and TL051AC electrical characteristics at specified free-air temperature
TL051C, TL051AC
†
PARAMETER
TEST CONDITIONS
T
A
V
= ± 5 V
V
= ± 15 V
UNIT
CC ±
CC ±
MIN
MIN
TYP
MAX
3.5
TYP
MAX
25°C
Full range
25°C
0.75
0.55
0.59
1.5
2.5
0.8
1.8
TL051C
4.5
V
IO
Input offset voltage
Temperature coefficient
mV
2.8
0.35
TL051AC
Full range
3.8
V
V
R
= 0,
= 0,
= 50 Ω
O
IC
S
25°C to
70°C
TL051C
8
8
8
8
α
µV/°C
µV/mo
VIO
‡
of input offset voltage
25°C to
70°C
TL051AC
25
Input offset voltage
25°C
0.04
0.04
§
long-term drift
25°C
70°C
25°C
70°C
4
0.02
20
100
1
5
0.025
30
100
1
pA
nA
pA
nA
V
= 0,
V
V
= 0,
= 0,
O
IC
I
I
Input offset current
Input bias current
IO
See Figure 5
200
4
200
4
V
O
= 0,
IC
IB
See Figure 5
0.15
0.2
–1
to
4
–2.3
to
5.6
–11 –12.3
25°C
to
to
11
15.6
Common-mode input
voltage range
V
V
V
ICR
–1
to
4
–11
to
11
Full range
25°C
Full range
25°C
3
3
4.2
3.8
13
13
13.9
12.7
R
R
R
R
= 10 kΩ
= 2 kΩ
= 10 kΩ
= 2 kΩ
L
L
L
L
Maximum positive peak
output voltage swing
V
OM +
OM –
2.5
11.5
11.5
Full range
25°C
2.5
–2.5
–2.5
–2.3
–2.3
25
–3.5
–3.2
–12 –13.2
–12
Full range
25°C
Maximum negative peak
output voltage swing
V
V
–11
–11
50
–12
Full range
25°C
59
65
46
105
129
85
Large-signal differential
A
VD
R
= 2 kΩ
V/mV
0°C
30
60
L
¶
voltage amplification
70°C
20
30
12
10
12
10
r
Input resistance
25°C
Ω
i
c
Input capacitance
25°C
10
85
84
84
99
98
97
12
93
92
91
99
98
97
pF
i
25°C
65
65
65
75
75
75
75
75
75
75
75
75
Common-mode
rejection ratio
V
V
= V
= 0,
min,
ICR
IC
O
CMRR
dB
dB
0°C
R
= 50 Ω
= 50 Ω
S
70°C
25°C
Supply-voltage rejection
ratio (∆V /∆V
k
V
= 0,
= 0,
R
0°C
SVR
O
O
S
)
CC± IO
70°C
25°C
2.6
2.7
2.6
3.2
3.2
3.2
2.7
2.8
2.7
3.2
3.2
3.2
0°C
I
Supply current
V
No load
mA
CC
70°C
†
Full range is 0°C to 70°C.
‡
§
¶
This parameter is tested on a sample basis for the TL051A. For other test requirements, please contact the factory. This statement has no bearing
on testing or nontesting of other parameters.
Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at T = 150°C extrapolated to
A
T
For V
= 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
A
= ±5 V, V = ±2.3 V, or for V
CC±
= ±15 V, V = ±10 V.
CC±
O
O
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL051C and TL051AC operating characteristics at specified free-air temperature
TL051C, TL051AC
= ±5 V
†
PARAMETER
TEST CONDITIONS
T
A
V
V
= ±15 V
UNIT
CC±
TYP
CC±
MIN
MAX
MIN
TYP
MAX
25°C
16
16.4
15
13
20
Positive slew rate
at unity gain
SR+
SR–
Full
range
‡
11
13
11
22.6
18
R
= 2 kΩ,
C = 100 pF,
L
L
V/µs
See Figure 1
25°C
Negative slew rate
Full
range
‡
at unity gain
16
19.3
25°C
0°C
55
54
56
55
t
Rise time
r
f
70°C
25°C
0°C
63
63
ns
V
R
C
= ±10 mV,
= 2 kΩ,
= 100 pF,
55
57
I(PP)
L
L
t
Fall time
54
56
70°C
25°C
0°C
62
64
See Figures 1 and 2
24%
24%
24%
75
19%
19%
19%
75
Overshoot factor
70°C
25°C
25°C
f = 10 Hz
Equivalent input noise
V
nV/√Hz
µV
n
§
voltage
R
= 20 Ω,
f = 1 kHz
18
18
30
S
See Figure 3
Peak-to-peak equivalent
input noise voltage
f = 10 Hz to
10 kHz
V
25°C
25°C
25°C
4
0.01
4
0.01
N(PP)
Equivalent input
noise current
I
n
f = 1 kHz
pA/√Hz
R
= 1 kΩ,
R
R
= 2 kΩ,
= 2 kΩ,
S
L
L
¶
THD
0.003%
0.003%
Total harmonic distortion
f = 1 kHz
25°C
0°C
3
3.2
2.7
59°
58°
59°
3.1
3.3
2.8
62°
62°
62°
V = 10 mV,
I
B
Unity-gain bandwidth
MHz
1
C
= 25 pF,
See Figure 4
L
70°C
25°C
0°C
Phase margin at unity
gain
V = 10 mV,
R = 2 kΩ,
L
See Figure 4
I
φ
m
C
= 25 pF,
L
70°C
†
‡
§
Full range is 0°C to 70°C.
For V = ±5 V, V
= ±1 V; for V
CC±
= ±15 V, V
= ±5 V.
I(PP)
CC±
I(PP)
This parameter is tested on a sample basis for the TL051A. For other test requirements, please contact the factory. This statement has no bearing
on testing or nontesting of other parameters.
¶
For V
= ±5 V, V rms = 1 V; for V
CC±
= ±15 V, V rms = 6 V.
CC±
O
O
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL051I and TL051AI electrical characteristics at specified free-air temperature
TL051I, TL051AI
†
PARAMETER
TEST CONDITIONS
V
= ±5 V
V
= ±15 V
UNIT
T
A
CC±
TYP
CC±
MIN
MIN
MAX
3.5
TYP
MAX
25°C
Full range
25°C
0.75
0.59
1.5
3.3
0.8
2.6
TL051I
5.3
V
IO
Input offset voltage
mV
0.55
2.8
0.35
TL051AI
Full range
4.6
V
V
R
= 0,
= 0,
= 50 Ω
O
IC
S
25°C to
85°C
TL051I
7
8
8
8
Temperature coefficient of
input offset voltage
α
µV/°C
µV/mo
VIO
‡
25°C to
85°C
TL051AI
25
Input offset voltage
25°C
0.04
0.04
§
long-term drift
25°C
85°C
25°C
85°C
4
0.06
20
100
10
5
0.07
30
100
10
pA
nA
pA
nA
V
= 0,
V
V
= 0,
= 0,
O
IC
I
I
Input offset current
Input bias current
IO
See Figure 5
200
20
200
20
V
O
= 0,
IC
IB
See Figure 5
0.6
0.7
–1
to
4
–2.3
to
5.6
–11 –12.3
25°C
to
to
11
15.6
Common-mode input
voltage range
V
V
V
ICR
–1
to
4
–11
to
11
Full range
25°C
Full range
25°C
3
3
4.2
3.8
13
13
13.9
12.7
R
R
R
R
= 10 kΩ
= 2 kΩ
= 10 kΩ
= 2 kΩ
L
L
L
L
Maximum positive peak
output voltage swing
V
V
OM +
2.5
11.5
11.5
Full range
25°C
2.5
–2.5
–2.5
–2.3
–2.3
25
–3.5
–3.2
–12 –13.2
–12
Full range
25°C
Maximum negative peak
output voltage swing
V
OM –
–11
–11
50
–12
Full range
25°C
59
74
43
105
145
76
Large-signal differential
A
VD
R
= 2 kΩ
–40°C
85°C
30
60
V/mV
L
¶
voltage amplification
20
30
12
10
12
10
r
Input resistance
25°C
Ω
i
c
Input capacitance
25°C
10
85
83
84
99
98
99
2.6
2.4
2.5
12
93
90
93
99
98
99
2.7
2.6
2.6
pF
i
25°C
65
65
65
75
75
75
75
75
75
75
75
75
V
V
R
= V
= 0,
= 50 Ω
min,
ICR
IC
O
S
Common-mode
rejection ratio
CMRR
–40°C
85°C
dB
dB
25°C
Supply-voltage rejection
ratio (∆V /∆V
V
R
= 0,
= 50 Ω
O
k
–40°C
85°C
SVR
)
CC± IO
S
25°C
3.2
3.2
3.2
3.2
3.2
3.2
I
Supply current
V
O
= 0,
No load
–40°C
85°C
mA
CC
†
Full range is –40°C to 85°C
‡
§
¶
This parameter is tested on a sample basis for the TL051A. For other test requirements, please contact the factory. This statement has no bearing
on testing or nontesting of other parameters.
Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at T = 150°C extrapolated to
A
T
For V
= 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
A
= ±5 V, V = ±2.3 V, or for V
CC±
= ±15 V, V = ±10 V.
CC±
O
O
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL051I and TL051AI operating characteristics at specified free-air temperature
TL051I, TL051AI
= ±5 V
†
PARAMETER
TEST CONDITIONS
T
A
V
V
= ±15 V
UNIT
CC±
TYP
CC±
MIN TYP
MIN
MAX
MAX
25°C
16
13
11
13
11
20
Positive slew rate
at unity gain
SR+
SR–
Full
range
‡
R
= 2 kΩ,
C = 100 pF,
L
L
V/µs
See Figure 1
25°C
15
18
Negative slew rate
Full
range
‡
at unity gain
25°C
–40°C
85°C
55
52
56
53
t
Rise time
r
f
64
65
ns
V
R
C
= ±10 mV,
= 2 kΩ,
= 100 pF,
25°C
55
57
I(PP)
L
L
t
Fall time
–40°C
85°C
51
53
64
65
See Figures 1 and 2
25°C
24%
24%
24%
75
19%
19%
19%
75
Overshoot factor
–40°C
85°C
f = 10 Hz
25°C
Equivalent input noise
voltage
V
V
nV/√Hz
µV
n
§
R
= 20 Ω,
f = 1 kHz
25°C
18
18
30
S
See Figure 3
Peak-to-peak equivalent
input noise voltage
f = 10 Hz to
10 kHz
25°C
25°C
25°C
4
0.01
4
0.01
N(PP)
Equivalent input
noise current
I
n
f = 1 kHz
pA/√Hz
R
= 1 kΩ,
R
R
= 2 kΩ,
= 2 kΩ,
S
L
L
¶
THD
Total harmonic distortion
0.003%
0.003%
f = 1 kHz
25°C
–40°C
85°C
3
3.5
2.6
59°
58°
59°
3.1
3.6
2.7
62°
61°
62°
V = 10 mV,
I
B
1
Unity-gain bandwidth
MHz
C
= 25 pF,
See Figure 4
L
25°C
Phase margin at unity
gain
V = 10 mV,
R = 2 kΩ,
L
See Figure 4
I
φ
m
–40°C
85°C
C
= 25 pF,
L
†
‡
§
Full range is –40°C to 85°C.
For V = ±5 V, V = ±1 V; for V
This parameter is tested on a sample basis for the TL051A. For other test requirements, please contact the factory. This statement has no bearing
on testing or nontesting of other parameters.
= ±15 V, V = ±5 V.
I(PP)
CC±
I(PP)
CC±
¶
For V
= ±5 V, V rms = 1 V; for V
CC±
= ±15 V, V rms = 6 V.
CC±
O
O
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL051M and TL051AM electrical characteristics at specified free-air temperature
TL051M, TL051AM
†
PARAMETER
TEST CONDITIONS
V
= ± 5 V
V
= ± 15 V
UNIT
T
A
CC ±
CC ±
MIN
MIN
TYP
MAX
3.5
TYP
MAX
25C
Full range
25°C
0.75
0.55
0.59
1.5
4.5
0.8
3.8
TL051M
6.5
V
IO
Input offset voltage
mV
2.8
0.35
TL051AM
Full range
5.8
V
V
R
= 0,
= 0,
= 50 Ω
O
IC
S
25°C to
125°C
TL051M
8
8
8
8
Temperature coefficient of
input offset voltage
α
µV/°C
µV/mo
VIO
25°C to
125°C
TL051AM
Input offset voltage
25°C
0.04
0.04
‡
long-term drift
25°C
125°C
25°C
4
1
100
20
5
2
100
20
pA
nA
pA
nA
V
= 0,
V
= 0,
IC
O
I
I
Input offset current
Input bias current
IO
See Figure 5
20
10
200
50
30
20
200
50
V
O
= 0, V = 0,
IC
IB
See Figure 5
125°C
–1
to
4
–2.3
to
5.6
–11 –12.3
25°C
to
to
11
15.6
Common-mode input
voltage range
V
V
V
ICR
–1
to
4
–11
to
11
Full range
25°C
Full range
25°C
3
3
4.2
3.8
13
13
13.9
12.7
R
R
R
R
= 10 kΩ
= 2 kΩ
= 10 kΩ
= 2 kΩ
L
L
L
L
Maximum positive peak
output voltage swing
V
OM+
OM–
2.5
11.5
11.5
Full range
25°C
2.5
–2.5
–2.5
–2.3
–2.3
25
–3.5
–3.2
–12 –13.2
–12
Full range
25°C
Maximum negative peak
output voltage swing
V
V
–11
–11
50
–12
Full range
25°C
59
76
32
105
149
49
Large-signal differential
A
VD
R
= 2 kΩ
V/mV
–55°C
125°C
25°C
30
60
L
§
voltage amplification
10
15
12
10
12
10
r
Input resistance
Ω
i
c
Input capacitance
25°C
10
85
83
84
99
98
12
93
92
94
99
98
pF
i
25°C
65
65
65
75
75
75
75
75
75
75
75
75
V
V
R
= V
= 0,
= 50 Ω
min,
R
IC
O
S
ICR
Common-mode
rejection ratio
CMRR
dB
dB
–55°C
125°C
25°C
Supply-voltage rejection
ratio (∆V /∆V
k
V
= 0,
= 50 Ω
S
–55°C
125°C
25°C
SVR
O
O
)
CC± IO
100
2.6
2.3
2.4
100
2.7
2.4
2.5
3.2
3.2
3.2
3.2
3.2
3.2
–55°C
125°C
I
Supply current
V
= 0,
No load
mA
CC
†
‡
Full range is –55°C to 125°C.
Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at T = 150°C extrapolated to
A
T
For V
= 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
A
§
= ± 5 V, V = ± 2.3 V, or for V
CC±
= ±15 V, V = ±10 V.
CC±
O
O
12
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL051M and TL051AM operating characteristics at specified free-air temperature
TL051M, TL051AM
= ±5 V = ±15 V
V
CC±
V
PARAMETER
TEST CONDITIONS
T
A
UNIT
CC±
MIN TYP
MIN TYP
MAX
MAX
Positive slew rate
at unity gain
SR+
SR–
25°C
25°C
16
13
13
20
†
R
= 2 kΩ,
C = 100 pF,
L
L
V/µs
See Figure 1
Negative slew rate
15
†
at unity gain
25°C
–55°C
125°C
25°C
55
51
56
52
t
Rise time
r
f
68
68
ns
V
R
C
= ±10 mV,
= 2 kΩ,
= 100 pF,
55
57
I(PP)
L
L
t
Fall time
–55°C
125°C
25°C
51
52
68
69
See Figures 1 and 2
24%
25%
25%
75
19%
19%
19%
75
Overshoot factor
–55°C
125°C
25°C
f = 10 Hz
Equivalent input noise
V
V
nV/√Hz
µV
n
‡
voltage
R
= 20 Ω,
f = 1 kHz
25°C
18
19
S
See Figure 3
Peak-to-peak equivalent
input noise voltage
f = 10 Hz to
10 kHz
25°C
25°C
25°C
4
0.01
4
0.01
N(PP)
Equivalent input noise
current
I
n
f = 1 kHz
pA/√Hz
R
= 1 kΩ,
R
R
= 2kΩ,
= 2 kΩ,
S
L
L
§
THD
0.003%
0.003%
Total harmonic distortion
f = 1 kHz
25°C
–55°C
125°C
25°C
3
3.6
2.3
59°
57°
59°
3.1
3.7
2.4
62°
61°
62°
V = 10 mV,
I
B
Unity-gain bandwidth
MHz
1
C
= 25 pF,
See Figure 4
L
Phase margin at unity
gain
V = 10 mV,
R = 2 kΩ,
L
See Figure 4
I
φ
–55°C
125°C
m
C
= 25 pF,
L
†
‡
For V
= ±5 V, V
= ±1 V; for V
CC±
= ±15 V, V = ±5 V.
CC±
I(PP)
I(PP)
This parameter is tested on a sample basis for the TL051A. For other test requirements, please contact the factory. This statement has no bearing
on testing or nontesting of other parameters.
For V
§
= ±5 V, V rms = 1 V; for V
= ±15 V, V rms = 6 V.
CC±
O
CC±
O
13
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL051Y electrical characteristics, T = 25°C
A
TL051Y
PARAMETER
TEST CONDITIONS
V
= ± 5 V
V
= ± 15 V
UNIT
CC ±
MIN TYP
CC ±
MIN
MAX
TYP
MAX
V
R
= 0,
= 50 Ω
V
IC
V
IC
V
IC
= 0,
= 0,
= 0,
O
S
V
Input offset voltage
0.75
4
0.59
mV
pA
pA
IO
V
O
= 0,
I
I
Input offset current
Input bias current
5
IO
See Figure 5
V
O
= 0,
20
30
IB
See Figure 5
–2.3
to
5.6
–12.3
to
15.6
V
ICR
Common-mode input voltage range
V
R
R
R
R
= 10 kΩ
= 2 kΩ
= 10 kΩ
= 2 kΩ
4.2
3.8
13.9
12.7
Maximum positive peak output voltage
swing
L
L
L
L
V
V
V
V
OM+
–3.5
–3.2
–13.2
–12
Maximum negative peak output voltage
swing
OM –
Large-signal differential voltage
amplification
A
VD
R
= 2 kΩ
59
105
V/mV
L
†
12
10
12
12
r
Input resistance
10
10
Ω
i
c
Input capacitance
pF
i
V
V
= V
= 0,
min,
ICR
IC
O
CMRR Common-mode rejection ratio
85
99
93
99
dB
R
= 50 Ω
= 50 Ω
S
Supply-voltage rejection ratio
k
V
= 0,
= 0,
R
dB
SVR
O
O
S
(∆V
CC±
/∆V )
IO
I
Supply current
= ±5 V, V = ±2.3 V, or for V
V
No load
2.6
2.7
mA
CC
†
For V
= ± 15 V, V = ±10 V.
O
CC±
O
CC±
14
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL051Y operating characteristics, T = 25°C
A
TL051Y
PARAMETER
TEST CONDITIONS
V
CC±
= ±5 V
V
CC±
= ±15 V
UNIT
MIN TYP
MAX
MIN TYP
MAX
†
SR+
SR–
16
15
20
18
Positive slew rate at unity gain
R
= 2 kΩ,
C = 100 pF,
L
L
V/µs
See Figure 1
†
Negative slew rate at unity gain
V
R
C
= ±10 mV,
= 2 kΩ,
= 100 pF,
t
Rise time
55
56
I(PP)
L
L
r
ns
t
f
Fall time
55
57
Overshoot factor
24%
75
19%
75
See Figures 1 and 2
f = 10 Hz
‡
V
V
nV/√Hz
Equivalent input noise voltage
n
R
= 20 Ω,
f = 1 kHz
18
18
S
See Figure 3
Peak-to-peak equivalent input
noise voltage
f = 10 Hz to
10 kHz
4
4
µV
N(PP)
I
n
Equivalent input noise current
f = 1 kHz
0.01
0.01
pA/√Hz
R
= 1 kΩ,
R
R
= 2 kΩ,
= 2 kΩ,
S
L
L
§
THD
Total harmonic distortion
0.003%
0.003%
f = 1 kHz
V = 10 mV,
I
B
1
Unity-gain bandwidth
3
3.1
MHz
C
= 25 pF,
See Figure 4
R = 2 kΩ,
L
L
V = 10 mV,
I
φ
m
Phase margin at unity gain
= ±5 V, V = ±1 V; for V
59°
62°
C
= 25 pF,
See Figure 4
L
†
‡
For V
= ±15 V, V
I(PP)
= ±5 V.
CC±
I(PP)
CC±
This parameter is tested on a sample basis for the TL051A. For other test requirements, please contact the factory. This statement has no bearing
on testing or nontesting of other parameters.
§
For V
= ±5 V, V rms = 1 V; for V
CC±
= ±15 V, V rms = 6 V.
CC±
O
O
15
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL052C and TL052AC electrical characteristics at specified free-air temperature
TL052C, TL052AC
†
PARAMETER
TEST CONDITIONS
V
= ±5 V
V
= ±15 V
UNIT
T
A
CC±
TYP
CC±
MIN
MIN
MAX
3.5
TYP
MAX
25°C
Full range
25°C
0.73
0.65
1.5
2.5
0.8
1.8
TL052C
4.5
V
IO
Input offset voltage
mV
0.51
2.8
0.4
TL052AC
TL052C
V
V
R
= 0,
= 0,
= 50 Ω
O
IC
S
Full range
3.8
25°C to
70°C
8
8
8
6
Temperature coefficient
of input offset voltage
α
µV/°C
VIO
‡
25°C to
70°C
TL052AC
25
V
R
= 0,
= 50 Ω
Input offset voltage long-
term drift
O
S
V
IC
V
IC
V
IC
= 0,
= 0,
= 0,
25°C
0.04
0.04
µV/mo
§
25°C
70°C
25°C
70°C
4
0.02
20
100
1
5
0.025
30
100
1
pA
nA
pA
nA
V
O
= 0,
I
I
Input offset current
Input bias current
IO
See Figure 5
200
4
200
4
V
O
= 0,
IB
See Figure 5
0.15
0.2
–1
to
4
–2.3
to
5.6
–11 –12.3
25°C
to
to
11
15.6
Common-mode input
voltage range
V
V
V
ICR
–1
to
4
–11
to
11
Full range
25°C
Full range
25°C
3
3
4.2
3.8
13
13
13.9
12.7
R
R
R
R
= 10 kΩ
= 2 kΩ
= 10 kΩ
= 2 kΩ
L
L
L
L
Maximum positive peak
output voltage swing
V
V
OM+
2.5
11.5
11.5
Full range
25°C
2.5
–2.5
–2.5
–2.3
–2.3
25
–3.5
–3.2
–12 –13.2
–12
Full range
25°C
Maximum negative peak
output voltage swing
V
OM–
–11
–11
50
–12
Full range
25°C
59
65
46
105
129
Large-signal differential
A
VD
R
= 2 kΩ
0°C
30
60
V/mV
L
¶
voltage amplification
70°C
20
30
85
12
12
10
r
Input resistance
25°C
10
Ω
i
c
Input capacitance
25°C
10
85
84
84
12
93
92
91
pF
i
25°C
65
65
65
75
75
75
Common-mode
rejection ratio
V
IC
V
O
= V
= 0,
min,
ICR
CMRR
R
= 50 Ω
0°C
dB
S
70°C
†
‡
Full range is 0°C to 70°C.
This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing
or nontesting of other parameters.
§
¶
Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at T = 150°C extrapolated to
A
T
For V
= 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
A
= ±5 V, V = ±2.3 V; at V
CC±
= ±15 V, V = ±10 V.
CC±
O
O
16
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL052C and TL052AC electrical characteristics at specified free-air temperature (continued)
TL052C, TL052AC
PARAMETER
TEST CONDITIONS
V
MIN
75
= ±5 V
V
= ±15 V
UNIT
T
CC±
TYP
CC±
A
MAX
MIN
75
TYP
99
MAX
25°C
0°C
99
98
Supply-voltage rejection
k
V
= 0,
= 0,
R = 50 Ω
S
75
75
98
dB
SVR
O
ratio (∆V
/∆V )
CC ±
IO
70°C
25°C
0°C
75
97
75
97
4.6
4.7
4.4
120
5.6
6.4
6.4
4.8
4.8
4.6
120
5.6
6.4
6.4
Supply current
(two amplifiers)
I
V
A
No load
mA
dB
CC
O
70°C
25°C
V /V
O1 O2
Crosstalk attenuation
= 100
VD
TL052C and TL052AC operating characteristics at specified free-air temperature
TL052C, TL052AC
†
PARAMETER
TEST CONDITIONS
V
= ± 5 V
V
= ± 15 V
UNIT
T
A
CC±
MIN TYP
CC±
MAX
MIN
9
TYP
MAX
25°C
17.8
15.4
20.7
SR +
SR –
Slew rate at unity gain
Negative slew rate
R
= 2 kΩ,
C
= 100 pF, Full range
L
8
L
V/µs
See Figure 1
25°C
Full range
25°C
9
17.8
‡
at unity gain
8
55
54
56
55
t
Rise time
0°C
r
f
70°C
63
63
ns
V
R
C
= ±10 mV,
= 2 kΩ,
= 100 pF,
25°C
55
57
I(PP)
L
L
t
Fall time
0°C
54
56
70°C
25°C
0°C
62
64
See Figures 1 and 2
24%
24%
24%
71
19%
19%
19%
71
Overshoot factor
70°C
25°C
25°C
f = 10 Hz
Equivalent input noise
V
V
nV/√Hz
µV
n
§
voltage
R
= 20 Ω,
f = 1 kHz
19
19
30
S
See Figure 3
Peak-to-peak equivalent
input noise current
f = 10 Hz t
10 kHz
25°C
25°C
25°C
4
0.01
4
0.01
N(PP)
Equivalent input
noise current
I
n
f = 1 kHz
pA/√Hz
R
= 1 kΩ,
R
R
= 2 kΩ,
= 2 kΩ,
S
L
L
¶
THD
Total harmonic distortion
0.003%
0.003%
f = 1 kHz
25°C
0°C
3
3.2
2.6
60°
59°
60°
3
3.2
2.7
63°
63°
63°
V = 10 mV,
I
B
1
Unity-gain bandwidth
MHz
C
= 25 pF,
See Figure 4
L
70°C
25°C
0°C
Phase margin at unity
gain
V = 10 mV,
R = 2 kΩ,
L
See Figure 4
I
φ
m
C
= 25 pF,
L
70°C
†
‡
§
Full range is 0°C to 70°C.
For V = ±5 V, V
= ±1 V; for V
CC±
= ±15 V, V
= ±5 V.
I(PP)
CC±
I(PP)
This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing
or nontesting of other parameters.
¶
For V
= ±5 V, V
= 1 V; for V
= ±15 V, V
= 6 V.
CC±
O(RMS)
CC±
O(RMS)
17
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL052I and TL052AI electrical characteristics at specified free-air temperature
TL052I, TL052AI
†
PARAMETER
TEST CONDITIONS
V
= ±5 V
V
= ±15 V
UNIT
T
A
CC±
TYP
CC±
MIN
MIN
MAX
3.5
TYP
MAX
25°C
Full range
25°C
0.73
0.65
1.5
3.3
0.8
2.6
TL052I
5.3
V
IO
Input offset voltage
mV
0.51
2.8
0.4
TL052AI
V
V
R
= 0,
O
IC
S
Full range
4.6
= 0,
25°C to
85°C
= 50 Ω
TL052I
7
6
6
6
‡
α
µV/°C
Temperature coefficient
VIO
25°C to
85°C
TL052AI
25
V
R
= 0,
= 50 Ω
Input offset voltage long-
term drift
O
S
V
V
= 0,
= 0,
25°C
0.04
0.04
µV/mo
IC
§
25°C
85°C
25°C
85°C
4
0.06
20
100
10
5
0.07
30
100
10
pA
nA
pA
nA
V
O
= 0,
IC
I
I
Input offset current
Input bias current
IO
See Figure 5
200
20
200
20
V
O
= 0,
V
IC
= 0,
IB
See Figure 5
0.6
0.7
–1
to
4
–2.3
to
5.6
–11 –12.3
25°C
to
to
11
15.6
Common-mode input
voltage range
V
V
V
ICR
–1
to
4
–11
to
11
Full range
25°C
Full range
25°C
3
3
4.2
3.8
13
13
13.9
12.7
R
R
R
R
= 10 kΩ
= 2 kΩ
= 10 kΩ
= 2 kΩ
L
L
L
L
Maximum positive peak
output voltage swing
V
V
OM+
2.5
11.5
11.5
Full range
25°C
2.5
–2.5
–2.5
–2.3
–2.3
25
–3.5
–3.2
–12 –13.2
–12
Full range
25°C
Maximum negative peak
output voltage swing
V
OM–
–11
–11
50
–12
Full range
25°C
59
74
43
105
145
76
Large-signal differential
A
VD
R
= 2 kΩ
–40°C
85°C
30
60
V/mV
L
¶
voltage amplification
20
30
12
10
12
10
r
Input resistance
25°C
Ω
i
c
Input capacitance
25°C
10
85
83
84
12
93
90
93
pF
i
25°C
65
65
65
75
75
75
Common-mode
rejection ratio
V
IC
V
O
= V
= 0,
min,
ICR
CMRR
R
= 50 Ω
–40°C
85°C
dB
S
†
‡
Full range is –40°C to 85°C.
This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing
or nontesting of other parameters
§
¶
Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at T = 150°C extrapolated to
A
T
= 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
A
At V
CC±
= ± 5 V, V = ± 2.3 V; at V
CC±
= ±15 V, V = ±10 V.
O
O
18
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL052I and TL052AI electrical characteristics at specified free-air temperature (continued)
TL052I, TL052AI
PARAMETER
TEST CONDITIONS
V
MIN
75
= ±5 V
V
= ±15 V
UNIT
T
CC±
TYP
CC±
A
MAX
MIN
75
TYP
99
MAX
25°C
–40°C
85°C
99
98
Supply-voltage rejection
k
V
= 0,
= 0,
R = 50 Ω
S
75
75
98
dB
SVR
O
ratio (∆V
/∆V )
CC±
IO
75
99
75
99
25°C
4.6
4.5
4.4
120
5.6
6.4
6.4
4.8
4.7
4.6
120
5.6
6.4
6.4
Supply current
(two amplifiers)
I
V
A
No load
–40°C
85°C
mA
dB
CC
O
V /V
O1 O2
Crosstalk attenuation
= 100
25°C
VD
TL052I and TL052AI operating characteristics at specified free-air temperature
TL052I, TL052AI
†
PARAMETER
TEST CONDITIONS
V
= ± 5 V
V
= ± 15 V
UNIT
T
A
CC±
MIN TYP
CC±
MAX
MIN
9
TYP
MAX
25°C
Full range
25°C
17.8
15.4
20.7
‡
SR +
SR –
Slew rate at unity gain
8
R
= 2 kΩ,
See Figure 1
C = 100 pF,
L
L
V/µs
9
17.8
Negative slew rate at
‡
unity gain
Full range
25°C
8
55
52
56
53
t
Rise time
–40°C
85°C
r
f
64
65
ns
25°C
55
57
V
R
= ±10 mV,
I(PP)
= 2 kΩ,
See Figures 1 and 2
t
Fall time
–40°C
85°C
51
53
C = 100 pF,
L
L
64
65
25°C
24%
24%
24%
71
19%
19%
19%
71
Overshoot factor
–40°C
85°C
f = 10 Hz
f = 1 kHz
10 Hz to
25°C
Equivalent input noise
voltage
V
V
n
§
R
= 20 Ω,
25°C
19
19
30
S
See Figure 3
Peak-to-peak equivalent
input noise current
f =
25°C
25°C
25°C
4
0.01
4
0.01
µV
N(PP)
10 kHz
Equivalent input noise
current
I
n
f = 1 kHz
pA/√Hz
R
= 1 kΩ,
R
R
= 2 kΩ,
= 2 kΩ,
S
L
L
¶
THD
Total harmonic distortion
0.003%
0.003%
f = 1 kHz
25°C
–40°C
85°C
3
3.5
2.5
60°
58°
60°
3
3.6
2.6
63°
61°
63°
V = 10 mV,
I
B
1
Unity-gain bandwidth
MHz
C
= 25 pF,
See Figure 4
L
25°C
Phase margin at unity
gain
V = 10 mV,
R = 2 kΩ,
L
See Figure 4
I
φ
m
–40°C
85°C
C
= 25 pF,
L
†
‡
§
Full range is –40°C to 85°C.
For V = ±5 V, V = ±1 V; for V
This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing
or nontesting of other parameters.
= ±15 V, V = ±5 V.
I(PP)
CC±
I(PP)
CC±
¶
For V
= ±5 V, V
= 1 V; for V
= ±15 V, V
= 6 V.
CC±
O(RMS)
CC±
O(RMS)
19
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL052M and TL052AM electrical characteristics at specified free-air temperature
TL052M, TL052AM
†
PARAMETER
TEST CONDITIONS
V
= ± 5 V
V
= ± 15 V
UNIT
T
A
CC±
MIN TYP MAX
CC±
MIN
TYP MAX
25°C
Full range
25°C
0.73
3.5
6.5
2.8
5.8
0.65
1.5
4.5
0.8
3.8
TL052M
V
Input offset voltage
mV
IO
0.51
0.4
TL052AM
TL052M
V
V
R
= 0,
= 0,
= 50 Ω
O
IC
S
Full range
25°C to
125°C
10
9
9
8
Temperature coefficient
of input offset voltage
α
µV/°C
VIO
25°C to
125°C
TL052AM
V
R
= 0,
= 50 Ω
V
IC
V
IC
V
IC
= 0,
= 0,
= 0,
Input offset voltage long-
term drift
O
S
25°C
0.04
0.04
µV/mo
‡
25°C
125°C
25°C
4
100
20
5
2
100
20
pA
nA
pA
nA
V
O
= 0,
I
I
Input offset current
Input bias current
IO
See Figure 5
1
20
200
50
30
20
200
50
V
O
= 0,
IB
See Figure 5
125°C
10
–1 –2.3
–11 –12.3
25°C
to
4
to
5.6
to
11
to
15.6
Common-mode input
voltage range
V
V
V
ICR
–1
to
4
–11
to
11
Full range
25°C
Full range
25°C
3
3
4.2
3.8
13
13
13.9
12.7
R
R
R
R
= 10 kΩ
= 2 kΩ
= 10 kΩ
= 2 kΩ
L
L
L
L
Maximum positive peak
output voltage swing
V
OM+
OM–
2.5
2.5
11.5
11.5
Full range
25°C
–2.5 –3.5
–12 –13.2
–12
Full range –2.5
Maximum negative peak
output voltage swing
V
V
25°C
–2.3 –3.2
–11
–11
50
–12
Full range –2.3
25°C
–55°C
125°C
25°C
25
30
10
59
76
32
12
105
149
Large-signal differential
A
VD
R
= 2 kΩ
V/mV
60
L
§
voltage amplification
15
49
12
r
Input resistance
10
Ω
10
i
c
Input capacitance
25°C
10
85
83
84
99
98
12
93
pF
i
25°C
65
65
65
75
75
75
75
75
75
75
75
75
V
V
R
= V
= 0,
= 50 Ω
min,
ICR
IC
O
S
Common-mode
rejection ratio
CMRR
dB
dB
–55°C
125°C
25°C
92
94
99
Supply-voltage rejection
ratio (∆V /∆V
k
V
= 0,
R = 50 Ω
S
–55°C
125°C
25°C
98
SVR
O
O
)
CC± IO
100
4.6
4.4
4.2
120
100
4.8
4.5
4.4
120
5.6
6.4
6.4
5.6
6.4
6.4
Supply current
(two amplifiers)
I
V
= 0,
No load
mA
dB
–55°C
125°C
25°C
CC
V
/V
Crosstalk attenuation
Full range is – 55°C to 125°C.
Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at T = 150°C extrapolated to
A
VD
= 100
O1 O2
†
‡
A
T
For V
= 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
A
§
= ± 5 V, V = ± 2.3 V; at V
CC±
= ±15 V, V = ±10 V.
CC±
O
O
20
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL052M and TL052AM operating characteristics at specified free-air temperature
TL052M, TL052AM
= ± 5 V
†
PARAMETER
TEST CONDITIONS
V
CC±
V
= ± 15 V
UNIT
T
A
CC±
MIN
TYP
MAX
MIN
9
TYP
MAX
25°C
Full range
25°C
17.8
20.7
Positive slew rate
at unity gain
SR +
SR –
‡
R
C
= 2 kΩ,
= 100 pF,
L
L
8
V/µs
15.4
9
17.8
Negative slew rate
See Figure 1
‡
at unity gain
Full range
25°C
8
55
51
56
52
t
Rise time
–55°C
125°C
25°C
r
f
68
68
ns
V
I(PP)
= ± 10 mV,
= 2 kΩ,
= 100 pF,
55
57
R
C
L
L
t
Fall time
–55°C
125°C
25°C
51
52
68
69
See Figures 1 and 2
24%
25%
25%
71
19%
19%
19%
71
Overshoot factor
–55°C
125°C
25°C
f =
f =
10 Hz
1 kHz
Equivalent input noise
V
V
nV/√Hz
µV
n
§
voltage
25°C
19
19
R
= 20 Ω,
S
Peak-to-peak
equivalent input noise
current
f =
10 Hz
to
10 kHz
See Figure 3
25°C
4
4
N(PP)
Equivalent input
noise current
I
f = 1 kHz
25°C
25°C
0.01
0.01
pA/√Hz
n
Total harmonic
R
= 1 kΩ,
R
R
= 2 kΩ,
S
L
L
THD
0.003%
0.003%
¶
distortion
f = 1 kHz
25°C
–55°C
125°C
25°C
3
3.6
2.3
60°
57°
60°
3
3.7
2.4
63°
61°
63°
V = 10 mV,
= 2 kΩ,
I
L
B
Unity-gain bandwidth
MHz
1
C
= 25 pF,
See Figure 4
Phase margin at unity
gain
V = 10 mV,
R = 2 kΩ,
L
See Figure 4
I
L
φ
–55°C
125°C
m
C
= 25 pF,
†
‡
§
Full range is – 55°C to 125°C.
For V = ±5 V, V = ±1 V; for V
This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing
or nontesting of other parameters.
= ±15 V, V = ±5 V.
I(PP)
CC±
I(PP)
CC±
¶
For V
= ±5 V, V
= 1 V; for V
= ±15 V, V
= 6 V.
CC±
O(RMS)
CC±
O(RMS)
21
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL052Y electrical characteristics, T = 25°C
A
TL052Y
PARAMETER
TEST CONDITIONS
V
= ± 5 V
V
= ± 15 V
UNIT
CC±
MIN TYP
CC±
MIN
MAX
TYP
MAX
V
Input offset voltage
0.73
0.65
mV
IO
V
R
= 0,
= 50 Ω
O
S
V
IC
V
IC
V
IC
= 0,
= 0,
= 0,
Input offset voltage long-term
drift
0.04
0.04
5
µV/mo
V
O
= 0,
I
I
Input offset current
Input bias current
4
pA
pA
IO
See Figure 5
V
O
= 0,
20
30
IB
See Figure 5
–2.3
to
5.6
–12.3
to
15.6
Common-mode input voltage
range
V
ICR
V
R
R
R
R
= 10 kΩ
= 2 kΩ
= 10 kΩ
= 2 kΩ
4.2
3.8
13.9
12.7
Maximum positive peak
output voltage swing
L
L
L
L
V
V
OM+
V
–3.5
–3.2
–13.2
–12
Maximum negative peak output
voltage swing
OM–
Large-signal differential
voltage amplification
A
VD
R
= 2 kΩ
59
105
V/mV
L
†
12
10
12
10
r
Input resistance
Ω
i
c
Input capacitance
10
12
93
pF
i
V
V
= V
= 0,
min,
R
R
= 50 Ω
= 50 Ω
IC
O
ICR
S
S
CMRR
Common-mode rejection ratio
Supply-voltage rejection ratio
85
dB
dB
k
V
O
= 0,
= 0,
99
99
SVR
(∆V
CC±
/∆V )
IO
I
Supply current (two amplifiers)
Crosstalk attenuation
V
A
No load
4.6
4.8
mA
dB
CC
O
V
/V
= 100
120
120
O1 O2
VD
†
For V
= ±5 V, V = ±2.3 V; at V = ±15 V, V = ±10 V.
CC± O
CC±
O
22
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL052Y operating characteristics, T = 25°C
A
TL052Y
PARAMETER
TEST CONDITIONS
V
= ±5 V
V
= ±15 V
UNIT
CC±
TYP
CC±
MIN
MIN
MAX
TYP
MAX
Positive slew rate at
unity gain
SR +
SR –
17.8
15.4
20.7
†
R
= 2 kΩ,
C
= 100 pF,
L
L
V/µs
See Figure 1
Negative slew rate at
17.8
†
unity gain
Rise time
Fall time
t
t
55
55
56
57
r
V
R
= ±10 mV,
I(PP)
= 2 kΩ,
ns
C
= 100 pF,
f
L
L
See Figures 1 and 2
Overshoot factor
24%
71
19%
71
f = 10 Hz
Equivalent input noise
V
V
nV/√Hz
µV
n
‡
voltage
R
= 20 Ω,
f = 1 kHz
19
19
S
See Figure 3
Peak-to-peak equivalent input
noise current
f = 10 Hz to 10 kHz
4
0.01
4
0.01
N(PP)
Equivalent input noise
current
I
n
f = 1 kHz
pA/√Hz
R
= 1 kΩ,
R
R
= 2 kΩ,
= 2 kΩ,
S
L
L
§
THD
0.003%
3
0.003%
3
Total harmonic distortion
f = 1 kHz
V = 10 mV,
I
B
1
Unity-gain bandwidth
MHz
C
= 25 pF,
See Figure 4
L
V = 10 mV,
R
L
= 2 kΩ,
See Figure 4
I
Phase margin at unity gain
φ
m
60°
63°
C
= 25 pF,
L
†
This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing
or nontesting of other parameters.
‡
§
For V
For V
= ±5 V, V
= ±5 V, V
= ±1 V; for V
= ±15 V, V
= ±5 V.
CC±
CC±
I(PP)
CC±
I(PP)
= ±15 V, V = 6 V.
O(RMS)
= 1 V; for V
O(RMS)
CC±
23
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL054C and TL054AC electrical characteristics at specified free-air temperature
TL054C, TL054AC
†
PARAMETER
TEST CONDITIONS
T
A
V
= ± 5 V
V
= ± 15 V
UNIT
CC ±
TYP
CC ±
MIN
MIN
MAX
5.5
TYP
MAX
25°C
0.64
0.56
4
6.2
1.5
3.7
TL054C
Full range
25°C
7.7
V
IO
Input offset voltage
mV
0.57
3.5
0.5
TL054AC
Full range
5.7
V
V
R
= 0,
= 0,
O
IC
25°C to
70°C
TL054C
25
24
23
23
Temperature coefficient
of input offset voltage
= 50 Ω
S
α
µV/°C
µV/mo
VIO
25°C to
70°C
TL054AC
Input offset voltage
25°C
0.04
0.04
‡
long-term drift
25°C
70°C
25°C
70°C
4
0.02
20
100
1
5
0.025
30
100
1
pA
nA
pA
nA
V
= 0,
V
V
= 0,
= 0,
O
IC
I
I
Input offset current
Input bias current
IO
See Figure 5
200
4
200
4
V
O
= 0,
IC
IB
See Figure 5
0.15
0.2
–1
to
4
–2.3
to
5.6
–11 –12.3
to
to
25°C
11
15.6
Common-mode input
voltage range
V
V
V
ICR
–1
to
4
–11
to
11
Full range
25°C
Full range
25°C
3
3
4.2
3.8
13
13
13.9
12.7
R
R
R
R
= 10 kΩ
= 2 kΩ
= 10 kΩ
= 2 kΩ
L
L
L
L
Maximum positive peak
output voltage swing
V
V
OM +
2.5
11.5
11.5
Full range
25°C
2.5
–2.5
–2.5
–2.3
–2.3
25
–3.5
–3.2
–12 –13.2
–12
Full range
25°C
Maximum negative peak
output voltage swing
V
OM –
–11
–11
50
–12
Full range
25°C
72
88
57
133
173
Large-signal differential
A
VD
R
= 2 kΩ
0°C
30
60
V/mV
L
§
voltage amplification
70°C
20
30
85
12
12
10
r
Input resistance
25°C
Ω
10
i
c
Input capacitance
25°C
10
84
12
92
pF
i
25°C
65
65
65
75
75
75
75
75
75
75
75
75
Common-mode
rejection ratio
V
V
= V
= 0,
min,
ICR
IC
O
CMRR
0°C
84
92
dB
dB
R
= 50 Ω
S
70°C
84
93
25°C
99
99
Supply-voltage rejection
ratio (∆V /∆V
V
V
= ±5 V to ±15 V,
CC±
k
0°C
99
99
SVR
)
= 0,
R = 50 Ω
S
CC± IO
O
70°C
99
99
25°C
8.1
8.2
7.9
120
11.2
12.8
11.2
8.4
8.5
8.2
120
11.2
12.8
11.2
Supply current
(four amplifiers)
I
V
= 0,
No load
0°C
mA
dB
CC
O
70°C
V
/V
Crosstalk attenuation
Full range is 0°C to 70°C.
Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at T = 150°C extrapolated to
A
VD
= 100
25°C
O1 O2
†
‡
A
T
For V
= 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
A
§
= ±5 V, V = ±2.3 V, at V
= ±15 V, V = ±10 V.B
CC±
O
CC±
O
24
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL054C and TL054AC operating characteristics at specified free-air temperature
TL054C, TL054C
= ±5 V
†
PARAMETER
TEST CONDITIONS
T
A
V
V
CC±
= ±15 V
UNIT
CC±
TYP
MIN
MAX
MIN
10
8
TYP
17.8
17.9
17.5
15.9
16.1
15.5
56
MAX
25°C
0°C
15.4
15.7
14.4
13.9
14.3
13.3
55
Positive slew rate
at unity gain
SR+
SR–
70°C
25°C
0°C
8
R
= 2 kΩ,
See Figure 1 and Note 7
C = 100 pF,
L
L
V/µs
10
8
Negative slew rate at
‡
unity gain
Rise time
Fall time
70°C
25°C
0°C
8
t
t
54
55
r
70°C
25°C
0°C
63
63
ns
V
R
C
= ±10 mV,
= 2 kΩ,
I(PP)
55
57
L
L
54
56
f
= 100 pF,
See Figures 1 and 2
70°C
25°C
0°C
62
64
24%
24%
24%
75
19%
19%
19%
75
Overshoot factor
70°C
25°C
25°C
f = 10 Hz
Equivalent input noise
nV/√Hz
µV
V
V
I
n
§
voltage
R
= 20 Ω,
f = 1 kHz
21
21
45
S
See Figure 3
Peak-to-peak equivalent
input noise voltage
f = 10 Hz to
10 kHz
25°C
25°C
25°C
4
0.01
4
0.01
N(PP)
Equivalent input
noise current
f = 1 kHz
pA/√Hz
n
R
= 1 kΩ,
R = 2 kΩ,
L
Total harmonic
S
THD
0.003%
0.003%
¶
f = 1 kHz
distortion
25°C
0°C
2.7
3
2.7
3
V = 10 mV,
R
= 2 kΩ,
L
I
B
Unity-gain bandwidth
MHz
1
C
= 25 pF,
See Figure 4
L
70°C
25°C
0°C
2.4
61°
60°
61°
2.4
64°
64°
63°
Phase margin at
V = 10 mV,
R = 2 kΩ,
L
I
L
φ
m
= 25 p,
70°C
†
‡
§
Full range is 0°C to 70°C.
For V = ±5 V, V
= ±1 V; for V
= ±15 V, V
= ±5 V.
I(PP)
CC±
I(PP)
CC±
This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing
or nontesting of other parameters.
¶
For V
= ±5 V, V
o(rms
) = 1 V; for V
CC±
= ±15 V, V = 6 V.
o(rms)
CC±
25
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL054I and TL054AI electrical characteristics at specified free-air temperature
TL054I, TL054AI
†
PARAMETER
TEST CONDITIONS
V
= ±5 V
V
= ±15 V
UNIT
T
A
CC±
TYP
CC±
MIN
MIN
MAX
5.5
TYP
MAX
0.64
0.56
4
7.3
1.5
4.8
25°C
Full range
25°C
TL054I
8.8
V
IO
Input offset voltage
mV
0.57
3.5
0.5
TL054AI
Full range
6.8
V
V
R
= 0,
= 0,
O
IC
25°C to
85°C
TL054I
25
25
24
23
Temperature coefficient of
input offset voltage
= 50 Ω
S
α
µV/°C
µV/mo
VIO
25°C to
85°C
TL054AI
Input offset voltage
25°C
0.04
0.04
‡
long-term drift
25°C
85°C
25°C
85°C
4
0.06
20
100
10
5
0.07
30
100
10
pA
nA
pA
nA
V
= 0,
V
= 0,
= 0,
O
IC
IC
I
I
Input offset current
Input bias current
IO
See Figure 5
200
20
200
20
V
O
= 0,
V
IB
See Figure 5
0.6
0.7
–1
to
4
–2.3
to
5.6
–11 –12.3
to
to
25°C
11
15.6
Common-mode input
voltage range
V
V
V
ICR
–1
to
4
–11
to
11
Full range
25°C
Full range
25°C
3
3
4.2
3.8
13
13
13.9
12.7
R
R
R
R
= 10 kΩ
= 2 kΩ
= 10 kΩ
= 2 kΩ
L
L
L
L
Maximum positive peak
output voltage swing
V
V
OM +
2.5
11.5
11.5
Full range
25°C
2.5
–2.5
–2.5
–2.3
–2.3
25
–3.5
–3.2
–12 –13.2
–12
Full range
25°C
Maximum negative peak
output voltage swing
V
OM –
–11
–11
50
–12
Full range
25°C
72
101
50
133
212
70
Large-signal differential
A
VD
R
= 2 kΩ
–40°C
85°C
30
60
V/mV
L
§
voltage amplification
20
30
12
10
12
10
r
Input resistance
25°C
Ω
i
c
Input capacitance
25°C
10
84
12
92
pF
i
25°C
65
65
65
75
75
75
75
75
75
75
75
75
Common-mode
rejection ratio
V
V
= V
= 0,
min,
ICR
IC
O
CMRR
–40°C
85°C
83
92
dB
dB
R
= 50 Ω
S
84
93
25°C
99
99
Supply-voltage rejection
ratio (∆V /∆V
V
V
= ±5 V to ±15 V,
CC±
k
–40°C
85°C
98
99
SVR
)
= 0,
R = 50 Ω
S
CC± IO
O
99
99
25°C
8.1
7.9
7.6
120
11.2
12.8
11.2
8.4
8.2
7.9
120
11.2
12.8
11.2
Supply current
(four amplifiers)
I
V
= 0,
No load
–40°C
85°C
mA
dB
CC
O
V
/V
Crosstalk attenuation
Full range is –40°C to 85°C.
Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at T = 150°C extrapolated to
A
VD
= 100
25°C
O1 O2
†
‡
A
T
For V
= 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
A
§
= ±5 V, V = ±2.3 V, at V
= ±15 V, V = ±10 V.
CC±
O
CC±
O
26
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL054I and TL054AI operating characteristics at specified free-air temperature
TL054I, TL054AI
= ±5 V
†
PARAMETER
TEST CONDITIONS
V
V
CC±
= ±15 V
UNIT
T
A
CC±
TYP
MIN
MAX
MIN
10
8
TYP
17.8
18
MAX
25°C
–40°C
85°C
15.4
16.4
14
Positive slew rate
at unity gain
SR+
SR–
8
17.3
15.9
16.1
15.3
56
R
= 2 kΩ,
C = 100 pF,
L
L
V/µs
See Figure 1
25°C
13.9
14.7
13
10
8
Negative slew rate at
‡
unity gain
Rise time
Fall time
–40°C
85°C
8
25°C
55
t
t
–40°C
85°C
52
53
r
64
65
ns
25°C
55
57
V
C
= ±10 mV, R = 2 kΩ,
L
I(PP)
= 100 pF,
–40°C
85°C
51
53
f
L
See Figures 1 and 2
64
65
25°C
24%
24%
24%
75
19%
19%
19%
75
Overshoot factor
–40°C
85°C
f = 10 Hz
25°C
Equivalent input noise
voltage
nV/√Hz
µV
V
V
n
§
R
= 20 Ω,
f = 1 kHz
25°C
21
21
45
S
See Figure 3
Peak-to-peak equivalent
input noise voltage
f = 10 Hz to
10 kHz
25°C
25°C
25°C
4
0.01
4
0.01
N(PP)
Equivalent input
noise current
I
n
f = 1 kHz
pA/√Hz
R
= 1 kΩ,
R = 2 kΩ,
L
S
¶
THD
0.003%
0.003%
Total harmonic distortion
f = 1 kHz
25°C
–40°C
85°C
2.7
3.3
2.3
61°
59°
61°
2.7
3.3
2.4
64°
62°
64°
V = 10 mV,
R
= 2 kΩ,
L
I
B
Unity-gain bandwidth
MHz
1
C
= 25 pF,
See Figure 4
L
25°C
Phase margin at
V = 10 mV,
R = 2 kΩ,
L
I
L
φ
m
–40°C
85°C
= 25 p,
†
‡
§
Full range is –40°C to 85°C.
For V = ±5 V, V = ±1 V; for V
This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing
or nontesting of other parameters.
= ±15 V, V = ±5 V.
I(PP)
CC±
I(PP)
CC±
¶
For V
= ±5 V, V
o(rms
) = 1 V; for V
CC±
= ±15 V, V = 6 V.
o(rms)
CC±
27
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL054M and TL054AM electrical characteristics at specified free-air temperature
TL054M, TL054AM
†
PARAMETER
TEST CONDITIONS
V
= ±5 V
V
= ±15 V
UNIT
T
A
CC±
TYP
CC±
MIN
MIN
MAX
5.5
TYP
MAX
25°C
Full range
25°C
0.64
0.56
4
9
TL054M
10.5
3.5
V
IO
Input offset voltage
mV
0.57
0.5
1.5
6.5
TL054AM
Full range
8.5
V
V
R
= 0,
= 0,
O
IC
25°C to
85°C
TL054M
21
21
20
20
Temperature coefficient of
input offset voltage
= 50 Ω
S
α
µV/°C
VIO
25°C to
85°C
TL054AM
Input offset voltage
long-term drift
25°C
0.04
0.04
µV/mo
‡
25°C
125°C
25°C
4
1
100
20
5
2
100
20
pA
nA
pA
nA
V
= 0,
V
V
= 0,
= 0,
O
IC
IC
I
I
Input offset current
Input bias current
IO
See Figure 5
20
10
200
50
30
20
200
50
V
O
= 0,
IB
See Figure 5
125°C
–1
to
4
–2.3
to
5.6
–11 –12.3
to
to
25°C
11
15.6
Common-mode input
voltage range
V
V
V
ICR
–1
to
4
–11
to
11
Full range
25°C
Full range
25°C
3
3
4.2
3.8
13
13
13.9
12.7
R
R
R
R
= 10 kΩ
= 2 kΩ
= 10 kΩ
= 2 kΩ
L
L
L
L
Maximum positive peak
output voltage swing
V
V
OM +
2.5
11.5
11.5
Full range
25°C
2.5
–2.5
–2.5
–2.3
–2.3
25
–3.5
–3.2
–12 –13.2
–12
Full range
25°C
Maximum negative peak
output voltage swing
V
OM –
–11
–11
50
–12
Full range
25°C
72
99
35
133
209
35
Large-signal differential
A
VD
R
= 2 kΩ
–55°C
125°C
25°C
30
60
V/mV
L
§
voltage amplification
10
15
12
10
12
10
r
Input resistance
Ω
i
c
Input capacitance
25°C
10
84
12
92
pF
i
25°C
65
65
65
75
75
75
75
75
75
75
75
75
V
V
R
= V
= 0,
= 50 Ω
min,
ICR
IC
O
S
Common-mode
rejection ratio
CMRR
–55°C
125°C
25°C
83
92
dB
dB
84
93
99
99
V
V
R
= ±5 V to ±15 V,
= 0,
= 50 Ω
CC±
O
Supply-voltage rejection
ratio (∆V /∆V
k
–40°C
85°C
98
98
SVR
)
CC± IO
S
100
8.1
7.8
7.1
120
100
8.4
8.1
7.5
120
25°C
11.2
12.8
11.2
11.2
12.8
11.2
Supply current
(four amplifiers)
I
V
O
= 0,
No load
–55°C
125°C
25°C
mA
dB
CC
V
/V
Crosstalk attenuation
Full range is –55°C to 125°C.
Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at T = 150°C extrapolated to
A
VD
= 100
O1 O2
†
‡
A
T
For V
= 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
A
§
= ±5 V, V = ±2.3 V, at V
CC±
= ±15 V, V = ±10 V.
CC±
O
O
28
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL054M and TL054AM operating characteristics at specified free-air temperature
TL054M, TL054AM
= ±5 V
†
PARAMETER
TEST CONDITIONS
V
V
CC±
= ±15 V
UNIT
T
A
CC±
TYP
MIN
MAX
MIN
TYP
17.8
18.3
16.7
15.9
16.3
14.5
56
MAX
25°C
–55°C
125°C
25°C
15.4
16.7
12.9
13.9
14.7
12.2
55
10
Positive slew rate
at unity gain
SR+
SR–
R
= 2 kΩ,
C = 100 pF,
L
L
V/µs
Negative slew rate at
See Figure 1
10
unity gain
–55°C
125°C
25°C
t
t
Rise time
Fall time
–55°C
125°C
25°C
51
52
r
68
68
ns
V
R
C
= ±10 mV,
= 2 kΩ,
= 100 pF,
I(PP)
L
L
55
57
–55°C
125°C
25°C
51
52
f
68
69
See Figures 1 and 2
24%
25%
25%
75
19%
19%
19%
75
Overshoot factor
–55°C
125°C
25°C
f = 10 Hz
Equivalent input noise
nV/√Hz
µV
V
V
n
§
voltage
R
= 20 Ω,
f = 1 kHz
25°C
21
21
45
S
See Figure 3
Peak-to-peak equivalent
input noise voltage
f = 10 Hz to
10 kHz
25°C
25°C
25°C
4
0.01
4
0.01
N(PP)
Equivalent input
noise current
I
n
f = 1 kHz
pA/√Hz
R
= 1 kΩ,
R = 2 kΩ,
L
S
¶
THD
Total harmonic distortion
0.003%
0.003%
f = 1 kHz
25°C
–55°C
125°C
25°C
2.7
3.4
2.1
61°
58°
60°
2.7
3.4
2.1
64°
62°
64°
V = 10 mV,
R
= 2 kΩ,
L
I
B
Unity-gain bandwidth
MHz
1
C
= 25 pF,
See Figure 4
L
Phase margin at
V = 10 mV,
R = 2 kΩ,
L
I
L
φ
m
–55°C
125°C
= 25 p,
†
‡
§
Full range is –55°C to 125°C.
For V = ±5 V, V = ±1 V; for V
This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing
or nontesting of other parameters.
= ±15 V, V = ±5 V.
I(PP)
CC±
I(PP)
CC±
¶
For V
= ±5 V, V rms = 1 V; for V = ±15 V, V rms = 6 V.
CC± o
CC±
o
29
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL054Y electrical characteristics, T = 25°C
A
TL054Y
PARAMETER
TEST CONDITIONS
V
= ± 5 V
V
= ± 15 V
UNIT
CC ±
TYP
CC ±
MIN
MIN
MAX
TYP
MAX
V
R
= 0,
= 50 Ω
V
IC
V
IC
V
IC
= 0,
= 0,
= 0,
O
S
V
Input offset voltage
Input offset current
Input bias current
0.64
4
0.56
mV
pA
pA
IO
V
O
= 0,
I
5
IO
IB
See Figure 5
V
O
= 0,
I
20
30
See Figure 5
–2.3
to
5.6
–12.3
to
15.6
V
ICR
Common-mode input voltage range
V
R
R
R
R
= 10 kΩ
= 2 kΩ
= 10 kΩ
= 2 kΩ
4.2
3.8
13.9
12.7
Maximum positive peak
output voltage swing
L
L
L
L
V
V
V
V
OM +
–3.5
–3.2
–13.2
–12
Maximum negative peak
output voltage swing
OM –
Large-signal differential
voltage amplification
A
VD
R
= 2 kΩ,
72
133
V/mV
L
†
12
10
12
10
r
Input resistance
Ω
i
c
Input capacitance
10
12
pF
i
Common-mode
rejection ratio
V
V
= V
= 0,
min,
ICR
IC
O
CMRR
84
92
dB
dB
R
= 50 Ω
S
Supply-voltage rejection
ratio (∆V /∆V
V
= ±5 V to ±15 V,
= 0,
CC±
k
99
99
SVR
)
V
R = 50 Ω
S
CC± IO
O
O
Supply current
(four amplifiers)
I
V
= 0,
No load
8.1
8.4
mA
dB
CC
V /V
O1 O2
Crosstalk attenuation
= ±5 V, V = ±2.3 V, at V
A
= 100
120
120
VD
= ±15 V, V = ±10 V.
†
For V
CC±
O
CC±
O
30
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL054Y operating characteristics, T = 25°C
A
TL054Y
PARAMETER
TEST CONDITIONS
V
= ±5 V
V
= ±15 V
UNIT
CC±
TYP
CC±
MIN
MIN
MAX
TYP
MAX
Positive slew rate at unity
gain
SR+
SR–
15.4
13.9
17.8
†
R
= 2 kΩ,
C = 100 pF,
L
L
V/µs
See Figure 1
Negative slew rate at unity
gain
15.9
t
t
Rise time
V
R
C
= ±10 mV,
= 2 kΩ,
= 100 pF,
55
55
56
57
r
I(PP)
L
L
ns
Fall time
f
Overshoot factor
24%
19%
See Figures 1 and 2
f = 10 Hz
75
21
75
21
Equivalent input noise
voltage
nV/√Hz
µV
V
V
I
n
‡
R
= 20 Ω,
f = 1 kHz
S
See Figure 3
Peak-to-peak equivalent
input noise voltage
f = 10 Hz to 10 kHz
4
0.01
4
0.01
N(PP)
Equivalent input
noise current
f = 1 kHz
pA/√Hz
n
R
= 1 kΩ,
R
= 2 kΩ,
= 2 kΩ,
S
L
§
THD
0.003%
2.7
0.003%
2.7
Total harmonic distortion
f = 1 kHz
V = 10 mV,
R
I
L
B
1
Unity-gain bandwidth
MHz
C
= 25 pF,
See Figure 4
R = 2 kΩ,
L
L
Phase margin at
unity gain
V = 10 mV,
I
φ
m
61°
64°
C
= 25 pF,
See Figure 4
= ±15 V, V = ±5 V.
I(PP)
L
†
‡
For V
= ±5 V, V
= ±1 V; for V
CC±
I(PP)
CC±
This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing
or nontesting of other parameters.
§
For V
= ±5 V, V
o(rms
) = 1 V; for V
CC±
= ±15 V, V = 6 V.
o(rms)
CC±
31
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
PARAMETER MEASUREMENT INFORMATION
V
CC+
–
Overshoot
V
O
+
90%
V
I
V
CC–
C
R
L
L
(see Note A)
10%
t
NOTE A: C includes fixture capacitance.
L
r
Figure 1 . Slew Rate, Rise/Fall Time,
and Overshoot Test Circuit
Figure 2 . Rise Time and Overshoot
Waveform
10 kΩ
2 kΩ
V
CC+
V
CC+
–
–
V
I
V
O
+
100 Ω
V
O
+
V
CC–
V
CC–
C
R
R
L
L
S
R
S
(see Note A)
NOTE A: C includes fixture capacitance.
L
Figure 4 . Unity-Gain Bandwidth and
Phase-Margin Test Circuit
Figure 3 . Noise-Voltage Test Circuit
V
CC+
typical values
Ground Shield
–
+
Typical values as presented in this data sheet
represent the median (50% point) of device
parametric performance.
V
CC–
pA
pA
input bias and offset current
At the picoamp-bias-current level typical of the
TL05x and TL05xA, accurate measurement of the
bias current becomes difficult. Not only does this
measurement require a picoammeter, but test
Figure 5. Input-Bias and Offset-Current Test Circuit
socket leakages can easily exceed the actualdevice bias currents. To accurately measure these small currents,
Texas Instruments uses a two-step process. The socket leakage is measured using picoammeters with bias
voltages applied but with no device in the socket. The device is then inserted in the socket, and a second test
that measures both the socket leakage and the device input bias current is performed. The two measurements
are then subtracted algebraically to determine the bias current of the device.
noise
Because of the increasing emphasis on low noise levels in many of today’s applications, the input noise voltage
density is sample tested at f = 1 kHz. Texas Instruments also has additional noise testing capability to meet
specific application requirements. Please contact the factory for details.
32
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
6 – 11
V
IO
Input offset voltage
Distribution
α
Temperature coefficient of input offset voltage
Distribution
12, 13, 14
VIO
vs Common-mode input voltage
vs Free-air temperature
15
16
I
I
Input bias current
IB
Input offset current
vs Free-air temperature
16
IO
vs Supply voltage
vs Free-air temperature
17
18
V
Common-mode input voltage range limits
Output voltage
IC
O
V
vs Differential input voltage
19, 20
vs Supply voltage
21
V
V
Maximum peak output voltage
vs Output current
vs Free-air temperature
25, 26
27, 28
OM
Maximum peak-to-peak output voltage
Large-signal differential voltage amplification
vs Frequency
22, 23, 24
O(PP)
vs Load resistance
vs Frequency
vs Free-air temperature
29
30
31, 32, 33
A
VD
vs Frequency
vs Free-air temperature
34, 35
36
CMRR Common-mode rejection ratio
z
k
Output impedance
vs Frequency
37
38
o
Supply-voltage rejection ratio
vs Free-air temperature
SVR
vs Supply voltage
vs Time
vs Free-air temperature
39
40
41
I
Short-circuit output current
OS
CC
vs Supply voltage
vs Free-air temperature
42, 43, 44
45, 46, 47
I
Supply current
Slew rate
vs Load resistance
vs Free-air temperature
48 – 53
54 –59
SR
Overshoot factor
vs Load capacitance
vs Frequency
60
61, 62
63
V
n
Equivalent input noise voltage
Total harmonic distortion
THD
vs Frequency
vs Supply voltage
vs Free-air temperature
64, 65, 66
67, 68, 69
B
1
Unity-gain bandwidth
vs Supply voltage
vs Load capacitance
vs Free-air temperature
70, 71, 72
73, 74, 75
76, 77, 78
φ
m
Phase margin
Phase shift
vs Frequency
vs Time
30
79
80
Voltage-follower small-signal pulse response
Voltage-follower large-signal pulse response
vs Time
33
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TYPICAL CHARACTERISTICS
DISTRIBUTION OF TL051A
INPUT OFFSET VOLTAGE
DISTRIBUTION OF TL051
INPUT OFFSET VOLTAGE
16
12
20
16
12
8
393 Units Tested From 1 Wafer Lot
433 Units Tested From 1 Wafer Lot
V
= ±15 V
V
T
A
= ±15 V
CC±
= 25°C
A
CC±
= 25°C
T
P Package
P Package
8
4
4
0
0
–1.5 –1.1 –0.9 –0.6 –0.3
0 0.3 0.6 0.9 1.1 1.5
–900
–600 –300
0
300
600
900
V
IO
– Input Offset Voltage – mV
V
IO
– Input Offset Voltage – µV
Figure 6
Figure 7
DISTRIBUTION OF TL052
INPUT OFFSET VOLTAGE
DISTRIBUTION OF TL052A
INPUT OFFSET VOLTAGE
20
15
10
5
15
12
9
403 Amplifiers Tested From 1 Wafer Lot
= ±15 V
476 Amplifiers Tested From 1 Wafer Lot
V
CC±
= 25°C
V
T
A
= ±15 V
CC±
= 25°C
T
A
P Package
P Package
6
3
0
0
–900
–600
–300
0
300
600
900
–1.5 –1.2 –0.9 –0.6 –0.3
0
0.3 0.6 0.9 1.2 1.5
V
IO
– Input Offset Voltage – mV
V
IO
– Input Offset Voltage – µV
Figure 8
Figure 9
34
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TYPICAL CHARACTERISTICS
DISTRIBUTION OF TL054A
INPUT OFFSET VOLTAGE
DISTRIBUTION OF TL054
INPUT OFFSET VOLTAGE
30
15
12
9
1048 Amplifiers Tested From 3 Wafer Lots
1140 Amplifiers Tested From 3 Wafer Lots
V
T
= ±15 V
CC±
= 25°C
V
T
A
= ±15 V
CC±
= 25°C
25
20
A
N Package
N Package
15
10
5
6
3
0
0
–1.8
–4
–3
–2
–1
0
1
2
3
4
–1.2
–0.6
0
0.6
1.2
1.8
V
IO
– Input Offset Voltage – mV
V
IO
– Input Offset Voltage – mV
Figure 10
Figure 11
DISTRIBUTION OF TL052
INPUT OFFSET VOLTAGE
TEMPERATURE COEFFICIENT
DISTRIBUTION OF TL051
INPUT OFFSET VOLTAGE
TEMPERATURE COEFFICIENT
20
15
10
20
172 Amplifiers Tested From 2 Wafer Lots
120 Units Tested From 2 Wafer Lots
V
T
A
= ±15 V
CC±
= 25°C to 125°C
V
T
A
= ±15 V
CC±
= 25°C to 125°C
16
12
P Package
Outlier: One Unit at –34.6 µV/°C
P Package
8
5
0
4
0
–25 –20 –15 –10 –5
0
5
10 15 20 25
–30
–20
–10
0
10
20
30
α
– Temperature Coefficient – µV/°C
α
– Temperature Coefficient – µV/°C
VIO
VIO
Figure 12
Figure 13
35
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TYPICAL CHARACTERISTICS
INPUT BIAS CURRENT
vs
COMMON-MODE INPUT VOLTAGE
DISTRIBUTION OF TL054
INPUT OFFSET VOLTAGE
TEMPERATURE COEFFICIENT
50
40
30
20
10
324 Amplifiers Tested From 3 Wafer Lots
V
= ±15 V
V
= ±15 V
CC±
= 25°C to 125°C
CC±
T
A
T = 25°C
A
N Package
5
0
–5
10
0
–10
–60
–40
–20
0
20
40
60
–15
–10
–5
0
5
10
15
α
– Temperature Coefficient – µV/°C
V
IC
– Common-Mode Input Voltage – V
VIO
Figure 14
Figure 15
INPUT BIAS CURRENT AND
INPUT OFFSET CURRENT
COMMON-MODE
INPUT VOLTAGE RANGE LIMITS
†
vs
vs
FREE-AIR TEMPERATURE
SUPPLY VOLTAGE
16
12
8
100
10
1
V
V
V
= ±15 V
= 0
= 0
CC±
O
IC
T
A
= 25°C
Positive Limit
Negative Limit
I
IB
4
0
I
IO
0.1
–4
–8
0.01
–12
–16
0.001
25
45
65
85
105
125
0
2
4
6
8
10
12
14
16
T
A
– Free-Air Temperature – °C
|V
CC±
| – Supply Voltage – V
Figure 16
Figure 17
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
36
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TYPICAL CHARACTERISTICS
COMMON-MODE
INPUT VOLTAGE RANGE LIMITS
vs
OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
†
FREE-AIR TEMPERATURE
5
4
20
15
10
V
T
A
= ±5 V
CC±
= 25°C
V
= ±15 V
CC±
Positive Limit
3
2
5
0
1
0
– 1
– 2
– 3
R
R
= 600 Ω
= 1 kΩ
L
L
–5
–10
–15
–20
Negative Limit
R
R
= 2 kΩ
= 10 kΩ
L
L
– 4
– 5
– 200
– 100
0
100
200
–75 –50 –25
0
25
50
75
100 125
T
A
– Free-Air Temperature – °C
V
ID
– Differential Input Voltage – µV
Figure 18
Figure 19
OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
MAXIMUM PEAK OUTPUT VOLTAGE
vs
SUPPLY VOLTAGE
15
10
16
12
8
V
T
A
= ±15 V
CC±
= 25°C
V
OM+
T
A
= 25°C
R
= 10 kΩ
L
5
R
= 2 kΩ
L
4
0
0
–4
–8
R
R
R
R
= 600 Ω
= 1 kΩ
= 2 kΩ
= 10 kΩ
– 5
L
L
L
L
R
= 2 kΩ
L
R
= 10 kΩ
– 10
– 15
L
–12
–16
V
OM–
– 400
– 200
0
200
400
0
2
4
6
8
10
12
14
16
V
ID
– Differential Input Voltage – µV
|V
CC±
|– Supply Voltage – V
Figure 20
Figure 21
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
37
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TYPICAL CHARACTERISTICS
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE
†
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE
vs
vs
FREQUENCY
FREQUENCY
30
30
25
R
= 2 kΩ
R
T
A
= 2 kΩ
= 25°C
L
L
V = ±15 V
CC±
V
CC±
= ±15 V
25
20
15
20
15
T
A
= 125°C
T
A
= –55°C
10
10
V
CC±
= ±5 V
V
CC±
= ±5 V
5
0
5
0
10 k
100 k
1 M
10 M
10 k
100 k
1 M
10 M
f – Frequency – Hz
f – Frequency – Hz
Figure 22
Figure 23
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE
MAXIMUM PEAK OUTPUT VOLTAGE
vs
vs
FREQUENCY
OUTPUT CURRENT
30
5
4
3
2
1
0
V
= ±5 V
CC±
= 10 kΩ
R
T
A
= 10 kΩ
= 25°C
L
R
T
L
= 25°C
25
20
A
V
CC±
= ±15 V
V
15
10
OM+
V
OM–
V
CC±
= ±5 V
5
0
10 k
100 k
1 M
10 M
0
2
4
6
8
10 12
14 16
18 20
f – Frequency – Hz
|I | – Output Current – mA
O
Figure 24
Figure 25
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
38
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TYPICAL CHARACTERISTICS
†
MAXIMUM PEAK OUTPUT VOLTAGE
MAXIMUM PEAK OUTPUT VOLTAGE
vs
vs
FREE-AIR TEMPERATURE
OUTPUT CURRENT
16
14
12
5
4
R
= 10 kΩ
V
OM+
L
V
= ±15 V
CC±
= 10 kΩ
R
L
R
= 2 kΩ
L
T
A
= 25°C
3
2
V
OM+
10
8
1
V
CC±
= ±5 V
0
V
OM–
–1
6
4
2
0
–2
–3
V
OM–
R
= 2 kΩ
L
–4
–5
R
= 10 kΩ
L
–75 –50 –25
0
25
50
75 100 125
0
5
10 15 20 25 30
35 40
50
†
50
|I | – Output Current – mA
O
T
A
– Free-Air Temperature – °C
Figure 26
Figure 27
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
MAXIMUM PEAK OUTPUT VOLTAGE
AMPLIFICATION
vs
LOAD RESISTANCE
vs
FREE-AIR TEMPERATURE
16
12
250
200
150
100
R
= 10 kΩ
L
V
T
A
= ±1 V
= 25°C
O
R
= 2 kΩ
V
L
OM+
V
CC±
= ±15 V
8
4
V
CC±
= ±15 V
0
V
CC±
= ±5 V
–4
–8
V
OM–
R
= 2 kΩ
L
50
0
–12
–16
R
= 10 kΩ
L
125
–75 –50 –25
0
25
50
75 100
0.4
1
4
10
40
100
T
A
– Free-Air Temperature – °C
R
– Load Resistance – kΩ
L
Figure 28
Figure 29
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
39
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TYPICAL CHARACTERISTICS
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE SHIFT
vs
FREQUENCY
6
5
10
V
= ±15 V
CC±
= 2 kΩ
10
R
L
0°
C
= 25 pF
L
T
A
= 25°C
4
3
30°
10
A
VD
60°
10
90°
2
1
10
Phase Shift
120°
150°
180°
10
1
0.1
10
100
1 k
10 k
100 k
1 M
10 M
f – Frequency – Hz
Figure 30
TL051 AND TL052
TL054
LARGE-SIGNAL DIFFERENTIAL
VOLTAGE AMPLIFICATION
LARGE-SIGNAL DIFFERENTIAL
VOLTAGE AMPLIFICATION
†
†
vs
vs
FREE-AIR TEMPERATURE
FREE-AIR TEMPERATURE
1000
400
1000
400
V
= ±5 V
CC±
= ±2.3 V
V
= ±5 V
CC±
= ±2.3 V
V
O
V
O
R
= 10 kΩ
= 2 kΩ
L
R
= 10 kΩ
= 2 kΩ
L
100
40
100
40
R
L
R
L
10
10
–75 –50 –25
0
25
50
75 100
125
–75 –50 –25
0
25
50
75 100
125
T
A
– Free-Air Temperature – °C
T
A
– Free-Air Temperature – °C
Figure 31
Figure 32
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
40
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TYPICAL CHARACTERISTICS
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
†
COMMON-MODE REJECTION RATIO
AMPLIFICATION
vs
FREE-AIR TEMPERATURE
vs
FREQUENCY
1000
400
100
V
= ±15 V
V
= ±5 V
CC±
CC±
= 25°C
V
O
= 10 V
90
80
70
60
50
40
30
T
A
R
= 10 kΩ
L
100
40
R
= 2 kΩ
L
20
10
10
0
125
–75 –50 –25
0
25
50
75 100
10
100
1 k
10 k
100 k
1 M
10 M
T
A
– Free-Air Temperature – °C
f – Frequency – Hz
Figure 33
Figure 34
†
COMMON-MODE REJECTION RATIO
COMMON-MODE REJECTION RATIO
vs
vs
FREQUENCY
FREE-AIR TEMPERATURE
100
95
100
90
80
70
60
50
40
30
20
10
0
V
T
A
= ±15 V
V
IC
= V
Min
ICR
CC±
= 25°C
V
= ±15 V
CC±
90
85
80
V
CC±
= ±5 V
75
70
–75 –50 –25
0
25
50
75 100 125
10 M
10
100
1 k
10 k
100 k
1 M
f – Frequency – Hz
T
A
– Free-Air Temperature –°C
Figure 35
Figure 36
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
41
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TYPICAL CHARACTERISTICS
†
OUTPUT IMPEDANCE
vs
SUPPLY-VOLTAGE REJECTION RATIO
vs
FREQUENCY
FREE-AIR TEMPERATURE
110
106
100
V
CC±
= ±5 V to ±15 V
40
A
VD
= 100
10
4
A
VD
= 10
102
98
1
A
VD
= 1
0.4
94
V
T
A
± = ±15 V
= 25°C
CC
r
(open loop) ≈ 250 Ω
o
0.1
90
–75 –50 –25
0
25
50
75 100 125
1 k
10 k
100 k
1 M
f – Frequency – Hz
T
A
– Free-Air Temperature – °C
Figure 37
Figure 38
SHORT-CIRCUIT OUTPUT CURRENT
SHORT-CIRCUIT OUTPUT CURRENT
vs
vs
TIME
SUPPLY VOLTAGE
60
40
60
40
V
ID
= 100 mV
V
T
A
= 0
= 25°C
O
V
ID
= 100 mV
20
20
0
–20
–40
–60
0
–20
–40
–60
V
ID
= –100 mV
V
= –100 mV
ID
V
= ±15 V
= 25°C
CC±
T
A
16
0
2
4
6
8
10
12
14
0
10
20
30
40
50
60
|V
CC±
| – Supply Voltage – V
t – Time – s
Figure 39
Figure 40
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
42
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TYPICAL CHARACTERISTICS
TL051
SUPPLY CURRENT
†
†
SHORT-CIRCUIT OUTPUT CURRENT
vs
vs
FREE-AIR TEMPERATURE
SUPPLY VOLTAGE
60
40
20
3
V
= ±15 V
CC±
CC±
2.5
V
ID
= 100 m V
T
= 25°C
A
V
= ±5 V
T
A
= –55°C
= 125°C
2
T
A
1.5
0
–20
–40
–60
V
= ±5 V
CC±
1
V
ID
= –100 m V
V
CC±
= ±15 V
0.5
V
= 0
O
V
O
= 0
No Load
0
0
2
4
6
8
10
| – Supply Voltage – V
CC±
12
14 16
–75 –50 –25
0
25
50
75 100 125
T
A
– Free-Air Temperature – °C
|V
Figure 41
Figure 42
TL052
†
TL054
SUPPLY CURRENT
vs
SUPPLY CURRENT
vs
†
SUPPLY VOLTAGE
SUPPLY VOLTAGE
5
4
3
2
1
0
10
8
T
T
= 25°C
= –55°C
A
A
T
= 25°C
A
T
A
= 125°C
T
= –55°C
A
6
T
A
= 125°C
4
2
V
= 0
V
= 0
O
O
No Load
No Load
0
0
2
4
|V
6
8
10
12 14
0
2
4
6
8
10
| – Supply Voltage – V
CC±
12
14 16
16
| – Supply Voltage – V
|V
CC±
Figure 43
Figure 44
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
43
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TYPICAL CHARACTERISTICS
TL052
SUPPLY CURRENT
vs
TL051
SUPPLY CURRENT
vs
†
†
FREE-AIR TEMPERATURE
FREE-AIR TEMPERATURE
5
4
3
2
1
0
3
2.5
2
V
V
= ±15 V
= ±5 V
CC±
V
V
= ±15 V
= ±5 V
CC±
CC±
CC±
1.5
1
0.5
0
V
= 0
No Load
V
= 0
O
O
No Load
–75 –50 –25
0
25
50
75
100 125
–75 –50 –25
0
25
50
75 100 125
T
A
– Free-Air Temperature – °C
T
A
– Free-Air Temperature – °C
Figure 45
Figure 46
TL051
SLEW RATE
vs
TL054
SUPPLY CURRENT
†
vs
LOAD RESISTANCE
FREE-AIR TEMPERATURE
10
8
25
SR +
SR –
V
= ±15 V
= ±5 V
CC±
20
15
10
V
CC±
6
4
2
V
C
= ±5 V
= 100 pF
= 25°C
CC±
5
0
L
T
A
V
= 0
O
See Figure 1
No Load
0
0.4
1
4
10
40
100
–75 –50 –25
0
25
50
75 100 125
T
A
– Free-Air Temperature – °C
R
– Load Resistance – kΩ
L
Figure 47
Figure 48
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
44
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TYPICAL CHARACTERISTICS
TL052
SLEW RATE
vs
TL054
SLEW RATE
vs
LOAD RESISTANCE
LOAD RESISTANCE
25
20
15
10
5
25
20
15
10
SR+
SR–
SR +
SR –
V
C
T
= ±5 V
= 100 pF
= 25°C
V
= ±5 V
= 100 pF
= 25°C
CC±
L
A
CC±
L
5
0
C
T
A
See Figure 1
See Figure 1
0
0.4
1
4
10
40
100
100
0.4
1
4
10
40
R – Load Resistance – kΩ
L
R
– Load Resistance – kΩ
L
Figure 49
Figure 50
TL052
SLEW RATE
vs
TL051
SLEW RATE
vs
LOAD RESISTANCE
LOAD RESISTANCE
25
20
15
10
5
30
SR+
SR +
SR –
25
20
SR–
15
10
V
CC±
C
= ±15 V
= 100 pF
= 25°C
V
C
= ±15 V
CC±
= 100 pF
L
L
5
0
T
A
T
= 25°C
A
See Figure 1
See Figure 1
0
0.4
1
4
10
40 100
0.4
1
4
10
40 100
R
– Load Resistance – kΩ
R
– Load Resistance – kΩ
L
L
Figure 51
Figure 52
45
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TYPICAL CHARACTERISTICS
TL054
SLEW RATE
vs
TL051
SLEW RATE
vs
†
LOAD RESISTANCE
FREE-AIR TEMPERATURE
25
30
25
20
SR +
20
SR +
SR –
SR –
15
10
5
15
10
5
V
C
T
A
= ±5 V
= 100 pF
= 25°C
CC±
L
V
R
= ±5 V
CC±
= 2 kΩ
L
See Figure 1
0
0.4
0
1
4
10
40
100
–75 –50 –25
0
25
50
75
100 125
R
– Load Resistance – kΩ
T
A
– Free-Air Temperature – °C
L
Figure 53
Figure 54
TL052
SLEW RATE
TL054
SLEW RATE
†
†
vs
vs
FREE-AIR TEMPERATURE
FREE-AIR TEMPERATURE
20
25
20
15
SR+
SR–
SR+
SR–
15
10
5
10
5
V
R
C
= ±5 V
= 2 kΩ
= 100 pF
V
CC±
= ±5 V
CC±
L
L
R
C
= 2 kΩ
= 100 pF
L
L
See Figure 1
See Figure 1
0
0
–75 –50 –25
0
25
50
75 100 125
–75 –50 –25
0
25
50 75 100 125
T
A
– Free-Air Temperature – °C
T
A
– Free-Air Temperature – °C
Figure 55
Figure 56
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
46
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TYPICAL CHARACTERISTICS
TL051
SLEW RATE
vs
TL052
SLEW RATE
†
†
vs
FREE-AIR TEMPERATURE
FREE-AIR TEMPERATURE
30
25
20
15
10
5
25
20
15
SR+
SR–
SR +
SR –
10
5
V
= ±15 V
V
R
C
= ±15 V
= 2 kΩ
= 100 pF
CC±
CC±
L
L
R
= 2 kΩ
L
L
C
= 100 pF
See Figure 1
See Figure 1
0
0
–75 –50 –25
0
25
50
75 100 125
–75 –50 –25
0
25
50 75 100 125
T
A
– Free-Air Temperature – °C
T
A
– Free-Air Temperature – °C
Figure 57
Figure 58
TL054
SLEW RATE
OVERSHOOT FACTOR
vs
LOAD CAPACITANCE
†
vs
FREE-AIR TEMPERATURE
50
40
20
15
SR+
SR–
V
CC±
= ±5 V
30
20
10
5
V
= ±15 V
CC±
V
R
T
= ±10 mV
= 2 kΩ
I(PP)
V
R
C
= ±15 V
= 2 kΩ
= 100 pF
CC±
L
L
L
10
0
= 25°C
See Figure 1
A
See Figure 1
0
0
50
100
150
200
250
300
–75 –50 –25
0
25
50 75 100 125
T
A
– Free-Air Temperature – °C
C
– Load Capacitance – pF
L
Figure 59
Figure 60
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
47
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TYPICAL CHARACTERISTICS
TL052 AND TL054
EQUIVALENT INPUT NOISE VOLTAGE
TL051
EQUIVALENT INPUT NOISE VOLTAGE
vs
vs
FREQUENCY
FREQUENCY
100
70
100
V
= ±15 V
CC±
= 20 Ω
V
= ±15 V
CC±
= 20 Ω
R
T
A
S
R
T
A
S
70
= 25°C
= 25°C
See Figure 3
See Figure 3
50
40
50
40
30
20
30
20
10
10
100 k
10
100
1 k
10 k
100 k
10
100
1 k
10 k
f – Frequency – Hz
f – Frequency – Hz
Figure 61
Figure 62
TL051
TOTAL HARMONIC DISTORTION
UNITY-GAIN BANDWIDTH
vs
vs
FREQUENCY
SUPPLY VOLTAGE
1
3.2
V
= ±15 V
= 1
CC±
A
VD
0.4
V
= 6 V
O(RMS)
= 25°C
3.1
3
T
A
0.1
0.04
2.9
2.8
2.7
0.01
V = 10 mV
I
R
= 2 kΩ
= 25 pF
= 25°C
L
L
0.004
C
T
A
See Figure 4
0.001
100
1 k
10 k
100 k
0
2
4
6
8
10
12 14 16
f – Frequency – Hz
|V
CC±
| – Supply Voltage – V
Figure 63
Figure 64
48
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TYPICAL CHARACTERISTICS
TL052
TL054
UNITY-GAIN BANDWIDTH
vs
UNITY-GAIN BANDWIDTH
vs
SUPPLY VOLTAGE
SUPPLY VOLTAGE
3.2
3.1
3
2.9
2.8
2.7
2.6
2.9
V = 10 mV
V = 10 mV
I
I
R
C
T
A
= 2 kΩ
= 25 pF
= 25°C
R
C
T
A
= 2 kΩ
= 25 pF
= 25°C
L
L
L
L
2.8
2.7
2.5
2.4
See Figure 4
See Figure 4
4
6
8
10
12
14
16
0
2
4
6
8
10
12
14
16
|V
CC±
|– Supply Voltage – V
Figure 65
|V
CC±
|– Supply Voltage – V
Figure 66
TL051
TL052
†
UNITY-GAIN BANDWIDTH
vs
FREE-AIR TEMPERATURE
†
UNITY-GAIN BANDWIDTH
vs
FREE-AIR TEMPERATURE
4
3
2
1
0
4
3
2
V
= ±15 V
= ±5 V
CC±
V
CC±
V
= ±5 V to ±15 V
CC±
V = 10 mV
I
V = 10 mV
I
R
C
T
= 2 kΩ
= 25 pF
= 25°C
L
L
A
1
0
R
C
= 2 kΩ
L
= 25 pF
L
See Figure 4
See Figure 4
–75 –50 –25
0
25
50
75 100 125
–75 –50 –25
0
25
50
75 100 125
T
A
– Free-Air Temperature – °C
T
A
– Free-Air Temperature – °C
Figure 67
Figure 68
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
49
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TYPICAL CHARACTERISTICS
TL051
PHASE MARGIN
vs
TL054
†
UNITY-GAIN BANDWIDTH
vs
FREE-AIR TEMPERATURE
SUPPLY VOLTAGE
65°
63°
61°
59°
57°
55°
4
3
2
V
= ±5 V to ±15 V
CC±
V = 10 mV
I
V = 10 mV
I
R
C
= 2 kΩ
= 25 pF
= 25°C
L
L
1
0
R
C
= 2 kΩ
= 25 pF
= 25°C
L
L
T
A
T
A
See Figure 4
See Figure 4
0
2
4
6
8
10
12 14 16
–75 –50 –25
0
25
50
75 100 125
T
A
– Free-Air Temperature – °C
|V
CC±
| –Supply Voltage – V
Figure 69
Figure 70
TL052
PHASE MARGIN
vs
TL054
PHASE MARGIN
vs
SUPPLY VOLTAGE
SUPPLY VOLTAGE
65°
63°
61°
59°
57°
55°
65°
63°
61°
59°
57°
55°
V = 10 mV
V = 10 mV
I
I
R
C
= 2 kΩ
= 25 pF
= 25°C
R
= 2 kΩ
= 25 pF
= 25°C
L
L
L
L
T
A
C
T
A
See Figure 4
See Figure 4
4
6
8
10
12 14
16
0
2
4
6
8
10
12 14 16
|V
CC±
| –Supply Voltage – V
|V | –Supply Voltage – V
CC±
Figure 71
Figure 72
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
50
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TYPICAL CHARACTERISTICS
TL051
PHASE MARGIN
vs
TL052
PHASE MARGIN
†
†
vs
LOAD CAPACITANCE
LOAD CAPACITANCE
70°
65°
70°
V = 10 mV
V = 10 mV
I
I
L
A
R
T
= 2 kΩ
= 25°C
R
T
= 2 kΩ
= 25°C
L
A
65°
See Figure 4
See Figure 4
60°
55°
50°
45°
40°
V
= ±15 V
V
= ±15 V
CC±
60°
55°
50°
45°
CC±
See Note A
See Note A
V
= ±5 V
V
= ±5 V
CC±
CC±
0
10 20 30 40 50 60 70 80 90 100
0
10 20 30 40 50 60 70 80 90
C
– Load Capacitance – pF
C
– Load Capacitance – pF
L
L
Figure 73
Figure 74
TL054
PHASE MARGIN
vs
†
LOAD CAPACITANCE
70°
65°
V = 10 mV
I
R
T
A
= 2 kΩ
= 25°C
L
See Figure 4
V
CC±
= ±15 V
60°
See Note A
V
= ±5 V
55°
50°
45°
CC±
0
10 20 30 40 50 60 70 80 90 100
C
– Load Capacitance – pF
L
Figure 75
†
Values of phase margin below a load capacitance of 25 pF were estimated.
51
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TYPICAL CHARACTERISTICS
TL051
PHASE MARGIN
TL052
PHASE MARGIN
vs
†
†
vs
FREE-AIR TEMPERATURE
FREE-AIR TEMPERATURE
65°
63°
61°
59°
57°
55°
65°
63°
61°
59°
57°
55°
V = 10 mV
I
V = 10 mV
I
R
= 2 kΩ
L
R
= 2 kΩ
L
C
= 25 pF
L
C
= 25 pF
L
See Figure 4
See Figure 4
V
= ±15 V
V
= ±15 V
CC±
CC±
V
CC±
= ±5 V
V
= ±5 V
CC±
–75 –50 –25
0
25
50
75
100 125
–75 –50 –25
0
25
50
75
100 125
T
A
– Free-Air Temperature –°C
T
A
– Free-Air Temperature – °C
Figure 76
Figure 77
TL054
PHASE MARGIN
vs
†
FREE-AIR TEMPERATURE
65°
63°
61°
59°
57°
55°
V
= ±15 V
CC±
V
= ±5 V
CC±
V = 10 mV
I
L
R
= 2 kΩ
C
= 25 pF
L
See Figure 4
–75 –50 –25
0
25
50
75
100 125
T
A
– Free-Air Temperature – °C
Figure 78
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
52
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TYPICAL CHARACTERISTICS
VOLTAGE-FOLLOWER
SMALL-SIGNAL
PULSE RESPONSE
VOLTAGE-FOLLOWER
LARGE-SIGNAL
PULSE RESPONSE
16
12
8
8
6
4
4
2
V
R
= ±15 V
= 2 kΩ
CC±
L
V
R
= ±15 V
= 2 kΩ
CC±
L
0
0
C
= 100 pF
L
C
= 100 pF
L
T
= 25°C
A
T
= 25°C
A
See Figure 1
–4
–8
–12
–16
–2
–4
–6
–8
See Figure 1
0
0.2 0.4
0.6
0.8
1.0
1.2
0
1
2
3
4
5
6
t – Time – µs
t – Time – µs
Figure 79
Figure 80
53
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
APPLICATION INFORMATION
output characteristics
All operating characteristics (except bandwidth and phase margin) are specified with 100-pF load capacitance.
The TL05x and TL05xA drive higher capacitive loads; however, as the load capacitance increases, the resulting
response pole occurs at lower frequencies, thereby causing ringing, peaking, or even oscillation. The value of
the load capacitance at which oscillation occurs varies with production lots. If an application appears to be
sensitive to oscillation due to load capacitance, adding a small resistance in series with the load should alleviate
the problem. Capacitive loads of 1000 pF and larger may be driven if enough resistance is added in series with
the output (see Figure 81 and Figure 82).
(a) C = 100 pF, R = 0
L
(b) C = 300 pF, R = 0
L
(c) C = 350 pF, R = 0
L
(d) C = 1000 pF, R = 0
L
(f) C = 1000 pF, R = 2 kΩ
(e) C 1000 pF, R = 50 Ω
L
L
Figure 81. Effect of Capacitive Loads
15 V
–
R
V
O
5 V
+
– 5 V
– 15 V
C
L
2 kΩ
(see Note A)
NOTE A: C includes fixture capacitance.
L
Figure 82. Test Circuit for Output Characteristics
54
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
APPLICATION INFORMATION
input characteristics
The TL05x and TL05xA are specified with a minimum and a maximum input voltage that, if exceeded at either
input, could cause the device to malfunction.
Because of the extremely high input impedance and resulting low bias current requirements, the TL05x and
TL05xA are well suited for low-level signal processing; however, leakage currents on printed-circuit boards and
sockets can easily exceed bias current requirements and cause degradation in system performance. It is good
practice to include guard rings around inputs (see Figure 83). These guards should be driven from a
low-impedance source at the same voltage level as the common-mode input.
Unused amplifiers should be connected as grounded unity-gain followers to avoid possible oscillation.
+
–
V
I
V
O
–
+
V
I
–
+
V
O
V
O
V
I
(a) NONINVERTING AMPLIFIER
(b) INVERTING AMPLIFIER
(c) UNITY-GAIN AMPLIFIER
Figure 83. Use of Guard Rings
noise performance
The noise specifications in operational amplifier circuits are greatly dependent on the current in the first-stage
differential amplifier. The low input bias current requirements of the TL05x and TL05xA result in a very low
current noise. This feature makes the devices especially favorable over bipolar devices when using values of
circuit impedance greater than 50 kΩ.
55
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
APPLICATION INFORMATION
phase meter
The phase meter in Figure 84 produces an output voltage of 10 mV per degree of phase delay between the two
inputsignalsV andV . ThereferencesignalV mustbethesamefrequencyasV . TheTLC3702comparators
A
B
A
B
(U1) convert these two input sine waves into ±5-V square waves. Then R1 and R4 provide level shifting prior
to the SN74HC109 dual J-K flip flops.
Flip-flop U2B is connected as a toggle flip-flop and generates a square wave at half the frequency of V .
B
Flip-flop U2A also produces a square wave at half the input frequency. The pulse duration of U2A varies from
zero to half the period, where zero corresponds to zero phase delay between V and V and half the period
A
B
corresponds to V lagging V by 360 degrees.
B
A
The output pulse from U2A causes the TLC4066 (U3) switch to charge the TL05x (U4) integrator capacitors C1
and C2. As the phase delay approaches 360 degrees, the output of U4A approximates a square wave and U2A
has an output of almost 2.5 V. U4B acts as a noninverting amplifier with a gain of 1.44 in order to scale the
0- to 2.5-V integrator output to a 0- to 3.6-V output range.
R8 and R10 provide output gain and zero-level calibration. This circuit operates over a 100-Hz to 10-kHz
frequency range.
+ 5 V
R2
100 kΩ
C2
0.016 µF
+ 5 V
R7
R6
S
1J
C1
+
U4A
–
V
A
U3
U2A
R1
10 kΩ
10 kΩ
+
U4B
–
U1A
100 kΩ
V
O
C1
0.016 µF
R5
10 kΩ
1K
R
NC
R9
20 kΩ
R3
100 kΩ
S
2J
R8
50 kΩ
+ 5 V
NC
U2B
C1
Gain
2K
R
R4
100 kΩ
R10
10 kΩ
Zero
V
B
U1B
– 5 V
NOTE A: U1 = TLC3702; V
= ±5 V
CC±
U2 = SN74HC109
U3 = TLC4066
U4, U5 = TL05x; V
= ±5 V
CC±
Figure 84. Phase Meter
56
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
APPLICATION INFORMATION
precision constant-current source over temperature
A precision current source (see Figure 85) benefits from the high input impedance and stability of Texas
Instruments enhanced-JFET process. A low-current shunt regulator maintains 2.5 V between the inverting input
and the output of the TL05x. The negative feedback then forces 2.5 V across the current setting resistor R;
therefore, the current to the load is simply 2.5 V divided by R.
Possible choices for the shunt regulator include the LT1004, LT1009, and LM385. If the regulator’s cathode
connects to the operational amplifier output, this circuit sources load current. Similarly, if the cathode connects
totheinvertinginput, thecircuitsinkscurrentfromtheload. Tominimizeoutputcurrentchangewithtemperature,
R should be a metal film resistor with a low temperature coefficient. Also, this circuit must be operated with
split-voltage supplies.
150 pF
150 pF
U2
U2
+ 15 V
–
+ 15 V
–
100 kΩ
100 kΩ
U1
+
U1
+
I
O
I
I
– 15 V
R
– 15 V
R
Load
V = 0 to 10 V
Load
V = 0 to –10 V
(a) SOURCE CURRENT LOAD
NOTE B: U1 = 1/2 TL05x
(b) SINK CURRENT LOAD
U2 = LM385, LT1004, or LT1009 voltage reference
2.5 V
R
, R = Low temperature coefficient metal film resistor
I =
Figure 85. Precision Constant-Current Source
57
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
APPLICATION INFORMATION
instrumentation amplifier with adjustable gain/null
The instrumentation amplifier in Figure 86 benefits greatly from the high input impedance and stable input offset
voltage of the TL05xA. Amplifiers U1A, U1B, and U2A form the actual instrumentation amplifier, while U2B
provides offset null. Potentiometer R1 provides gain adjust. With R1 = 2 kΩ, the circuit gain equals 100, while
with R1 = 200 kΩ, the circuit gain equals two. The following equation shows the instrumentation amplifier gain
as a function of R1:
R2
R3
AV
1
R1
Readjusting the offset null is necessary whenever the circuit gain is changed. If U2B is needed for another
application, R7 can be terminated at ground. The low input offset voltage of the TL05xA minimizes the dc error
of the circuit. For best matching, all resistors should be one percent tolerance. The matching between R4, R5,
R6, and R7 controls the CMRR of this application.
The following equation shows the output voltages when the input voltage equals zero. This dc error can be
nulled by adjusting the offset null potentiometer; however, any change in offset voltage over time or temperature
also creates an error. To calculate the error from changes in offset, consider the three offset components in the
equation as delta offsets rather than initial offsets. The improved stability of Texas Instruments enhanced JFETs
minimizes the error resulting from change in input offset voltage with time. Assuming V equals zero, V can
I
O
be shown as a function of the offset voltage:
R3
R1
R6
R4
R6
R2
R1 R4
R7
1
V
V
1
1
O
IO2
R5
R7
R3
R1
R6
R4
R6
R4
R6
R4
R7
R2
R1
–V
1
V
1
IO1
IO3
R5
R7
V
I–
+
R6
10 kΩ
R4
U1A
10 kΩ
–
100 kΩ
R2
–
200 kΩ
10 turn
10 MΩ
10 MΩ
V
O
U2A
+
A
V
= 2 to 100
R1
2 kΩ
V
CC+
R3
100 kΩ
82 kΩ
–
–
R7
R5
U1B
+
U2B
Offset Null
+
10 kΩ
10 kΩ
1 kΩ
V
I+
0.1 µF
82 kΩ
V
CC–
NOTE A: U1 and U2 = TL05xA; V
CC±
= ± 15 V.
Figure 86. Instrumentation Amplifier
58
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
APPLICATION INFORMATION
high input impedance log amplifier
The low input offset voltage and high input impedance of the TL05xA creates a precision log amplifier (see
Figure 87). IC1 is a 2.5-V, low-current precision, shunt regulator. Transistors Q1 and Q2 must be a closely
matched NPN pair. For best performance over temperature, R4 should be a metal film resistor with a low
temperature coefficient.
In this circuit, U1A serves as a high-impedance unity-gain buffer. Amplifier U1B converts the input voltage to
a current through R1 and Q1. Amplifier U1C, IC1, and R4 form a 1-µA temperature-stable current source that
sets the base-emitter voltage of Q2. U1D amplifies the difference between the base-emitter voltage of Q1 and
Q2 (see Figure 88). The output voltage is given by the following equation:
V
–23
, q
and T is in degrees kelvin.
–19
R6
R5
kT
q
I
where k
1.38
10
1.602 10
,
V
– 1
In
O
–6
10
R1
1
Q1
Q2
R4
2.5 MΩ
2N2484
+
+
R2
10 kΩ
U1C
V
O
_
U1D
15 V
_
(see equation above)
R1
+
C1
+
U1A
_
R6
V
I
U1B
10 kΩ
_
150 pF
IC1
10 kΩ
R3
R5
10 kΩ
270 kΩ
–15V
NOTE A: U1A through U1D = TL05xA. IC1 = LM385, LT1004, or LT1009 voltage reference.
Figure 87. Log Amplifier
–0.1
–0.15
–0.2
–0.25
–0.3
–0.35
–0.4
0
1
2
3
4
5
6
7
8
9
10
f – Frequency – Hz
Figure 88. Output Voltage vs Input Voltage for Log Amplifier
59
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
APPLICATION INFORMATION
analog thermometer
By combining a current source that does not vary over temperature with an instrumentation amplifier, a precise
analog thermometer can be built (see Figure 89). Amplifier U1A and IC1 establish a constant current through
the temperature-sensing diode D1. For this section of the circuit to operate correctly, the TL05x must use split
supplies and R3 must be a metal-film resistor with a low temperature coefficient.
The temperature-sensitive voltage from the diode is compared to a temperature-stable voltage reference set
by IC2. R4 should be adjusted to provide the correct output voltage when the diode is at a known temperature.
Although this potentiometer resistance varies with temperature, the divider ratio of the potentiometer remains
constant.
AmplifiersU1B, U2A, andU2Bformtheinstrumentationamplifierthatconvertsthedifferencebetweenthediode
and reference voltage to a voltage proportional to the temperature. With switch S1 closed, the amplifier gain
equals 5 and the output voltage is proportional to temperature in degrees Celsius. With S1 open, the amplifier
gain is 9 and the output is proportional to temperature in degrees Fahrenheit. Every time that S1 is changed,
R4 must be recalibrated. By setting S1 correctly, the output voltage equals 10 mV per degree (C or F).
IC1
+
R9
R12
C1
U1B
–
10 kΩ
10 kΩ
150 pF
–
R6
R1
10 kΩ
+15 V
–
100 kΩ
U1A
+
R7
R5
5 kΩ
5 kΩ
10 kΩ
R3
U2B
+
V
O
(see Note B)
S1
(see Note D)
(see Note C)
D1
–15 V
(see Note A)
+15 V
R8
10 kΩ
100 kΩ
R2
–
R10
U2A
+
10 kΩ
IC2
R4
R11
10 kΩ
50 kΩ
NOTES: A. Temperature-sensing diode ≈ (–2 mV/°C)
B. Metal-film resistor (low temperature coefficient)
C. Switch open for °F and closed for °C
D.
V
α temperature; 10 mV/°C or 10 mV/°F
O
E. U1, U2 = TL05x. IC1, IC2 = LM385, LT1004, or LT1009 voltage reference
Figure 89. Analog Thermometer
60
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
APPLICATION INFORMATION
voltage-ratio-to-dB converter
The application in Figure 90 measures the amplitude ratio of two signals and then converts the ratio to decibels
(see Figure 91). The output voltage provides a resolution of 100 mV/dB. The two inputs can be either dc or
sinusoidal ac signals. When using ac signals, both signals should be the same frequency or output glitches will
occur. For measuring two input signals of different frequencies, extra filtering should be added after the
rectifiers.
The circuit contains three low-offset TL05xA devices. Two of these devices provide the rectification and
logarithmic conversion of the inputs. The third TL05xA forms an instrumentation amplifier. The stage performing
the logarithmic conversion also requires two well-matched npn transistors.
The input signal first passes through a high impedance unity-gain buffer U1A (U2A). Then U1B (U2B) rectifies
the input signal at a gain of 0.5, and U1C (U2C) provides a noninverting gain of 2 so that the system gain is still
one. U1D (U2D), R6 (R13), and Q1 (Q2) perform the logarithmic conversion of the rectified input signal. The
instrumentation amplifier formed by U3A, U3B, U3D scales the difference of the two logarithmic voltages by a
gain of 33.6. As a result, the output voltage equals 100 mV/dB. The 1-kΩ potentiometer on the input of U3C
calibrates the zero dB reference level. The following equations are used to derive the relationship between the
input voltage ratio expressed in decibels and the output voltage.
In V
– V
V
V
A
B
A
B
X dB
X dB
20 log
20
In (10)
8.686 In V
– In V
A
B
V
V
kT
q
A
I
kT
q
B
I
V
In
V
In
BE(Q1)
BE(Q2)
kT
R
R
S
S
V
V
–V
In V
– In V
q
BE
BE(Q1)
BE(Q2)
A
B
8.686
kT q
X dB
V
–V
336 V
–V
at 25°C
BE(Q1)
BE(Q2)
–19
BE(Q1)
BE(Q2)
where
–23
, q
k
1.38 10
1.602 10
, and T is in kelvins.
This would give a resolution of 1 V/dB. Therefore, the gain of the instrumentation amplifier is set at 33.6 to obtain
100 mV/dB.
61
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
APPLICATION INFORMATION
R2
2N2484
Q1
R1
10 kΩ
+
V
A
+
U1A
_
R6
+
U1B
20 kΩ
_
R7
+
U1C
D1
_
R18
R20
+
U1D
10 kΩ
_
U3A
R5
10 kΩ
_
10 kΩ
10 kΩ
R16
10 kΩ
R4
10 kΩ
+
V
O
R3
30 kΩ
U3D
_
16.3 kΩ
R9
10 kΩ
R76
2N2484
R8
+
V
B
16.3 kΩ
+
U2A
_
R13
R19
+
+
20 kΩ
U2B
_
Q2
+
U2C
U3B
R14
10 kΩ
_
_
D2
U2D
10 kΩ
10 kΩ
_
R12
R21
10 kΩ
15 V
10 kΩ
R11
10 kΩ
R10
30 kΩ
82 kΩ
+
U3C
_
1 kΩ
C1
82 kΩ
–15 V
NOTE A: U1A through U3D = TL05xA, V
CC±
= ±15 V. D1 and D2 = 1N914.
Figure 90. Voltage-Ratio-to-dB Converter
2
1
0
–1
–2
0
1
2
3
4
5
6
7
8
9
10
Ratio – V /V
A
B
Figure 91. Output Voltage vs the Ratio of the Input Voltages for Voltage-to-dB Converter
62
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
APPLICATION INFORMATION
macromodel information
Macromodel information provided was derived using Microsim Parts , the model generation software used
with Microsim PSpice . The Boyle macromodel (see Note 5) and subcircuit Figure 92 are generated using the
TL05x typical electrical and operating characteristics at T = 25°C. Using this information, output simulations
A
of the following key parameters can be generated to a tolerance of 20% (in most cases):
Maximum positive output voltage swing
Maximum negative output voltage swing
Slew rate
Unity-gain frequency
Common-mode rejection ratio
Phase margin
Quiescent power dissipation
Input bias current
DC output resistance
AC output resistance
Short-circuit output current limit
Open-loop voltage amplification
NOTE 5: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, “Macromodeling of Intergrated Circuit Operational Amplifiers”, IEEE
Journal of Solid-State Circuits, SC-9, 353 (1974).
99
DLN
3
EGND
+
–
V
CC+
92
9
FB
+
91
90
RSS
ISS
RO2
–
+
–
+
VB
DLP
RP
2
VLP
VLN
HLIM
–
+
–
10
+
–
VC
IN –
IN+
R2
C2
J1
J2
7
DP
6
53
+
–
3
VLIM
11
DC
12
RD2
GA
GCM
8
C1
RD1
60
RO1
+
–
DE
VAD
5
54
V
CC–
–
+
4
VE
OUT
.SUBCKT TL05x 1 2 3 4 5
RD1
RD2
R01
R02
RP
4
11
12
5
3.422E3
3.422E3
125
C1
11
6
12
7
3.988E–12
4
C2
15.00E–12
8
DC
5
53
5
DX
DX
DX
DX
DX
7
99
4
125
DE
54
90
92
4
3
11.11E3
666.7E6
DC 0
DLP
DLN
DP
91
90
3
0
99
RSS
VB
10
9
99
0
VC
VE
VLIM
VLP
VLN
3
53
4
DC 3
EGND
FB
99
7
POLY (2) (3,0) (4,0) 0 .5 .5
POLY (5) VB VC VE VLP
54
7
DC 3.7
DC 0
8
+ VLN 0 2.875E6 –3E6 3E6 3E6 –3E6
91
0
0
DC 28
DC 28
GA
6
0
6
11
10
12 292.2E–6
99 6.542E–9
92
GCM
ISS
HLIM
J1
0
.MODEL DX D (IS=800.0E–18)
3
10
0
DC 300.0E–6
VLIM 1K
10 JX
10 JX
100.0E3
.MODEL JX PJF (IS=15.00E–12 BETA=185.2E–6
90
11
12
6
+ VTO=–.1)
.ENDS
2
J2
R2
1
9
Figure 92. Boyle Macromodel and Subcircuit
PSpice and Parts are trademarks of MicroSim Corporation.
Macromodels, simulation models, or other models provided by TI,
directly or indirectly, are not warranted by TI as fully representing all
of the specification and operating characteristics of the
semiconductor product to which the model relates.
63
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
64
IMPORTANT NOTICE
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any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
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CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
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party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1999, Texas Instruments Incorporated
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