SNJ54HC640FKR [TI]

HC/UH SERIES, 8-BIT TRANSCEIVER, INVERTED OUTPUT, CQCC20, CERAMIC, LCC-20;
SNJ54HC640FKR
型号: SNJ54HC640FKR
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

HC/UH SERIES, 8-BIT TRANSCEIVER, INVERTED OUTPUT, CQCC20, CERAMIC, LCC-20

总线驱动器 总线收发器 逻辑集成电路 输出元件
文件: 总14页 (文件大小:434K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
ꢊ ꢅꢋꢌꢍ ꢎꢏꢀ ꢋ ꢐꢌꢁꢀꢅ ꢑ ꢒꢓ ꢑ ꢐ  
SCLS303D − JANUARY 1996 − REVISED AUGUST 2003  
D
D
D
Wide Operating Voltage Range of 2 V to 6 V  
D
D
D
D
Typical t = 8 ns  
pd  
6-mA Output Drive at 5 V  
High-Current 3-State Outputs Can Drive Up  
To 15 LSTTL Loads  
Low Input Current of 1 µA Max  
Inverting Logic  
Low Power Consumption, 80-µA Max I  
CC  
SN54HC640 . . . FK PACKAGE  
(TOP VIEW)  
SN54HC640 . . . J OR W PACKAGE  
SN74HC640 . . . DW, N, NS, OR PW PACKAGE  
(TOP VIEW)  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
DIR  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
V
CC  
3
2
1
20 19  
18  
OE  
B1  
B2  
B3  
B4  
B5  
B6  
B7  
B8  
B1  
B2  
B3  
B4  
B5  
A3  
A4  
A5  
A6  
A7  
4
5
6
7
8
17  
16  
15  
14  
9 10 11 12 13  
GND  
description/ordering information  
These octal bus transceivers are designed for asynchronous two-way communication between data buses.  
These devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending upon the  
level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so the  
buses are effectively isolated.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
PDIP − N  
Tube of 20  
Tube of 25  
Reel of 2000  
Reel of 2000  
Tube of 70  
Reel of 2000  
Reel of 250  
Tube of 20  
Tube of 85  
Tube of 55  
SN74HC640N  
SN74HC640N  
SN74HC640DW  
SN74HC640DWR  
SN74HC640NSR  
SN74HC640PW  
SN74HC640PWR  
SN74HC640PWT  
SNJ54HC640J  
SOIC − DW  
SOP − NS  
HC640  
HC640  
−40°C to 85°C  
TSSOP − PW  
HC640  
CDIP − J  
CFP − W  
LCCC − FK  
SNJ54HC640J  
SNJ54HC640W  
SNJ54HC640FK  
−55°C to 125°C  
SNJ54HC640W  
SNJ54HC640FK  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design  
guidelines are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2003, Texas Instruments Incorporated  
ꢊ ꢚ ꢥ ꢝ ꢜꢨ ꢣꢢ ꢠꢡ ꢢꢜ ꢞꢥ ꢧꢙ ꢟꢚ ꢠ ꢠꢜ ꢯꢒ ꢍꢖ ꢗꢐ ꢰ ꢖꢕꢱꢂ ꢕꢂꢈ ꢟꢧꢧ ꢥꢟ ꢝ ꢟ ꢞꢤ ꢠꢤꢝ ꢡ ꢟ ꢝ ꢤ ꢠꢤ ꢡꢠꢤ ꢨ  
ꢠ ꢤ ꢡ ꢠꢙ ꢚꢮ ꢜꢛ ꢟ ꢧꢧ ꢥꢟ ꢝ ꢟ ꢞ ꢤ ꢠ ꢤ ꢝ ꢡ ꢩ  
ꢣ ꢚꢧ ꢤꢡꢡ ꢜ ꢠꢪꢤ ꢝ ꢬꢙ ꢡꢤ ꢚ ꢜꢠꢤ ꢨꢩ ꢊ ꢚ ꢟꢧ ꢧ ꢜ ꢠꢪꢤ ꢝ ꢥꢝ ꢜ ꢨꢣꢢ ꢠꢡ ꢈ ꢥꢝ ꢜ ꢨꢣꢢ ꢠꢙꢜ ꢚ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀ ꢁꢂ ꢃꢄ ꢅ ꢆꢃ ꢇꢈ ꢀꢁ ꢉ ꢃ ꢄꢅꢆ ꢃ ꢇ  
ꢊꢅ ꢋꢌ ꢍ ꢎ ꢏ ꢀ ꢋ ꢐꢌ ꢁꢀ ꢅꢑ ꢒ ꢓꢑ ꢐꢀ  
ꢔꢒ ꢋ ꢄ ꢕ ꢖꢀꢋꢌꢋ ꢑ ꢊꢏꢋ ꢗꢏ ꢋꢀ  
SCLS303D − JANUARY 1996 − REVISED AUGUST 2003  
FUNCTION TABLE  
(each transceiver)  
INPUTS  
OPERATION  
OE  
L
DIR  
L
B data to A bus  
A data to B bus  
Isolation  
L
H
H
X
logic diagram (positive logic)  
19  
OE  
1
DIR  
2
18  
B1  
A1  
To Seven Other Transceivers  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage range, V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V  
CC  
I
Input clamp current, I (V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA  
IK  
I
CC  
Output clamp current, I  
(V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA  
OK  
O O CC  
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 mA  
Continuous current through V  
O
O
CC  
CC  
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 mA  
Package thermal impedance, θ (see Note 2): DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W  
JA  
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W  
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W  
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C/W  
Storage temperature range, T  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C  
stg  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
2. The package thermal impedance is calculated in accordance with JESD 51-7.  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢊ ꢅꢋꢌꢍ ꢎꢏꢀ ꢋ ꢐꢌꢁꢀꢅ ꢑ ꢒꢓ ꢑ ꢐ  
ꢔ ꢒꢋ ꢄ ꢕ ꢖꢀꢋꢌꢋ ꢑ ꢊ ꢏꢋ ꢗ ꢏꢋ  
SCLS303D − JANUARY 1996 − REVISED AUGUST 2003  
recommended operating conditions (see Note 3)  
SN54HC640  
MIN NOM  
SN74HC640  
MIN NOM  
UNIT  
MAX  
MAX  
V
V
Supply voltage  
2
1.5  
5
6
2
1.5  
5
6
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
= 2 V  
= 4.5 V  
= 6 V  
3.15  
4.2  
3.15  
4.2  
High-level input voltage  
V
V
IH  
= 2 V  
0.5  
1.35  
1.8  
0.5  
1.35  
1.8  
= 4.5 V  
= 6 V  
V
IL  
Low-level input voltage  
V
V
Input voltage  
0
0
V
V
0
0
V
V
V
V
I
CC  
CC  
Output voltage  
O
CC  
CC  
V
CC  
V
CC  
V
CC  
= 2 V  
1000  
500  
400  
125  
1000  
500  
400  
85  
= 4.5 V  
= 6 V  
t/v  
Input transition rise/fall time  
ns  
T
A
Operating free-air temperature  
−55  
−40  
°C  
NOTE 3: All unused inputs of the device must be held at V  
or GND to ensure proper device operation. Refer to the TI application report,  
CC  
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.  
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted)  
T
= 25°C  
SN54HC640  
SN74HC640  
A
PARAMETER  
TEST CONDITIONS  
V
UNIT  
CC  
MIN  
TYP  
MAX  
MIN  
1.9  
4.4  
5.9  
3.7  
5.2  
MAX  
MIN  
1.9  
MAX  
2 V  
4.5 V  
6 V  
1.9 1.998  
4.4 4.499  
5.9 5.999  
4.4  
I
= −20 µA  
OH  
5.9  
V
V = V or V  
IH  
V
OH  
I
IL  
IL  
I
I
= −6 mA  
4.5 V  
6 V  
3.98  
5.48  
4.3  
5.8  
3.84  
5.34  
OH  
= −7.8 mA  
OH  
2 V  
0.002  
0.001  
0.001  
0.17  
0.15  
0.1  
0.1  
0.1  
0.1  
0.26  
0.26  
100  
0.5  
8
0.1  
0.1  
0.1  
0.1  
4.5 V  
6 V  
I
= 20 µA  
OL  
0.1  
0.1  
V
V = V or V  
V
OL  
I
IH  
I
I
= 6 mA  
4.5 V  
6 V  
0.4  
0.33  
0.33  
1000  
5
OL  
= 7.8 mA  
0.4  
OL  
I
I
I
DIR or OE V = V  
or 0  
6 V  
1000  
10  
nA  
µA  
µA  
pF  
I
I
CC  
A or B  
V
O
= V  
or 0  
6 V  
0.01  
OZ  
CC  
CC  
V = V  
I
or 0,  
I
O
= 0  
6 V  
160  
10  
80  
CC  
C
DIR or OE  
2 V to 6 V  
3
10  
10  
i
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀ ꢁꢂ ꢃꢄ ꢅ ꢆꢃ ꢇꢈ ꢀꢁ ꢉ ꢃ ꢄꢅꢆ ꢃ ꢇ  
ꢊꢅ ꢋꢌ ꢍ ꢎ ꢏ ꢀ ꢋ ꢐꢌ ꢁꢀ ꢅꢑ ꢒ ꢓꢑ ꢐꢀ  
ꢔꢒ ꢋ ꢄ ꢕ ꢖꢀꢋꢌꢋ ꢑ ꢊꢏꢋ ꢗꢏ ꢋꢀ  
SCLS303D − JANUARY 1996 − REVISED AUGUST 2003  
switching characteristics over recommended operating free-air temperature range, C = 50 pF  
L
(unless otherwise noted) (see Figure 1)  
T
A
= 25°C  
TYP  
29  
SN54HC640  
SN74HC640  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
V
UNIT  
CC  
MIN  
MAX  
105  
21  
MIN  
MAX  
160  
32  
MIN  
MAX  
130  
26  
2 V  
4.5 V  
6 V  
10  
t
t
t
t
A or B  
OE  
B or A  
A or B  
A or B  
A or B  
ns  
pd  
en  
dis  
t
8
18  
27  
22  
2 V  
109  
27  
230  
46  
340  
68  
290  
58  
4.5 V  
6 V  
ns  
ns  
ns  
20  
39  
58  
49  
2 V  
40  
150  
30  
225  
45  
190  
38  
4.5 V  
6 V  
18  
OE  
16  
26  
38  
32  
2 V  
20  
60  
90  
75  
4.5 V  
6 V  
8
12  
18  
15  
6
10  
15  
13  
switching characteristics over recommended operating free-air temperature range, C = 150 pF  
L
(unless otherwise noted) (see Figure 1)  
T
A
= 25°C  
TYP  
44  
SN54HC640  
SN74HC640  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
V
UNIT  
CC  
MIN  
MAX  
190  
38  
MIN  
MAX  
290  
58  
MIN  
MAX  
235  
47  
2 V  
4.5 V  
6 V  
14  
t
t
t
A or B  
OE  
B or A  
A or B  
A or B  
ns  
pd  
en  
t
11  
33  
49  
41  
2 V  
124  
31  
315  
63  
470  
94  
395  
79  
4.5 V  
6 V  
ns  
ns  
23  
54  
80  
68  
2 V  
45  
210  
42  
315  
63  
265  
53  
4.5 V  
6 V  
17  
13  
36  
53  
45  
operating characteristics, T = 25°C  
A
PARAMETER  
TEST CONDITIONS  
TYP  
UNIT  
C
Power dissipation capacitance  
No load  
40  
pF  
pd  
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢊ ꢅꢋꢌꢍ ꢎꢏꢀ ꢋ ꢐꢌꢁꢀꢅ ꢑ ꢒꢓ ꢑ ꢐ  
ꢔ ꢒꢋ ꢄ ꢕ ꢖꢀꢋꢌꢋ ꢑ ꢊ ꢏꢋ ꢗ ꢏꢋ  
SCLS303D − JANUARY 1996 − REVISED AUGUST 2003  
PARAMETER MEASUREMENT INFORMATION  
V
CC  
PARAMETER  
R
C
L
S1  
S2  
L
50 pF  
or  
150 pF  
S1  
S2  
t
Open  
Closed  
Closed  
Open  
PZH  
Test  
Point  
t
t
1 kΩ  
1 kΩ  
en  
R
L
t
From Output  
Under Test  
PZL  
t
t
Open  
Closed  
Open  
PHZ  
PLZ  
50 pF  
C
dis  
L
Closed  
(see Note A)  
50 pF  
or  
150 pF  
t
or t  
−−  
Open  
Open  
pd  
t
LOAD CIRCUIT  
V
CC  
Input  
50%  
50%  
0 V  
t
t
PLH  
PHL  
90%  
V
V
OH  
In-Phase  
Output  
90%  
50%  
10%  
50%  
10%  
OL  
t
Output  
Control  
(Low-Level  
Enabling)  
t
r
f
f
V
CC  
t
t
PLH  
PHL  
90%  
50%  
50%  
V
V
OH  
90%  
t
0 V  
Out-of-Phase  
Output  
50%  
10%  
50%  
10%  
t
t
PLZ  
PZL  
OL  
t
V  
CC  
V  
CC  
r
Output  
Waveform 1  
(See Note B)  
50%  
VOLTAGE WAVEFORMS  
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES  
10%  
V
OL  
OH  
t
t
PZH  
PHZ  
V
CC  
V
Output  
Waveform 2  
(See Note B)  
90%  
t
90%  
90%  
Input  
50%  
10%  
50%  
10%  
50%  
0 V  
0 V  
t
r
f
VOLTAGE WAVEFORM  
INPUT RISE AND FALL TIMES  
VOLTAGE WAVEFORMS  
ENABLE AND DISABLE TIMES FOR 3-STATE OUTPUTS  
NOTES: A.  
C includes probe and test-fixture capacitance.  
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.  
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.  
C. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following  
characteristics: PRR 1 MHz, Z = 50 , t = 6 ns, t = 6 ns.  
O
r
f
D. The outputs are measured one at a time with one input transition per measurement.  
E.  
F.  
G.  
t
t
t
and t  
and t  
and t  
are the same as t  
.
dis  
PLZ  
PZL  
PLH  
PHZ  
PZH  
PHL  
are the same as t  
.
en  
are the same as t .  
pd  
Figure 1. Load Circuit and Voltage Waveforms  
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
PACKAGE OPTION ADDENDUM  
www.ti.com  
6-Dec-2006  
PACKAGING INFORMATION  
Orderable Device  
Status (1)  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
LCCC  
CDIP  
CDIP  
SOIC  
Drawing  
5962-87809012A  
5962-8780901RA  
SN54HC640J  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
FK  
J
20  
20  
20  
20  
1
1
1
TBD  
TBD  
TBD  
POST-PLATE N / A for Pkg Type  
A42 SNPB  
A42 SNPB  
N / A for Pkg Type  
N / A for Pkg Type  
J
SN74HC640DW  
DW  
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN74HC640DWE4  
SN74HC640DWR  
SN74HC640DWRE4  
SN74HC640N  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
SOIC  
SOIC  
DW  
DW  
DW  
N
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SOIC  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
PDIP  
20  
Pb-Free  
(RoHS)  
CU NIPDAU N / A for Pkg Type  
SN74HC640NE4  
SN74HC640NSR  
SN74HC640NSRE4  
SN74HC640PW  
PDIP  
N
20  
Pb-Free  
(RoHS)  
CU NIPDAU N / A for Pkg Type  
SO  
NS  
NS  
PW  
PW  
PW  
PW  
PW  
PW  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SO  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
TSSOP  
TSSOP  
TSSOP  
TSSOP  
TSSOP  
TSSOP  
70 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN74HC640PWE4  
SN74HC640PWR  
SN74HC640PWRE4  
SN74HC640PWT  
SN74HC640PWTE4  
70 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SNJ54HC640FK  
SNJ54HC640J  
ACTIVE  
ACTIVE  
LCCC  
CDIP  
FK  
J
20  
20  
1
1
TBD  
TBD  
POST-PLATE N / A for Pkg Type  
A42 SNPB N / A for Pkg Type  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check  
http://www.ti.com/productcontent for the latest availability information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and  
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS  
compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
6-Dec-2006  
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder  
temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is  
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the  
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take  
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on  
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited  
information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI  
to Customer on an annual basis.  
Addendum-Page 2  
MECHANICAL DATA  
MLCC006B – OCTOBER 1996  
FK (S-CQCC-N**)  
LEADLESS CERAMIC CHIP CARRIER  
28 TERMINAL SHOWN  
A
B
NO. OF  
TERMINALS  
**  
18 17 16 15 14 13 12  
MIN  
MAX  
MIN  
MAX  
0.342  
(8,69)  
0.358  
(9,09)  
0.307  
(7,80)  
0.358  
(9,09)  
19  
20  
11  
10  
9
20  
28  
44  
52  
68  
84  
0.442  
(11,23)  
0.458  
(11,63)  
0.406  
(10,31)  
0.458  
(11,63)  
21  
B SQ  
22  
0.640  
(16,26)  
0.660  
(16,76)  
0.495  
(12,58)  
0.560  
(14,22)  
8
A SQ  
23  
0.739  
(18,78)  
0.761  
(19,32)  
0.495  
(12,58)  
0.560  
(14,22)  
7
24  
25  
6
0.938  
(23,83)  
0.962  
(24,43)  
0.850  
(21,6)  
0.858  
(21,8)  
5
1.141  
(28,99)  
1.165  
(29,59)  
1.047  
(26,6)  
1.063  
(27,0)  
26 27 28  
1
2
3
4
0.080 (2,03)  
0.064 (1,63)  
0.020 (0,51)  
0.010 (0,25)  
0.020 (0,51)  
0.010 (0,25)  
0.055 (1,40)  
0.045 (1,14)  
0.045 (1,14)  
0.035 (0,89)  
0.045 (1,14)  
0.035 (0,89)  
0.028 (0,71)  
0.022 (0,54)  
0.050 (1,27)  
4040140/D 10/96  
NOTES: A. All linear dimensions are in inches (millimeters).  
B. This drawing is subject to change without notice.  
C. This package can be hermetically sealed with a metal lid.  
D. The terminals are gold plated.  
E. Falls within JEDEC MS-004  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
MECHANICAL DATA  
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999  
PW (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE PACKAGE  
14 PINS SHOWN  
0,30  
0,19  
M
0,10  
0,65  
14  
8
0,15 NOM  
4,50  
4,30  
6,60  
6,20  
Gage Plane  
0,25  
1
7
0°8°  
A
0,75  
0,50  
Seating Plane  
0,10  
0,15  
0,05  
1,20 MAX  
PINS **  
8
14  
16  
20  
24  
28  
DIM  
3,10  
2,90  
5,10  
4,90  
5,10  
4,90  
6,60  
6,40  
7,90  
9,80  
9,60  
A MAX  
A MIN  
7,70  
4040064/F 01/97  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.  
D. Falls within JEDEC MO-153  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
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