SN75ALS197NSRE4 [TI]
QUADRUPLE DIFFERENTIAL LINE RECEIVER; 四路差动线路接收器
| 型号： | SN75ALS197NSRE4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | QUADRUPLE DIFFERENTIAL LINE RECEIVER |
| 文件： | 总21页 (文件大小：793K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN75ALS197
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS045B – JANUARY 1989 – REVISED MAY 1995
D OR N PACKAGE
(TOP VIEW)
Meets or Exceeds the Requirements of ITU
Recommendations V.10, V.11, X.26, and
X.27
V
1B
1A
1
2
3
4
5
6
7
8
16
15
14
CC
Designed for Multipoint Bus Transmission
on Long Bus Lines in Noisy Environments
4B
4A
1Y
Designed to Operate Up to 20 Mbaud
3-State Outputs
13 4Y
G
12
11
10
9
G
2Y
3Y
3A
3B
2A
Common-Mode Input Voltage Range
– 7 V to 7 V
2B
GND
Input Sensitivity . . . ±300 mV
Input Hysteresis . . . 120 mV Typ
High-Input Impedance . . . 12 kΩ Min
Operates from Single 5-V Supply
Low Supply-Current Requirement
35 mA Max
Improved Speed and Power Consumption
Compared to AM26LS32A
description
The SN75ALSI97 is a monolithic, quadruple line receiver with 3-state outputs designed using advanced,
low-power, Schottky technology. This technology provides combined improvements in bar design, tooling
production, and wafer fabrication. This, in turn, provides significantly lower power requirements and permits
much higher data throughput than other designs. The device meets the specifications of ITU Recommendations
V.10, V.11, X.26, and X.27. It features 3-state outputs that permit direct connection to a bus-organized system
with a fail-safe design that ensures the outputs will always be high if the inputs are open.
The device is optimized for balanced, multipoint bus transmission at rates up to 20 megabits per second. The
input features high-input impedance, input hysteresis for increased noise immunity, and an input sensitivity of
±300 mV over a common-mode input voltage range of –7 V to 7 V. It also features active-high and active-low
enablefunctionsthatarecommontothefourchannels. TheSN75ALS197isdesignedforoptimumperformance
when used with the SN75ALS192 quadruple differential line driver.
The SN75ALS197 is characterized for operation from 0°C to 70°C.
FUNCTION TABLE
(each receiver)
ENABLES
DIFFERENTIAL INPUTS
A–B
OUTPUT
Y
G
G
H
X
X
L
H
H
V
ID
≥ 0.3 V
H
X
X
L
?
?
– 0.3 V < V < 0.3 V
ID
H
X
X
L
L
L
V
ID
≤ – 0.3 V
X
L
H
Z
H
X
X
L
H
H
Open
H = high level, L = low level, X = irrelevant, ? = indeterminate,
Z = high impedance (off)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 1995, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN75ALS197
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS045B – JANUARY 1989 – REVISED MAY 1995
†
logic symbol
logic diagram (positive logic)
4
4
G
≥ 1
G
G
EN
12
12
G
2
2
1
1A
1A
1B
3
3
5
1Y
2Y
3Y
4Y
1Y
1
1B
6
7
6
2A
2B
5
11
13
2A
2Y
3Y
4Y
7
10
9
2B
3A
3B
4A
4B
10
14
15
3A
11
13
9
3B
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
14
4A
15
4B
schematics of inputs and outputs
EQUIVALENT OF EACH A OR B INPUT
EQUIVALENT OF G OR G INPUTS
EQUIVALENT OF ALL OUTPUTS
V
CC
V
CC
V
CC
3 kΩ
50 kΩ
NOM
NOM
22 kΩ
NOM
18 kΩ
NOM
Input
Output
300 kΩ
NOM
Input
GND
2 kΩ
NOM
V
(A)
CC
or
GND (B)
GND
GND
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN75ALS197
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS045B – JANUARY 1989 – REVISED MAY 1995
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
CC
Input voltage, V (A or B inputs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±15 V
I
Differential input voltage, V (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±15 V
ID
Enable input voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Low-level output current, I
Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
I
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
OL
Operating free-air temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
A
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
stg
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential input voltage, are with respect to network ground terminal.
2. Differential input voltage is measured at the noninverting input with respect to the corresponding inverting input.
DISSIPATION RATING TABLE
T
≤ 25°C
DERATING
FACTOR
T = 70°C
A
POWER RATING
A
PACKAGE
POWER RATING
D
N
950 mW
7.6 mW/°C
9.2 mW/°C
608 mW
1150 mW
736 mW
recommended operating conditions
MIN
NOM MAX
UNIT
V
Supply voltage, V
4.75
5
5.25
±7
CC
Common-mode input voltage, V
V
IC
Differential input voltage, V
±12
V
ID
High-level input voltage, V
2
0
V
IH
Low-level input voltage, V
0.8
–400
16
V
IL
High-level output current, I
µA
mA
°C
OH
OL
Low-level output current, I
Operating free-air temperature, T
70
A
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN75ALS197
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS045B – JANUARY 1989 – REVISED MAY 1995
electrical characteristics over recommended range of common-mode input voltage, supply
voltage, and operating free-air temperature (unless otherwise noted)
†
PARAMETER
TEST CONDITIONS
MIN TYP
MAX
UNIT
mV
mV
mV
V
V
V
V
V
V
Positive-going input threshold voltage
Negative-going input threshold voltage
300
IT+
IT–
hys
IK
‡
–300
Hysteresis voltage (V
IT+
– V
)
See Figure 4
I = –18 mA
120
3.6
IT–
Enable-input clamp voltage
High-level output voltage
–1.5
I
V
= 300 mV,
I
I
I
= – 400 µA
= 8 mA
2.7
V
OH
ID
ID
OH
OL
OL
0.45
0.5
V
OL
Low-level output voltage
V
= – 300 mV
V
= 16 mA
= 2.4 V
V
V
20
O
I
I
High-impedance-state output current
Line input current
V
CC
= 5.25 V
µA
mA
µA
OZ
= 0.4 V
–20
1.2
OH
V = 15 V
0.7
Other input at 0 V,
See Note 3
I
I
V = –15 V
I
–1.0
–1.7
20
V
= 2.7 V
IH
IH
I
I
High-level enable-input current
H
V
= 5.25 V
100
–100
Low-level enable-input current
Input resistance
V
V
= 0.4 V
= 3 V,
µA
kΩ
IL
IL
12
18
§
I
I
Short-circuit output current
Supply current
V
O
= 0
–15
–78 –130
22 35
mA
mA
OS
ID
Outputs disabled
CC
†
‡
§
All typical values are at V
= 5 V, T = 25°C.
A
CC
The algebraic convention, in which the less positive limit is designated minimum, is used in this data sheet for threshold voltage levels only.
Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.
NOTE 3: Refer to ANSI Standard EIA/TIA-422-B and EIA/TIA-423-B for exact conditions.
switching characteristics, V
= 5 V, T = 25°C
A
CC
PARAMETER
TEST CONDITIONS
MIN
TYP
15
15
13
11
MAX
22
UNIT
ns
t
t
t
t
t
t
Propagation delay time, low- to high-level output
PLH
PHL
PZH
PZL
PHZ
PLZ
V
= – 2.5 V to 2.5 V, = 15 pF,
C
L
ID
See Figure 2
Propagation delay time, high- to low-level output
Output enable time to high level
22
ns
25
C
C
= 15 pF,
= 15 pF,
See Figure 3
See Figure 3
ns
ns
L
L
Output enable time to low level
25
Output disable time from high level
Output disable time from low level
13
15
25
22
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN75ALS197
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS045B – JANUARY 1989 – REVISED MAY 1995
PARAMETER MEASUREMENT INFORMATION
V
ID
V
OH
I
OL
I
OH
V
OL
2 V
Figure 1. V
and V
Test Circuit
OL
OH
2.5 V
Generator
(see Note A)
Input
0 V
0 V
Output
= 15 pF
50 Ω
–2.5 V
t
t
PHL
PLH
C
L
V
OH
OL
(see Note B)
1.3 V
1.3 V
Output
V
2 V
TEST CIRCUIT
VOLTAGE WAVEFORMS
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, duty cycle ≤ 50%, Z = 50 Ω,
O
t ≤ 6 ns, t ≤ 6 ns.
r
f
B.
C
L
includes probe and jig capacitance.
Figure 2. t
and t
Test Circuit and Voltage Waveforms
PLH
PHL
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN75ALS197
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS045B – JANUARY 1989 – REVISED MAY 1995
PARAMETER MEASUREMENT INFORMATION
Test
V
CC
Point
R
= 2 kΩ
L
S1
From Output
Under Test
See Note B
C
L
5 kΩ
(see Note A)
S2
LOAD CIRCUIT
≤ 5 ns
90%
≤ 5 ns
≤ 5 ns
90%
≤ 5 ns
3 V
3 V
90%
90%
Enable
G
Enable
G
1.3 V
1.3 V
1.3 V
1.3 V
10%
10%
10%
10%
0 V
3 V
0 V
3 V
See Note C
See Note C
90%
90%
90%
90%
1.3 V
Enable
G
Enable
G
1.3 V
1.3 V
1.3 V
10%
10%
PZH
10%
10%
t
PZL
0 V
0.5 V
0 V
S1 Closed
S2 Closed
t
V
OH
t
PLZ
≈ 1.4 V
S1 Open
S2 Closed
S1 Closed
S2 Open
1.3 V
t
1.3 V
Output
≈ 1.4 V
Output
V
OL
PHZ
S1 Closed
S2 Closed
0.5 V
VOLTAGE WAVEFORMS FOR t
PHZ
and t
VOLTAGE WAVEFORMS FOR t and t
PLZ PZL
PZH
NOTES: A.
C includes probe and jig capacitance.
L
B. All diodes are 1N3064 or equivalent.
C. Enable G is tested with G high; G is tested with G low.
Figure 3. t
, t
, t
, and t
Load Circuit and Voltage Waveforms
PHZ PZH PLZ
PZL
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN75ALS197
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS045B – JANUARY 1989 – REVISED MAY 1995
TYPICAL CHARACTERISTICS
OUTPUT VOLTAGE
vs
OUTPUT VOLTAGE
vs
ENABLE VOLTAGE
ENABLE VOLTAGE
4
3.5
3
5
V
V
= 300 mV
= 0
= 8 kΩ to GND
= 25°C
ID
IC
L
T
= 70°C
= 25°C
= 0°C
4.5
4
A
V
CC
V
CC
V
CC
= 5.5 V
= 5 V
T
A
R
T
T
A
A
3.5
3
= 4.5 V
2.5
2
2.5
2
1.5
1
1.5
1
V
V
V
= 5 V
= 300 mV
= 0
CC
ID
IC
0.5
0
0.5
0
R
= 8 kΩ to GND
L
0
0.5
1
1.5
2
2.5
3
0
0.5
1
1.5
2
2.5
3
Enable Voltage – V
Enable Voltage – V
Figure 4
Figure 5
OUTPUT VOLTAGE
vs
OUTPUT VOLTAGE
vs
ENABLE VOLTAGE
ENABLE VOLTAGE
6
5
4
3
2
1
0
6
5
4
3
2
1
0
V
V
= 5.5 V
CC
V
V
R
= – 300 mV
= 0
ID
IC
L
= 5 V
CC
= 1 kΩ to V
= 25°C
CC
V
CC
= 4.5 V
T
A
T
= 0°C
A
T
A
= 25°C
= 70°C
T
A
V
V
V
= 5 V
= – 300 mV
= 0
CC
ID
IC
L
R
= 1 kΩ to V
CC
0
0.5
1
1.5
2
2.5
3
0
0.5
1
1.5
2
2.5
3
Enable Voltage – V
Enable Voltage – V
Figure 6
Figure 7
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN75ALS197
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS045B – JANUARY 1989 – REVISED MAY 1995
TYPICAL CHARACTERISTICS
OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
FREE-AIR TEMPERATURE
5
4.5
4
4
3.5
3
V
V
= 5 V
CC
= –12 V to 12 V
I
I
= 0
OH
IC
= 0
= 25°C
I
T
O
= – 400 µA
A
OH
3.5
3
2.5
2.5
2
2
V
IT –
V
IT +
1.5
1.5
1
1
V
V
V
= 5 V
= 300 mV
= 0
CC
ID
IC
0.5
0.5
0
0
– 200 – 150 – 100 – 50
0
50
100 150 200
0
10
20
30
40
50
60
70
80
V
ID
– Differential Input Voltage – mV
T
A
– Free-Air Temperature – °C
Figure 8
Figure 9
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
HIGH-LEVEL OUTPUT CURRENT
5
4.5
4
5
4.5
4
V
V
V
= 5 V
= 300 mV
= 0
V
V
T
= 300 mV
= 0
= 25°C
CC
ID
IC
ID
IC
A
3.5
3
3.5
3
V
CC
V
CC
V
CC
= 5.5 V
= 5 V
T
= 0°C
A
2.5
2
2.5
2
T
A
= 25°C
= 70°C
= 4.5 V
T
A
1.5
1
1.5
1
0.5
0
0.5
0
0 – 10 – 20 – 30 – 40 – 50 – 60 – 70 – 80– 90 – 100
0 – 10 – 20 – 30 –40 – 50 –60 – 70 – 80 – 90– 100
I
– High-Level Output Current – mA
I
– High-Level Output Current – mA
OH
OH
Figure 10
Figure 11
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN75ALS197
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS045B – JANUARY 1989 – REVISED MAY 1995
TYPICAL CHARACTERISTICS
LOW-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
0.4
0.35
0.3
V
V
V
= 5 V
= – 300 mV
= 0
CC
ID
IC
0.25
I
O
= 8 mA
0.2
0.15
0.1
I
O
= 0
0.05
0
0
10
20
30
40
50
60
70
80
T
A
– Free-Air Temperature – °C
Figure 12
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
LOW-LEVEL OUTPUT CURRENT
0.8
0.7
0.6
0.5
0.8
0.7
0.6
0.5
T
= 70°C
A
V
V
= 4.5 V
= 5 V
CC
CC
T
A
= 25°C
V
= 5.5 V
CC
T
= 0°C
A
0.4
0.3
0.2
0.1
0.4
0.3
0.2
0.1
V
V
T
= – 300 mV
= 0
= 25°C
V
V
V
= 5 V
= – 300 mV
= 0
ID
IC
A
CC
ID
IC
0
0
0
10
20
30
40
50
60
70
80
0
10
20
30
40
50
60
70
80
I
– Low-Level Output Current – mA
I
OL
– Low-Level Output Current – mA
OL
Figure 13
Figure 14
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN75ALS197
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS045B – JANUARY 1989 – REVISED MAY 1995
TYPICAL CHARACTERISTICS
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE
50
45
40
35
30
V
V
= – 300 mV
= 0
= 0
= 25°C
30
25
20
15
10
5
ID
IC
I
T
O
V
V
V
= 5.5 V
= 5 V
CC
CC
CC
A
= 4.5 V
Disabled
25
20
15
10
5
Enabled
V
= – 300 mV
ID
Outputs Enabled
I
O
= 0
0
0
0
1
2
3
4
5
6
7
8
0
10
20
30
40
50
60
70
80
V
CC
– Supply Voltage – V
T
A
– Free-Air Temperature – °C
Figure 15
Figure 16
SUPPLY CURRENT
vs
SUPPLY CURRENT
vs
DIFFERENTIAL INPUT VOLTAGE
FREQUENCY
40
30
25
20
15
10
5
V
= 5 V
CC
V = ± 1.5-V Square Wave
I
C
35
30
25
20
15
10
5
= 15 pF
V
CC
V
CC
V
CC
= 5.5 V
= 5 V
L
Four Channels Driven
= 25°C
T
A
= 4.5 V
I
= 0
O
Outputs Enabled
= 0
V
T
IC
= 25°C
A
0
0
– 200
– 100
0
100
200
10 k
100 k
1 M
10 M
100 M
f – Frequency – Hz
V
ID
– Differential Input Voltage – mV
Figure 17
Figure 18
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN75ALS197
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS045B – JANUARY 1989 – REVISED MAY 1995
TYPICAL CHARACTERISTICS
INPUT CURRENT
vs
INPUT RESISTANCE
vs
INPUT VOLTAGE TO GND
FREE-AIR TEMPERATURE
3
2
30
25
T
A
= 25°C
1
0
20
15
10
–1
–2
–3
5
0
–20 –15 –10
–5
0
5
10
15
20
0
10
20
30
40
50
60
70
80
V – Input Voltage to GND – V
I
T
A
– Free-Air Temperature – °C
Figure 19
Figure 20
PROPAGATION DELAY TIME
SWITCHING TIME
vs
FREE-AIR TEMPERATURE
vs
SUPPLY VOLTAGE
20
18
16
14
12
10
8
30
C
= 15 pF
L
V
C
= 5 V
CC
T
A
= 25°C
= 15 pF
t
L
PLH
25
20
15
10
t
PHL
t
PLZ
t
PLH
t
PHZ
t
PZH
t
PHL
6
t
PZL
t
PZH
t
PHZ
4
5
0
2
0
4.5 4.6 4.7 4.8 4.9
5
5.1 5.2 5.3 5.4 5.5
0
10
20
30
40
50
60
70
80
V
CC
– Supply Voltage – V
T
A
– Free-Air Temperature – °C
Figure 21
Figure 22
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
4-Jun-2007
PACKAGING INFORMATION
Orderable Device
SN75ALS197D
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOIC
D
16
16
16
16
16
16
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN75ALS197DE4
SN75ALS197DG4
SN75ALS197DR
SN75ALS197DRE4
SN75ALS197DRG4
SOIC
SOIC
SOIC
SOIC
SOIC
D
D
D
D
D
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN75ALS197J
SN75ALS197N
OBSOLETE
ACTIVE
CDIP
PDIP
J
16
16
TBD
Call TI
Call TI
N
25
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
SN75ALS197NE4
SN75ALS197NSR
SN75ALS197NSRE4
SN75ALS197NSRG4
ACTIVE
ACTIVE
ACTIVE
ACTIVE
PDIP
SO
N
16
16
16
16
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
NS
NS
NS
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
4-Jun-2007
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
SN75ALS197DR
SN75ALS197NSR
SOIC
SO
D
16
16
2500
2000
330.0
330.0
16.4
16.4
6.5
8.2
10.3
10.5
2.1
2.5
8.0
16.0
16.0
Q1
Q1
NS
12.0
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
SN75ALS197DR
SN75ALS197NSR
SOIC
SO
D
16
16
2500
2000
333.2
367.0
345.9
367.0
28.6
38.0
NS
Pack Materials-Page 2
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