SN74LVTH646-EP [TI]
3.3-V ABT OCTAL BUS TRANSVEIVER AND REGISTER WITH 3-STATE OUTPUTS; 3.3 -V ABT八路总线TRANSVEIVER并用3态输出寄存器
| 型号： | SN74LVTH646-EP |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 3.3-V ABT OCTAL BUS TRANSVEIVER AND REGISTER WITH 3-STATE OUTPUTS |
| 文件： | 总12页 (文件大小：328K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ꢀꢁꢂ ꢃ ꢄꢅ ꢆꢇ ꢈꢃ ꢈꢉ ꢊꢋ
ꢌ ꢍꢌ ꢉꢅ ꢎꢏꢆ ꢐ ꢑꢆꢎꢄ ꢏꢒꢀ ꢆ ꢓꢎꢁꢀ ꢑꢊꢔ ꢅꢊꢓ ꢎꢁꢕ ꢓ ꢊꢖ ꢔ ꢀ ꢆꢊ ꢓ
ꢗ ꢔꢆ ꢇ ꢌ ꢉꢀꢆꢎꢆ ꢊ ꢐ ꢒꢆ ꢋ ꢒꢆꢀ
SCBS775A − NOVEMBER 2003 − REVISED APRIL 2004
D
D
D
D
D
Controlled Baseline
− One Assembly/Test Site, One Fabrication
Site
D
Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
Enhanced Diminishing Manufacturing
Sources (DMS) Support
D
D
Latch-Up Performance Exceeds 500 mA Per
JESD 17
Enhanced Product-Change Notification
ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
†
Qualification Pedigree
Supports Mixed-Mode Signal Operation
(5-V Input and Output Voltages With
PW PACKAGE
(TOP VIEW)
3.3-V V
)
CC
D
D
D
Supports Unregulated Battery Operation
Down to 2.7 V
CLKAB
SAB
DIR
A1
A2
A3
A4
A5
A6
A7
A8
GND
V
CC
1
24
23
22
21
20
19
18
17
16
15
14
13
CLKBA
SBA
OE
B1
B2
B3
B4
B5
B6
B7
2
Typical V
<0.8 V at V
(Output Ground Bounce)
OLP
CC
3
= 3.3 V, T = 25°C
A
4
I
and Power-Up 3-State Support Hot
off
5
Insertion
6
†
Component qualification in accordance with JEDEC and industry
standards to ensure reliable operation over an extended
temperature range. This includes, but is not limited to, Highly
Accelerated Stress Test (HAST) or biased 85/85, temperature
cycle, autoclave or unbiased HAST, electromigration, bond
intermetallic life, and mold compound life. Such qualification
testing should not be viewed as justifying use of this component
beyond specified performance and environmental limits.
7
8
9
10
11
12
B8
description/ordering information
This bus transceiver and register is designed specifically for low-voltage (3.3-V) V
capability to provide a TTL interface to a 5-V system environment.
operation, but with the
CC
The SN74LVTH646 consists of bus transceiver circuits, D-type flip-flops, and control circuitry arranged for
multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B
bus is clocked into the registers on the low-to-high transition of the appropriate clock (CLKAB or CLKBA) input.
Figure 1 illustrates the four fundamental bus-management functions that can be performed with the ’LVTH646.
Output-enable (OE) and direction-control (DIR) inputs are provided to control the transceiver functions. In the
transceiver mode, data present at the high-impedance port can be stored in either register or in both.
The select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data. The
direction control (DIR) determines which bus receives data when OE is low. In the isolation mode (OE high),
A data can be stored in one register and/or B data can be stored in the other register.
When an output function is disabled, the input function is still enabled and can be used to store and transmit
data. Only one of the two buses, A or B, can be driven at a time.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
‡
T
A
PACKAGE
−40°C to 85°C
TSSOP − PW Tape and reel
SN74LVTH646IPWREP
LH646EP
‡
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
ꢋ
ꢋ
ꢓ
ꢐ
ꢧ
ꢕ
ꢢ
ꢒ
ꢑ
ꢠ
ꢆ
ꢡ
ꢔ
ꢛ
ꢐ
ꢙ
ꢁ
ꢚ
ꢕ
ꢎ
ꢆ
ꢎ
ꢘ
ꢙ
ꢣ
ꢚ
ꢛ
ꢡ
ꢜ
ꢝ
ꢞ
ꢞ
ꢟ
ꢟ
ꢘ
ꢘ
ꢛ
ꢛ
ꢙ
ꢙ
ꢘ
ꢠ
ꢠ
ꢤ
ꢡ
ꢢ
ꢜ
ꢜ
ꢣ
ꢣ
ꢙ
ꢟ
ꢞ
ꢝ
ꢠ
ꢠ
ꢛ
ꢚ
ꢤ
ꢆꢣ
ꢢ
ꢥ
ꢠ
ꢦ
ꢘ
ꢡ
ꢞ
ꢠ
ꢟ
ꢘ
ꢟ
ꢛ
ꢜ
ꢙ
ꢢ
ꢧ
ꢞ
ꢙ
ꢟ
ꢟ
ꢣ
ꢠ
ꢍ
Copyright 2004, Texas Instruments Incorporated
ꢜ
ꢛ
ꢡ
ꢟ
ꢛ
ꢜ
ꢝ
ꢟ
ꢛ
ꢠ
ꢤ
ꢘ
ꢚ
ꢘ
ꢡ
ꢣ
ꢜ
ꢟ
ꢨ
ꢟ
ꢣ
ꢜ
ꢛ
ꢚ
ꢩ
ꢞ
ꢔ
ꢙ
ꢝ
ꢣ
ꢠ
ꢟ
ꢞ
ꢙ
ꢧ
ꢞ
ꢜ
ꢧ
ꢪ
ꢞ
ꢟ ꢣ ꢠ ꢟꢘ ꢙꢬ ꢛꢚ ꢞ ꢦꢦ ꢤꢞ ꢜ ꢞ ꢝ ꢣ ꢟ ꢣ ꢜ ꢠ ꢍ
ꢜ
ꢜ
ꢞ
ꢙ
ꢟ
ꢫ
ꢍ
ꢋ
ꢜ
ꢛ
ꢧ
ꢢ
ꢡ
ꢟ
ꢘ
ꢛ
ꢙ
ꢤ
ꢜ
ꢛ
ꢡ
ꢣ
ꢠ
ꢠ
ꢘ
ꢙ
ꢬ
ꢧ
ꢛ
ꢣ
ꢠ
ꢙ
ꢛ
ꢟ
ꢙ
ꢣ
ꢡ
ꢣ
ꢠ
ꢠ
ꢞ
ꢜ
ꢘ
ꢦ
ꢫ
ꢘ
ꢙ
ꢡ
ꢦ
ꢢ
ꢧ
ꢣ
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄꢅꢆ ꢇ ꢈ ꢃ ꢈꢉꢊꢋ
ꢌꢍ ꢌꢉꢅ ꢎ ꢏ ꢆ ꢐꢑ ꢆꢎꢄ ꢏꢒ ꢀ ꢆꢓ ꢎꢁ ꢀꢑ ꢊꢔ ꢅ ꢊ ꢓ ꢎꢁꢕ ꢓꢊ ꢖꢔ ꢀꢆ ꢊꢓ
ꢗꢔ ꢆ ꢇ ꢌ ꢉꢀꢆꢎꢆ ꢊ ꢐꢒꢆ ꢋꢒ ꢆꢀ
SCBS775A − NOVEMBER 2003 − REVISED APRIL 2004
description/ordering information (continued)
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup
or pulldown resistors with the bus-hold circuitry is not recommended.
When V
is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down.
CC
However, to ensure the high-impedance state above 1.5 V, OE should be tied to V
the minimum value of the resistor is determined by the current-sinking capability of the driver.
through a pullup resistor;
CC
This device is fully specified for hot-insertion applications using I and power-up 3-state. The I circuitry
off
off
disables the outputs, preventing damaging current backflow through the devices when they are powered down.
The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,
which prevents driver conflict.
FUNCTION TABLE
INPUTS
DATA I/Os
OPERATION OR FUNCTION
OE
X
X
H
H
L
DIR
X
CLKAB
CLKBA
SAB
X
SBA
X
A1−A8
Input
B1−B8
†
†
↑
X
Unspecified
Store A, B unspecified
†
†
X
X
↑
X
X
Unspecified
Input
Input
Store B, A unspecified
X
↑
H or L
X
↑
H or L
X
X
X
Input
Store A and B data
Isolation, hold storage
Real-time B data to A bus
Stored B data to A bus
Real-time A data to B bus
Stored A data to B bus
X
X
X
Input disabled
Output
Input disabled
Input
L
X
L
L
L
X
H or L
X
X
H
Output
Input
L
H
H
X
L
X
Input
Output
L
H or L
X
H
X
Input
Output
†
The data-output functions can be enabled or disabled by various signals at OE and DIR. Data-input functions always are enabled; i.e., data at
the bus terminals is stored on every low-to-high transition of the clock inputs.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀꢁꢂ ꢃ ꢄꢅ ꢆꢇ ꢈꢃ ꢈꢉ ꢊꢋ
ꢌ ꢍꢌ ꢉꢅ ꢎꢏꢆ ꢐ ꢑꢆꢎꢄ ꢏꢒꢀ ꢆ ꢓꢎꢁꢀ ꢑꢊꢔ ꢅꢊꢓ ꢎꢁꢕ ꢓ ꢊꢖ ꢔ ꢀ ꢆꢊ ꢓ
ꢗ ꢔꢆ ꢇ ꢌ ꢉꢀꢆꢎꢆ ꢊ ꢐ ꢒꢆ ꢋ ꢒꢆꢀ
SCBS775A − NOVEMBER 2003 − REVISED APRIL 2004
21
OE
L
3
1
23
2
22
21
3
1
23
CLKAB CLKBA SAB
L
2
22
SBA
X
DIR CLKAB CLKBA SAB
SBA
L
DIR
H
OE
L
L
X
X
X
X
X
REAL-TIME TRANSFER
BUS B TO BUS A
REAL-TIME TRANSFER
BUS A TO BUS B
21
3
1
23
2
22
21
OE
L
3
DIR
L
1
23
2
22
SBA
H
DIR CLKAB CLKBA SAB
SBA
X
CLKAB CLKBA SAB
OE
X
X
X
X
X
↑
↑
X
X
X
↑
X
X
H or L
X
X
H
X
H
X
X
L
H
H or L
X
↑
STORAGE FROM
A, B, OR A AND B
TRANSFER STORED DATA
TO A AND/OR B
Figure 1. Bus-Management Functions
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄꢅꢆ ꢇ ꢈ ꢃ ꢈꢉꢊꢋ
ꢌꢍ ꢌꢉꢅ ꢎ ꢏ ꢆ ꢐꢑ ꢆꢎꢄ ꢏꢒ ꢀ ꢆꢓ ꢎꢁ ꢀꢑ ꢊꢔ ꢅ ꢊ ꢓ ꢎꢁꢕ ꢓꢊ ꢖꢔ ꢀꢆ ꢊꢓ
ꢗꢔ ꢆ ꢇ ꢌ ꢉꢀꢆꢎꢆ ꢊ ꢐꢒꢆ ꢋꢒ ꢆꢀ
SCBS775A − NOVEMBER 2003 − REVISED APRIL 2004
logic diagram (positive logic)
21
OE
3
DIR
23
CLKBA
22
SBA
1
CLKAB
2
SAB
One of Eight Channels
1D
C1
4
A1
20
B1
1D
C1
To Seven Other Channels
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀꢁꢂ ꢃ ꢄꢅ ꢆꢇ ꢈꢃ ꢈꢉ ꢊꢋ
ꢌ ꢍꢌ ꢉꢅ ꢎꢏꢆ ꢐ ꢑꢆꢎꢄ ꢏꢒꢀ ꢆ ꢓꢎꢁꢀ ꢑꢊꢔ ꢅꢊꢓ ꢎꢁꢕ ꢓ ꢊꢖ ꢔ ꢀ ꢆꢊ ꢓ
ꢗ ꢔꢆ ꢇ ꢌ ꢉꢀꢆꢎꢆ ꢊ ꢐ ꢒꢆ ꢋ ꢒꢆꢀ
SCBS775A − NOVEMBER 2003 − REVISED APRIL 2004
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
I
Voltage range applied to any output in the high-impedance
or power-off state, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
O
Voltage range applied to any output in the high state, V (see Note 1) . . . . . . . . . . . . . −0.5 V to V
+ 0.5 V
O
CC
Current into any output in the low state, I
Current into any output in the high state, I (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
O
O
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
IK
OK
I
Output clamp current, I
(V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
O
Package thermal impedance, θ (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88°C/W
JA
stg
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. This current flows only when the output is in the high state and V > V
.
CC
O
3. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 4)
MIN
2.7
2
MAX
UNIT
V
V
V
V
V
Supply voltage
3.6
CC
High-level input voltage
Low-level input voltage
Input voltage
V
IH
0.8
5.5
−32
64
V
IL
V
I
I
I
High-level output current
Low-level output current
Input transition rise or fall rate
Power-up ramp rate
mA
mA
ns/V
µs/V
°C
OH
OL
∆t/∆v
∆t/∆V
Outputs enabled
10
200
−40
CC
T
A
Operating free-air temperature
85
NOTE 4: All unused control inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄꢅꢆ ꢇ ꢈ ꢃ ꢈꢉꢊꢋ
ꢌꢍ ꢌꢉꢅ ꢎ ꢏ ꢆ ꢐꢑ ꢆꢎꢄ ꢏꢒ ꢀ ꢆꢓ ꢎꢁ ꢀꢑ ꢊꢔ ꢅ ꢊ ꢓ ꢎꢁꢕ ꢓꢊ ꢖꢔ ꢀꢆ ꢊꢓ
ꢗꢔ ꢆ ꢇ ꢌ ꢉꢀꢆꢎꢆ ꢊ ꢐꢒꢆ ꢋꢒ ꢆꢀ
SCBS775A − NOVEMBER 2003 − REVISED APRIL 2004
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
†
PARAMETER
TEST CONDITIONS
MIN TYP
MAX
UNIT
V
V
V
V
V
= 2.7 V,
I = −18 mA
−1.2
V
IK
CC
CC
CC
CC
I
= 2.7 V to 3.6 V,
= 2.7 V,
I
I
I
I
I
I
I
I
= −100 µA
= −8 mA
= −32 mA
= 100 µA
= 24 mA
= 16 mA
= 32 mA
= 64 mA
V
−0.2
OH
OH
OH
OL
OL
OL
OL
OL
CC
2.4
V
OH
V
V
= 3 V,
2
0.2
0.5
0.4
0.5
0.55
1
V
= 2.7 V
CC
CC
V
OL
V
= 3 V
V
V
= 3.6 V,
V = V or GND
I CC
CC
Control inputs
= 0 or 3.6 V,
V = 5.5 V
I
10
CC
V = 5.5 V
I
20
I
I
µA
‡
V = V
1
V
CC
= 3.6 V
A or B ports
I
CC
V = 0
I
−5
I
I
V
V
= 0,
V or V = 0 to 4.5 V
100
µA
µA
off
CC
I
O
V = 0.8 V
I
75
= 3 V
CC
V = 2 V
I
−75
A or B ports
I(hold)
§
V
V
V
= 3.6 V ,
V = 0 to 3.6 V
500
100
CC
CC
CC
I
= 0 to 1.5 V, V = 0.5 V to 3 V, OE = don’t care
O
µA
µA
I
I
OZPU
= 1.5 V to 0, V = 0.5 V to 3 V, OE = don’t care
O
100
0.19
5
OZPD
Outputs high
Outputs low
I
V
V
= 3.6 V, I = 0, V = V
CC
or GND
mA
CC
CC
O
I
Outputs disabled
0.19
0.2
¶
∆I
= 3 V to 3.6 V, One input at V
CC
− 0.6 V, Other inputs at V
or GND
CC
mA
pF
pF
CC
CC
C
C
V = 3 V or 0
4
9
i
I
V
O
= 3 V or 0
io
†
‡
§
¶
All typical values are at V
CC
= 3.3 V, T = 25°C.
A
Unused terminals at V
or GND
CC
This is the bus-hold maximum dynamic current. It is the minimum overdrive current required to switch the input from one state to another.
This is the increase in supply current for each input that is at the specified TTL voltage level, rather than V or GND.
CC
timing requirements over recommended operating free-air temperature range (unless otherwise
noted) (see Figure 2)
V = 3.3 V
CC
0.3 V
V
CC
= 2.7 V
UNIT
MIN MAX
150
MIN
MAX
f
t
Clock frequency
150
MHz
ns
clock
Pulse duration, CLK high or low
3.3
1.2
1.6
0.8
3.3
1.5
2.2
0.8
w
Data high
Data low
t
t
Setup time, A or B before CLKAB↑ or CLKBA↑
Hold time, A or B after CLKAB↑ or CLKBA↑
ns
ns
su
h
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀꢁꢂ ꢃ ꢄꢅ ꢆꢇ ꢈꢃ ꢈꢉ ꢊꢋ
ꢌ ꢍꢌ ꢉꢅ ꢎꢏꢆ ꢐ ꢑꢆꢎꢄ ꢏꢒꢀ ꢆ ꢓꢎꢁꢀ ꢑꢊꢔ ꢅꢊꢓ ꢎꢁꢕ ꢓ ꢊꢖ ꢔ ꢀ ꢆꢊ ꢓ
ꢗ ꢔꢆ ꢇ ꢌ ꢉꢀꢆꢎꢆ ꢊ ꢐ ꢒꢆ ꢋ ꢒꢆꢀ
SCBS775A − NOVEMBER 2003 − REVISED APRIL 2004
switching characteristics over recommended operating free-air temperature range, C = 50 pF
L
(unless otherwise noted) (see Figure 2)
V
= 3.3 V
CC
0.3 V
V
= 2.7 V
MAX
CC
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
†
MIN TYP
MAX
MIN
f
t
t
t
t
t
t
t
t
t
t
t
t
t
t
150
150
MHz
ns
max
PLH
PHL
PLH
PHL
PLH
PHL
PZH
PZL
PHZ
PLZ
PZH
PZL
PHZ
PLZ
1.8
1.8
1.3
1.3
1.5
1.5
1.1
1.1
2.3
2.3
1.3
1.3
1.5
1.5
3.1
3.1
2.3
2.4
3
4.7
4.7
3.5
3.5
4.9
4.9
5.2
5.2
5.5
5.5
5.2
5.2
5.6
5.6
5.6
5.6
4.1
4.1
6
CLKBA or CLKAB
A or B
A or B
B or A
A or B
A or B
A or B
A or B
A or B
ns
ns
ns
ns
ns
ns
‡
SBA or SAB
3.3
3.1
3.4
3.9
4
6
6.5
6.5
6.1
5.9
6.6
6.6
6.7
6.3
OE
OE
3.4
3.6
3.2
3.8
DIR
DIR
†
‡
All typical values are at V
CC
= 3.3 V, T = 25°C.
A
These parameters are measured with the internal output state of the storage register opposite that of the bus input.
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄꢅꢆ ꢇ ꢈ ꢃ ꢈꢉꢊꢋ
ꢌꢍ ꢌꢉꢅ ꢎ ꢏ ꢆ ꢐꢑ ꢆꢎꢄ ꢏꢒ ꢀ ꢆꢓ ꢎꢁ ꢀꢑ ꢊꢔ ꢅ ꢊ ꢓ ꢎꢁꢕ ꢓꢊ ꢖꢔ ꢀꢆ ꢊꢓ
ꢗꢔ ꢆ ꢇ ꢌ ꢉꢀꢆꢎꢆ ꢊ ꢐꢒꢆ ꢋꢒ ꢆꢀ
SCBS775A − NOVEMBER 2003 − REVISED APRIL 2004
PARAMETER MEASUREMENT INFORMATION
6 V
S1
TEST
/t
S1
Open
GND
500 Ω
From Output
Under Test
t
Open
6 V
PLH PHL
t
/t
PLZ PZL
C
= 50 pF
L
t
/t
GND
500 Ω
PHZ PZH
(see Note A)
2.7 V
0 V
LOAD CIRCUIT
1.5 V
Timing Input
Data Input
t
w
t
t
h
su
2.7 V
0 V
2.7 V
0 V
Input
1.5 V
1.5 V
1.5 V
1.5 V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
2.7 V
0 V
2.7 V
Output
Control
1.5 V
1.5 V
1.5 V
1.5 V
Input
0 V
V
t
t
PLZ
t
t
t
PZL
PLH
PHL
Output
Waveform 1
S1 at 6 V
3 V
OH
1.5 V
1.5 V
1.5 V
1.5 V
Output
V
V
+ 0.3 V
OL
V
OL
(see Note B)
V
OL
t
t
t
PHL
PLH
PZH
PHZ
Output
Waveform 2
S1 at GND
V
OH
V
V
OH
− 0.3 V
OH
1.5 V
1.5 V
Output
≈0 V
(see Note B)
OL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A.
C includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t ≤ 2.5 ns, t ≤ 2.5 ns.
O
r
f
D. The outputs are measured one at a time, with one transition per measurement.
E. All parameters and waveforms are not applicable to all devices.
Figure 2. Load Circuit and Voltage Waveforms
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
18-Sep-2008
PACKAGING INFORMATION
Orderable Device
SN74LVTH646IPWREP
V62/04680-01XE
Status (1)
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
TSSOP
PW
24
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TSSOP
PW
24
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN74LVTH646-EP :
Catalog: SN74LVTH646
Military: SN54LVTH646
•
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
Military - QML certified for Military and Defense Applications
•
•
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Jul-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) W1 (mm)
(mm) (mm) Quadrant
SN74LVTH646IPWREP TSSOP
PW
24
2000
330.0
16.4
6.95
8.3
1.6
8.0
16.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Jul-2008
*All dimensions are nominal
Device
Package Type Package Drawing Pins
TSSOP PW 24
SPQ
Length (mm) Width (mm) Height (mm)
346.0 346.0 33.0
SN74LVTH646IPWREP
2000
Pack Materials-Page 2
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements,
and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should
obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are
sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard
warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where
mandated by government requirements, testing of all parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and
applications using TI components. To minimize the risks associated with customer products and applications, customers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right,
or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information
published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a
warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual
property of the third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied
by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive
business practice. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional
restrictions.
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all
express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not
responsible or liable for any such statements.
TI products are not authorized for use in safety-critical applications (such as life support) where a failure of the TI product would reasonably
be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement specifically governing
such use. Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications, and
acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products
and any use of TI products in such safety-critical applications, notwithstanding any applications-related information or support that may be
provided by TI. Further, Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in
such safety-critical applications.
TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are
specifically designated by TI as military-grade or "enhanced plastic." Only products designated by TI as military-grade meet military
specifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at
the Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use.
TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are
designated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designated
products in automotive applications, TI will not be responsible for any failure to meet such requirements.
Following are URLs where you can obtain information on other Texas Instruments products and application solutions:
Products
Applications
Audio
Automotive
Broadband
Digital Control
Medical
Amplifiers
Data Converters
DSP
Clocks and Timers
Interface
amplifier.ti.com
dataconverter.ti.com
dsp.ti.com
www.ti.com/clocks
interface.ti.com
logic.ti.com
www.ti.com/audio
www.ti.com/automotive
www.ti.com/broadband
www.ti.com/digitalcontrol
www.ti.com/medical
www.ti.com/military
Logic
Military
Power Mgmt
Microcontrollers
RFID
power.ti.com
microcontroller.ti.com
www.ti-rfid.com
Optical Networking
Security
Telephony
Video & Imaging
Wireless
www.ti.com/opticalnetwork
www.ti.com/security
www.ti.com/telephony
www.ti.com/video
RF/IF and ZigBee® Solutions www.ti.com/lprf
www.ti.com/wireless
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2008, Texas Instruments Incorporated
相关型号：
SN74LVTH646DBR
LVT SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24, GREEN, PLASTIC, SSOP-24
TI
SN74LVTH646DBRE4
LVT SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24, GREEN, PLASTIC, SSOP-24
TI
SN74LVTH646DBRG4
LVT SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24, GREEN, PLASTIC, SSOP-24
TI
SN74LVTH646DGVR
LVT SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24, GREEN, PLASTIC, TVSOP-24
TI
SN74LVTH646DGVRG4
IC LVT SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24, GREEN, PLASTIC, TVSOP-24, Bus Driver/Transceiver
TI
SN74LVTH646DWE4
LVT SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24, GREEN, PLASTIC, SOIC-24
TI
SN74LVTH646DWR
LVT SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24, GREEN, PLASTIC, SOIC-24
TI
SN74LVTH646DWRE4
LVT SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24, GREEN, PLASTIC, SOIC-24
TI
©2020 ICPDF网 联系我们和版权申明