SN74HC151PWTG4 [TI]

HC SERIES, 8 LINE TO 1 LINE MULTIPLEXER, COMPLEMENTARY OUTPUT, PDSO16, GREEN, PLASTIC, TSSOP-16;
SN74HC151PWTG4
型号: SN74HC151PWTG4
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

HC SERIES, 8 LINE TO 1 LINE MULTIPLEXER, COMPLEMENTARY OUTPUT, PDSO16, GREEN, PLASTIC, TSSOP-16

光电二极管 输出元件
文件: 总20页 (文件大小:1089K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
ꢀꢁꢂ ꢃ ꢄꢅ ꢆ ꢂꢆ ꢇ ꢀꢁꢈ ꢃꢄ ꢅꢆ ꢂꢆ  
SCLS110E − DECEMBER 1982 − REVISED SEPTEMBER 2003  
D
D
D
D
D
Wide Operating Voltage Range of 2 V to 6 V  
Outputs Can Drive Up To 10 LSTTL Loads  
D
D
Low Input Current of 1 µA Max  
8-Line to 1-Line Multiplexers Can Perform  
as:  
− Boolean-Function Generators  
− Parallel-to-Serial Converters  
− Data Source Selectors  
Low Power Consumption, 80-µA Max I  
CC  
Typical t = 13 ns  
pd  
6-mA Output Drive at 5 V  
SN54HC151 . . . J OR W PACKAGE  
SN74HC151 . . . D, N, NS, OR PW PACKAGE  
(TOP VIEW)  
SN54HC151 . . . FK PACKAGE  
(TOP VIEW)  
D3  
D2  
D1  
D0  
Y
V
CC  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
D4  
D5  
D6  
3
2
1
20 19  
18  
D5  
D6  
NC  
D1  
D0  
NC  
Y
4
5
6
7
8
17  
16  
12 D7  
15 D7  
14  
9 10 11 12 13  
11  
10  
9
W
A
B
C
A
W
G
GND  
NC − No internal connection  
description/ordering information  
These data selectors/multiplexers provide full binary decoding to select one of eight data sources. The strobe  
(G) input must be at a low logic level to enable the inputs. A high level at the strobe terminal forces the W output  
high and the Y output low.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
PDIP − N  
Tube of 25  
Tube of 40  
Reel of 2500  
Reel of 250  
Reel of 2000  
Tube of 90  
Reel of 2000  
Reel of 250  
Tube of 25  
Tube of 150  
Tube of 55  
SN74HC151N  
SN74HC151N  
SN74HC151D  
SN74HC151DR  
SN74HC151DT  
SN74HC151NSR  
SN74HC151PW  
SN74HC151PWR  
SN74HC151PWT  
SNJ54HC151J  
SNJ54HC151W  
SNJ54HC151FK  
SOIC − D  
SOP − NS  
HC151  
HC151  
−40°C to 85°C  
TSSOP − PW  
HC151  
CDIP − J  
CFP − W  
LCCC − FK  
SNJ54HC151J  
SNJ54HC151W  
SNJ54HC151FK  
−55°C to 125°C  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2003, Texas Instruments Incorporated  
ꢏ ꢙ ꢤ ꢜ ꢛꢧ ꢢꢡ ꢟꢠ ꢡꢛ ꢝꢤ ꢦꢘ ꢞꢙ ꢟ ꢟꢛ ꢔꢌ ꢋꢊ ꢖꢒ ꢮ ꢊꢯꢉꢂ ꢯꢂꢇ ꢞꢦꢦ ꢤꢞ ꢜ ꢞ ꢝꢣ ꢟꢣꢜ ꢠ ꢞ ꢜ ꢣ ꢟꢣ ꢠꢟꢣ ꢧ  
ꢟ ꢣ ꢠ ꢟꢘ ꢙꢭ ꢛꢚ ꢞ ꢦꢦ ꢤꢞ ꢜ ꢞ ꢝ ꢣ ꢟ ꢣ ꢜ ꢠ ꢨ  
ꢢ ꢙꢦ ꢣꢠꢠ ꢛ ꢟꢩꢣ ꢜ ꢫꢘ ꢠꢣ ꢙ ꢛꢟꢣ ꢧꢨ ꢏ ꢙ ꢞꢦ ꢦ ꢛ ꢟꢩꢣ ꢜ ꢤꢜ ꢛ ꢧꢢꢡ ꢟꢠ ꢇ ꢤꢜ ꢛ ꢧꢢꢡ ꢟꢘꢛ ꢙ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀ ꢁꢂ ꢃꢄ ꢅ ꢆꢂ ꢆꢇ ꢀꢁ ꢈ ꢃ ꢄꢅꢆ ꢂ ꢆ  
ꢉꢊ ꢋ ꢌ ꢁꢍ ꢎꢏ ꢆ ꢊꢋ ꢌ ꢁꢍ ꢐꢑꢎꢑ ꢀ ꢍꢋ ꢍ ꢅꢎꢏ ꢒꢀ ꢓꢔꢕ ꢋꢎ ꢌꢖ ꢋꢍ ꢗꢍꢒꢀ  
SCLS110E − DECEMBER 1982 − REVISED SEPTEMBER 2003  
FUNCTION TABLE  
INPUTS  
OUTPUTS  
SELECT  
STROBE  
G
Y
W
C
X
L
B
X
L
A
X
L
H
L
L
L
L
L
L
L
L
L
H
D0  
D1  
D2  
D3  
D4  
D5  
D6  
D7  
D0  
D1  
D2  
D3  
D4  
D5  
D6  
D7  
L
L
H
L
L
H
H
L
L
H
L
H
H
H
H
L
H
L
H
H
H
D0, D1 . . . D7 = the level of the respective D input  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀꢁꢂ ꢃ ꢄꢅ ꢆ ꢂꢆ ꢇ ꢀꢁꢈ ꢃꢄ ꢅꢆ ꢂꢆ  
ꢋꢎ  
SCLS110E − DECEMBER 1982 − REVISED SEPTEMBER 2003  
logic diagram (positive logic)  
7
G
11  
A
10  
B
9
C
4
D0  
TG  
3
2
D1  
D2  
D3  
TG  
TG  
5
Y
1
TG  
15  
D4  
D5  
TG  
6
W
14  
13  
TG  
D6  
D7  
TG  
12  
TG  
Pin numbers shown are for the D, J, N, NS, PW, and W packages.  
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀ ꢁꢂ ꢃꢄ ꢅ ꢆꢂ ꢆꢇ ꢀꢁ ꢈ ꢃ ꢄꢅꢆ ꢂ ꢆ  
ꢉꢊ ꢋ ꢌ ꢁꢍ ꢎꢏ ꢆ ꢊꢋ ꢌ ꢁꢍ ꢐꢑꢎꢑ ꢀ ꢍꢋ ꢍ ꢅꢎꢏ ꢒꢀ ꢓꢔꢕ ꢋꢎ ꢌꢖ ꢋꢍ ꢗꢍꢒꢀ  
SCLS110E − DECEMBER 1982 − REVISED SEPTEMBER 2003  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage range, V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V  
CC  
I
Input clamp current, I (V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA  
IK  
I
CC  
Output clamp current, I  
(V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA  
OK  
O O CC  
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 mA  
Continuous current through V  
O
O
CC  
CC  
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 mA  
Package thermal impedance, θ (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W  
JA  
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W  
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64°C/W  
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108°C/W  
Storage temperature range, T  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C  
stg  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
2. The package thermal impedance is calculated in accordance with JESD 51-7.  
recommended operating conditions (see Note 3)  
SN54HC151  
MIN NOM  
SN74HC151  
MIN NOM  
UNIT  
MAX  
MAX  
V
V
Supply voltage  
2
1.5  
5
6
2
1.5  
5
6
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
= 2 V  
= 4.5 V  
= 6 V  
3.15  
4.2  
3.15  
4.2  
High-level input voltage  
V
V
IH  
= 2 V  
0.5  
1.35  
1.8  
0.5  
1.35  
1.8  
= 4.5 V  
= 6 V  
V
IL  
Low-level input voltage  
V
V
Input voltage  
0
0
V
V
0
0
V
V
V
V
I
CC  
CC  
Output voltage  
O
CC  
CC  
V
CC  
V
CC  
V
CC  
= 2 V  
1000  
500  
400  
125  
1000  
500  
400  
85  
= 4.5 V  
= 6 V  
t/v  
Input transition rise/fall time  
ns  
T
A
Operating free-air temperature  
−55  
−40  
°C  
NOTE 3: All unused inputs of the device must be held at V  
or GND to ensure proper device operation. Refer to the TI application report,  
CC  
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.  
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀꢁꢂ ꢃ ꢄꢅ ꢆ ꢂꢆ ꢇ ꢀꢁꢈ ꢃꢄ ꢅꢆ ꢂꢆ  
ꢉ ꢊꢋ ꢌꢁꢍ ꢎ ꢏ ꢆ ꢊꢋ ꢌꢁꢍ ꢐꢑꢎꢑ ꢀꢍ ꢋꢍ ꢅꢎꢏ ꢒꢀꢓ ꢔꢕ ꢋꢎ ꢌ ꢖꢋ ꢍꢗ ꢍ ꢒꢀ  
SCLS110E − DECEMBER 1982 − REVISED SEPTEMBER 2003  
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted)  
T
= 25°C  
SN54HC151  
SN74HC151  
A
PARAMETER  
TEST CONDITIONS  
V
UNIT  
CC  
MIN  
TYP  
MAX  
MIN  
1.9  
4.4  
5.9  
3.7  
5.2  
MAX  
MIN  
1.9  
MAX  
2 V  
4.5 V  
6 V  
1.9 1.998  
4.4 4.499  
5.9 5.999  
4.4  
I
= −20 µA  
OH  
5.9  
V
V
V = V or V  
IH  
V
OH  
OL  
I
IL  
I
I
= −6 mA  
4.5 V  
6 V  
3.98  
5.48  
4.3  
5.8  
3.84  
5.34  
OH  
= −7.8 mA  
OH  
2 V  
0.002  
0.001  
0.001  
0.17  
0.15  
0.1  
0.1  
0.1  
0.1  
0.26  
0.26  
100  
8
0.1  
0.1  
0.1  
0.1  
4.5 V  
6 V  
I
= 20 µA  
OL  
0.1  
0.1  
V = V or V  
V
I
IH  
IL  
I
I
= 6 mA  
4.5 V  
6 V  
0.4  
0.33  
0.33  
1000  
80  
OL  
= 7.8 mA  
0.4  
OL  
I
I
V = V  
I
or 0  
6 V  
1000  
160  
10  
nA  
µA  
pF  
I
CC  
V = V  
I
or 0,  
I
O
= 0  
6 V  
CC  
CC  
C
2 V to 6 V  
3
10  
10  
i
switching characteristics over recommended operating free-air temperature range, C = 50 pF  
L
(unless otherwise noted) (see Figure 1)  
T
A
= 25°C  
TYP  
94  
SN54HC151  
SN74HC151  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
V
UNIT  
CC  
MIN  
MAX  
250  
50  
MIN  
MAX  
360  
73  
MIN  
MAX  
312  
63  
2 V  
4.5 V  
6 V  
30  
A, B, or C  
Any D  
G
Y or W  
Y or W  
Y or W  
Y or W  
25  
43  
62  
54  
2 V  
74  
195  
39  
283  
57  
244  
49  
4.5 V  
6 V  
23  
t
pd  
ns  
20  
33  
48  
41  
2 V  
49  
127  
25  
185  
37  
159  
32  
4.5 V  
6 V  
15  
13  
22  
32  
28  
2 V  
22  
75  
110  
22  
95  
t
t
4.5 V  
6 V  
9
15  
19  
ns  
8
13  
19  
16  
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀ ꢁꢂ ꢃꢄ ꢅ ꢆꢂ ꢆꢇ ꢀꢁ ꢈ ꢃ ꢄꢅꢆ ꢂ ꢆ  
ꢉꢊ ꢋ ꢌ ꢁꢍ ꢎꢏ ꢆ ꢊꢋ ꢌ ꢁꢍ ꢐꢑꢎꢑ ꢀ ꢍꢋ ꢍ ꢅꢎꢏ ꢒꢀ ꢓꢔꢕ ꢋꢎ ꢌꢖ ꢋꢍ ꢗꢍꢒꢀ  
SCLS110E − DECEMBER 1982 − REVISED SEPTEMBER 2003  
switching characteristics over recommended operating free-air temperature range, C = 150 pF  
L
(unless otherwise noted) (see Figure 1)  
T
A
= 25°C  
TYP  
107  
33  
SN54HC151  
SN74HC151  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
V
UNIT  
CC  
MIN  
MAX  
350  
70  
MIN  
MAX  
525  
105  
89  
MIN  
MAX  
440  
88  
2 V  
4.5 V  
6 V  
A, B, or C  
Any D  
G
Y or W  
Y or W  
Y or W  
Y or W  
30  
59  
76  
2 V  
90  
275  
51  
415  
83  
345  
69  
4.5 V  
6 V  
29  
t
pd  
ns  
25  
47  
72  
59  
2 V  
67  
205  
41  
310  
62  
255  
51  
4.5 V  
6 V  
21  
18  
35  
53  
43  
2 V  
51  
210  
42  
315  
63  
265  
53  
t
t
4.5 V  
6 V  
16  
ns  
14  
36  
53  
45  
operating characteristics, T = 25°C  
A
PARAMETER  
TEST CONDITIONS  
TYP  
UNIT  
C
Power dissipation capacitance  
No load  
70  
pF  
pd  
PARAMETER MEASUREMENT INFORMATION  
V
CC  
From Output  
Under Test  
Test  
Point  
Input  
50%  
50%  
0 V  
C
L
t
t
PLH  
PHL  
90%  
(see Note A)  
V
V
OH  
In-Phase  
Output  
90%  
t
50%  
10%  
50%  
10%  
LOAD CIRCUIT  
OL  
t
r
f
f
t
t
PLH  
PHL  
90%  
V
CC  
V
V
90%  
t
90%  
OH  
Input  
50%  
10%  
50%  
10%  
90%  
t
Out-of-Phase  
Output  
50%  
10%  
50%  
10%  
0 V  
OL  
t
r
f
t
r
VOLTAGE WAVEFORM  
INPUT RISE AND FALL TIMES  
VOLTAGE WAVEFORMS  
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES  
NOTES: A.  
B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following  
characteristics: PRR 1 MHz, Z = 50 , t = 6 ns, t = 6 ns.  
C includes probe and test-fixture capacitance.  
L
O
r
f
C. The outputs are measured one at a time with one input transition per measurement.  
D. and t are the same as t  
t
.
PLH  
PHL pd  
Figure 1. Load Circuit and Voltage Waveforms  
6
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
PACKAGE OPTION ADDENDUM  
www.ti.com  
25-Sep-2013  
PACKAGING INFORMATION  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan Lead/Ball Finish  
MSL Peak Temp  
Op Temp (°C)  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
84128012A  
ACTIVE  
LCCC  
CDIP  
FK  
20  
16  
1
TBD  
POST-PLATE  
A42  
N / A for Pkg Type  
-55 to 125  
84128012A  
SNJ54HC  
151FK  
8412801EA  
ACTIVE  
J
1
TBD  
TBD  
N / A for Pkg Type  
-55 to 125  
8412801EA  
SNJ54HC151J  
SN54HC151J  
SN74HC151D  
ACTIVE  
ACTIVE  
CDIP  
SOIC  
J
16  
16  
1
A42  
N / A for Pkg Type  
-55 to 125  
-40 to 85  
SN54HC151J  
D
40  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU  
Level-1-260C-UNLIM  
HC151  
SN74HC151DE4  
SN74HC151DG4  
SN74HC151DR  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
PDIP  
PDIP  
SO  
D
D
16  
16  
16  
16  
16  
16  
16  
16  
16  
16  
16  
16  
16  
40  
40  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
N / A for Pkg Type  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
HC151  
Green (RoHS  
& no Sb/Br)  
HC151  
D
2500  
2500  
2500  
250  
250  
250  
25  
Green (RoHS  
& no Sb/Br)  
HC151  
SN74HC151DRE4  
SN74HC151DRG4  
SN74HC151DT  
D
Green (RoHS  
& no Sb/Br)  
HC151  
D
Green (RoHS  
& no Sb/Br)  
HC151  
D
Green (RoHS  
& no Sb/Br)  
HC151  
SN74HC151DTE4  
SN74HC151DTG4  
SN74HC151N  
D
Green (RoHS  
& no Sb/Br)  
HC151  
D
Green (RoHS  
& no Sb/Br)  
HC151  
N
Pb-Free  
(RoHS)  
SN74HC151N  
SN74HC151N  
HC151  
SN74HC151NE4  
SN74HC151NSR  
SN74HC151NSRE4  
SN74HC151NSRG4  
N
25  
Pb-Free  
(RoHS)  
N / A for Pkg Type  
NS  
NS  
NS  
2000  
2000  
2000  
Green (RoHS  
& no Sb/Br)  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
SO  
Green (RoHS  
& no Sb/Br)  
HC151  
SO  
Green (RoHS  
& no Sb/Br)  
HC151  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
25-Sep-2013  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan Lead/Ball Finish  
MSL Peak Temp  
Op Temp (°C)  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-55 to 125  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
SN74HC151PW  
SN74HC151PWE4  
SN74HC151PWG4  
SN74HC151PWR  
SN74HC151PWRE4  
SN74HC151PWRG4  
SN74HC151PWT  
SN74HC151PWTE4  
SN74HC151PWTG4  
SNJ54HC151FK  
ACTIVE  
TSSOP  
TSSOP  
TSSOP  
TSSOP  
TSSOP  
TSSOP  
TSSOP  
TSSOP  
TSSOP  
LCCC  
PW  
16  
16  
16  
16  
16  
16  
16  
16  
16  
20  
90  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
POST-PLATE  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
N / A for Pkg Type  
HC151  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
PW  
PW  
PW  
PW  
PW  
PW  
PW  
PW  
FK  
90  
90  
Green (RoHS  
& no Sb/Br)  
HC151  
HC151  
HC151  
HC151  
HC151  
HC151  
HC151  
HC151  
Green (RoHS  
& no Sb/Br)  
2000  
2000  
2000  
250  
250  
250  
1
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
TBD  
84128012A  
SNJ54HC  
151FK  
SNJ54HC151J  
ACTIVE  
CDIP  
J
16  
1
TBD  
A42  
N / A for Pkg Type  
-55 to 125  
8412801EA  
SNJ54HC151J  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability  
information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that  
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between  
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.  
Addendum-Page 2  
PACKAGE OPTION ADDENDUM  
www.ti.com  
25-Sep-2013  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight  
in homogeneous material)  
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
of the previous line and the two combined represent the entire Device Marking for that device.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
OTHER QUALIFIED VERSIONS OF SN54HC151, SN74HC151 :  
Catalog: SN74HC151  
Automotive: SN74HC151-Q1, SN74HC151-Q1  
Military: SN54HC151  
NOTE: Qualified Version Definitions:  
Catalog - TI's standard catalog product  
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects  
Military - QML certified for Military and Defense Applications  
Addendum-Page 3  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
8-Apr-2013  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
SN74HC151DR  
SN74HC151PWR  
SN74HC151PWT  
SOIC  
D
16  
16  
16  
2500  
2000  
250  
330.0  
330.0  
330.0  
16.4  
12.4  
12.4  
6.5  
6.9  
6.9  
10.3  
5.6  
2.1  
1.6  
1.6  
8.0  
8.0  
8.0  
16.0  
12.0  
12.0  
Q1  
Q1  
Q1  
TSSOP  
TSSOP  
PW  
PW  
5.6  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
8-Apr-2013  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
SN74HC151DR  
SN74HC151PWR  
SN74HC151PWT  
SOIC  
D
16  
16  
16  
2500  
2000  
250  
333.2  
367.0  
367.0  
345.9  
367.0  
367.0  
28.6  
35.0  
35.0  
TSSOP  
TSSOP  
PW  
PW  
Pack Materials-Page 2  
IMPORTANT NOTICE  
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other  
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest  
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TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms  
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary  
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performed.  
TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and  
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