SN74CB3Q3251PWE4 [TI]
CB3Q/3VH/3C/2B SERIES, 1 LINE TO 8 LINE MULTIPLEXER AND DEMUX/DECODER, TRUE OUTPUT, PDSO16, GREEN, PLASTIC, TSSOP-16;![SN74CB3Q3251PWE4](http://pdffile.icpdf.com/pdf2/p00242/img/icpdf/SN74CB3Q3251_1465675_icpdf.jpg)
型号: | SN74CB3Q3251PWE4 |
厂家: | ![]() |
描述: | CB3Q/3VH/3C/2B SERIES, 1 LINE TO 8 LINE MULTIPLEXER AND DEMUX/DECODER, TRUE OUTPUT, PDSO16, GREEN, PLASTIC, TSSOP-16 光电二极管 输出元件 逻辑集成电路 |
文件: | 总19页 (文件大小:835K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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SN74CB3Q3251
1-OF-8 FET MULTIPLEXER/DEMULTIPLEXER
2.5-V/3.3-V LOW-VOLTAGE HIGH-BANDWIDTH BUS SWITCH
www.ti.com
SCDS173A–AUGUST 2004–REVISED MARCH 2005
FEATURES
•
Data and Control Inputs Provide Undershoot
Clamp Diodes
(1)
•
•
•
High-Bandwidth Data Path (up to 500 MHz
)
•
•
•
Low Power Consumption (ICC = 1 mA Typ)
VCC Operating Range From 2.3 V to 3.6 V
Equivalent to IDTQS3VH251 Device
5-V Tolerant I/Os With Device Powered Up or
Powered Down
Data I/Os Support 0- to 5-V Signaling Levels
(0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, 5 V)
•
•
Low and Flat ON-State Resistance (ron)
Characteristics Over Operating Range
(ron = 4 Ω Typ)
•
•
•
•
Control Inputs Can Be Driven by TTL or
5-V/3.3-V CMOS Outputs
Rail-to-Rail Switching on Data I/O Ports
– 0- to 5-V Switching With 3.3-V VCC
– 0- to 3.3-V Switching With 2.5-V VCC
Ioff Supports Partial-Power-Down Mode
Operation
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
•
•
Bidirectional Data Flow With Near-Zero
Propagation Delay
ESD Performance Tested Per JESD 22
– 2000-V Human-Body Model (A114-B,
Class II)
Low Input/Output Capacitance Minimizes
Loading and Signal Distortion
(Cio(OFF) = 3.5 pF Typ)
– 1000-V Charged-Device Model (C101)
•
Fast Switching Frequency
(fOE or fS = 20 MHz Max)
•
Supports Both Digital and Analog
Applications: PCI Interface, Differential Signal
Interface, Memory Interleaving, Bus Isolation,
Low-Distortion Signal Gating
(1) For additional information regarding the performance
characteristics of the CB3Q family, refer to the TI application
report, CBT-C, CB3T, and CB3Q Signal-Switch Families,
literature number SCDA008.
DBQ, DGV, OR PW PACKAGE
(TOP VIEW)
RGY PACKAGE
(TOP VIEW)
V
B5
B4
B3
1
2
3
4
5
6
7
8
16
15
CC
1
16
14 B6
13 B7
12 B8
11 S0
B2
B1
A
NC
OE
GND
15
14
13
12
11
10
B3
B2
B1
A
NC
OE
2
3
4
5
6
7
B5
B6
B7
B8
S0
S1
10
9
S1
S2
8
9
NC - No internal connection
NC - No internal connection
DESCRIPTION/ORDERING INFORMATION
The SN74CB3Q3251 is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate voltage of
the pass transistor, providing a low and flat ON-state resistance (ron). The low and flat ON-state resistance allows
for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The device
also features low data I/O capacitance to minimize capacitive loading and signal distortion on the data bus.
Specifically designed to support high-bandwidth applications, the SN74CB3Q3251 provides an optimized
interface solution ideally suited for broadband communications, networking, and data-intensive computing
systems.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2004–2005, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
SN74CB3Q3251
1-OF-8 FET MULTIPLEXER/DEMULTIPLEXER
2.5-V/3.3-V LOW-VOLTAGE HIGH-BANDWIDTH BUS SWITCH
www.ti.com
SCDS173A–AUGUST 2004–REVISED MARCH 2005
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
The SN74CB3Q3251 is a 1-of-8 multiplexer/demultiplexer with a single output-enable (OE) input. The select (S0,
S1, S2) inputs control the data path of the multiplexer/demultiplexer. When OE is low, the
multiplexer/demultiplexer is enabled, and the A port is connected to the B port, allowing bidirectional data flow
between ports. When OE is high, the multiplexer/demultiplexer is disabled, and a high-impedance state exists
between the A and B ports.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry prevents damaging
current backflow through the device when it is powered down. The device has isolation during power off.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION
TA
PACKAGE(1)
ORDERABLE PART NUMBER
SN74CB3Q3251RGYR
SN74CB3Q3251DBQR
SN74CB3Q3251PW
TOP-SIDE MARKING
BU251
QFN – RGY
Tape and reel
Tape and reel
Tube
SSOP (QSOP) – DBQ
BU251
BU251
BU251
–40°C to 85°C
TSSOP – PW
Tape and reel
Tape and reel
SN74CB3Q3251PWR
TVSOP – DGV
SN74CB3Q3251DGVR
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
FUNCTION TABLE
INPUTS
INPUT/OUTPUT
A
FUNCTION
OE
L
S2
L
S1
L
S0
L
B1
B2
B3
B4
B5
B6
B7
B8
Z
A port = B1 port
A port = B2 port
A port = B3 port
A port = B4 port
A port = B5 port
A port = B6 port
A port = B7 port
A port = B8 port
Disconnect
L
L
L
H
L
L
L
H
H
L
L
L
H
L
L
H
H
H
H
X
L
L
H
L
L
H
H
X
L
H
X
H
2
SN74CB3Q3251
1-OF-8 FET MULTIPLEXER/DEMULTIPLEXER
2.5-V/3.3-V LOW-VOLTAGE HIGH-BANDWIDTH BUS SWITCH
www.ti.com
SCDS173A–AUGUST 2004–REVISED MARCH 2005
LOGIC DIAGRAM (POSITIVE LOGIC)
5
4
A
B1
B2
B3
SW
3
2
SW
SW
1
B4
B5
SW
15
14
13
SW
SW
B6
B7
B8
SW
12
SW
11
10
9
S0
S1
S2
7
OE
SIMPLIFIED SCHEMATIC, EACH FET SWITCH (SW)
A
B
V
CC
Charge
Pump
(1)
EN
(1) EN is the internal enable signal applied to the switch.
3
SN74CB3Q3251
1-OF-8 FET MULTIPLEXER/DEMULTIPLEXER
2.5-V/3.3-V LOW-VOLTAGE HIGH-BANDWIDTH BUS SWITCH
www.ti.com
SCDS173A–AUGUST 2004–REVISED MARCH 2005
Absolute Maximum Ratings(1)
over operating free-air temperature range (unless otherwise noted)
MIN
–0.5
–0.5
–0.5
MAX
4.6
UNIT
VCC
VIN
VI/O
IIK
Supply voltage range
V
Control input voltage range(2)(3)
Switch I/O voltage range(2)(3)(4)
Control input clamp current
I/O port clamp current
7
7
V
V
VIN < 0
VI/O < 0
–50
–50
±64
±100
90
mA
mA
mA
mA
II/OK
II/O
ON-state switch current(5)
Continuous current through VCC or GND
DBQ package(6)
DGV package(6)
PW package(6)
RGY package(7)
120
108
39
θJA
Package thermal impedance
Storage temperature range
°C/W
°C
Tstg
–65
150
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are with respect to ground unless otherwise specified.
(3) The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
(4) VI and VO are used to denote specific conditions for VI/O
(5) II and IO are used to denote specific conditions for II/O
.
.
(6) The package thermal impedance is calculated in accordance with JESD 51-7.
(7) The package thermal impedance is calculated in accordance with JESD 51-5.
Recommended Operating Conditions(1)
MIN
2.3
1.7
2
MAX UNIT
VCC
VIH
Supply voltage
3.6
5.5
5.5
0.7
0.8
5.5
85
V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
High-level control input voltage
V
0
VIL
Low-level control input voltage
V
0
VI/O
TA
Data input/output voltage
0
V
Operating free-air temperature
–40
°C
(1) All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
4
SN74CB3Q3251
1-OF-8 FET MULTIPLEXER/DEMULTIPLEXER
2.5-V/3.3-V LOW-VOLTAGE HIGH-BANDWIDTH BUS SWITCH
www.ti.com
SCDS173A–AUGUST 2004–REVISED MARCH 2005
Electrical Characteristics(1)
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
II = –18 mA
MIN TYP(2)
MAX UNIT
VIK
IIN
VCC = 3.6 V,
–1.8
±1
V
Control inputs VCC = 3.6 V,
VIN = 0 to 5.5 V
µA
VO = 0 to 5.5 V,
VI = 0,
Switch OFF,
VIN = VCC or GND
(3)
IOZ
Ioff
VCC = 3.6 V,
±1
1
µA
µA
mA
µA
VCC = 0,
VO = 0 to 5.5 V,
VI = 0
II/O = 0,
Switch ON or OFF,
ICC
VCC = 3.6 V,
VIN = VCC or GND
Other inputs at VCC or GND
1
4
(4)
(5)
∆ICC
ICCD
Cin
Control inputs VCC = 3.6 V,
One input at 3 V,
30
0.1
4.5
25
Per control
VCC = 3.6 V,
input
Control input switching at
50% duty cycle
mA/
MHz
A and B ports open,
0.03
2.5
Control inputs VCC = 3.3 V,
VIN = 5.5 V, 3.3 V, or 0
pF
Switch OFF,
VIN = VCC or GND,
A port
B port
VCC = 3.3 V,
VCC = 3.3 V,
VCC = 3.3 V,
VI/O = 5.5 V, 3.3 V, or 0
VI/O = 5.5 V, 3.3 V, or 0
VI/O = 5.5 V, 3.3 V, or 0
19.5
Cio(OFF)
pF
Switch OFF,
VIN = VCC or GND,
3.5
15
4.5
19
Switch ON,
VIN = VCC or GND,
Cio(ON)
pF
VI = 0,
IO = 30 mA
IO = –15 mA
IO = 30 mA
IO = –15 mA
4
4.5
3.5
4
10
11
8
VCC = 2.3 V,
TYP at VCC = 2.5 V
VI = 1.7 V,
VI = 0,
(6)
ron
Ω
VCC = 3 V
VI = 2.4 V,
10
(1) VIN and IIN refer to control inputs. VI, VO, II, and IO refer to data pins.
(2) All typical values are at VCC = 3.3 V (unless otherwise noted), TA = 25°C.
(3) For I/O ports, the parameter IOZ includes the input leakage current.
(4) This is the increase in supply current for each input that is at the specified TTL voltage level, rather than VCC or GND.
(5) This parameter specifies the dynamic power-supply current associated with the operating frequency of a single control input (see
Figure 2).
(6) Measured by the voltage drop between the A and B terminals at the indicated current through the switch. ON-state resistance is
determined by the lower of the voltages of the two (A or B) terminals.
Switching Characteristics
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 3)
VCC = 2.5 V
± 0.2 V
VCC = 3.3 V
± 0.3 V
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
MIN
MAX
MIN
MAX
(1)
fOE or fS
OE or S
A or B
B or A
A
10
0.12
6.7
20
0.18
5.9
MHz
ns
(2)
tpd
A or B
S
tpd(s)
ten
1.5
1.5
1.5
0.5
0.5
1.5
1.5
1.5
0.5
0.5
ns
S
B
6.7
5.9
ns
ns
OE
S
A or B
B
6.7
5.9
6.1
6.1
tdis
OE
A or B
6.1
6.1
(1) Maximum switching frequency for control input (VO > VCC, VI = 5 V, RL ≥ 1 MΩ, CL = 0).
(2) The propagation delay is the calculated RC time constant of the typical ON-state resistance of the switch and the specified load
capacitance, when driven by an ideal voltage source (zero output impedance).
5
SN74CB3Q3251
1-OF-8 FET MULTIPLEXER/DEMULTIPLEXER
2.5-V/3.3-V LOW-VOLTAGE HIGH-BANDWIDTH BUS SWITCH
www.ti.com
SCDS173A–AUGUST 2004–REVISED MARCH 2005
TYPICAL r
vs
on
V
I
16
14
12
V
= 3.3 V
= 25°C
= −15 mA
CC
T
A
I
O
10
8
6
4
2
0
0.5
1.5
2.5
V − V
3.5
4.5
0
1
2
3
4
5
I
Figure 1. Typical ron vs VI, VCC = 3.3 V and IO = –15 mA
TYPICAL I
vs
CC
CONTROL INPUT SWITCHING FREQUENCY
3
V
CC
= 3.3 V
S Switching
T
A
= 25°C
2.5
A and B Ports Open
2
1.5
1
OE Switching
0.5
0
10
15
20
25
0
5
OE or S Switching Frequency − MHz
Figure 2. Typical ICC vs OE or S Switching Frequency, VCC = 3.3 V
6
SN74CB3Q3251
1-OF-8 FET MULTIPLEXER/DEMULTIPLEXER
2.5-V/3.3-V LOW-VOLTAGE HIGH-BANDWIDTH BUS SWITCH
www.ti.com
SCDS173A–AUGUST 2004–REVISED MARCH 2005
PARAMETER MEASUREMENT INFORMATION
V
CC
Input Generator
V
IN
50 Ω
50 Ω
V
G1
TEST CIRCUIT
DUT
2 × V
CC
Input Generator
S1
Open
GND
R
L
V
I
V
O
50 Ω
50 Ω
V
G2
C
L
R
L
(see Note A)
S1
V
I
C
L
V
∆
R
L
V
CC
TEST
2.5 V ± 0.2 V
3.3 V ± 0.3 V
Open
Open
500 Ω
500 Ω
V
V
or GND
or GND
30 pF
50 pF
CC
t
pd(s)
CC
2.5 V ± 0.2 V
3.3 V ± 0.3 V
2 × V
2 × V
500 Ω
500 Ω
GND
GND
30 pF
50 pF
0.15 V
0.3 V
CC
t
/t
PLZ PZL
CC
2.5 V ± 0.2 V
3.3 V ± 0.3 V
GND
GND
500 Ω
500 Ω
V
V
30 pF
50 pF
0.15 V
0.3 V
CC
t
/t
PHZ PZH
CC
Output
Control
(V
V
CC
V /2
CC
V /2
CC
)
IN
0 V
t
t
PLZ
PZL
Output
Waveform 1
V
V
CC
Output
Control
(V
V
CC
V /2
CC
S1 at 2 × V
V + V
∆
OL
V /2
CC
V /2
CC
CC
)
(see Note B)
IN
OL
0 V
t
t
PZH
PHZ
t
t
PLH
PHL
Output
Waveform 2
S1 at GND
V
OH
V
V
OH
V
OH
− V
∆
V /2
CC
Output
V /2
CC
V /2
CC
0 V
(see Note B)
OL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES (t
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
)
pd(s)
NOTES: A. C includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t ≤ 2.5 ns, t ≤ 2.5 ns.
O
r
f
D. The outputs are measured one at a time, with one transition per measurement.
E.
F.
G.
t
t
t
and t
and t
and t
are the same as t
.
dis
.
PLZ
PZL
PLH
PHZ
PZH
PHL
are the same as t
en
are the same as t
. The tpd propagation delay is the calculated RC time constant of the typical ON-state resistance
pd(s)
of the switch and the specified load capacitance, when driven by an ideal voltage source (zero output impedance).
H. All parameters and waveforms are not applicable to all devices.
Figure 3. Test Circuit and Voltage Waveforms
7
PACKAGE OPTION ADDENDUM
www.ti.com
16-Aug-2012
PACKAGING INFORMATION
Status (1)
Eco Plan (2)
MSL Peak Temp (3)
Samples
Orderable Device
Package Type Package
Drawing
Pins
Package Qty
Lead/
Ball Finish
(Requires Login)
74CB3Q3251DBQRE4
74CB3Q3251DGVRE4
74CB3Q3251DGVRG4
SN74CB3Q3251DBQR
SN74CB3Q3251DBQRG4
SN74CB3Q3251DGVR
SN74CB3Q3251PW
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SSOP
TVSOP
TVSOP
SSOP
DBQ
DGV
DGV
DBQ
DBQ
DGV
PW
16
16
16
16
16
16
16
16
16
16
16
16
16
2500
2000
2000
2500
2500
2000
90
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-2-260C-1 YEAR
CU NIPDAU Level-2-260C-1 YEAR
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-2-260C-1 YEAR
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
SSOP
Green (RoHS
& no Sb/Br)
TVSOP
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
VQFN
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
SN74CB3Q3251PWE4
SN74CB3Q3251PWG4
SN74CB3Q3251PWR
SN74CB3Q3251PWRE4
SN74CB3Q3251PWRG4
SN74CB3Q3251RGYR
PW
90
Green (RoHS
& no Sb/Br)
PW
90
Green (RoHS
& no Sb/Br)
PW
2000
2000
2000
3000
Green (RoHS
& no Sb/Br)
PW
Green (RoHS
& no Sb/Br)
PW
Green (RoHS
& no Sb/Br)
RGY
Green (RoHS
& no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
16-Aug-2012
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
SN74CB3Q3251DGVR TVSOP
DGV
PW
16
16
16
2000
2000
3000
330.0
330.0
330.0
12.4
12.4
12.4
6.8
6.9
3.8
4.0
5.6
4.3
1.6
1.6
1.5
8.0
8.0
8.0
12.0
12.0
12.0
Q1
Q1
Q1
SN74CB3Q3251PWR
SN74CB3Q3251RGYR
TSSOP
VQFN
RGY
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
SN74CB3Q3251DGVR
SN74CB3Q3251PWR
SN74CB3Q3251RGYR
TVSOP
TSSOP
VQFN
DGV
PW
16
16
16
2000
2000
3000
367.0
367.0
367.0
367.0
367.0
367.0
35.0
35.0
35.0
RGY
Pack Materials-Page 2
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