SN74AVC4T245DR_技术文档

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SCES576 – JUNE 2004

D

Control Inputs V /V Levels are

D

I/Os Are 4.6-V Tolerant

Supports Partial-Power-Down Mode

Operation

IH IL

Referenced to V

Voltage

CCA

I

off

Fully Configurable Dual-Rail Design Allows

Each Port to Operate Over the Full 1.2-V to

3.6-V Power-Supply Range

D, DB, DGV, OR PW PACKAGE

(TOP VIEW)

RGY PACKAGE

(TOP VIEW)

V

CCB

1

2

3

4

5

6

7

8

16

15

14

13

CCA

1DIR

2DIR

1A1

1OE

2OE

1B1

1

16

15

14

13

12

11

10

1DIR

2DIR

1A1

1A2

2A1

2A2

2

3

4

5

6

7

1OE

2OE

1B1

1B2

2B1

2B2

1A2

12 1B2

11

10

9

2A1

2B1

2B2

GND

2A2

GND

8

9

description/ordering information

This 4-bit noninverting bus transceiver uses two separate configurable power-supply rails. The A port is

designed to track V . V accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track

CCA CCA

V

. V

accepts any supply voltage from 1.2 V to 3.6 V. This allows for universal low-voltage bidirectional

CCB CCB

translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.

The SN74AVC4T245 is designed for asynchronous communication between data buses. The device transmits

data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the

direction-control (DIR) input. The output-enable (OE) input can be used to disable the outputs so the buses are

effectively isolated.

The SN74AVC4T245 is designed so that the control pins (1DIR, 2DIR, 1OE, and 2OE) are supplied by V

.

CCA

This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,

off

preventing damaging current backflow through the device when it is powered down.

ORDERING INFORMATION

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

†

PACKAGE

T

A

QFN − RGY

Tape and reel SN74AVC4T245RGYR

Tube SN74AVC4T245D

SOIC − D

Tape and reel SN74AVC4T245DR

Tape and reel SN74AVC4T245DBR

−40°C to 85°C

SSOP − DB

Tube

SN74AVC4T245PW

TSSOP − PW

TVSOP − DGV

Tape and reel SN74AVC4T245PWR

Tape and reel SN74AVC4T245DGVR

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines

are available at www.ti.com/sc/package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

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Copyright  2004, Texas Instruments Incorporated

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1

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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SCES576 – JUNE 2004

description/ordering information (continued)

The V

state.

isolation feature ensures that if either V

input is at GND, then both ports are in the high-impedance

CC

To ensure the high-impedance state during power up or power down, OE should be tied to V

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

through a pullup

CC

FUNCTION TABLE

(each 4-bit section)

INPUTS

OPERATION

OE

L

DIR

L

B data to A bus

A data to B bus

Isolation

L

H

X

logic diagram (positive logic)

2

3

1DIR

2DIR

15

14

11

1OE

2OE

2B1

4

6

1A1

2A1

13

12

1B1

1B2

5

7

1A2

2A2

10

2B2

2

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SCES576 – JUNE 2004

†

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage range, V

and V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V

CCA

CCB

Input voltage range, V (see Note 1): I/O ports (A port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V

I

I/O ports (B port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V

Control inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V

Voltage range applied to any output in the high-impedance or power-off state, V

O

(see Note 1): (A port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V

(B port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V

Voltage range applied to any output in the high or low state, V

O

(see Notes 1 and 2): (A port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V

(B port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V

+ 0.5 V

CCA

CCB

Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA

IK

OK

I

Output clamp current, I

(V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA

O

Continuous output current, I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA

Continuous current through V

O

, V

, or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA

CCA CCB

Package thermal impedance, θ (see Note 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W

JA

(see Note 3): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82°C/W

(see Note 3): DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120°C/W

(see Note 3): PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108°C/W

(see Note 4): RGY package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39°C/W

Storage temperature range, T

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C

stg

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. The input voltage and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.

2. The output positive-voltage rating may be exceeded up to 4.6 V maximum if the output current rating is observed.

3. The package thermal impedance is calculated in accordance with JESD 51-7.

4. The package thermal impedance is calculated in accordance with JESD 51-5.

3

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ꢐꢎꢇ ꢀ

SCES576 – JUNE 2004

recommended operating conditions (see Notes 5 through 7)

V

CCI

V

CCO

MIN

1.2

MAX

3.6

UNIT

V

Supply voltage

CCA

1.2

3.6

V

CCB

1.2 V to 1.95 V

1.95 V to 2.7 V

2.7 V to 3.6 V

1.2 V to 1.95 V

1.95 V to 2.7 V

2.7 V to 3.6 V

1.2 V to 1.95 V

1.95 V to 2.7 V

2.7 V to 3.6 V

1.2 V to 1.95 V

1.95 V to 2.7 V

2.7 V to 3.6 V

V

× 0.65

1.6

CCI

High-level input

voltage

Data inputs

(see Note 8)

V

IH

V

IL

V

IH

V

IL

V

2

V

× 0.35

CCI

Low-level input

voltage

Data inputs

(see Note 8)

0.7

0.8

V

CCA

× 0.65

1.6

DIR

High-level input

voltage

(Referenced to V

)

CCA

(see Note 9)

2

V

CCA

× 0.35

0.7

DIR

Low-level input

voltage

(Referenced to V

CCA

(see Note 9)

0.8

V

Input voltage

0

3.6

V

I

Active state

3-state

V

CCO

Output voltage

O

3.6

−3

−6

−8

−9

−12

3

1.2 V

1.4 V to 1.6 V

1.65 V to 1.95 V

2.3 V to 2.7 V

3 V to 3.6 V

1.2 V

I

High-level output current

Low-level output current

mA

OH

OL

1.4 V to 1.6 V

1.65 V to 1.95 V

2.3 V to 2.7 V

3 V to 3.6 V

6

8

I

9

12

5

∆t/∆v Input transition rise or fall rate

Operating free-air temperature

NOTES: 5. V is the V associated with the data input port.

ns/V

T

A

−40

85

°C

CCI

CCO

CC

6.

V

is the V

associated with the output port.

7. All unused data inputs of the device must be held at V

or GND to ensure proper device operation. Refer to the TI application report,

CCI

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

8. For V

9. For V

values not specified in the data sheet, V

= V

x 0.7 V, V

= V

CCI

x 0.3 V.

CCI

IH(min)

CCI

IL(max)

x 0.7 V, V

= V

CCA

IL(max)

CCA

4

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SCES576 – JUNE 2004

electrical characteristics over recommended operating free-air temperature range (unless

otherwise noted) (see Notes 10 and 11)

T

A

= 25°C

−40°C to 85°C

PARAMETER

TEST CONDITIONS

UNIT

V

CCA

V

CCB

MIN

TYP

MAX

MIN

MAX

I

= −100 µA

= −3 mA

= −6 mA

1.2 V to 3.6 V

1.2 V

1.2 V to 3.6 V

1.2 V

V

CCO

−0.2 V

OH

OL

0.95

1.4 V

1.05

1.2

V

OH

V = V

IH

V

I

= −8 mA

= −9 mA

= −12 mA

= 100 µA

= 3 mA

1.65 V

2.3 V

1.65 V

2.3 V

1.75

2.3

3 V

1.2 V to 3.6 V

1.2 V

1.2 V to 3.6 V

1.2 V

0.2

0.25

= 6 mA

1.4 V

0.35

0.45

0.55

0.7

V

OL

V = V

I IL

V

= 8 mA

1.65 V

2.3 V

1.65 V

2.3 V

= 9 mA

= 12 mA

3 V

DIR

input

I

V = V

CCA

or GND

1.2 V to 3.6 V

0.025

0.25

1

µA

I

0 V

0 to 3.6 V

0 V

0.1

1

5

A or B

port

V or V = 0 to 3.6 V

µA

off

I

O

0 to 3.6 V

V

= V

or GND,

A or B

port

O

CCO

†

OE = V

IH

3.6 V

0.5

2.5

5

OZ

V = V

I

or GND

CCI

1.2 V to 3.6 V

0 V

1.2 V to 3.6 V

3.6 V

I

V = V

I

O

= 0

µA

CCA

I

CCI

3.6 V

0 V

1.2 V to 3.6 V

0 V

1.2 V to 3.6 V

3.6 V

I

V = V

or GND

I

= 0

CCB

I

CCI

O

3.6 V

0 V

ꢀ

I

V = V

1.2 V to 3.6 V

µA

CCA

CCB

I

CCI

O

Control

inputs

C

V = 3.3 V or GND

3.3 V

pF

i

I

A or B

ports

V

O

= 3.3 V or GND

pF

io

NOTES: 10. V

CCO

is the V

associated with the output port.

associated with the input port.

CC

11.

V

is the V

CCI

CC

5

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SCES576 – JUNE 2004

switching characteristics over recommended operating free-air temperature range,

= 1.2 V (see Figure 11)

V

CCA

V

= 1.2 V

CCB

TYP

V

= 1.5 V

CCB

TYP

V

= 1.8 V

CCB

TYP

V

= 2.5 V

CCB

TYP

V

= 3.3 V

CCB

TYP

FROM

(INPUT)

TO

(OUTPUT)

PARAMETER

UNIT

ns

t

PLH

PHL

PLH

PHL

PZH

PZL

PZH

PZL

PHZ

PLZ

PHZ

PLZ

A

B

A

B

A

B

ns

OE

ns

switching characteristics over recommended operating free-air temperature range,

= 1.5 V 0.1 V (see Figure 11)

V

CCA

V

= 1.5 V

0.1 V

V

= 1.8 V

0.15 V

V

= 2.5 V

0.2 V

V

= 3.3 V

0.3 V

CCB

V

= 1.2 V

CCB

FROM

(INPUT)

TO

(OUTPUT)

PARAMETER

UNIT

TYP

MIN

MAX

MIN

MAX

MIN

MAX

MIN

MAX

t

PLH

PHL

PLH

PHL

PZH

PZL

PZH

PZL

PHZ

PLZ

PHZ

PLZ

A

B

A

B

A

B

ns

B

OE

6

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SCES576 – JUNE 2004

switching characteristics over recommended operating free-air temperature range,

= 1.8 V 0.15 V (see Figure 11)

V

CCA

V

= 1.5 V

0.1 V

V

= 1.8 V

0.15 V

V

= 2.5 V

0.2 V

V

= 3.3 V

0.3 V

CCB

V

= 1.2 V

CCB

FROM

(INPUT)

TO

(OUTPUT)

PARAMETER

UNIT

TYP

MIN

MAX

MIN

MAX

MIN

MAX

MIN

MAX

t

PLH

PHL

PLH

PHL

PZH

PZL

PZH

PZL

PHZ

PLZ

PHZ

PLZ

A

B

A

B

A

B

ns

B

OE

switching characteristics over recommended operating free-air temperature range,

= 2.5 V 0.2 V (see Figure 11)

V

CCA

V

= 1.5 V

0.1 V

V

= 1.8 V

0.15 V

V

= 2.5 V

0.2 V

V

= 3.3 V

0.3 V

CCB

V

= 1.2 V

CCB

FROM

(INPUT)

TO

(OUTPUT)

PARAMETER

UNIT

TYP

MIN

MAX

MIN

MAX

MIN

MAX

MIN

MAX

t

PLH

PHL

PLH

PHL

PZH

PZL

PZH

PZL

PHZ

PLZ

PHZ

PLZ

A

B

A

B

A

B

ns

B

OE

7

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁꢂ ꢃꢄꢅꢆ ꢃ ꢇ ꢈ ꢃꢉ

ꢃꢊ ꢋꢌ ꢇ ꢍ ꢎꢄ ꢏ ꢊꢀ ꢎꢐ ꢐꢏꢑ ꢋꢎ ꢀ ꢇꢒ ꢄꢁ ꢀꢆ ꢓꢌ ꢅ ꢓ ꢒ

ꢔꢌ ꢇ ꢕ ꢆ ꢖꢁ ꢗꢌ ꢘꢎ ꢒ ꢄꢋꢏ ꢓ ꢅ ꢖꢏꢇꢄꢘ ꢓ ꢇꢒ ꢄꢁ ꢀꢏ ꢄꢇ ꢌꢖ ꢁ ꢄꢁꢍ ꢙ ꢊꢀꢇꢄꢇ ꢓ ꢖ ꢎꢇ ꢐꢎꢇ ꢀ

SCES576 – JUNE 2004

switching characteristics over recommended operating free-air temperature range,

= 3.3 V 0.3 V (see Figure 11)

V

CCA

V

= 1.5 V

0.1 V

V

= 1.8 V

0.15 V

V

= 2.5 V

0.2 V

V

= 3.3 V

0.3 V

CCB

V

= 1.2 V

CCB

FROM

(INPUT)

TO

(OUTPUT)

PARAMETER

UNIT

TYP

MIN

MAX

MIN

MAX

MIN

MAX

MIN

MAX

t

PLH

PHL

PLH

PHL

PZH

PZL

PZH

PZL

PHZ

PLZ

PHZ

PLZ

A

B

A

B

A

B

ns

B

OE

operating characteristics, T = 25°C

A

V

=

V

=

V

=

V

=

V

=

CCA

= 1.5 V

CCA

= 1.8 V

CCA

TEST

CONDITIONS

V

= 1.2 V

V

= 2.5 V

V

= 3.3 V

PARAMETER

CCB

TYP

CCB

UNIT

TYP

Outputs

Enabled

A to B

B to A

A to B

B to A

Outputs

Disabled

C

= 0,

L

†

pdA

C

f = 10 MHz,

t = t =1 ns

pF

Outputs

Enabled

r

f

Outputs

Disabled

Outputs

Enabled

Outputs

Disabled

C

= 0,

L

†

pdB

C

pF

f = 10 MHz,

t = t =1 ns

Outputs

Enabled

r

f

Outputs

Disabled

†

Power-dissipation capacitance per transceiver

8

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀꢁ ꢂꢃ ꢄꢅ ꢆꢃ ꢇꢈ ꢃꢉ

ꢃ ꢊꢋꢌ ꢇ ꢍꢎꢄ ꢏꢊꢀ ꢎꢐꢐꢏꢑ ꢋꢎꢀ ꢇ ꢒꢄꢁꢀ ꢆꢓ ꢌ ꢅꢓ ꢒ

ꢔ ꢌ ꢇꢕ ꢆꢖ ꢁꢗ ꢌ ꢘꢎ ꢒ ꢄꢋꢏ ꢓ ꢅꢖ ꢏꢇꢄꢘ ꢓ ꢇ ꢒꢄꢁꢀ ꢏꢄꢇ ꢌꢖ ꢁ ꢄꢁꢍ ꢙ ꢊꢀꢇꢄꢇ ꢓ ꢖ ꢎꢇ ꢐꢎ ꢇꢀ

SCES576 – JUNE 2004

power-up considerations

A proper power-up sequence always should be followed to avoid excessive supply current, bus contention,

oscillations, or other anomalies. To guard against such power-up problems, take the following precautions:

1. Connect ground before any supply voltage is applied.

2. Power up V

.

CCA

3. V

can be ramped up along with or after V

.

CCB

CCA

typical total static power consumption (I

+ I

)

CCB

CCA

V

CCA

V

CCB

UNIT

0 V

1.2 V

1.5 V

1.8 V

2.5 V

3.3 V

0 V

1.2 V

1.5 V

1.8 V

2.5 V

3.3 V

µA

TABLE 1

9

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁꢂ ꢃꢄꢅꢆ ꢃ ꢇ ꢈ ꢃꢉ

ꢃꢊ ꢋꢌ ꢇ ꢍ ꢎꢄ ꢏ ꢊꢀ ꢎꢐ ꢐꢏꢑ ꢋꢎ ꢀ ꢇꢒ ꢄꢁ ꢀꢆ ꢓꢌ ꢅ ꢓ ꢒ

ꢔꢌ ꢇ ꢕ ꢆ ꢖꢁ ꢗꢌ ꢘꢎ ꢒ ꢄꢋꢏ ꢓ ꢅ ꢖꢏꢇꢄꢘ ꢓ ꢇꢒ ꢄꢁ ꢀꢏ ꢄꢇ ꢌꢖ ꢁ ꢄꢁꢍ ꢙ ꢊꢀꢇꢄꢇ ꢓ ꢖ ꢎꢇ ꢐꢎꢇ ꢀ

SCES576 – JUNE 2004

TYPICAL CHARACTERISTICS

TYPICAL PROPAGATION DELAY (A to B) vs LOAD CAPACITANCE,

T = 25°C, V

= 1.2 V

A

CCA

6

5

4

3

2

1

0

6

5

4

3

2

1

0

V

= 1.2 V

V

= 1.2 V

= 1.5 V

= 1.8 V

CCB

= 1.5 V

= 1.8 V

CCB

V

CCB

V

= 2.5 V

= 3.3 V

V

= 2.5 V

= 3.3 V

CCB

0

10

20

30

40

50

60

0

10

20

30

40

50

60

C

− pF

C

− pF

L

Figure 1

Figure 2

TYPICAL PROPAGATION DELAY (A to B) vs LOAD CAPACITANCE,

T = 25°C, V

= 1.5 V

A

CCA

6

5

4

3

2

1

0

6

5

4

3

2

1

0

V

= 1.2 V

V

= 1.2 V

= 1.5 V

= 1.8 V

CCB

= 1.5 V

= 1.8 V

CCB

V

CCB

V

= 2.5 V

= 3.3 V

V

= 2.5 V

= 3.3 V

CCB

0

10

20

30

40

50

60

0

10

20

30

40

50

60

C

− pF

C

− pF

L

Figure 3

Figure 4

10

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀꢁ ꢂꢃ ꢄꢅ ꢆꢃ ꢇꢈ ꢃꢉ

ꢃ ꢊꢋꢌ ꢇ ꢍꢎꢄ ꢏꢊꢀ ꢎꢐꢐꢏꢑ ꢋꢎꢀ ꢇ ꢒꢄꢁꢀ ꢆꢓ ꢌ ꢅꢓ ꢒ

ꢔ ꢌ ꢇꢕ ꢆꢖ ꢁꢗ ꢌ ꢘꢎ ꢒ ꢄꢋꢏ ꢓ ꢅꢖ ꢏꢇꢄꢘ ꢓ ꢇ ꢒꢄꢁꢀ ꢏꢄꢇ ꢌꢖ ꢁ ꢄꢁꢍ ꢙ ꢊꢀꢇꢄꢇ ꢓ ꢖ ꢎꢇ ꢐꢎ ꢇꢀ

SCES576 – JUNE 2004

TYPICAL PROPAGATION DELAY (A to B) vs LOAD CAPACITANCE,

T = 25°C, V

= 1.8 V

A

CCA

6

5

4

3

2

1

0

6

5

4

3

2

1

0

V

= 1.2 V

V

= 1.2 V

= 1.5 V

= 1.8 V

CCB

= 1.5 V

= 1.8 V

CCB

V

CCB

V

= 2.5 V

= 3.3 V

V

= 2.5 V

= 3.3 V

CCB

0

10

20

30

40

50

60

0

10

20

30

40

50

60

C

− pF

C

− pF

L

Figure 5

Figure 6

TYPICAL PROPAGATION DELAY (A to B) vs LOAD CAPACITANCE,

T = 25°C, V

= 2.5 V

A

CCA

6

5

4

3

2

1

0

6

5

4

3

2

1

0

V

= 1.2 V

= 1.5 V

= 1.8 V

V

= 1.2 V

= 1.5 V

= 1.8 V

CCB

V

CCB

V

= 2.5 V

= 3.3 V

V

= 2.5 V

= 3.3 V

CCB

0

10

20

30

40

50

60

0

10

20

30

40

50

60

C

− pF

C

− pF

L

Figure 7

Figure 8

11

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁꢂ ꢃꢄꢅꢆ ꢃ ꢇ ꢈ ꢃꢉ

ꢃꢊ ꢋꢌ ꢇ ꢍ ꢎꢄ ꢏ ꢊꢀ ꢎꢐ ꢐꢏꢑ ꢋꢎ ꢀ ꢇꢒ ꢄꢁ ꢀꢆ ꢓꢌ ꢅ ꢓ ꢒ

ꢔꢌ ꢇ ꢕ ꢆ ꢖꢁ ꢗꢌ ꢘꢎ ꢒ ꢄꢋꢏ ꢓ ꢅ ꢖꢏꢇꢄꢘ ꢓ ꢇꢒ ꢄꢁ ꢀꢏ ꢄꢇ ꢌꢖ ꢁ ꢄꢁꢍ ꢙ ꢊꢀꢇꢄꢇ ꢓ ꢖ ꢎꢇ ꢐꢎꢇ ꢀ

SCES576 – JUNE 2004

TYPICAL PROPAGATION DELAY (A to B) vs LOAD CAPACITANCE,

T = 25°C, V

= 3.3 V

A

CCA

6

5

4

3

2

1

0

V

= 1.2 V

= 1.5 V

= 1.8 V

V

= 1.2 V

= 1.5 V

= 1.8 V

CCB

V

CCB

V

5

4

3

2

1

0

V

= 2.5 V

= 3.3 V

V

= 2.5 V

= 3.3 V

CCB

0

10

20

30

40

50

60

0

10

20

30

40

50

60

C

− pF

C

− pF

L

Figure 9

Figure 10

12

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀꢁ ꢂꢃ ꢄꢅ ꢆꢃ ꢇꢈ ꢃꢉ

ꢃ ꢊꢋꢌ ꢇ ꢍꢎꢄ ꢏꢊꢀ ꢎꢐꢐꢏꢑ ꢋꢎꢀ ꢇ ꢒꢄꢁꢀ ꢆꢓ ꢌ ꢅꢓ ꢒ

ꢔ

ꢌ

ꢇ

ꢕ

ꢆ

ꢖ

ꢁ

ꢗ

ꢌ

ꢘꢎ

ꢒ

ꢄ

ꢋ

ꢏ

ꢓ

ꢅ

ꢖ

ꢏ

ꢇ

ꢄ

ꢘ

ꢓ

ꢇ

ꢒ

ꢄ

ꢁ

ꢀ

ꢏ

ꢄ

ꢇ

ꢌ

ꢖ

ꢁ

ꢄ

ꢁ

ꢍ

ꢙ

ꢊ

ꢀ

ꢇ

ꢄ

ꢇ

ꢓ

ꢖ

ꢎ

ꢇ

ꢐ

ꢎ

ꢇ

ꢀ

SCES576 – JUNE 2004

PARAMETER MEASUREMENT INFORMATION

2 × V

CCO

TEST

S1

Open

2 × V

S1

R

Open

GND

t

L

pd

From Output

Under Test

t

/t

PLZ PZL

CCO

GND

t

/t

PHZ PZH

C

L

R

L

(see Note A)

t

LOAD CIRCUIT

w

V

CCI

V /2

CCI

V /2

CCI

Input

V

TP

C

R

V

CCO

L

0 V

1.2 V

2 kΩ

0.1 V

15 pF

VOLTAGE WAVEFORMS

PULSE DURATION

1.5 V 0.1 V

1.8 V 0.15 V

2.5 V 0.2 V

3.3 V 0.3 V

0.15 V

0.3 V

V

CCA

Output

Control

(low-level

enabling)

V

CCA

/2

V

CCA

/2

0 V

t

PLZ

PZL

V

CCO

Output

Waveform 1

V

CCI

V

CCO

/2

Input

V /2

CCI

V /2

CCI

V

OL

+ V

TP

S1 at 2 × V

CCO

OL

0 V

(see Note B)

t

PZH

PHZ

t

PHL

PLH

Output

Waveform 2

S1 at GND

V

OH

V

OH

V

OH

− V

TP

V

CCO

Output

V

CCO

/2

V

/2

CCO

(see Note B)

0 V

V

OL

VOLTAGE WAVEFORMS

PROPAGATION DELAY TIMES

VOLTAGE WAVEFORMS

ENABLE AND DISABLE TIMES

NOTES: A.

C

includes probe and jig capacitance.

L

B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.

Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.

C. All input pulses are supplied by generators having the following characteristics: PRRꢁ10 MHz, Z = 50 Ω, dv/dt ≥ 1 V/ns,

O

dv/dt ≥1 V/ns.

D. The outputs are measured one at a time, with one transition per measurement.

E.

F.

G.

H.

I.

t

V

and t

are the same as t

.

PLZ

PZL

PLH

PHZ

PZH

dis

are the same as t

are the same as t .

en

and t

PHL

is the V

pd

associated with the input port.

associated with the output port.

CC

CCI

CC

is the V

CCO

Figure 11. Load Circuit and Voltage Waveforms

13

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

MECHANICAL DATA

MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000

DGV (R-PDSO-G**)

PLASTIC SMALL-OUTLINE

24 PINS SHOWN

0,23

0,13

M

0,07

0,40

24

13

0,16 NOM

4,50

4,30

6,60

6,20

Gage Plane

0,25

0°–ā8°

0,75

1

12

0,50

A

Seating Plane

0,08

0,15

0,05

1,20 MAX

PINS **

14

16

20

24

38

48

56

DIM

A MAX

A MIN

3,70

3,50

3,70

3,50

5,10

4,90

5,10

4,90

7,90

7,70

9,80

9,60

11,40

11,20

4073251/E 08/00

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice.

C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.

D. Falls within JEDEC: 24/48 Pins – MO-153

14/16/20/56 Pins – MO-194

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

MECHANICAL DATA

MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001

DB (R-PDSO-G**)

PLASTIC SMALL-OUTLINE

28 PINS SHOWN

0,38

0,22

0,65

28

M

0,15

15

0,25

0,09

5,60

5,00

8,20

7,40

Gage Plane

1

14

0,25

A

0°–ā8°

0,95

0,55

Seating Plane

0,10

2,00 MAX

0,05 MIN

PINS **

14

16

20

24

28

30

38

DIM

6,50

5,90

6,50

5,90

7,50

8,50

7,90

10,50

9,90

10,50 12,90

A MAX

A MIN

6,90

9,90

12,30

4040065 /E 12/01

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice.

C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.

D. Falls within JEDEC MO-150

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

MECHANICAL DATA

MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999

PW (R-PDSO-G**)

PLASTIC SMALL-OUTLINE PACKAGE

14 PINS SHOWN

0,30

0,19

M

0,10

0,65

14

8

0,15 NOM

4,50

4,30

6,60

6,20

Gage Plane

0,25

1

7

0°–8°

A

0,75

0,50

Seating Plane

0,10

0,15

0,05

1,20 MAX

PINS **

8

14

16

20

24

28

DIM

3,10

2,90

5,10

4,90

5,10

4,90

6,60

6,40

7,90

9,80

9,60

A MAX

A MIN

7,70

4040064/F 01/97

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice.

C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.

D. Falls within JEDEC MO-153

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

IMPORTANT NOTICE

Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,

enhancements, improvements, and other changes to its products and services at any time and to discontinue

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TI warrants performance of its hardware products to the specifications applicable at the time of sale in

accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI

deems necessary to support this warranty. Except where mandated by government requirements, testing of all

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TI assumes no liability for applications assistance or customer product design. Customers are responsible for

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amplifier.ti.com

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DSP

dsp.ti.com

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Digital Control

Military

www.ti.com/broadband

www.ti.com/digitalcontrol

www.ti.com/military

Interface

Logic

interface.ti.com

logic.ti.com

Power Mgmt

Microcontrollers

power.ti.com

Optical Networking

Security

www.ti.com/opticalnetwork

www.ti.com/security

www.ti.com/telephony

www.ti.com/video

microcontroller.ti.com

Telephony

Video & Imaging

Wireless

www.ti.com/wireless

Mailing Address:

Texas Instruments

Post Office Box 655303 Dallas, Texas 75265


型号：	SN74AVC4T245DR
厂家：	TEXAS INSTRUMENTS
描述：	4-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS 可配置电压转换和三态输出的4位双电源总线收发器总线收发器输出元件
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