SN74ABT373PWE4 [TI]
OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS;型号: | SN74ABT373PWE4 |
厂家: | TEXAS INSTRUMENTS |
描述: | OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS 驱动 信息通信管理 光电二极管 输出元件 逻辑集成电路 |
文件: | 总21页 (文件大小:909K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
SN54ABT373, SN74ABT373
OCTAL TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCBS155D – JANUARY 1991 – REVISED MAY 1997
SN54ABT373 . . . J OR W PACKAGE
SN74ABT373 . . . DB, DW, N, OR PW PACKAGE
(TOP VIEW)
State-of-the-Art EPIC-ΙΙB BiCMOS Design
Significantly Reduces Power Dissipation
Latch-Up Performance Exceeds 500 mA Per
JEDEC Standard JESD-17
OE
1Q
V
CC
1
2
3
4
5
6
7
8
9
10
20
19
18
17
Typical V
(Output Ground Bounce) < 1 V
8Q
8D
7D
OLP
at V
= 5 V, T = 25°C
1D
2D
CC
A
High-Drive Outputs (–32-mA I , 64-mA I
OH
)
OL
2Q
3Q
16 7Q
15 6Q
Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages, Ceramic Chip Carriers (FK),
Ceramic Flat (W) Package, and Plastic (N)
and Ceramic (J) DIPs
14
13
12
11
3D
4D
4Q
GND
6D
5D
5Q
LE
description
SN54ABT373 . . . FK PACKAGE
(TOP VIEW)
The eight latches of the ’ABT373 are transparent
D-type latches. While the latch-enable (LE) input
is high, the Q outputs follow the data (D) inputs.
When LE is taken low, the Q outputs are latched
at the logic levels set up at the D inputs.
3
2
1
20 19
18
2D
2Q
3Q
3D
4D
8D
7D
7Q
6Q
4
5
6
7
8
17
16
15
A buffered output-enable (OE) input can be used
to place the eight outputs in either a normal logic
state (high or low logic levels) or
a
14 6D
9 10 11 12 13
high-impedance state. In the high-impedance
state, the outputs neither load nor drive the bus
lines significantly. The high-impedance state and
increased drive provide the capability to drive bus
lines without need for interface or pullup
components.
OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered
while the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup
CC
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN54ABT373 is characterized for operation over the full military temperature range of –55°C to 125°C. The
SN74ABT373 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
(each latch)
INPUTS
OUTPUT
Q
OE
L
LE
H
H
L
D
H
L
H
L
L
L
X
X
Q
0
H
X
Z
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.
Copyright 1997, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ABT373, SN74ABT373
OCTAL TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCBS155D – JANUARY 1991 – REVISED MAY 1997
†
logic symbol
1
EN
C1
OE
LE
11
3
2
5
1D
2D
3D
4D
5D
6D
1D
1Q
2Q
3Q
4Q
5Q
6Q
4
7
6
8
9
13
14
12
15
17
18
16
19
7D
8D
7Q
8Q
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
1
OE
11
LE
C1
1D
2
1Q
3
1D
To Seven Other Channels
‡
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
I
Voltage range applied to any output in the high or power-off state, V
. . . . . . . . . . . . . . . . . . . –0.5 V to 5.5 V
O
Current into any output in the low state, I : SN54ABT373 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA
O
SN74ABT373 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –18 mA
IK
OK
I
Output clamp current, I
(V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA
O
Package thermal impedance, θ (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115°C/W
JA
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with EIA/JEDEC Std JESD51, except for through-hole packages,
which use a trace length of zero.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ABT373, SN74ABT373
OCTAL TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCBS155D – JANUARY 1991 – REVISED MAY 1997
recommended operating conditions (see Note 3)
SN54ABT373 SN74ABT373
UNIT
MIN
4.5
2
MAX
MIN
4.5
2
MAX
V
V
V
V
Supply voltage
5.5
5.5
V
V
CC
High-level input voltage
Low-level input voltage
Input voltage
IH
0.8
0.8
V
IL
0
V
CC
0
V
CC
V
I
I
I
High-level output current
Low-level output current
Input transition rise or fall rate
Operating free-air temperature
–24
48
–32
64
5
mA
mA
ns/V
°C
OH
OL
∆t/∆v
Outputs enabled
5
T
–55
125
–40
85
A
NOTE 3: Unused inputs must be held high or low to prevent them from floating.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
T
= 25°C
SN54ABT373 SN74ABT373
A
PARAMETER
TEST CONDITIONS
UNIT
†
MIN TYP
MAX
MIN
MAX
MIN
MAX
V
V
V
V
= 4.5 V,
= 4.5 V,
= 5 V,
I = –18 mA
–1.2
–1.2
–1.2
V
IK
CC
CC
CC
I
I
I
I
I
I
I
= –3 mA
= –3 mA
= –24 mA
= –32 mA
= 48 mA
= 64 mA
2.5
3
2.5
3
2.5
3
OH
OH
OH
OH
OL
OL
V
OH
V
2
2
V
= 4.5 V
= 4.5 V
CC
CC
2*
2
0.55
0.55
V
V
V
V
OL
0.55*
0.55
100
mV
µA
µA
µA
µA
µA
mA
µA
mA
µA
hys
I
I
I
I
I
I
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 0,
V = V or GND
I CC
±1
±1
±1
I
‡
10
‡
10
‡
10
V
V
= 2.7 V
= 0.5 V
OZH
OZL
off
O
‡
–10
‡
–10
‡
–10
O
V or V ≤ 4.5 V
±100
50
±100
50
I
O
= 5.5 V,
= 5.5 V,
V
= 5.5 V
Outputs high
50
–180
250
30
CEX
O
O
§
V
= 2.5 V
–50
–100
1
–180
250
30
–50
–50
–180
250
30
O
Outputs high
Outputs low
V
= 5.5 V, I = 0,
O
or GND
CC
CC
I
24
CC
V = V
I
Outputs disabled
0.5
250
250
250
V
= 5.5 V, One input at 3.4 V,
CC
Other inputs at V
¶
1.5
1.5
1.5
mA
∆I
CC
or GND
CC
V = 2.5 V or 0.5 V
C
C
3
6
pF
pF
i
I
V
O
= 2.5 V or 0.5 V
o
* On products compliant to MIL-PRF-38535, this parameter does not apply.
†
‡
§
¶
All typical values are at V
= 5 V.
CC
This data sheet limit may vary among suppliers.
Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
This is the increase in supply current for each input that is at the specified TTL voltage level rather than V
or GND.
CC
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ABT373, SN74ABT373
OCTAL TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCBS155D – JANUARY 1991 – REVISED MAY 1997
timing requirements over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Figure 1)
SN54ABT373
V
T
= 5 V,
= 25°C
CC
A
UNIT
MIN
MAX
MIN
3.3
2.2
2.2
MAX
t
t
Pulse duration, LE high
Setup time, data before LE↓
Hold time, data after LE↓
3.3
2.5
2.5
2.5
ns
ns
w
High
su
Low
t
h
High or low
2.2
ns
timing requirements over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Figure 1)
SN74ABT373
V
T
= 5 V,
= 25°C
CC
A
UNIT
MIN
MAX
MIN
3.3
1.9
1.5
1
MAX
t
w
t
su
t
h
Pulse duration, LE high
3.3
1.9
1.5
1
ns
ns
ns
High
Setup time, data before LE↓
Hold time, data after LE↓
Low
High or low
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ABT373, SN74ABT373
OCTAL TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCBS155D – JANUARY 1991 – REVISED MAY 1997
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature, C = 50 pF (unless otherwise noted) (see Figure 1)
L
SN54ABT373
= 5 V,
FROM
(INPUT)
TO
(OUTPUT)
V
CC
A
PARAMETER
UNIT
T
= 25°C
TYP
3.9
MIN
MAX
MIN
1.9
2.2
2.2
3.2
1.2
2
MAX
5.4
5.7
6.1
6.7
5.5
6.2
6.4
6
t
t
t
t
t
t
t
t
1.3
2
6.8
7
PLH
PHL
PLH
PHL
PZH
PZL
PHZ
PLZ
D
Q
Q
Q
Q
ns
ns
ns
ns
4.2
4.6
1.8
2.5
1
7.7
7.7
6.2
7.2
8
LE
5.2
3.2
OE
OE
4.7
1.5
2.4
2
2.5
2
4.9
4.5
7
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature, C = 50 pF (unless otherwise noted) (see Figure 1)
L
SN74ABT373
FROM
(INPUT)
TO
(OUTPUT)
V
CC
= 5 V,
PARAMETER
UNIT
T
= 25°C
TYP
3.9
A
MIN
MAX
MIN
1.9
2.2
2.2
3.2
1.2
2.7
2.5
2
MAX
5.4
5.7
6.1
6.7
4.7
6.2
6.4
6
t
t
t
t
t
t
t
t
1.9
2.2
2.2
3.2
1.2
2.7
2.5
2
5.9
6.2
6.6
7.2
5.2
6.7
6.9
6.5
PLH
PHL
PLH
PHL
PZH
PZL
PHZ
PLZ
D
Q
Q
Q
Q
ns
ns
ns
ns
4.2
4.6
LE
5.2
3.2
OE
OE
4.7
4.9
4.5
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ABT373, SN74ABT373
OCTAL TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCBS155D – JANUARY 1991 – REVISED MAY 1997
PARAMETER MEASUREMENT INFORMATION
7 V
Open
TEST
/t
S1
S1
500 Ω
From Output
Under Test
t
Open
7 V
PLH PHL
GND
t
/t
PLZ PZL
C
= 50 pF
t
/t
Open
L
PHZ PZH
500 Ω
(see Note A)
3 V
0 V
LOAD CIRCUIT
Timing Input
Data Input
1.5 V
t
w
t
t
h
su
3 V
0 V
3 V
0 V
Input
1.5 V
1.5 V
1.5 V
1.5 V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
3 V
0 V
3 V
0 V
Output
Control
1.5 V
1.5 V
1.5 V
1.5 V
Input
t
PZL
t
t
t
PHL
PLH
PHL
t
PLZ
Output
Waveform 1
S1 at 7 V
3.5 V
V
V
OH
1.5 V
1.5 V
1.5 V
1.5 V
Output
V
V
+ 0.3 V
OL
V
OL
OL
(see Note B)
t
PHZ
t
PLH
t
PZH
Output
Waveform 2
S1 at Open
(see Note B)
V
OH
V
V
OH
– 0.3 V
OH
1.5 V
1.5 V
Output
≈ 0 V
OL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. includes probe and jig capacitance.
C
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t ≤ 2.5 ns, t ≤ 2.5 ns.
O
r
f
D. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
5962-9321801Q2A
ACTIVE
LCCC
FK
20
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
5962-
9321801Q2A
SNJ54ABT
373FK
5962-9321801QRA
5962-9321801QSA
SN74ABT373-W
ACTIVE
ACTIVE
CDIP
CFP
J
20
20
0
1
1
TBD
TBD
A42
N / A for Pkg Type
N / A for Pkg Type
Call TI
-55 to 125
-55 to 125
5962-9321801QR
A
SNJ54ABT373J
W
Call TI
Call TI
5962-9321801QS
A
SNJ54ABT373W
ACTIVE WAFERSALE
YS
7114
TBD
TBD
SN74ABT373DBLE
SN74ABT373DBR
OBSOLETE
ACTIVE
SSOP
SSOP
DB
DB
20
20
Call TI
Call TI
-40 to 85
-40 to 85
2000
2000
2000
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
AB373
SN74ABT373DBRE4
SN74ABT373DBRG4
SN74ABT373DW
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SSOP
SSOP
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
PDIP
PDIP
DB
DB
DW
DW
DW
DW
DW
DW
N
20
20
20
20
20
20
20
20
20
20
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
AB373
Green (RoHS
& no Sb/Br)
AB373
Green (RoHS
& no Sb/Br)
ABT373
SN74ABT373DWE4
SN74ABT373DWG4
SN74ABT373DWR
SN74ABT373DWRE4
SN74ABT373DWRG4
SN74ABT373N
25
Green (RoHS
& no Sb/Br)
ABT373
25
Green (RoHS
& no Sb/Br)
ABT373
2000
2000
2000
20
Green (RoHS
& no Sb/Br)
ABT373
Green (RoHS
& no Sb/Br)
ABT373
Green (RoHS
& no Sb/Br)
ABT373
Pb-Free
(RoHS)
SN74ABT373N
SN74ABT373N
SN74ABT373NE4
N
20
Pb-Free
(RoHS)
N / A for Pkg Type
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
SN74ABT373NSR
SN74ABT373NSRE4
SN74ABT373NSRG4
SN74ABT373PW
ACTIVE
SO
SO
NS
20
20
20
20
20
20
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
ABT373
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
NS
NS
2000
2000
70
Green (RoHS
& no Sb/Br)
ABT373
ABT373
AB373
AB373
AB373
SO
Green (RoHS
& no Sb/Br)
TSSOP
TSSOP
TSSOP
PW
PW
PW
Green (RoHS
& no Sb/Br)
SN74ABT373PWE4
SN74ABT373PWG4
70
Green (RoHS
& no Sb/Br)
70
Green (RoHS
& no Sb/Br)
SN74ABT373PWLE
SN74ABT373PWR
OBSOLETE
ACTIVE
TSSOP
TSSOP
PW
PW
20
20
TBD
Call TI
Call TI
-40 to 85
-40 to 85
2000
2000
2000
1
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
AB373
AB373
AB373
SN74ABT373PWRE4
SN74ABT373PWRG4
SNJ54ABT373FK
ACTIVE
ACTIVE
ACTIVE
TSSOP
TSSOP
LCCC
PW
PW
FK
20
20
20
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
POST-PLATE
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
-40 to 85
-40 to 85
-55 to 125
Green (RoHS
& no Sb/Br)
TBD
5962-
9321801Q2A
SNJ54ABT
373FK
SNJ54ABT373J
SNJ54ABT373W
ACTIVE
ACTIVE
CDIP
CFP
J
20
20
1
1
TBD
TBD
A42
N / A for Pkg Type
N / A for Pkg Type
-55 to 125
-55 to 125
5962-9321801QR
A
SNJ54ABT373J
W
Call TI
5962-9321801QS
A
SNJ54ABT373W
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN54ABT373, SN74ABT373 :
Catalog: SN74ABT373
•
Military: SN54ABT373
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Military - QML certified for Military and Defense Applications
•
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
SN74ABT373DBR
SN74ABT373DWR
SN74ABT373NSR
SN74ABT373PWR
SSOP
SOIC
SO
DB
DW
NS
20
20
20
20
2000
2000
2000
2000
330.0
330.0
330.0
330.0
16.4
24.4
24.4
16.4
8.2
10.8
8.2
7.5
13.0
13.0
7.1
2.5
2.7
2.5
1.6
12.0
12.0
12.0
8.0
16.0
24.0
24.0
16.0
Q1
Q1
Q1
Q1
TSSOP
PW
6.95
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
SN74ABT373DBR
SN74ABT373DWR
SN74ABT373NSR
SN74ABT373PWR
SSOP
SOIC
SO
DB
DW
NS
20
20
20
20
2000
2000
2000
2000
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
38.0
45.0
45.0
38.0
TSSOP
PW
Pack Materials-Page 2
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
M
0,15
15
0,25
0,09
5,60
5,00
8,20
7,40
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
0,10
2,00 MAX
0,05 MIN
PINS **
14
16
20
24
28
30
38
DIM
6,50
5,90
6,50
5,90
7,50
8,50
7,90
10,50
9,90
10,50 12,90
A MAX
A MIN
6,90
9,90
12,30
4040065 /E 12/01
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
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相关型号:
SN74ABT373PWR
Bus Driver, ABT Series, 1-Func, 8-Bit, True Output, BICMOS, PDSO20, TSSOP-20
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