SN65LBC176QP [TI]
DIFFERENTIAL BUS TRANSCEIVERS; 差分总线收发器
| 型号： | SN65LBC176QP |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | DIFFERENTIAL BUS TRANSCEIVERS |
| 文件： | 总15页 (文件大小：220K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN55LBC176, SN65LBC176, SN65LBC176Q, SN75LBC176
DIFFERENTIAL BUS TRANSCEIVERS
SLLS067F – AUGUST 1990 – REVISED JANUARY 2000
D, JG, OR P PACKAGE
(TOP VIEW)
Bidirectional Transceiver
Meet or Exceed the Requirements of ANSI
Standard RS-485 and
ISO 8482:1987(E)
R
RE
DE
D
V
B
A
1
2
3
4
8
7
6
5
CC
High-Speed Low-Power LinBiCMOS
Circuitry
GND
Designed for High-Speed Operation in Both
Serial and Parallel Applications
Low Skew
FK PACKAGE
(TOP VIEW)
Designed for Multipoint Transmission on
Long Bus Lines in Noisy Environments
Very Low Disabled Supply-Current
Requirements . . . 200 µA Maximum
3
2
1
20 19
18
NC
NC
RE
NC
DE
NC
4
5
6
7
8
Wide Positive and Negative Input/Output
Bus Voltage Ranges
B
17
16
15
14
NC
A
Driver Output Capacity . . . ±60 mA
NC
Thermal-Shutdown Protection
9 10 11 12 13
Driver Positive-and Negative-Current
Limiting
Open-Circuit Fail-Safe Receiver Design
Receiver Input Sensitivity . . . ±200 mV Max
Receiver Input Hysteresis . . . 50 mV Typ
Operate From a Single 5-V Supply
NC–No internal connection
Function Tables
Glitch-Free Power-Up and Power-Down
Protection
DRIVER
Available in Q-Temp Automotive
HighRel Automotive Applications
Configuration Control / Print Support
Qualification to Automotive Standards
INPUT
ENABLE
OUTPUTS
D
H
L
DE
H
H
A
H
L
B
L
H
Z
X
L
Z
description
RECEIVER
The
SN55LBC176,
SN65LBC176,
DIFFERENTIAL INPUTS
A–B
ENABLE
OUTPUT
SN65LBC176Q, and SN75LBC176 differential
bus transceivers are monolithic, integrated
circuits designed for bidirectional data communi-
cation on multipoint bus-transmission lines. They
are designed for balanced transmission lines and
meet ANSI Standard RS-485 and ISO
8482:1987(E).
RE
L
L
L
H
L
R
H
?
L
Z
H
V
≥ 0.2 V
ID
–0.2 V < V < 0.2 V
ID
≤ –0.2 V
X
Open
V
ID
H = high level, L = low level, ? = indeterminate,
X = irrelevant, Z = high impedance (off)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
LinBiCMOS and LinASIC are trademarks of Texas Instruments Incorporated.
Copyright 2000, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN55LBC176, SN65LBC176, SN65LBC176Q, SN75LBC176
DIFFERENTIAL BUS TRANSCEIVERS
SLLS067F – AUGUST 1990 – REVISED JANUARY 2000
description (continued)
The SN55LBC176, SN65LBC176, SN65LBC176Q, and SN75LBC176 combine a 3-state, differential line driver
and a differential input line receiver, both of which operate from a single 5-V power supply. The driver and
receiver have active-high and active-low enables, respectively, which can externally connect together to
function as a direction control. The driver differential outputs and the receiver differential inputs connect
internally to form a differential input/output (I/O) bus port that is designed to offer minimum loading to the bus
wheneverthedriverisdisabledorV =0. Thisportfeatureswidepositiveandnegativecommon-modevoltage
CC
ranges, making the device suitable for party-line applications. Very low device supply current can be achieved
by disabling the driver and the receiver. Both the driver and receiver are available as cells in the Texas
Instruments LinASIC Library.
These transceivers are suitable for ANSI Standard RS-485 and ISO 8482:1987 (E) applications to the extent
that they are specified in the operating conditions and characteristics section of this data sheet. Certain limits
contained in the ANSI Standard RS-485 and ISO 8482:1987 (E) are not met or cannot be tested over the entire
military temperature range.
The SN55LBC176 is characterized for operation from –55°C to 125°C. The SN65LBC176 is characterized for
operation from –40°C to 85°C, and the SN65LBC176Q is characterized for operation from –40°C to 125°C.
The SN75LBC176 is characterized for operation from 0°C to 70°C.
†
logic symbol
logic diagram (positive logic)
3
3
2
DE
DE
RE
EN1
EN2
4
D
2
6
7
RE
6
7
A
B
1
1
A
B
4
1
1
D
R
Bus
R
2
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN55LBC176, SN65LBC176, SN65LBC176Q, SN75LBC176
DIFFERENTIAL BUS TRANSCEIVERS
SLLS067F – AUGUST 1990 – REVISED JANUARY 2000
schematics of inputs and outputs
EQUIVALENT OF EACH INPUT
TYPICAL OF A AND B I/O PORTS
TYPICAL OF RECEIVER OUTPUT
V
CC
V
CC
V
CC
3 kΩ
100 kΩ NOM
NOM
A Port Only
A or B
Output
Input
18 kΩ
NOM
100 kΩ NOM
B Port Only
1.1 kΩ
NOM
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN55LBC176, SN65LBC176, SN65LBC176Q, SN75LBC176
DIFFERENTIAL BUS TRANSCEIVERS
SLLS067F – AUGUST 1990 – REVISED JANUARY 2000
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
CC
Voltage range at any bus terminal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –10 V to 15 V
Input voltage, V (D, DE, R, or RE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to V + 0.5 V
I
CC
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating free-air temperature range, T : SN55LBC176 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to 125°C
A
SN65LBC176 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 85°C
SN65LBC176Q . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 125°C
SN75LBC176 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range, T
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltage values, except differential I/O bus voltage, are with respect to network ground terminal.
DISSIPATION RATING TABLE
T
≤ 25°C
DERATING FACTOR
T
= 70°C
T
= 85°C
T = 110°C
A
A
A
A
PACKAGE
POWER RATING
ABOVE T = 25°C
POWER RATING POWER RATING POWER RATING
A
D
FK
JG
P
725 mW
5.8 mW/°C
11.0 mW/°C
8.4 mW/°C
8.0 mW/°C
464 mW
880 mW
672 mW
640 mW
377 mW
715 mW
546 mW
520 mW
—
1375 mW
440 mW
210 mW
—
1050 mW
1000 mW
recommended operating conditions
MIN NOM
MAX
UNIT
Supply voltage, V
CC
4.75
5
5.25
12
V
Voltage at any bus terminal (separately or common mode), V or V
V
I
IC
D, DE, and RE
–7
High-level input voltage, V
IH
2
V
V
Low-level input voltage, V
IL
Differential input voltage, V (see Note 2)
D, DE, and RE
0.8
±12
–60
–400
60
V
ID
Driver
mA
µA
High-level output current, I
OH
Receiver
Driver
Low-level output current, I
mA
OL
Receiver
8
SN55LBC176
SN65LBC176
SN65LBC176Q
SN75LBC176
–55
–40
–40
0
125
85
Operating free-air temperature, T
°C
A
125
70
NOTE 2: Differential input/output bus voltage is measured at the noninverting terminal A with respect to the inverting terminal B.
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN55LBC176, SN65LBC176, SN65LBC176Q, SN75LBC176
DIFFERENTIAL BUS TRANSCEIVERS
SLLS067F – AUGUST 1990 – REVISED JANUARY 2000
DRIVER SECTION
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
PARAMETER
Input clamp voltage
Output voltage
TEST CONDITIONS
MIN
MAX
–1.5
6
UNIT
V
V
I = –18 mA
V
V
V
IK
I
I
= 0
= 0
0
O
O
O
| V
|
|
Differential output voltage
I
1.5
6
OD1
OD2
55LBC176,
65LBC176,
65LBC176Q
1.1
1.5
1.1
1.5
R
= 54 Ω,
See Figure 1,
See Figure 2,
L
| V
Differential output voltage
V
V
See Note 3
75LBC176
5
55LCB176,
65LCB176,
65LBC176Q
V
= –7 V to 12 V,
test
See Note 3
V
OD3
Differential output voltage
75LBC176
5
Change in magnitude of differential
output voltage
∆| V
|
|
±0.2
V
V
OD
OC
†
3
V
OC
Common-mode output voltage
Change in magnitude of
R
= 54 Ω or 100 Ω,
L
See Figure 1
–1
∆| V
±0.2
V
†
common-mode output voltage
V
V
= 12 V
= –7 V
1
–0.8
Output disabled,
See Note 4
O
I
O
Output current
mA
O
I
I
High-level input current
Low-level input current
V = 2.4 V
–100
–100
–250
–150
µA
µA
IH
I
V = 0.4 V
I
IL
V
O
V
O
V
O
V
O
= –7 V
= 0
I
I
Short-circuit output current
mA
mA
OS
CC
= V
CC
= 12 V
250
55LBC176,
65LBC176Q
1.75
1.5
Receiver disabled
and driver enabled
65LBC176,
75LBC176
V = 0 or V
I
No load
,
CC
Supply current
55LBC176,
65LBC176Q
0.25
0.2
Receiver and driver
disabled
65LBC176,
75LBC176
†
∆ | V
low level.
| and ∆ | V
| are the changes in magnitude of V
OC OD
and V , respectively, that occur when the input changes from a high level to a
OC
OD
NOTES: 3. This device meets the ANSI Standard RS-485 V
requirements above 0°C only.
OD
4. This applies for both power on and off; refer to ANSI Standard RS-485 for exact conditions.
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN55LBC176, SN65LBC176, SN65LBC176Q, SN75LBC176
DIFFERENTIAL BUS TRANSCEIVERS
SLLS067F – AUGUST 1990 – REVISED JANUARY 2000
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature
SN55LBC176
SN65LBC176Q
SN65LBC176
SN75LBC176
PARAMETER
TEST CONDITIONS
UNIT
†
MIN
TYP
MAX
MIN TYP
MAX
t
t
t
t
t
t
t
Differential output delay time
8
31
8
25
ns
ns
ns
ns
ns
ns
ns
d(OD)
t(OD)
sk(p)
PZH
PZL
R
= 54 Ω,
C
= 50 pF,
L
L
Differential output transition time
12
12
0
See Figure 3
Pulse skew (| t
– t
|)
6
65
6
35
35
60
35
d(ODH) d(ODL)
Output enable time to high level
Output enable time to low level
R
R
R
R
= 110 Ω, See Figure 4
= 110 Ω, See Figure 5
= 110 Ω, See Figure 4
= 110 Ω, See Figure 5
L
L
L
L
65
Output disable time from high level
Output disable time from low level
105
105
PHZ
PLZ
†
All typical values are at V
= 5 V, T = 25°C.
A
CC
SYMBOL EQUIVALENTS
DATA SHEET PARAMETER
RS-485
V
O
V
, V
oa ob
| V
| V
|
|
V
o
OD1
OD2
V (R = 54 Ω)
t
L
V (test termination
t
measurement 2)
| V
|
OD3
∆ | V
|
|| V | – | V ||
t t
OD
OC
V
OC
| V |
os
∆ | V
|
| V – V |
os os
I
None
I , I
OS
I
O
ia ib
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN55LBC176, SN65LBC176, SN65LBC176Q, SN75LBC176
DIFFERENTIAL BUS TRANSCEIVERS
SLLS067F – AUGUST 1990 – REVISED JANUARY 2000
RECEIVER SECTION
electrical characteristics over recommended ranges of common-mode input voltage, supply
voltage, and operating free-air temperature (unless otherwise noted)
†
TYP
PARAMETER
TEST CONDITIONS
MIN
MAX
UNIT
Positive-going input threshold
voltage
V
V
V
V
= 2.7 V,
= 0.5 V,
I
= –0.4 mA
= 8 mA
0.2
V
IT+
O
O
O
Negative-going input threshold
voltage
‡
–0.2
I
V
IT–
O
Hysteresis voltage (V
(see Figure 4)
– V
)
IT–
IT+
V
V
V
50
mV
V
hys
Enable-input clamp voltage
High-level output voltage
I = –18 mA
–1.5
IK
I
V
= 200 mV,
I
I
= –400 µA,
ID
See Figure 6
OH
2.7
V
OH
V
= 200 mV,
= 8 mA,
ID
See Figure 6
OL
V
OL
Low-level output voltage
0.45
V
High-impedance-state output
current
I
I
V
= 0.4 V to 2.4 V
±20
µA
mA
OZ
O
V = 12 V
1
–0.8
Other input = 0 V,
See Note 5
I
Line input current
I
V = –7 V
I
I
I
High-level enable-input current
Low-level enable-input current
Input resistance
V
V
= 2.7 V
= 0.4 V
–100
–100
µA
µA
kΩ
IH
IH
IL
IL
r
12
I
Receiver enabled
and driver disabled
3.9
mA
V = 0 or V
I
No load
,
SN55LBC176,
SN65LBC176,
SN65LBC176Q
CC
I
Supply current
CC
0.25
0.2
Receiver and
driver disabled
mA
SN75LBC176
†
‡
All typical values are at V
= 5 V, T = 25°C.
A
CC
The algebraic convention, in which the less-positive (more-negative) limit is designated minimum, is used in this data sheet for common-mode
input voltage and threshold voltage levels only.
NOTE 5: This applies for both power on and power off. Refer to ANSI Standard RS-485 for exact conditions.
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature, C = 15 pF
L
SN55LBC176
SN65LBC176Q
SN65LBC176
SN75LBC176
PARAMETER
TEST CONDITIONS
UNIT
†
MIN
MAX
MIN TYP
MAX
Propagation delay time, low- to high-level
single-ended output
t
t
11
37
11
33
ns
ns
PLH
V
= –1.5 V to 1.5 V,
ID
Propagation delay time, high- to low-level
single-ended output
See Figure 7
11
37
11
33
PHL
t
t
t
t
t
Pulse skew (| t
– t
|)
10
35
35
35
35
3
6
35
30
35
30
ns
ns
ns
ns
ns
sk(p)
PZH
PZL
PHZ
PLZ
d(ODH) d(ODL)
Output enable time to high level
Output enable time to low level
See Figure 8
See Figure 8
Output disable time from high level
Output disable time from low level
†
All typical values are at V
= 5 V, T = 25°C.
A
CC
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN55LBC176, SN65LBC176, SN65LBC176Q, SN75LBC176
DIFFERENTIAL BUS TRANSCEIVERS
SLLS067F – AUGUST 1990 – REVISED JANUARY 2000
PARAMETER MEASUREMENT INFORMATION
375 Ω
60 Ω
R
L
L
2
V
OD3
V
OD2
R
V
OC
V
test
2
375 Ω
Figure 1. Driver V
and V
Figure 2. Driver V
OD3
OD
OC
3 V
Input
1.5 V
1.5 V
C
= 50 pF
L
0 V
(see Note B)
R
= 54 Ω
L
t
t
d(ODH)
d(ODL)
≈ 2.5 V
Generator
(see Note A)
Output
50 Ω
90%
10%
50%
50%
Output
3 V
≈ – 2.5 V
t
t(OD)
t
t(OD)
TEST CIRCUIT
VOLTAGE WAVEFORMS
Figure 3. Driver Test Circuit and Voltage Waveforms
Output
3 V
S1
Input
1.5 V 1.5 V
0 V or 3 V
0 V
0.5 V
t
PZH
R
= 110 Ω
C
= 50 pF
L
L
V
OH
(see Note B)
Generator
(see Note A)
Output
50 Ω
2.3 V
V
off
≈ 0 V
t
PHZ
TEST CIRCUIT
VOLTAGE WAVEFORMS
Figure 4. Driver Test Circuit and Voltage Waveforms
5 V
3 V
0 V
PLZ
Input
1.5 V
1.5 V
R
= 110 Ω
L
S1
Output
3 V or 0 V
t
PZL
t
C
= 50 pF
L
5 V
0.5 V
Generator
(see Note A)
(see Note B)
50 Ω
2.3 V
Output
V
OL
TEST CIRCUIT
VOLTAGE WAVEFORMS
Figure 5. Driver Test Circuit and Voltage Waveforms
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, t ≤ 6 ns, t ≤ 6 ns,
r
f
Z
C
= 50 Ω.
O
L
B.
includes probe and jig capacitance.
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN55LBC176, SN65LBC176, SN65LBC176Q, SN75LBC176
DIFFERENTIAL BUS TRANSCEIVERS
SLLS067F – AUGUST 1990 – REVISED JANUARY 2000
PARAMETER MEASUREMENT INFORMATION
V
ID
V
OH
+I
OL
–I
OH
V
OL
Figure 6. Receiver V
and V
OL
OH
3 V
0 V
Input
1.5 V
1.5 V
Output
Generator
(see Note A)
51 Ω
t
1.5 V
0 V
t
PHL
PLH
C
= 15 pF
(see Note B)
L
V
OH
Output
1.3 V
1.3 V
V
OL
VOLTAGE WAVEFORMS
TEST CIRCUIT
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, t ≤ 6 ns, t ≤ 6 ns,
r
f
Z
C
= 50 Ω.
O
L
B.
includes probe and jig capacitance.
Figure 7. Receiver Test Circuit and Voltage Waveforms
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN55LBC176, SN65LBC176, SN65LBC176Q, SN75LBC176
DIFFERENTIAL BUS TRANSCEIVERS
SLLS067F – AUGUST 1990 – REVISED JANUARY 2000
PARAMETER MEASUREMENT INFORMATION
S1
1.5 V
S2
2 kΩ
–1.5 V
5 V
C
= 15 pF
5 kΩ
L
1N916 or Equivalent
(see Note B)
Generator
(see Note A)
50 Ω
S3
TEST CIRCUIT
3 V
S1 to 1.5 V
S2 Open
3 V
S1 to –1.5 V
S2 Closed
S3 Opened
Input
Input
1.5 V
1.5 V
S3 Closed
0 V
0 V
t
PZH
t
PZL
V
OH
≈ 4.5 V
1.5 V
Output
Input
Output
Input
1.5 V
0 V
V
OL
3 V
3 V
S1 to 1.5 V
S2 Closed
S3 Closed
S1 to –1.5 V
S2 Closed
S3 Closed
1.5 V
1.5 V
0 V
0 V
t
PHZ
t
PLZ
≈ 1.3 V
V
OH
0.5 V
Output
Output
0.5 V
V
OL
≈ 1.3 V
VOLTAGE WAVEFORMS
Figure 8. Receiver Test Circuit and Voltage Waveforms
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, t ≤ 6 ns, t ≤ 6 ns,
r
f
Z
C
= 50 Ω.
O
L
B.
includes probe and jig capacitance.
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN55LBC176, SN65LBC176, SN65LBC176Q, SN75LBC176
DIFFERENTIAL BUS TRANSCEIVERS
SLLS067F – AUGUST 1990 – REVISED JANUARY 2000
MECHANICAL INFORMATION
D (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0.050 (1,27)
0.020 (0,51)
0.010 (0,25)
M
0.014 (0,35)
14
8
0.008 (0,20) NOM
0.244 (6,20)
0.228 (5,80)
0.157 (4,00)
0.150 (3,81)
Gage Plane
0.010 (0,25)
1
7
0°–8°
0.044 (1,12)
0.016 (0,40)
A
Seating Plane
0.004 (0,10)
0.010 (0,25)
0.004 (0,10)
0.069 (1,75) MAX
PINS **
8
14
16
DIM
0.197
(5,00)
0.344
(8,75)
0.394
(10,00)
A MAX
0.189
(4,80)
0.337
(8,55)
0.386
(9,80)
A MIN
4040047/D 10/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).
D. Falls within JEDEC MS-012
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN55LBC176, SN65LBC176, SN65LBC176Q, SN75LBC176
DIFFERENTIAL BUS TRANSCEIVERS
SLLS067F – AUGUST 1990 – REVISED JANUARY 2000
MECHANICAL INFORMATION
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINALS SHOWN
A
B
NO. OF
18 17 16 15 14 13 12
TERMINALS
MIN
MAX
MIN
MAX
**
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
19
20
21
22
23
24
25
11
10
9
20
28
44
52
68
84
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
B SQ
A SQ
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
8
0.740
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
7
6
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
5
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
26 27 28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140/C 11/95
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold-plated.
E. Falls within JEDEC MS-004
12
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN55LBC176, SN65LBC176, SN65LBC176Q, SN75LBC176
DIFFERENTIAL BUS TRANSCEIVERS
SLLS067F – AUGUST 1990 – REVISED JANUARY 2000
MECHANICAL INFORMATION
CERAMIC DUAL-IN-LINE PACKAGE
JG (R-GDIP-T8)
0.400 (10,20)
0.355 (9,00)
8
5
0.280 (7,11)
0.245 (6,22)
1
4
0.065 (1,65)
0.045 (1,14)
0.310 (7,87)
0.290 (7,37)
0.020 (0,51) MIN
0.200 (5,08) MAX
0.130 (3,30) MIN
Seating Plane
0.063 (1,60)
0.015 (0,38)
0°–15°
0.023 (0,58)
0.015 (0,38)
0.100 (2,54)
0.014 (0,36)
0.008 (0,20)
4040107/C 08/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification only on press ceramic glass frit seal only.
E. Falls within MIL-STD-1835 GDIP1-T8
13
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MPDI001A – JANUARY 1995 – REVISED JUNE 1999
P (R-PDIP-T8)
MECHANICAL INFORMATION
PLASTIC DUAL-IN-LINE
0.400 (10,60)
0.355 (9,02)
8
5
0.260 (6,60)
0.240 (6,10)
1
4
0.070 (1,78) MAX
0.325 (8,26)
0.300 (7,62)
0.020 (0,51) MIN
0.015 (0,38)
Gage Plane
0.200 (5,08) MAX
Seating Plane
0.010 (0,25) NOM
0.125 (3,18) MIN
0.100 (2,54)
0.021 (0,53)
0.430 (10,92)
MAX
0.010 (0,25)
M
0.015 (0,38)
4040082/D 05/98
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001
For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm
14
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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