SN65C3222 [TI]

3-V TO 5.5-V MULTICHANNEL RS-232 COMPATIBLE LINE DRIVER/RECEIVER; 3V至5.5V多通道RS - 232兼容线路驱动器/接收器
SN65C3222
型号: SN65C3222
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

3-V TO 5.5-V MULTICHANNEL RS-232 COMPATIBLE LINE DRIVER/RECEIVER
3V至5.5V多通道RS - 232兼容线路驱动器/接收器

驱动器
文件: 总12页 (文件大小:255K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
ꢀꢁꢂ ꢃ ꢄꢅ ꢆ ꢆ ꢆ ꢇ ꢀꢁ ꢈꢃ ꢄꢅ ꢆꢆ ꢆ  
SLLS534B − MAY 2002 − REVISED OCTOBER 2004  
DB, DW, OR PW PACKAGE  
(TOP VIEW)  
D
Operates With 3-V to 5.5-V V  
Operates Up To 1 Mbit/s  
Supply  
CC  
D
D
D
D
D
Low Standby Current . . . 1 µA Typ  
External Capacitors . . . 4 × 0.1 µF  
EN  
C1+  
V+  
PWRDOWN  
1
2
3
4
5
6
7
8
9
10  
20  
19  
V
CC  
18 GND  
Accepts 5-V Logic Input With 3.3-V Supply  
17  
16  
15  
14  
13  
12  
11  
C1−  
C2+  
C2−  
V−  
DOUT1  
RIN1  
ROUT1  
NC  
DIN1  
DIN2  
NC  
RS-232 Bus-Pin ESD Protection Exceeds  
15 kV Using Human-Body Model (HBM)  
D
Applications  
− Battery-Powered Systems, PDAs,  
Notebooks, Laptops, Palmtop PCs, and  
Hand-Held Equipment  
DOUT2  
RIN2  
ROUT2  
NC − No internal connection  
description/ordering information  
The SN65C3222 and SN75C3222 consist of two line drivers, two line receivers, and a dual charge-pump circuit  
with 15-kV ESD protection pin to pin (serial-port connection pins, including GND). The devices provide the  
electrical interface between an asynchronous communication controller and the serial-port connector. The  
charge pump and four small external capacitors allow operation from a single 3-V to 5.5-V supply. The devices  
operate at data signaling rates up to 1 Mbit/s and a driver output slew rate of 24 V/µs to 150 V/µs.  
The SN65C3222 and SN75C3222 can be placed in the power-down mode by setting PWRDOWN low, which  
draws only 1 µA from the power supply. When the devices are powered down, the receivers remain active while  
the drivers are placed in the high-impedance state. Also, during power down, the onboard charge pump is  
disabled, V+ is lowered to V , and V− is raised toward GND. Receiver outputs also can be placed in the  
CC  
high-impedance state by setting EN high.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
T
A
PACKAGE  
Tube of 25  
SN75C3222DW  
SOIC (DW)  
SSOP (DB)  
75C3222  
Reel of 2000  
Reel of 2000  
Tube of 70  
SN75C3222DWR  
SN75C3222DBR  
SN75C3222PW  
SN75C3222PWR  
SN65C3222DW  
SN65C3222DWR  
SN65C3222DBR  
SN65C3222PW  
SN65C3222PWR  
CA3222  
CA3222  
−0°C to 70°C  
−40°C to 85°C  
TSSOP (PW)  
Reel of 2000  
Tube of 25  
SOIC (DW)  
SSOP (DB)  
65C3222  
CB3222  
Reel of 2000  
Reel of 2000  
Tube of 70  
TSSOP (PW)  
CB3222  
Reel of 2000  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
ꢋꢦ  
Copyright 2004, Texas Instruments Incorporated  
ꢢ ꢦ ꢣ ꢢꢛ ꢜꢯ ꢞꢝ ꢡ ꢩꢩ ꢧꢡ ꢟ ꢡ ꢠ ꢦ ꢢ ꢦ ꢟ ꢣ ꢍ  
ꢤꢦ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀ ꢁꢂ ꢃꢄ ꢅ ꢆ ꢆꢆ ꢇ ꢀꢁ ꢈ ꢃ ꢄꢅ ꢆ ꢆ ꢆ  
ꢅꢉ ꢊ ꢋꢌ ꢃ ꢍ ꢃꢉꢊ ꢎ ꢏꢐꢋꢑ ꢄ ꢒꢓ ꢁꢁꢔ ꢐ ꢕꢀ ꢉꢆ ꢅ ꢆ ꢄ ꢌꢎ ꢖꢓꢋ ꢑꢗꢐ ꢔ ꢐ ꢑꢁꢔ ꢘꢕꢑ ꢊꢔ ꢕꢙꢕꢔ ꢄꢔꢑ ꢊꢔꢕ  
SLLS534B − MAY 2002 − REVISED OCTOBER 2004  
Function Tables  
EACH DRIVER  
INPUTS  
OUTPUT  
DOUT  
DIN  
X
PWRDOWN  
L
H
H
Z
H
L
L
H
H = high level, L = low level, X = irrelevant,  
Z = high impedance  
EACH RECEIVER  
INPUTS  
OUTPUT  
ROUT  
RIN  
L
EN  
L
H
L
H
L
X
H
L
Z
H
Open  
H = high level, L = low level, X = irrelevant,  
Z = high impedance (off), Open = input  
disconnected or connected driver off  
logic diagram (positive logic)  
13  
17  
8
DIN1  
DOUT1  
DOUT2  
12  
DIN2  
20  
Powerdown  
PWRDOWN  
1
EN  
15  
16  
9
ROUT1  
RIN1  
RIN2  
10  
ROUT2  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀꢁꢂ ꢃ ꢄꢅ ꢆ ꢆ ꢆ ꢇ ꢀꢁ ꢈꢃ ꢄꢅ ꢆꢆ ꢆ  
ꢅ ꢉꢊ ꢋ ꢌ ꢃ ꢍ ꢃ ꢉꢊ ꢎꢏ ꢐꢋꢑ ꢄ ꢒꢓꢁ ꢁꢔꢐ ꢕꢀ ꢉꢆꢅ ꢆ ꢄꢌ ꢎ ꢖꢓꢋ ꢑꢗꢐ ꢔ ꢐ ꢑꢁꢔ ꢘꢕꢑ ꢊꢔ ꢕꢙꢕꢔ ꢄꢔ ꢑ ꢊ ꢔꢕ  
SLLS534B − MAY 2002 − REVISED OCTOBER 2004  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage range, V  
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 6 V  
CC  
Positive output supply voltage range, V+ (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 7 V  
Negative output supply voltage range, V− (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to −7 V  
Supply voltage difference, V+ − V− (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 V  
Input voltage range, V : Drivers, EN, PWRDOWN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 6 V  
I
Receivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −25 V to 25 V  
Output voltage range, V :Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −13.2 V to 13.2 V  
O
Receivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to V  
+ 0.3 V  
CC  
Package thermal impedance, θ (see Notes 2 and 3): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W  
JA  
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W  
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C/W  
Operating virtual junction temperature, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C  
J
Storage temperature range, T  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C  
stg  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTES: 1. All voltages are with respect to network GND.  
2. Maximum power dissipation is a function of T (max), θ , and T . The maximum allowable power dissipation at any allowable  
J
JA  
A
ambient temperature is P = (T (max) − T )/θ . Operating at the absolute maximum T of 150°C can affect reliability.  
D
J
A
JA  
J
3. The package thermal impedance is calculated in accordance with JESD 51-7.  
recommended operating conditions (see Note 4 and Figure 5)  
MIN NOM  
MAX  
3.6  
UNIT  
V
V
= 3.3 V  
= 5 V  
3
4.5  
2
3.3  
5
CC  
Supply voltage  
V
5.5  
CC  
V
V
= 3.3 V  
= 5 V  
CC  
V
IH  
Driver and control high-level input voltage  
V
DIN, EN, PWRDOWN  
2.4  
CC  
V
V
V
Driver and control low-level input voltage  
Driver and control input voltage  
Receiver input voltage  
DIN, EN, PWRDOWN  
DIN, EN, PWRDOWN  
0.8  
5.5  
25  
85  
70  
V
V
V
IL  
0
−25  
−40  
0
I
I
SN65C3222  
SN75C3222  
T
A
Operating free-air temperature  
°C  
NOTE 4: Test conditions are C1−C4 = 0.1 µF at V  
CC  
= 3.3 V 0.3 V; C1 = 0.047 µF, C2−C4 = 0.33 µF at V = 5 V 0.5 V.  
CC  
electrical characteristics over recommended ranges of supply voltage and operating free-air  
temperature (unless otherwise noted) (see Note 4 and Figure 5)  
PARAMETER  
Input leakage current (EN, PWRDOWN)  
Supply current  
TEST CONDITIONS  
MIN TYP  
MAX  
1
UNIT  
µA  
I
I
0.01  
0.3  
1
I
No load, PWRDOWN at V  
CC  
1
mA  
µA  
CC  
Supply current (powered off)  
No load, PWRDOWN at GND  
10  
All typical values are at V  
CC  
= 3.3 V or V = 5 V, and T = 25°C.  
CC A  
NOTE 4: Test conditions are C1−C4 = 0.1 µF at V  
CC  
= 3.3 V 0.3 V; C1 = 0.047 µF, C2−C4 = 0.33 µF at V  
= 5 V 0.5 V.  
CC  
3
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SLLS534B − MAY 2002 − REVISED OCTOBER 2004  
DRIVER SECTION  
electrical characteristics over recommended ranges of supply voltage and operating free-air  
temperature (unless otherwise noted) (see Note 4 and Figure 5)  
PARAMETER  
TEST CONDITIONS  
DOUT at R = 3 kto GND, DIN = GND  
MIN TYP  
MAX  
UNIT  
V
V
V
High-level output voltage  
Low-level output voltage  
High-level input current  
Low-level input current  
5
5.4  
−5.4  
0.01  
0.01  
35  
OH  
L
DOUT at R = 3 kto GND, DIN = V  
CC  
−5  
V
OL  
L
I
IH  
V = V  
I CC  
1
1
µA  
µA  
I
IL  
V at GND  
I
V
V
V
= 3.6 V,  
V
O
V
O
V
O
V
O
V
O
= 0 V  
60  
90  
CC  
CC  
CC  
I
mA  
Short-circuit output current  
OS  
= 5.5 V,  
= 0 V  
35  
r
Output resistance  
, V+, and V− = 0 V,  
=
=
=
2 V  
300  
10M  
o
12 V,  
10 V,  
V
V
= 3 V to 3.6 V  
25  
25  
CC  
I
off  
Output leakage current  
PWRDOWN = GND  
µA  
= 4.5 V to 5.5 V  
CC  
All typical values are at V  
= 3.3 V or V = 5 V, and T = 25°C.  
CC A  
CC  
Short-circuit durations should be controlled to prevent exceeding the device absolute power-dissipation ratings, and not more than one output  
should be shorted at a time.  
NOTE 4: Test conditions are C1−C4 = 0.1 µF at V  
= 3.3 V 0.3 V; C1 = 0.047 µF, C2−C4 = 0.33 µF at V = 5 V 0.5 V.  
CC  
CC  
switching characteristics over recommended ranges of supply voltage and operating free-air  
temperature (unless otherwise noted) (see Note 4 and Figure 4)  
PARAMETER  
TEST CONDITIONS  
MIN TYP  
250  
MAX  
UNIT  
C
C
C
R
= 1000 pF  
L
L
L
L
Maximum data rate  
(see Figure 1)  
R = 3 kΩ,  
L
= 250 pF,  
V
V
= 3 V to 4.5 V  
1000  
kbit/s  
CC  
One DOUT switching  
= 1000 pF,  
= 4.5 V to 5.5 V  
1000  
CC  
= 3 kto 7 k,  
§
t
Pulse skew  
C
R
= 150 pF to 2500 pF  
300  
ns  
sk(p)  
L
See Figure 2  
Slew rate,  
transition region  
(see Figure 1)  
= 3 kto 7 k,  
= 3.3 V  
L
SR(tr)  
C
= 150 pF to 1000 pF  
18  
150  
V/µs  
L
V
CC  
§
All typical values are at V  
CC  
= 3.3 V or V = 5 V, and T = 25°C.  
CC A  
Pulse skew is defined as |t  
− t  
| of each channel of the same device.  
PLH PHL  
NOTE 4: Test conditions are C1−C4 = 0.1 µF at V  
= 3.3 V 0.3 V; C1 = 0.047 µF, C2−C4 = 0.33 µF at V = 5 V 0.5 V.  
CC  
CC  
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
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ꢅ ꢉꢊ ꢋ ꢌ ꢃ ꢍ ꢃ ꢉꢊ ꢎꢏ ꢐꢋꢑ ꢄ ꢒꢓꢁ ꢁꢔꢐ ꢕꢀ ꢉꢆꢅ ꢆ ꢄꢌ ꢎ ꢖꢓꢋ ꢑꢗꢐ ꢔ ꢐ ꢑꢁꢔ ꢘꢕꢑ ꢊꢔ ꢕꢙꢕꢔ ꢄꢔ ꢑ ꢊ ꢔꢕ  
SLLS534B − MAY 2002 − REVISED OCTOBER 2004  
RECEIVER SECTION  
electrical characteristics over recommended ranges of supply voltage and operating free-air  
temperature (unless otherwise noted) (see Note 4 and Figure 5)  
PARAMETER  
High-level output voltage  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
V
V
V
I
I
= −1 mA  
= 1.6 mA  
V
CC  
− 0.6 V  
V
CC  
− 0.1 V  
OH  
OH  
Low-level output voltage  
0.4  
2.4  
2.4  
V
OL  
OL  
V
CC  
V
CC  
V
CC  
V
CC  
= 3.3 V  
= 5 V  
1.5  
1.8  
V
IT+  
Positive-going input threshold voltage  
V
V
= 3.3 V  
= 5 V  
0.6  
0.8  
1.2  
V
V
Negative-going input threshold voltage  
IT−  
1.5  
Input hysteresis (V  
IT+  
− V  
)
0.3  
V
hys  
IT−  
I
Output leakage current  
EN = V  
CC  
0.05  
10  
7
µA  
kΩ  
off  
r
Input resistance  
V = 3 V to 25 V  
I
3
5
i
All typical values are at V  
CC  
= 3.3 V or V = 5 V, and T = 25°C.  
CC A  
NOTE 4: Test conditions are C1−C4 = 0.1 µF at V  
= 3.3 V 0.3 V; C1 = 0.047 µF, C2−C4 = 0.33 µF at V  
= 5 V 0.5 V.  
CC  
CC  
switching characteristics over recommended ranges of supply voltage and operating free-air  
temperature (unless otherwise noted) (see Note 4)  
PARAMETER  
TEST CONDITIONS  
150 pF, See Figure 3  
MIN TYP  
MAX  
UNIT  
ns  
t
t
Propagation delay time, low- to high-level output  
Propagation delay time, high- to low-level output  
C
300  
300  
PLH  
L =  
C = 150 pF, See Figure 3  
ns  
PHL  
L
C = 150 pF, R = 3 k,  
See Figure 4  
L
L
t
Output enable time  
Output disable time  
200  
ns  
en  
C = 150 pF, R = 3 k,  
L
L
t
t
200  
300  
ns  
ns  
dis  
See Figure 4  
Pulse skew  
See Figure 3  
sk(p)  
All typical values are at V  
CC  
= 3.3 V or V = 5 V, and T = 25°C.  
CC A  
Pulse skew is defined as |t  
− t  
| of each channel of the same device.  
= 3.3 V 0.3 V; C1 = 0.047 µF, C2−C4 = 0.33 µF at V  
PLH PHL  
NOTE 4: Test conditions are C1−C4 = 0.1 µF at V  
CC  
= 5 V 0.5 V.  
CC  
5
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SLLS534B − MAY 2002 − REVISED OCTOBER 2004  
PARAMETER MEASUREMENT INFORMATION  
3 V  
0 V  
Input  
1.5 V  
1.5 V  
RS-232  
Output  
Generator  
(see Note B)  
50 Ω  
C
L
t
R
t
TLH  
THL  
L
(see Note A)  
3 V  
PWRDOWN  
V
V
OH  
3 V  
−3 V  
3 V  
−3 V  
Output  
OL  
TEST CIRCUIT  
VOLTAGE WAVEFORMS  
6 V  
or t  
SR(tr) +  
t
THL  
TLH  
NOTES: A.  
C includes probe and jig capacitance.  
L
B. The pulse generator has the following characteristics: PRR = 250 kbit/s, Z = 50 , 50% duty cycle, t 10 ns, t 10 ns.  
O
r
f
Figure 1. Driver Slew Rate  
3 V  
0 V  
Input  
1.5 V  
1.5 V  
RS-232  
Output  
Generator  
(see Note B)  
50 Ω  
C
t
t
PLH  
L
PHL  
R
L
(see Note A)  
V
V
OH  
3 V  
PWRDOWN  
50%  
50%  
Output  
OL  
TEST CIRCUIT  
C includes probe and jig capacitance.  
L
VOLTAGE WAVEFORMS  
NOTES: A.  
B. The pulse generator has the following characteristics: PRR = 250 kbit/s, Z = 50 , 50% duty cycle, t 10 ns, t 10 ns.  
O
r
f
Figure 2. Driver Pulse Skew  
EN  
0 V  
3 V  
Input  
1.5 V  
1.5 V  
−3 V  
Output  
Generator  
(see Note B)  
50 Ω  
t
t
PLH  
PHL  
C
L
(see Note A)  
V
V
OH  
50%  
50%  
Output  
OL  
TEST CIRCUIT  
VOLTAGE WAVEFORMS  
NOTES: A.  
C
includes probe and jig capacitance.  
L
B. The pulse generator has the following characteristics: Z = 50 , 50% duty cycle, t 10 ns, t 10 ns.  
O
r
f
Figure 3. Receiver Propagation-Delay Times  
6
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀꢁꢂ ꢃ ꢄꢅ ꢆ ꢆ ꢆ ꢇ ꢀꢁ ꢈꢃ ꢄꢅ ꢆꢆ ꢆ  
ꢉꢊ ꢋ ꢌ ꢃ ꢍ ꢃ ꢉꢊ ꢎꢏ ꢐꢋꢑ ꢄ ꢒꢓꢁ ꢁꢔꢐ ꢕꢀ ꢉꢆꢅ ꢆ ꢄꢌ ꢎ ꢖꢓꢋ ꢑꢗꢐ ꢔ ꢐ ꢑꢁꢔ ꢘꢕꢑ ꢊꢔ ꢕꢙꢕꢔ ꢄꢔ ꢑ ꢊ ꢔꢕ  
SLLS534B − MAY 2002 − REVISED OCTOBER 2004  
PARAMETER MEASUREMENT INFORMATION  
3 V  
V
CC  
S1  
GND  
Input  
1.5 V  
1.5 V  
−3 V  
R
L
t
t
PZH  
PHZ  
S1 at GND)  
(S1 at GND)  
V
3 V or 0 V  
Output  
OH  
C
L
Output  
50%  
(see Note A)  
EN  
0.3 V  
0.3 V  
t
PLZ  
(S1 at V  
Generator  
(see Note B)  
)
CC  
50 Ω  
Output  
50%  
V
OL  
t
PZL  
(S1 at V  
)
CC  
TEST CIRCUIT  
VOLTAGE WAVEFORMS  
NOTES: A.  
C includes probe and jig capacitance.  
L
B. The pulse generator has the following characteristics: Z = 50 , 50% duty cycle, t 10 ns, t 10 ns.  
O
r
f
Figure 4. Receiver Enable and Disable Times  
7
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀ ꢁꢂ ꢃꢄ ꢅ ꢆ ꢆꢆ ꢇ ꢀꢁ ꢈ ꢃ ꢄꢅ ꢆ ꢆ ꢆ  
ꢅꢉ ꢊ ꢋꢌ ꢃ ꢍ ꢃꢉꢊ ꢎ ꢏꢐꢋꢑ ꢄ ꢒꢓ ꢁꢁꢔ ꢐ ꢕꢀ ꢉꢆ ꢅ ꢆ ꢄ ꢌꢎ ꢖꢓꢋ ꢑꢗꢐ ꢔ ꢐ ꢑꢁꢔ ꢘꢕꢑ ꢊꢔ ꢕꢙꢕꢔ ꢄꢔꢑ ꢊꢔꢕ  
SLLS534B − MAY 2002 − REVISED OCTOBER 2004  
APPLICATION INFORMATION  
1
20  
EN  
Powerdown  
PWRDOWN  
2
19  
18  
17  
V
C1+  
V+  
CC  
+
C
= 0.1 µF  
BYPASS  
+
3
4
GND  
C1  
+
C3  
DOUT1  
RIN1  
C1−  
C2+  
C2−  
V−  
16  
15  
14  
13  
12  
11  
5
+
C2  
C4  
6
ROUT1  
NC  
7
+
8
DOUT2  
RIN2  
DIN1  
9
DIN2  
NC  
10  
ROUT2  
C3 can be connected to V  
CC  
or GND.  
NOTES: A. Resistor values shown are nominal.  
B. NC − No internal connection  
V
CC  
vs CAPACITOR VALUES  
V
C1  
C2, C3, and C4  
0.1 µF  
CC  
0.1 µF  
0.047 µF  
0.1 µF  
3.3 V " 0.3 V  
5 V " 0.5 V  
3 V to 5.5 V  
0.33 µF  
0.47 µF  
Figure 5. Typical Operating Circuit and Capacitor Values  
8
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
MECHANICAL DATA  
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001  
DB (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE  
28 PINS SHOWN  
0,38  
0,22  
0,65  
28  
M
0,15  
15  
0,25  
0,09  
5,60  
5,00  
8,20  
7,40  
Gage Plane  
1
14  
0,25  
A
0°ā8°  
0,95  
0,55  
Seating Plane  
0,10  
2,00 MAX  
0,05 MIN  
PINS **  
14  
16  
20  
24  
28  
30  
38  
DIM  
6,50  
5,90  
6,50  
5,90  
7,50  
8,50  
7,90  
10,50  
9,90  
10,50 12,90  
A MAX  
A MIN  
6,90  
9,90  
12,30  
4040065 /E 12/01  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.  
D. Falls within JEDEC MO-150  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
MECHANICAL DATA  
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999  
PW (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE PACKAGE  
14 PINS SHOWN  
0,30  
0,19  
M
0,10  
0,65  
14  
8
0,15 NOM  
4,50  
4,30  
6,60  
6,20  
Gage Plane  
0,25  
1
7
0°8°  
A
0,75  
0,50  
Seating Plane  
0,10  
0,15  
0,05  
1,20 MAX  
PINS **  
8
14  
16  
20  
24  
28  
DIM  
3,10  
2,90  
5,10  
4,90  
5,10  
4,90  
6,60  
6,40  
7,90  
9,80  
9,60  
A MAX  
A MIN  
7,70  
4040064/F 01/97  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.  
D. Falls within JEDEC MO-153  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
IMPORTANT NOTICE  
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,  
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any product or service without notice. Customers should obtain the latest relevant information before placing  
orders and should verify that such information is current and complete. All products are sold subject to TI’s terms  
and conditions of sale supplied at the time of order acknowledgment.  
TI warrants performance of its hardware products to the specifications applicable at the time of sale in  
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI  
deems necessary to support this warranty. Except where mandated by government requirements, testing of all  
parameters of each product is not necessarily performed.  
TI assumes no liability for applications assistance or customer product design. Customers are responsible for  
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Security  
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