SN54S240J-00 [TI]
S SERIES, DUAL 4-BIT DRIVER, INVERTED OUTPUT, CDIP20;
| 型号： | SN54S240J-00 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | S SERIES, DUAL 4-BIT DRIVER, INVERTED OUTPUT, CDIP20 驱动 CD 输出元件 逻辑集成电路 |
| 文件： | 总31页 (文件大小：1272K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244
SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244
OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS
SDLS144C − APRIL 1985 − REVISED MAY 2010
SN54LS’, SN54S’ . . . J OR W PACKAGE
D
3-State Outputs Drive Bus Lines or Buffer
Memory Address Registers
SN74LS240, SN74LS244 . . . DB, DW, N, OR NS PACKAGE
SN74LS241 . . . DW, N, OR NS PACKAGE
SN74S’ . . . DW OR N PACKAGE
D
D
PNP Inputs Reduce DC Loading
(TOP VIEW)
Hysteresis at Inputs Improves Noise
Margins
1G
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
GND
VCC
2G/2G†
1Y1
2A4
1Y2
2A3
1Y3
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
description
These octal buffers and line drivers are designed
specifically to improve both the performance and
density of three-state memory address drivers,
clock drivers, and bus-oriented receivers and
transmitters. The designer has a choice of
selected combinations of inverting and
noninverting outputs, symmetrical, active-low
output-control (G) inputs, and complementary
output-control (G and G) inputs. These devices
feature high fan-out, improved fan-in, and 400-mV
noise margin. The SN74LS’ and SN74S’ devices
can be used to drive terminated lines down to
133 Ω.
13 2A2
12 1Y4
11
2A1
†
2G for ’LS241 and ’S241 or 2G for all other drivers.
SN54LS’, SN54S’ . . . FK PACKAGE
(TOP VIEW)
3
2
1
20 19
18
1Y1
2A4
1Y2
2A3
1Y3
1A2
2Y3
1A3
2Y2
1A4
4
5
6
7
8
17
16
15
14
9 10 11 12 13
†
2G for ’LS241 and ’S241 or 2G for all other drivers.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2010, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244
SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244
OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS
SDLS144C − APRIL 1985 − REVISED MAY 2010
{
ORDERING INFORMATION
}
T
A
PACKAGE
ORDERABLE PART NUMBER
SN74LS240N
TOP-SIDE MARKING
SN74LS240N
SN74LS241N
SN74LS241N
SN74LS244N
SN74S240N
SN74S241N
SN74S244N
SN74LS244N
PDIP − N
Tube
SN74S240N
SN74S241N
SN74S244N
Tube
SN74LS240DW
SN74LS240DWR
SN74LS241DW
SN74LS241DWR
SN74LS244DW
SN74LS244DWR
SN74S240DW
LS240
LS241
LS244
S240
Tape and reel
Tube
Tape and reel
Tube
0°C to 70°C
Tape and reel
Tube
SOIC − DW
Tape and reel
Tube
SN74S240DWR
SN74S241DW
S241
Tape and reel
Tube
SN74S241DWR
SN74S244DW
S244
Tape and reel
SN74S244DWR
SN74LS240NSR
SN74LS241NSR
SN74LS244NSR
SN74LS240DBR
SN74LS244DBR
74LS240
74LS241
74LS244
LS240
SOP − NS
Tape and reel
SSOP − DB
Tape and reel
LS244
†
‡
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site
at www.ti.com.
Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244
SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244
OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS
SDLS144C − APRIL 1985 − REVISED MAY 2010
{
ORDERING INFORMATION (CONTINUED)
}
T
A
PACKAGE
ORDERABLE PART NUMBER
SN54LS240J
TOP-SIDE MARKING
SN54LS240J
SNJ54LS240J
SN54LS241J
SNJ54LS240J
SN54LS241J
SNJ54LS241J
SN54LS244J
SNJ54LS244J
SN54S240J
SNJ54LS241J
SN54LS244J
SNJ54LS244J
SN54S240J
CDIP − J
Tube
SNJ54S240J
SNJ54S240J
SN54S241J
SN54S241J
SNJ54S241J
SNJ54S241J
SN54S244J
SN54S244J
SNJ54S244J
SNJ54S244J
SNJ54LS240W
SNJ54LS241W
SNJ54LS244W
SNJ54S240W
SNJ54S241W
SNJ54S244W
SNJ54LS240FK
SNJ54LS241FK
SNJ54LS244FK
SNJ54S240FK
SNJ54S241FK
SNJ54S244FK
−55°C to 125°C
SNJ54LS240W
SNJ54LS241W
SNJ54LS244W
SNJ54S240W
SNJ54S241W
SNJ54S244W
SNJ54LS240FK
SNJ54LS241FK
SNJ54LS244FK
SNJ54S240FK
SNJ54S241FK
SNJ54S244FK
CFP − W
Tube
Tube
LCCC − FK
†
‡
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site
at www.ti.com.
Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244
SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244
OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS
SDLS144C − APRIL 1985 − REVISED MAY 2010
schematics of inputs and outputs
’S240, ’S241, ’S244
’LS240, ’LS241, ’LS244
EQUIVALENT OF EACH INPUT
EQUIVALENT OF EACH INPUT
V
CC
V
CC
Req
9 kΩ NOM
Input
Input
G and G inputs: R = 2 kΩ NOM
eq
A inputs: R = 2.8 kΩ NOM
eq
TYPICAL OF ALL OUTPUTS
V
CC
R
Output
GND
’LS240. ’LS241, ’LS244: R = 50 Ω NOM
’S240, ‘S241, S244: R = 25 Ω NOM
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244
SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244
OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS
SDLS144C − APRIL 1985 − REVISED MAY 2010
logic diagram
’LS240, ’S240
’LS241, ’S241
1
1G
1
1G
18
16
14
12
2
4
1Y1
1Y2
1A1
1A2
1A3
18
16
14
12
2
4
6
8
1Y1
1Y2
1A1
1A2
1A3
6
1Y3
1Y4
1Y3
1Y4
8
1A4
2G
1A4
2G
19
19
9
7
5
3
9
11
13
15
17
11
13
15
17
2Y1
2A1
2A2
2A3
2A4
2Y1
2Y2
2A1
2A2
2A3
2A4
7
5
3
2Y2
2Y3
2Y4
2Y3
2Y4
’LS244, ’S244
1
1G
18
2
4
6
8
1Y1
1A1
1A2
1A3
16
14
12
1Y2
1Y3
1Y4
1A4
19
2G
9
7
5
3
11
13
15
17
2Y1
2A1
2A2
2A3
2A4
2Y2
2Y3
2Y4
Pin numbers shown are for DB, DW, J, N, NS, and W packages.
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244
SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244
OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS
SDLS144C − APRIL 1985 − REVISED MAY 2010
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
CC
Input voltage, V : ’LS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
I
’S . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Off-state output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Package thermal impedance, θ (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W
JA
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. Voltage values are with respect to network ground terminal.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions
SN54LS’
MIN NOM
SN74LS’
UNIT
MAX
MIN NOM
MAX
V
V
V
Supply voltage (see Note 1)
High-level input voltage
Low-level input voltage
4.5
2
5
5.5
4.75
2
5
5.25
V
V
CC
IH
IL
0.7
−12
12
0.8
−15
24
V
I
High-level output current
Low-level output current
Operating free-air temperature
mA
mA
°C
OH
OL
I
T
A
−55
125
0
70
NOTE 1: Voltage values are with respect to network ground terminal.
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244
SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244
OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS
SDLS144C − APRIL 1985 − REVISED MAY 2010
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54LS’
SN74LS’
†
PARAMETER
UNIT
V
TEST CONDITIONS
‡
‡
MIN TYP
MAX
MIN TYP
MAX
V
IK
V
V
V
= MIN,
= MIN
= MIN,
I = −18 mA
I
−1.5
−1.5
CC
CC
CC
Hysteresis
(V − V
0.2
2.4
2
0.4
3.4
0.2
2.4
2
0.4
3.4
V
)
T−
T+
V
V
= 2 V,
= 2 V,
V
= MAX,
= 0.5 V,
IH
IL
I
= −3 mA
OH
V
OH
V
V
CC
= MIN,
= MAX
V
IH
IL
I
OH
I
I
= 12 mA
= 24 mA
0.4
0.4
0.5
OL
V
V
= MIN,
= MAX
CC
V
I
V
IH
V
IH
V
IH
= 2 V,
= 2 V,
= 2 V,
V
OL
IL
OL
V
V
= MAX,
= MAX
CC
V
= 2.7 V
= 0.4 V
20
20
µA
µA
OZH
O
O
IL
V
V
= MAX,
= MAX
CC
I
V
−20
−20
OZL
IL
I
I
I
I
V
V
V
V
= MAX,
= MAX,
= MAX,
= MAX,
V = 7 V
0.1
20
0.1
20
mA
µA
I
CC
CC
CC
CC
I
V = 2.7 V
I
IH
IL
V
IL
= 0.4 V
−0.2
−225
27
−0.2
−225
27
mA
mA
§
−40
−40
OS
Outputs high
Outputs low
All
17
26
27
29
32
17
26
27
29
32
’LS240
44
44
V
CC
= MAX,
’LS241, ’LS244
’LS240
46
46
I
mA
CC
Output open
50
50
Outputs disabled
’LS241, ’LS244
54
54
†
‡
§
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
All typical values are at V = 5 V, T = 25°C.
CC
A
Not more than one output should be shorted at a time, and duration of the short-circuit should not exceed one second.
switching characteristics, VCC = 5 V, TA = 25°C (see Figure 1)
’LS240
TYP
9
’LS241, ’LS244
PARAMETER
TEST CONDITIONS
UNIT
ns
MIN
MAX
14
MIN
TYP
12
MAX
t
t
t
t
t
t
18
18
30
23
20
25
PLH
PHL
PZL
PZH
PLZ
PHZ
R = 667 Ω,
C = 45 pF
L
L
12
18
12
20
30
20
R = 667 Ω,
ns
C = 45 pF
L
L
15
23
15
10
20
10
ns
R = 667 Ω,
C = 5 pF
L
L
15
25
15
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244
SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244
OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS
SDLS144C − APRIL 1985 − REVISED MAY 2010
recommended operating conditions
SN54S’
SN74S’
UNIT
MIN NOM
MAX
MIN NOM
MAX
V
V
V
Supply voltage (see Note 1)
High-level input voltage
Low-level input voltage
High-level output current
Low-level output current
4.5
2
5
5.5
4.75
2
5
5.25
V
V
CC
IH
IL
0.8
−12
48
0.8
−15
64
V
I
mA
mA
kΩ
°C
OH
OL
I
External resistance between any input and V or ground
40
40
CC
T
A
Operating free-air temperature (see Note 3)
−55
125
0
70
NOTES: 1. Voltage values are with respect to network ground terminal.
3. An SN54S241J operating at free-air temperature above 116°C requires a heat sink that provides a thermal resistance from case
to free air, R , of not more that 40°C/W.
CA
θ
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54S’
SN74S’
†
PARAMETER
UNIT
V
TEST CONDITIONS
‡
‡
MIN TYP
MAX
MIN TYP
MAX
V
IK
V
V
V
= MIN,
= MIN
= MIN
I = −18 mA
I
−1.2
−1.2
CC
CC
CC
Hysteresis
(V − V
0.2
0.4
3.4
0.2
2.7
2.4
2
0.4
3.4
V
)
T−
T+
V
IH
V
IH
V
IH
V
IH
V
IH
V
IH
= 2 V,
= 2 V,
= 2 V,
= 2 V,
= 2 V,
= 2 V,
V
= 0.8 V,
= 0.8 V,
= 0.5 V,
= 0.8 V,
IL
IL
IL
IL
I
= −1 mA
OH
V
CC
= MIN,
= −3 mA
V
V
V
2.4
2
V
OH
V
I
OH
V
CC
= MIN,
= MAX
I
OH
V
CC
= MIN,
= MAX
V
I
0.55
50
0.55
50
V
OL
I
OL
V
V
= MAX,
= 0.8 V
CC
V
V
= 2.4 V
= 0.5 V
µA
µA
OZH
O
IL
V
V
= MAX,
= 0.8 V
CC
I
−50
−50
OZL
O
IL
I
I
V
CC
V
CC
= MAX,
= MAX,
V = 5.5 V
1
50
1
50
mA
µA
I
I
V = 2.7 V
I
IH
Any A
Any G
−400
−2
−400
−2
µA
I
I
V
V
= MAX,
= MAX
V = 0.5 V
IL
CC
I
mA
mA
§
−50
−225
123
147
145
170
145
170
−50
−225
135
160
150
180
150
180
OS
CC
’S240
80
95
80
95
Outputs high
Outputs low
’S241,’S244
’S240
100
120
100
120
100
120
100
120
V
CC
= MAX,
I
mA
CC
Output open
’S241, ’S244
’S240
Outputs disabled
’S241, ’S244
†
‡
§
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
All typical values are at V = 5 V, T = 25°C.
CC
A
Not more than one output should be shorted at a time, and duration of the short-circuit should not exceed one second.
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244
SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244
OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS
SDLS144C − APRIL 1985 − REVISED MAY 2010
switching characteristics, VCC = 5 V, TA = 25°C (see Figure 2)
’S240
TYP
4.5
4.5
10
’S241, ’S244
PARAMETER
TEST CONDITIONS
UNIT
ns
MIN
MAX
7
MIN
TYP
6
MAX
9
t
t
t
t
t
t
PLH
PHL
PZL
PZH
PLZ
PHZ
R = 90 Ω,
C = 50 pF
L
L
7
6
9
15
10
15
9
10
8
15
12
15
9
R = 90 Ω,
ns
C = 50 pF
L
L
6.5
10
10
6
ns
R = 90 Ω,
C = 5 pF
L
L
6
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244
SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244
OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS
SDLS144C − APRIL 1985 − REVISED MAY 2010
PARAMETER MEASUREMENT INFORMATION
SERIES 54LS/74LS DEVICES
V
CC
Test
R
L
Test
Point
Point
S1
V
CC
From Output
Under Test
V
CC
(see Note B)
R
L
C
L
(see Note A)
From Output
Under Test
5 kΩ
R
L
(see Note B)
From Output
Under Test
C
Test
Point
C
L
(see Note A)
L
(see Note A)
S2
LOAD CIRCUIT
LOAD CIRCUIT
LOAD CIRCUIT
FOR 2-STATE TOTEM-POLE OUTPUTS
FOR OPEN-COLLECTOR OUTPUTS
FOR 3-STATE OUTPUTS
3 V
High-Level
Timing
Input
1.3 V
1.3 V
1.3 V
1.3 V
Pulse
0 V
t
h
t
w
t
su
3 V
0 V
Low-Level
Pulse
Data
Input
1.3 V
1.3 V
1.3 V
VOLTAGE WAVEFORMS
PULSE DURATIONS
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
Output
3 V
0 V
Control
(low-level
enabling)
1.3 V
1.3 V
3 V
0 V
Input
1.3 V
1.3 V
t
t
PLZ
PZL
t
t
PHL
PLH
PHL
Waveform 1
(see Notes C
and D)
≈1.5 V
In-Phase
Output
(see Note D)
1.3 V
V
V
OH
V
OL
+ 0.3 V
1.3 V
1.3 V
1.3 V
V
OL
OL
t
t
PHZ
PZH
t
t
PLH
V
OH
Waveform 2
(see Notes C
and D)
V
− 0.3 V
OH
Out-of-Phase
Output
(see Note D)
V
V
OH
1.3 V
1.3 V
≈1.5 V
OL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
NOTES: A. C includes probe and jig capacitance.
L
B. All diodes are 1N3064 or equivalent.
C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
D. S1 and S2 are closed for t
, t
, t
, and t ; S1 is open and S2 is closed for t
; S1 is closed and S2 is open for t
.
PLH PHL PHZ
PLZ
PZH
PZL
E. Phase relationships between inputs and outputs have been chosen arbitrarily for these examples.
F. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, Z ≈ 50 Ω, t ≤ 15 ns, t ≤ 6 ns.
O
r
f
G. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuits and Voltage Waveforms
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244
SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244
OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS
SDLS144C − APRIL 1985 − REVISED MAY 2010
PARAMETER MEASUREMENT INFORMATION
SERIES 54S/74S DEVICES
V
CC
Test
R
L
Test
Point
Point
S1
V
CC
From Output
Under Test
V
CC
(see Note B)
R
L
C
L
(see Note A)
From Output
Under Test
1 kΩ
R
L
(see Note B)
From Output
Under Test
C
Test
Point
C
L
(see Note A)
L
(see Note A)
S2
LOAD CIRCUIT
LOAD CIRCUIT
LOAD CIRCUIT
FOR 2-STATE TOTEM-POLE OUTPUTS
FOR OPEN-COLLECTOR OUTPUTS
FOR 3-STATE OUTPUTS
3 V
High-Level
Timing
Input
1.5 V
1.5 V
1.5 V
1.5 V
Pulse
0 V
t
h
t
w
t
su
3 V
0 V
Low-Level
Pulse
Data
Input
1.5 V
1.5 V
1.5 V
VOLTAGE WAVEFORMS
PULSE DURATIONS
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
3 V
0 V
Output
Control
(low-level
enabling)
1.5 V
1.5 V
3 V
0 V
Input
1.5 V
1.5 V
t
t
PLZ
PZL
t
t
PHL
PLH
PHL
Waveform 1
(see Notes C
and D)
≈1.5 V
In-Phase
Output
(see Note D)
1.5 V
V
OH
V
OL
+ 0.5 V
1.5 V
1.5 V
1.5 V
V
OL
V
OL
t
t
PZH
PHZ
t
t
PLH
V
OH
Waveform 2
(see Notes C
and D)
V
OH
− 0.5 V
Out-of-Phase
Output
(see Note D)
V
V
OH
1.5 V
1.5 V
≈1.5 V
OL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
NOTES: A. C includes probe and jig capacitance.
L
B. All diodes are 1N3064 or equivalent.
C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
D. S1 and S2 are closed for t
, t
, t
, and t ; S1 is open and S2 is closed for t
; S1 is closed and S2 is open for t
.
PLH PHL PHZ
PLZ
PZH
PZL
E. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, Z ≈ 50 Ω; t and t ≤ 7 ns for Series
O
r
f
54/74 devices and t and t ≤ 2.5 ns for Series 54S/74S devices.
r
f
F. The outputs are measured one at a time with one input transition per measurement.
Figure 2. Load Circuits and Voltage Waveforms
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244
SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244
OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS
SDLS144C − APRIL 1985 − REVISED MAY 2010
APPLICATION INFORMATION
12
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
5962-7801201VRA
ACTIVE
CDIP
CFP
J
20
20
20
TBD
A42
N / A for Pkg Type
-55 to 125
5962-7801201VR
A
SNV54LS240J
5962-7801201VSA
ACTIVE
W
25
TBD
Call TI
N / A for Pkg Type
-55 to 125
5962-7801201VS
A
SNV54LS240W
7705701RA
7705701SA
78012012A
ACTIVE
ACTIVE
ACTIVE
CDIP
CFP
J
20
20
20
1
1
1
TBD
TBD
TBD
A42
Call TI
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
-55 to 125
-55 to 125
-55 to 125
7705701RA
SNJ54LS244J
W
FK
7705701SA
SNJ54LS244W
LCCC
POST-PLATE
78012012A
SNJ54LS
240FK
7801201RA
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
CDIP
CFP
J
W
FK
J
20
20
20
20
20
20
20
20
20
20
20
1
1
1
1
1
1
1
1
1
1
1
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
A42
Call TI
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
7801201RA
SNJ54LS240J
7801201SA
7801201SA
SNJ54LS240W
JM38510/32401B2A
JM38510/32401BRA
JM38510/32401BSA
JM38510/32402B2A
JM38510/32402BRA
JM38510/32402BSA
JM38510/32403B2A
JM38510/32403BRA
JM38510/32403BSA
LCCC
CDIP
CFP
POST-PLATE
A42
JM38510/
32401B2A
JM38510/
32401BRA
W
FK
J
Call TI
JM38510/
32401BSA
LCCC
CDIP
CFP
POST-PLATE
A42
JM38510/
32402B2A
JM38510/
32402BRA
W
FK
J
Call TI
JM38510/
32402BSA
LCCC
CDIP
CFP
POST-PLATE
A42
JM38510/
32403B2A
JM38510/
32403BRA
W
Call TI
JM38510/
32403BSA
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
JM38510/32403SRA
JM38510/32403SSA
M38510/32401B2A
M38510/32401BRA
M38510/32401BSA
M38510/32402B2A
M38510/32402BRA
M38510/32402BSA
M38510/32403B2A
M38510/32403BRA
M38510/32403BSA
M38510/32403SRA
M38510/32403SSA
ACTIVE
CDIP
CFP
J
20
20
20
20
20
20
20
20
20
20
20
20
20
1
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
A42
Call TI
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
JM38510/
32403SRA
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
W
FK
J
1
1
1
1
1
1
1
1
1
1
1
1
JM38510/
32403SSA
LCCC
CDIP
CFP
POST-PLATE
A42
JM38510/
32401B2A
JM38510/
32401BRA
W
FK
J
Call TI
JM38510/
32401BSA
LCCC
CDIP
CFP
POST-PLATE
A42
JM38510/
32402B2A
JM38510/
32402BRA
W
FK
J
Call TI
JM38510/
32402BSA
LCCC
CDIP
CFP
POST-PLATE
A42
JM38510/
32403B2A
JM38510/
32403BRA
W
J
Call TI
JM38510/
32403BSA
CDIP
CFP
A42
JM38510/
32403SRA
W
Call TI
JM38510/
32403SSA
SN54LS240J
SN54LS241J
SN54LS244J
SN54S240J
SN54S241J
SN54S244J
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
CDIP
CDIP
CDIP
CDIP
CDIP
CDIP
J
J
J
J
J
J
20
20
20
20
20
20
1
1
1
1
1
1
TBD
TBD
TBD
TBD
TBD
TBD
A42
A42
A42
A42
A42
A42
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
SN54LS240J
SN54LS241J
SN54LS244J
SN54S240J
SN54S241J
SN54S244J
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
0 to 70
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
SN74LS240DW
SN74LS240DWG4
SN74LS240DWR
SN74LS240DWRE4
SN74LS240DWRG4
ACTIVE
SOIC
SOIC
SOIC
SOIC
SOIC
DW
20
20
20
20
20
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
LS240
ACTIVE
ACTIVE
ACTIVE
ACTIVE
DW
DW
DW
DW
25
Green (RoHS
& no Sb/Br)
0 to 70
LS240
LS240
LS240
LS240
2000
2000
2000
Green (RoHS
& no Sb/Br)
0 to 70
Green (RoHS
& no Sb/Br)
0 to 70
Green (RoHS
& no Sb/Br)
0 to 70
SN74LS240J
SN74LS240N
OBSOLETE
ACTIVE
CDIP
PDIP
J
20
20
TBD
Call TI
Call TI
0 to 70
0 to 70
N
20
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
SN74LS240N
SN74LS240N3
SN74LS240NE4
OBSOLETE
ACTIVE
PDIP
PDIP
N
N
20
20
TBD
Call TI
Call TI
0 to 70
0 to 70
20
2000
2000
2000
25
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
SN74LS240N
74LS240
74LS240
74LS240
LS241
SN74LS240NSR
SN74LS240NSRE4
SN74LS240NSRG4
SN74LS241DW
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
OBSOLETE
SO
NS
NS
NS
DW
DW
DW
DW
DW
DW
J
20
20
20
20
20
20
20
20
20
20
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Call TI
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Call TI
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
SO
Green (RoHS
& no Sb/Br)
SO
Green (RoHS
& no Sb/Br)
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
CDIP
Green (RoHS
& no Sb/Br)
SN74LS241DWE4
SN74LS241DWG4
SN74LS241DWR
SN74LS241DWRE4
SN74LS241DWRG4
SN74LS241J
25
Green (RoHS
& no Sb/Br)
LS241
25
Green (RoHS
& no Sb/Br)
LS241
2000
2000
2000
Green (RoHS
& no Sb/Br)
LS241
Green (RoHS
& no Sb/Br)
LS241
Green (RoHS
& no Sb/Br)
LS241
TBD
Addendum-Page 3
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
SN74LS241N
ACTIVE
PDIP
N
20
20
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
0 to 70
SN74LS241N
SN74LS241N3
SN74LS241NE4
OBSOLETE
ACTIVE
PDIP
PDIP
N
N
20
20
TBD
Call TI
Call TI
0 to 70
0 to 70
20
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
SN74LS241N
74LS241
74LS241
74LS241
LS244
SN74LS241NSR
SN74LS241NSRE4
SN74LS241NSRG4
SN74LS244DBR
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SO
NS
NS
20
20
20
20
20
20
20
20
20
20
20
20
2000
2000
2000
2000
2000
2000
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
SO
Green (RoHS
& no Sb/Br)
SO
NS
Green (RoHS
& no Sb/Br)
SSOP
SSOP
SSOP
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
DB
Green (RoHS
& no Sb/Br)
SN74LS244DBRE4
SN74LS244DBRG4
SN74LS244DW
DB
Green (RoHS
& no Sb/Br)
LS244
DB
Green (RoHS
& no Sb/Br)
LS244
DW
DW
DW
DW
DW
DW
Green (RoHS
& no Sb/Br)
LS244
SN74LS244DWE4
SN74LS244DWG4
SN74LS244DWR
SN74LS244DWRE4
SN74LS244DWRG4
25
Green (RoHS
& no Sb/Br)
LS244
25
Green (RoHS
& no Sb/Br)
LS244
2000
2000
2000
Green (RoHS
& no Sb/Br)
LS244
Green (RoHS
& no Sb/Br)
LS244
Green (RoHS
& no Sb/Br)
LS244
SN74LS244J
SN74LS244N
OBSOLETE
ACTIVE
CDIP
PDIP
J
20
20
TBD
Call TI
Call TI
0 to 70
0 to 70
N
20
20
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
SN74LS244N
SN74LS244N
SN74LS244N3
SN74LS244NE4
OBSOLETE
ACTIVE
PDIP
PDIP
N
N
20
20
TBD
Call TI
Call TI
0 to 70
0 to 70
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
Addendum-Page 4
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
SN74LS244NSR
SN74LS244NSRE4
SN74LS244NSRG4
SN74S240DW
ACTIVE
SO
NS
20
20
20
20
20
20
20
20
20
20
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
74LS244
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SO
NS
NS
DW
DW
DW
DW
DW
DW
N
2000
2000
25
Green (RoHS
& no Sb/Br)
74LS244
74LS244
S240
SO
Green (RoHS
& no Sb/Br)
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
PDIP
Green (RoHS
& no Sb/Br)
SN74S240DWE4
SN74S240DWG4
SN74S240DWR
SN74S240DWRE4
SN74S240DWRG4
SN74S240N
25
Green (RoHS
& no Sb/Br)
S240
25
Green (RoHS
& no Sb/Br)
S240
2000
2000
2000
20
Green (RoHS
& no Sb/Br)
S240
Green (RoHS
& no Sb/Br)
S240
Green (RoHS
& no Sb/Br)
S240
Pb-Free
(RoHS)
SN74S240N
SN74S240N3
OBSOLETE
ACTIVE
PDIP
PDIP
N
N
20
20
TBD
Call TI
Call TI
0 to 70
0 to 70
SN74S240NE4
20
25
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
SN74S240N
S241
SN74S241DW
SN74S241DWE4
SN74S241DWG4
SN74S241DWR
SN74S241DWRE4
SN74S241DWRG4
SN74S241J
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
CDIP
DW
DW
DW
DW
DW
DW
J
20
20
20
20
20
20
20
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Call TI
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Call TI
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
25
Green (RoHS
& no Sb/Br)
S241
ACTIVE
25
Green (RoHS
& no Sb/Br)
S241
ACTIVE
2000
2000
2000
Green (RoHS
& no Sb/Br)
S241
ACTIVE
Green (RoHS
& no Sb/Br)
S241
ACTIVE
Green (RoHS
& no Sb/Br)
S241
OBSOLETE
TBD
Addendum-Page 5
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
SN74S241N
ACTIVE
PDIP
N
20
20
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
0 to 70
SN74S241N
SN74S241N3
OBSOLETE
ACTIVE
PDIP
PDIP
N
N
20
20
TBD
Call TI
Call TI
0 to 70
0 to 70
SN74S241NE4
20
25
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
SN74S241N
S244
SN74S244DW
SN74S244DWE4
SN74S244DWG4
SN74S244DWR
SN74S244DWRE4
SN74S244DWRG4
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
DW
DW
DW
DW
DW
DW
20
20
20
20
20
20
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
25
Green (RoHS
& no Sb/Br)
S244
25
Green (RoHS
& no Sb/Br)
S244
2000
2000
2000
Green (RoHS
& no Sb/Br)
S244
Green (RoHS
& no Sb/Br)
S244
Green (RoHS
& no Sb/Br)
S244
SN74S244J
SN74S244N
OBSOLETE
ACTIVE
CDIP
PDIP
J
20
20
TBD
Call TI
Call TI
0 to 70
0 to 70
N
20
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
SN74S244N
SN74S244N
SN74S244N3
OBSOLETE
ACTIVE
PDIP
PDIP
N
N
20
20
TBD
Call TI
Call TI
0 to 70
0 to 70
SN74S244NE4
20
1
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
SNJ54LS240FK
ACTIVE
LCCC
FK
20
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
78012012A
SNJ54LS
240FK
SNJ54LS240J
SNJ54LS240W
SNJ54LS241FK
ACTIVE
ACTIVE
ACTIVE
CDIP
CFP
J
20
20
20
1
1
1
TBD
TBD
TBD
A42
Call TI
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
-55 to 125
-55 to 125
-55 to 125
7801201RA
SNJ54LS240J
W
FK
7801201SA
SNJ54LS240W
LCCC
POST-PLATE
SNJ54LS
241FK
SNJ54LS241J
SNJ54LS241W
ACTIVE
ACTIVE
CDIP
CFP
J
20
20
1
1
TBD
TBD
A42
N / A for Pkg Type
N / A for Pkg Type
-55 to 125
-55 to 125
SNJ54LS241J
W
Call TI
SNJ54LS241W
Addendum-Page 6
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-55 to 125
-55 to 125
-55 to 125
-55 to 125
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
SNJ54LS244FK
SNJ54LS244J
SNJ54LS244W
SNJ54S240FK
ACTIVE
LCCC
CDIP
CFP
FK
20
20
20
20
1
TBD
TBD
TBD
TBD
POST-PLATE
A42
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
SNJ54LS
244FK
ACTIVE
ACTIVE
ACTIVE
J
1
1
1
7705701RA
SNJ54LS244J
W
FK
Call TI
7705701SA
SNJ54LS244W
LCCC
POST-PLATE
SNJ54S
240FK
SNJ54S240J
SNJ54S240W
SNJ54S241FK
ACTIVE
ACTIVE
ACTIVE
CDIP
CFP
J
20
20
20
1
1
1
TBD
TBD
TBD
A42
Call TI
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
-55 to 125
-55 to 125
-55 to 125
SNJ54S240J
W
FK
SNJ54S240W
LCCC
POST-PLATE
SNJ54S
241FK
SNJ54S241J
SNJ54S241W
SNJ54S244FK
ACTIVE
ACTIVE
ACTIVE
CDIP
CFP
J
20
20
20
1
1
1
TBD
TBD
TBD
A42
Call TI
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
-55 to 125
-55 to 125
-55 to 125
SNJ54S241J
W
FK
SNJ54S241W
LCCC
POST-PLATE
SNJ54S
244FK
SNJ54S244J
SNJ54S244W
ACTIVE
ACTIVE
CDIP
CFP
J
20
20
1
1
TBD
TBD
A42
N / A for Pkg Type
N / A for Pkg Type
-55 to 125
-55 to 125
SNJ54S244J
W
Call TI
SNJ54S244W
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Addendum-Page 7
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN54LS240, SN54LS240-SP, SN54LS241, SN54LS244, SN54LS244-SP, SN54S240, SN54S241, SN54S244, SN74LS240, SN74LS241,
SN74LS244, SN74S240, SN74S241, SN74S244 :
Catalog: SN74LS240, SN54LS240, SN74LS241, SN74LS244, SN54LS244, SN74S240, SN74S241, SN74S244
•
Military: SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244
•
Space: SN54LS240-SP, SN54LS244-SP
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Military - QML certified for Military and Defense Applications
•
Space - Radiation tolerant, ceramic packaging and qualified for use in Space-based application
•
Addendum-Page 8
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Jan-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
SN74LS240DWR
SN74LS240NSR
SN74LS241DWR
SN74LS241NSR
SN74LS244DBR
SN74LS244DWR
SN74LS244NSR
SN74S240DWR
SN74S241DWR
SN74S244DWR
SOIC
SO
DW
NS
20
20
20
20
20
20
20
20
20
20
2000
2000
2000
2000
2000
2000
2000
2000
2000
2000
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
24.4
24.4
24.4
24.4
16.4
24.4
24.4
24.4
24.4
24.4
10.8
8.2
13.0
13.0
13.0
13.0
7.5
2.7
2.5
2.7
2.5
2.5
2.7
2.5
2.7
2.7
2.7
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
24.0
24.0
24.0
24.0
16.0
24.0
24.0
24.0
24.0
24.0
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
SOIC
SO
DW
NS
10.8
8.2
SSOP
SOIC
SO
DB
8.2
DW
NS
10.8
8.2
13.0
13.0
13.0
13.0
13.0
SOIC
SOIC
SOIC
DW
DW
DW
10.8
10.8
10.8
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Jan-2013
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
SN74LS240DWR
SN74LS240NSR
SN74LS241DWR
SN74LS241NSR
SN74LS244DBR
SN74LS244DWR
SN74LS244NSR
SN74S240DWR
SN74S241DWR
SN74S244DWR
SOIC
SO
DW
NS
20
20
20
20
20
20
20
20
20
20
2000
2000
2000
2000
2000
2000
2000
2000
2000
2000
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
45.0
45.0
45.0
45.0
38.0
45.0
45.0
45.0
45.0
45.0
SOIC
SO
DW
NS
SSOP
SOIC
SO
DB
DW
NS
SOIC
SOIC
SOIC
DW
DW
DW
Pack Materials-Page 2
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
M
0,15
15
0,25
0,09
5,60
5,00
8,20
7,40
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
0,10
2,00 MAX
0,05 MIN
PINS **
14
16
20
24
28
30
38
DIM
6,50
5,90
6,50
5,90
7,50
8,50
7,90
10,50
9,90
10,50 12,90
A MAX
A MIN
6,90
9,90
12,30
4040065 /E 12/01
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
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