SN54AHCT240WR [TI]
AHCT/VHCT SERIES, DUAL 4-BIT DRIVER, INVERTED OUTPUT, CDFP20, CERAMIC, FP-20;型号: | SN54AHCT240WR |
厂家: | TEXAS INSTRUMENTS |
描述: | AHCT/VHCT SERIES, DUAL 4-BIT DRIVER, INVERTED OUTPUT, CDFP20, CERAMIC, FP-20 驱动 CD 输出元件 逻辑集成电路 |
文件: | 总21页 (文件大小:1164K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
SN54AHCT240, SN74AHCT240
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCLS252K – OCTOBER 1995 – REVISED JULY 2003
SN54AHCT240 . . . J OR W PACKAGE
SN74AHCT240 . . . DB, DGV, DW, N, NS, OR PW PACKAGE
(TOP VIEW)
Inputs Are TTL-Voltage Compatible
Latch-Up Performance Exceeds 250 mA Per
JESD 17
1OE
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
GND
V
CC
2OE
1
2
3
4
5
6
7
8
9
10
20
19
description/ordering information
18 1Y1
These octal buffers/drivers are designed
specifically to improve the performance and
density of 3-state memory-address drivers, clock
drivers, and bus-oriented receivers and
transmitters.
17
16
15
14
13
12
11
2A4
1Y2
2A3
1Y3
2A2
1Y4
2A1
The ’AHCT240 devices are organized as two 4-bit
buffers/line drivers with separate output-enable
(OE) inputs. When OE is low, the device passes
data from the A inputs to the Y outputs. When OE
is high, the outputs are in the high-impedance
state.
SN54AHCT240 . . . FK PACKAGE
(TOP VIEW)
To ensure the high-impedance state during power
up or power down, OE should be tied to V
CC
3
2
1 20 19
18
through a pullup resistor; the minimum value of
the resistor is determined by the current-sinking
capability of the driver.
1Y1
2A4
1Y2
2A3
1Y3
1A2
2Y3
1A3
2Y2
1A4
4
5
6
7
8
17
16
15
14
9 10 11 12 13
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
PDIP – N
Tube
SN74AHCT240N
SN74AHCT240N
Tube
SN74AHCT240DW
SOIC – DW
AHCT240
Tape and reel
Tape and reel
Tape and reel
Tube
SN74AHCT240DWR
SN74AHCT240NSR
SN74AHCT240DBR
SN74AHCT240PW
SN74AHCT240PWR
SN74AHCT240DGVR
SNJ54AHCT240J
SOP – NS
AHCT240
HB240
–40°C to 85°C
SSOP – DB
TSSOP – PW
HB240
Tape and reel
Tape and reel
Tube
TVSOP – DGV
CDIP – J
HB240
SNJ54AHCT240J
SNJ54AHCT240W
SNJ54AHCT240FK
–55°C to 125°C
CFP – W
Tube
SNJ54AHCT240W
SNJ54AHCT240FK
LCCC – FK
Tube
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2003, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54AHCT240, SN74AHCT240
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCLS252K – OCTOBER 1995 – REVISED JULY 2003
FUNCTION TABLE
(each 4-bit buffer/driver)
INPUTS
OUTPUT
Y
OE
A
H
L
L
L
L
H
Z
H
X
logic diagram (positive logic)
1
19
1OE
2OE
2A1
2
18
16
14
12
11
13
15
17
9
7
5
3
1A1
1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4
4
1A2
2A2
2A3
2A4
6
1A3
8
1A4
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
I
Output voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
+ 0.5 V
O
CC
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –20 mA
IK
I
Output clamp current, I
(V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
OK
O O CC
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA
Continuous current through V
Package thermal impedance, θ (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W
O
O
CC
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±75 mA
JA
DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92°C/W
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54AHCT240, SN74AHCT240
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCLS252K – OCTOBER 1995 – REVISED JULY 2003
recommended operating conditions (see Note 3)
SN54AHCT240 SN74AHCT240
UNIT
MIN
4.5
2
MAX
MIN
4.5
2
MAX
V
V
V
V
V
Supply voltage
5.5
5.5
V
V
CC
IH
IL
High-level input voltage
Low-level input voltage
Input voltage
0.8
5.5
0.8
5.5
V
0
0
0
0
V
I
Output voltage
V
CC
V
CC
V
O
I
High-level output current
Low-level output current
Operating free-air temperature
–8
–8
mA
mA
°C
OH
OL
I
8
8
T
–55
125
–40
85
A
NOTE 3: All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
T
A
= 25°C
TYP
SN54AHCT240 SN74AHCT240
PARAMETER
TEST CONDITIONS
V
UNIT
V
CC
MIN
4.4
MAX
MIN
4.4
MAX
MIN
4.4
MAX
I
I
I
I
= –50
A
4.5
OH
OH
OL
OL
V
V
4.5 V
4.5 V
OH
= –8 mA
= 50
= 8 mA
= V
3.94
3.8
3.8
A
0.1
0.36
±0.25
±0.1
4
0.1
0.44
±2.5
±1*
0.1
0.44
±2.5
±1
V
OL
I
I
I
V
or GND
5.5 V
0 V to 5.5 V
5.5 V
A
A
A
OZ
O
CC
V = 5.5 V or GND
I
I
V = V
or GND,
I = 0
O
40
40
CC
I
CC
One input at 3.4 V,
Other inputs at V
†
5.5 V
1.35
10
1.5
1.5
10
mA
∆I
CC
or GND
CC
or GND
C
C
V = V
5 V
5 V
2.5
3
pF
pF
i
I
CC
= V or GND
CC
V
o
O
* On products compliant to MIL-PRF-38535, this parameter is not production tested at V
This is the increase in supply current for each input at one of the specified TTL voltage levels, rather than 0 V or V
= 0 V.
CC
†
.
CC
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54AHCT240, SN74AHCT240
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCLS252K – OCTOBER 1995 – REVISED JULY 2003
switching characteristics over recommended operating free-air temperature range,
V
= 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
CC
T
A
= 25°C
TYP
SN54AHCT240 SN74AHCT240
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
PARAMETER
UNIT
ns
MIN
MAX
7.4*
7.4*
MIN
1*
1*
1*
1*
1*
1*
1
MAX
8.5*
8.5*
12*
12*
12*
12*
9.5
9.5
13
MIN
1
MAX
8.5
8.5
12
t
t
t
t
t
t
5.4*
PLH
PHL
PZH
PZL
PHZ
PLZ
A
Y
Y
Y
Y
Y
Y
C
C
C
C
C
= 15 pF
= 15 pF
= 15 pF
= 50 pF
= 50 pF
L
L
L
L
L
5.4*
1
7.7* 10.4*
7.7* 10.4*
8.3* 10.4*
8.3* 10.4*
1
ns
OE
OE
1
12
1
12
ns
1
12
t
t
t
t
t
t
t
5.9
5.9
8.2
8.2
8.8
8.8
8.4
8.4
1
9.5
9.5
13
PLH
PHL
PZH
PZL
PHZ
PLZ
sk(o)
A
ns
1
1
11.4
11.4
11.4
11.4
1**
1
1
ns
OE
OE
1
13
1
13
1
13
1
13
C
C
= 50 pF
= 50 pF
ns
ns
L
L
1
13
1
13
1
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
** On products compliant to MIL-PRF-38535, this parameter does not apply.
noise characteristics, V
= 5 V, C = 50 pF, T = 25°C (see Note 4)
CC
L
A
SN74AHCT240
PARAMETER
UNIT
MIN
TYP
MAX
V
V
V
Quiet output, minimum dynamic V
High-level dynamic input voltage
Low-level dynamic input voltage
4.1
V
V
V
OH(V)
IH(D)
IL(D)
OH
2
0.8
NOTE 4: Characteristics are for surface-mount packages only.
operating characteristics, V
= 5 V, T = 25°C
A
CC
PARAMETER
TEST CONDITIONS
No load, f = 1 MHz
TYP
UNIT
C
Power dissipation capacitance
10
pF
pd
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54AHCT240, SN74AHCT240
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCLS252K – OCTOBER 1995 – REVISED JULY 2003
PARAMETER MEASUREMENT INFORMATION
V
CC
Open
GND
S1
R
= 1 kΩ
L
TEST
S1
From Output
Under Test
Test
Point
From Output
Under Test
t
t
/t
Open
PLH PHL
/t
C
C
L
t
V
CC
L
PLZ PZL
/t
(see Note A)
(see Note A)
GND
PHZ PZH
Open Drain
V
CC
LOAD CIRCUIT FOR
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
3-STATE AND OPEN-DRAIN OUTPUTS
3 V
0 V
1.5 V
Timing Input
t
w
t
h
3 V
t
su
3 V
0 V
1.5 V
1.5 V
Input
Input
1.5 V
1.5 V
Data Input
0 V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
3 V
0 V
3 V
Output
Control
1.5 V
1.5 V
1.5 V
1.5 V
0 V
t
t
t
t
t
PZL
PLZ
PLH
PHL
Output
Waveform 1
V
≈V
OH
CC
In-Phase
Output
50% V
50% V
50% V
CC
50% V
CC
CC
V
S1 at V
(see Note B)
CC
V
V
+ 0.3 V
OL
V
OL
OL
t
t
t
PHL
PLH
PZH
PHZ
Output
Waveform 2
S1 at GND
V
OH
V
OH
Out-of-Phase
Output
– 0.3 V
OH
50% V
50% V
CC
CC
CC
V
≈0 V
(see Note B)
OL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. includes probe and jig capacitance.
C
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t ≤ 3 ns, t ≤ 3 ns.
O
r
f
D. The outputs are measured one at a time with one input transition per measurement.
E. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
5962-9680601Q2A
ACTIVE
LCCC
FK
20
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
5962-
9680601Q2A
SNJ54AHCT
240FK
5962-9680601QRA
5962-9680601QSA
ACTIVE
ACTIVE
CDIP
CFP
J
20
20
1
1
TBD
TBD
TBD
A42
N / A for Pkg Type
N / A for Pkg Type
-55 to 125
-55 to 125
5962-9680601QR
A
SNJ54AHCT240J
W
Call TI
5962-9680601QS
A
SNJ54AHCT240W
SN74AHCT240DBLE
SN74AHCT240DBR
OBSOLETE
ACTIVE
SSOP
SSOP
DB
DB
20
20
Call TI
Call TI
-40 to 85
-40 to 85
2000
2000
2000
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
HB240
SN74AHCT240DBRE4
SN74AHCT240DBRG4
SN74AHCT240DW
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SSOP
SSOP
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
PDIP
PDIP
SO
DB
DB
DW
DW
DW
DW
DW
DW
N
20
20
20
20
20
20
20
20
20
20
20
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
HB240
Green (RoHS
& no Sb/Br)
HB240
Green (RoHS
& no Sb/Br)
AHCT240
AHCT240
AHCT240
AHCT240
AHCT240
AHCT240
SN74AHCT240N
SN74AHCT240N
AHCT240
SN74AHCT240DWE4
SN74AHCT240DWG4
SN74AHCT240DWR
SN74AHCT240DWRE4
SN74AHCT240DWRG4
SN74AHCT240N
25
Green (RoHS
& no Sb/Br)
25
Green (RoHS
& no Sb/Br)
2000
2000
2000
20
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Pb-Free
(RoHS)
SN74AHCT240NE4
SN74AHCT240NSR
N
20
Pb-Free
(RoHS)
N / A for Pkg Type
NS
2000
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-40 to 85
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
SN74AHCT240NSRE4
SN74AHCT240NSRG4
SN74AHCT240PW
ACTIVE
SO
NS
20
20
20
20
20
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
AHCT240
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SO
NS
PW
PW
PW
2000
70
Green (RoHS
& no Sb/Br)
-40 to 85
AHCT240
HB240
TSSOP
TSSOP
TSSOP
Green (RoHS
& no Sb/Br)
-40 to 85
SN74AHCT240PWE4
SN74AHCT240PWG4
70
Green (RoHS
& no Sb/Br)
-40 to 85
HB240
70
Green (RoHS
& no Sb/Br)
-40 to 85
HB240
SN74AHCT240PWLE
SN74AHCT240PWR
OBSOLETE
ACTIVE
TSSOP
TSSOP
PW
PW
20
20
TBD
Call TI
Call TI
-40 to 85
-40 to 85
2000
2000
2000
1
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
HB240
HB240
HB240
SN74AHCT240PWRE4
SN74AHCT240PWRG4
SNJ54AHCT240FK
ACTIVE
ACTIVE
ACTIVE
TSSOP
TSSOP
LCCC
PW
PW
FK
20
20
20
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
POST-PLATE
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
-40 to 85
-40 to 85
-55 to 125
Green (RoHS
& no Sb/Br)
TBD
5962-
9680601Q2A
SNJ54AHCT
240FK
SNJ54AHCT240J
SNJ54AHCT240W
ACTIVE
ACTIVE
CDIP
CFP
J
20
20
1
1
TBD
TBD
A42
N / A for Pkg Type
N / A for Pkg Type
-55 to 125
-55 to 125
5962-9680601QR
A
SNJ54AHCT240J
W
Call TI
5962-9680601QS
A
SNJ54AHCT240W
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN54AHCT240, SN74AHCT240 :
Catalog: SN74AHCT240
•
Automotive: SN74AHCT240-Q1, SN74AHCT240-Q1
•
Military: SN54AHCT240
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
•
Military - QML certified for Military and Defense Applications
•
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
8-Apr-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
SN74AHCT240DBR
SN74AHCT240DWR
SN74AHCT240NSR
SSOP
SOIC
SO
DB
DW
NS
20
20
20
2000
2000
2000
330.0
330.0
330.0
16.4
24.4
24.4
8.2
10.8
8.2
7.5
2.5
2.7
2.5
12.0
12.0
12.0
16.0
24.0
24.0
Q1
Q1
Q1
13.3
13.0
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
8-Apr-2013
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
SN74AHCT240DBR
SN74AHCT240DWR
SN74AHCT240NSR
SSOP
SOIC
SO
DB
DW
NS
20
20
20
2000
2000
2000
367.0
367.0
367.0
367.0
367.0
367.0
38.0
45.0
45.0
Pack Materials-Page 2
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
M
0,15
15
0,25
0,09
5,60
5,00
8,20
7,40
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
0,10
2,00 MAX
0,05 MIN
PINS **
14
16
20
24
28
30
38
DIM
6,50
5,90
6,50
5,90
7,50
8,50
7,90
10,50
9,90
10,50 12,90
A MAX
A MIN
6,90
9,90
12,30
4040065 /E 12/01
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
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