REF3430T [TI]
REF34xx Low-Drift, Low-Power, Small-Footprint Series Voltage Reference;
| 型号： | REF3430T |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | REF34xx Low-Drift, Low-Power, Small-Footprint Series Voltage Reference |
| 文件： | 总29页 (文件大小：2462K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
REF3425, REF3430, REF3433, REF3440, REF3450
SBAS804C – SEPTEMBER 2017 – REVISED FEBRUARY 2021
REF34xx Low-Drift, Low-Power, Small-Footprint Series Voltage Reference
1 Features
3 Description
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Initial accuracy: ±0.05% (maximum)
Temperature coefficient : 6 ppm/°C (maximum)
Operating temperature range: −40°C to +125°C
Output current: ±10 mA
Low quiescent current: 95 μA (maximum)
Wide input voltage: 12 V
Output 1/f noise (0.1 Hz to 10 Hz): 3.8 µVp-p/V
Excellent long-term stability 25 ppm/1000 hrs
Multiple small footprint 6SOT-23 package pinouts:
REF34xx and REF34xxT
The REF34xx device is a low temperature drift
(6 ppm/°C), low-power, high-precision CMOS voltage
reference, featuring ±0.05% initial accuracy, low
operating current with power consumption less than
95 μA. This device also offers very low output noise of
3.8 μVp-p /V, which enables its ability to maintain high
signal integrity with high-resolution data converters in
noise critical systems. With a small SOT-23 package,
REF34xx offers enhanced specifications and pin-to-
pin replacement for MAX607x and ADR34xx. The
REF34xx family is compatible to most of the ADC and
DAC such as ADS1287, ADUCM360, ADS1112.
2 Applications
Stability and system reliability are further improved by
the low output-voltage hysteresis of the device and
low long-term output voltage drift. Furthermore, the
small size and low operating current of the devices
(95 μA) can benefit portable and battery-powered
applications.
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Data acquisition systems
Analog I/O modules
Field transmitters
Lab & field instrumentation
Battery test equipment
DC power supply, AC source, electronic load
Digital multimeters
REF34xx is specified for the wide temperature range
of −40°C to +125°C. Contact the TI sales
representative for additional voltage options.
Device Information
PART NAME
REF34xx
REF34xxT(2)
PACKAGE (1)
BODY SIZE (NOM)
2.90 mm × 1.60 mm
2.90 mm × 1.60 mm
SOT-23 (6)
SOT-23 (6)
(1) For all available packages, see the orderable addendum at
the end of the data sheet
(2) Product Preview
10 ꢀ
10 ꢀ
0.4
0.36
+125°C
0.32
124 ꢀ
-
ADS1287
REF
Input Signal
1 nF
+
0.28
+25°C
-40°C
0.24
VIN
0.2
0.16
0.12
0.08
0.04
0
REF34xx
CIN
1µF
COUT
10 µF
Copyright © 2017, Texas Instruments Incorporated
0
5
Load Current (mA)
10
Simplified Schematic
D001
Dropout vs. Current Load Over Temperature
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. UNLESS OTHERWISE NOTED, this document contains PRODUCTION
DATA.
REF3425, REF3430, REF3433, REF3440, REF3450
SBAS804C – SEPTEMBER 2017 – REVISED FEBRUARY 2021
www.ti.com
Table of Contents
1 Features............................................................................1
2 Applications.....................................................................1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Device Comparison Table...............................................3
6 Pin Configuration and Functions...................................3
7 Specifications.................................................................. 4
7.1 Absolute Maximum Ratings ....................................... 4
7.2 ESD Ratings .............................................................. 4
7.3 Recommended Operating Conditions ........................4
7.4 Thermal Information ...................................................4
7.5 Electrical Characteristics ............................................5
7.6 Typical Characteristics................................................7
8 Parameter Measurement Information.......................... 11
8.1 Solder Heat Shift.......................................................11
8.2 Long-Term Stability................................................... 12
8.3 Thermal Hysteresis...................................................12
8.4 Power Dissipation..................................................... 13
8.5 Noise Performance................................................... 14
9 Detailed Description......................................................15
9.1 Overview...................................................................15
9.2 Functional Block Diagram.........................................15
9.3 Feature Description...................................................15
9.4 Device Functional Modes..........................................16
10 Application and Implementation................................17
10.1 Application Information........................................... 17
10.2 Typical Application: Basic Voltage Reference
Connection.................................................................. 17
11 Power Supply Recommendations..............................19
12 Layout...........................................................................20
12.1 Layout Guidelines................................................... 20
12.2 Layout Example...................................................... 20
13 Device and Documentation Support..........................21
13.1 Documentation Support.......................................... 21
13.2 Receiving Notification of Documentation Updates..21
13.3 Support Resources................................................. 21
13.4 Trademarks.............................................................21
13.5 Electrostatic Discharge Caution..............................21
13.6 Glossary..................................................................21
14 Mechanical, Packaging, and Orderable
Information.................................................................... 21
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision B (March 2018) to Revision C (February 2021)
Page
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•
•
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•
•
Added "Device Information" to include REF34xxT............................................................................................. 1
Added hyperlinks to "Applications"..................................................................................................................... 1
Changed "VREF" to "VOUT" throught document................................................................................................... 1
Added REF34xxT to "Device Comparison Table"...............................................................................................3
Added REF34xxT to "Pin Configuration and Functions".....................................................................................3
Added Configuration Information to "Electrical Characteristics”......................................................................... 4
Changed ABS MAX IN MIN to "-0.3V"................................................................................................................4
Added REF34xxT to "Layout Guidelines" and "Layout Example".....................................................................20
Changes from Revision A (December 2017) to Revision B (March 2018)
Page
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Added 2 new GPNS: REF3440 and REF3450 .................................................................................................. 1
Changed "Excellent Long-Term Stability 30 ppm/1000 hrs" to "Excellent Long-Term Stability 25 ppm/1000
hrs" in Section 1 .................................................................................................................................................1
Changed "...typical drift value for the REF34xx is 30 ppm from 0 to 1000 hours" to "...typical drift value for the
REF34xx is 25 ppm from 0 to 1000 hours" and changed Figure 8-3 in Section 8.2 ........................................12
Changed "(as shown in Figure 26)" to " as shown in Figure 9-1 in last paragraph of Section 10.2.2.2 ..........18
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Changes from Revision * (September 2017) to Revision A (December 2017)
Page
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Added production release of 2 new output voltage option devices, REF3430 and REF3433............................ 1
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SBAS804C – SEPTEMBER 2017 – REVISED FEBRUARY 2021
5 Device Comparison Table
PRODUCT
VOUT
REF3425
REF3430
REF3433
REF3440
REF3450
REF3425T(1)
2.5 V
3 V
REF3430T(1)
REF3433T(1)
REF3440T(1)
REF3450T(1)
3.3 V
4.096 V
5 V
(1) Product Preview
6 Pin Configuration and Functions
GND_F
GND_S
EN
1
OUT_F
OUT_S
IN
4
5
6
2
3
Not to scale
Figure 6-1. REF34xx, DBV Package, 6-Pin SOT-23, Top View
NC
GND
NC
1
VOUT
NC
4
5
6
2
3
IN
Not to scale
Figure 6-2. REF34xxT , DBV Package, 6-Pin SOT-23, Top View
Table 6-1. Pin Functions
PIN
TYPE
DESCRIPTION
REF34xx
(DBV)
REF34xxT
(DBV) 1
NAME
GND_F
GND_S
GND
1
2
Ground
Ground
Ground
Input
Ground force connection.
Ground sense connection.
2
4
Device ground. All GND pins must be connected to ground for proper operation.
Enable connection. Enables or disables the device.
Input supply voltage connection.
EN
3
4
5
6
IN
Power
Input
OUT_S
OUT_F
VOUT
Reference voltage output sense connection.
Reference voltage output force connection.
Output
Output
6
Reference voltage output connection.
Not connected. Pin can be left floating or connected to voltage within device
operating range.
NC
1,3,5
-
1. Product Preview
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7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
–0.3
–0.3
–0.3
MAX
13
UNIT
V
IN
Input voltage
EN
VOUT
ISC
IN + 0.3
5.5
V
Output voltage
V
Output short circuit current
Operating temperature range
Storage temperature range
20
mA
°C
°C
TA
–55
–65
150
Tstg
170
(1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not implied. These are stress ratings only and functional operation of the device at these or any other conditions
beyond those specified in the Electrical Characteristics Table is not implied.
7.2 ESD Ratings
VALUE
UNIT
Human-body model (HBM), per ANSI/ESDA/
JEDEC JS-001(1)
±2500
V(ESD)
Electrostatic discharge
V
Charged-device model (CDM), per JEDEC
specification JESD22-C101(2)
±1500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
VOUT
VDO
+
IN
Input Voltage
12
V
(1)
EN
IL
Enable Voltage
0
IN
10
V
Output Current
–10
–40
mA
°C
TA
Operating Temperature
25
125
(1) VDO = Dropout voltage
7.4 Thermal Information
REF34
DBV
6 PINS
185
THERMAL METRIC(1)
UNIT
RθJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJC(top)
RθJB
156
29.6
33.8
29.1
N/A
ΨJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
ΨJB
RθJC(bot)
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SBAS804C – SEPTEMBER 2017 – REVISED FEBRUARY 2021
7.5 Electrical Characteristics
At VIN = VOUT + VDO, COUT = 10 µF, CIN = 0.1 µF, IL = 0 mA, minimum and maximum specifications at TA = –40℃ to 125℃;
Typical specifications at TA = 25℃ unless otherwise noted
PARAMETER
TEST CONDITION
MIN
TYP
MAX
UNIT
ACCURACY AND DRIFT
Output voltage accuracy TA = 25℃
Output voltage
temperature coefficient –40°C ≤ TA ≤ 125°C
–0.05
0.05
6
%
2.5
ppm/°C
(1)
LINE & LOAD REGULATION
ΔVO/ΔVIN Line Regulation
VIN = VOUT + VDO (2) to 12 V
2
ppm/V
VIN = VOUT + VDO (2) to 12 V, –40°C ≤ TA ≤ 125°C
15
30
Sourcing
20
IL = 0 mA to 10mA, VIN
= VOUT+ VDO
(3)
Sourcing
Sinking, REF3425
Sinking, REF3430
Sinking, REF3433
Sinking, REF3440
Sinking, REF3450
Sinking, REF3425
Sinking, REF3430
40
43
48
60
70
IL = 0 mA to –10mA, VIN
= VOUT+ VDO, TA =
25°C (3)
ΔVO/ΔIL
Load Regulation
ppm/mA
70
75
IL = 0 mA to –10mA, VIN
= VOUT+ VDO, –40°C ≤ Sinking, REF3433
84
TA ≤ 125°C (3)
Sinking, REF3440
98
Sinking, REF3450
140
22
ISC
Short circuit current
VOUT = 0 V at TA = 25°C
18
mA
NOISE
0.1Hz ≤ f ≤ 10Hz
5
enp-p
Low frequency noise (4)
µVp-p/V
0.1Hz ≤ f ≤ 10Hz (REF3440 and REF3450)
3.8
Integrated wide band
noise
en
10Hz ≤ f ≤ 10kHz
24
µVrms
f = 1kHz
0.25
0.2
Output voltage noise
density
ppm/√Hz
en
f = 1kHz (REF3440 and REF3450)
LONG TERM STABILITY AND HYSTERESIS
0 to 1000h at 35°C
25
10
Long-term stability (5)
DBV Package
ppm
ppm
1000h to 2000h at
35°C
25°C, –40°C,125°C,
25°C Cycle 1
30
10
Output voltage thermal
hysteresis (6)
DBV Package
25°C, –40°C,125°C,
25°C Cycle 2
TURN-ON TIME
tON Turn-on time
CAPACITIVE LOAD
Stable output capacitor
range
OUTPUT VOLTAGE
0.1% of output voltage settling, CL = 10 µF
–40°C ≤ TA ≤ 125°C
2.5
ms
µF
CL
0.1
10
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7.5 Electrical Characteristics (continued)
At VIN = VOUT + VDO, COUT = 10 µF, CIN = 0.1 µF, IL = 0 mA, minimum and maximum specifications at TA = –40℃ to 125℃;
Typical specifications at TA = 25℃ unless otherwise noted
PARAMETER
TEST CONDITION
MIN
TYP
MAX
UNIT
REF3425
REF3430
REF3433
REF3440
REF3450
2.5
3.0
VOUT
Output voltage
3.3
V
4.096
5.0
POWER SUPPLY
VOUT
+
VIN
IL
Input voltage
12
V
VDO
Output current capacity VIN = VOUT + VDO to 12 V
–10
10
95
3
mA
Active mode
Quiescent current
72
IQ
µA
V
Shutdown mode
2.5
Voltage reference in active mode (EN = 1)
1.6
VEN
ENABLE pin voltage
Dropout voltage
Voltage reference in shutdown mode (EN = 0)
0.5
IL = 0 mA
IL = 0 mA
IL = 10 mA
50
VDO
100
500
mV
µA
ENABLE pin leakage
current
IEN
VEN = VIN = 12V, –40°C ≤ TA ≤ 125°C
1
2
(1) Temperature drift is specified according to the box method. See Low Temperature Drift section for more details.
(2) VDO for line regulation test is 50 mV.
(3) VDO for load regulation test is 500 mV.
(4) The peak-to-peak noise measurement is explained in more detail in section Noise Performance.
(5) Long-term stability measurement procedure is explained in more detail in section Long–Term Stability.
(6) Thermal hysteresis measurement procedure is explained in more detail in section Thermal Hysteresis.
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7.6 Typical Characteristics
at TA = 25°C, VIN = VEN = 12 V, IL = 0 mA, CL = 10 µF, CIN = 0.1 µF (unless otherwise noted)
74
73
72
71
12V
5V
3V
70
3.3V
69
68
-40
-15
10
35 60
Temperature (°C)
85
110 125
D003
D001
Drift (ppm/°C)
Figure 7-2. VIN vs IQ over Temperature
(-40°C to 125°C)
Figure 7-1. Temperature Drift
0.02
0.015
0.01
75
74.5
74
73.5
73
0.005
0
-0.005
-0.01
-0.015
-0.02
72.5
72
71.5
71
-50
-25
0
25 50
Temperature (°C)
75
100
125
-50
-25
0
25 50
Temperature (°C)
75
100
125
D002
D004
Figure 7-3. Output Voltage Accuracy vs Temperature
Figure 7-4. Quiescent Current vs Temperature
-20
0.24
0.23
0.22
0.21
0.2
CL = 1uF
CL = 10uF
-40
-60
0.19
0.18
0.17
0.16
0.15
0.14
0.13
-80
-100
-120
10
100
1k
Frequency (Hz)
10k
100k
-40
-20
0
20
40 60
Temperature (°C)
80
100 120 140
D005
D019
Figure 7-5. Power-Supply Rejection Ratio vs Frequency
Figure 7-6. Line Regulation
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7.6 Typical Characteristics (continued)
at TA = 25°C, VIN = VEN = 12 V, IL = 0 mA, CL = 10 µF, CIN = 0.1 µF (unless otherwise noted)
8.7
8.4
8.1
7.8
7.5
7.2
6.9
6.6
6.3
6
55
52.5
50
47.5
45
42.5
40
37.5
35
32.5
30
5.7
-40
-20
0
20
40 60
Temperature (°C)
80
100 120 140
-40
-20
0
20
40 60
Temperature (°C)
80
100 120 140
D021
D020
Figure 7-8. Load Regulation Sinking
Figure 7-7. Load Regulation Sourcing
800
720
640
560
480
400
320
240
160
80
ILOAD
+1mA
+1mA
-1mA
1mA/div
4mV/div
VOUT
0
10
250µs/div
100
1k
Frequency(Hz)
10k
100k
(CL = 1µF, IOUT = 1mA)
D010
D009
Figure 7-10. Load Transient
Figure 7-9. Noise Performance 10 Hz to 10 kHz
ILOAD
ILOAD
+1mA
+10mA
+10mA
+1mA
10mA/div
-10mA
-1mA
1mA/div
4mV/div
VOUT
VOUT
100mV/div
250µs/div
250µs/div
(CL = 1µF, IOUT = 10mA)
D010
(CL = 10µF, IOUT = 1mA)
D010
Figure 7-12. Load Transient
Figure 7-11. Load Transient
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7.6 Typical Characteristics (continued)
at TA = 25°C, VIN = VEN = 12 V, IL = 0 mA, CL = 10 µF, CIN = 0.1 µF (unless otherwise noted)
ILOAD
-10mA
+10mA
10mA/div
20mV/div
VIN
4V/div
+10mA
VOUT
VOUT
15mV/div
250µs/div
(CL = 10µF, IOUT = 10mA)
250µs/div
(CL = 1µF)
D010
D011
Figure 7-13. Load Transient
Figure 7-14. Line Transient
2.6
2.5
2.4
2.3
2.2
2.1
2
VIN
4V/div
VOUT
5mV/div
250µs/div
-40
-15
10
35 60
Temperature (°C)
85
110 125
D011
(CL = 10µF)
D013
Figure 7-15. Line Transient
Figure 7-16. Quiescent Current Shutdown Mode
30%
25%
20%
15%
10%
5%
30%
25%
20%
15%
10%
5%
0
0
D016
D016
Thermal Hysteresis - Cycle 1 (ppm)
Thermal Hysteresis - Cycle 2 (ppm)
Figure 7-17. Thermal Hysteresis Distribution (Cycle 1)
Figure 7-18. Thermal Hysteresis Distribution (Cycle 2)
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7.6 Typical Characteristics (continued)
at TA = 25°C, VIN = VEN = 12 V, IL = 0 mA, CL = 10 µF, CIN = 0.1 µF (unless otherwise noted)
50%
40%
En
30%
1V/div
20%
VOUT
10%
0
0.5ms/div
D017
D018
Solder Heat Shift (%)
Figure 7-20. Turnon Time (Enable)
Refer to Section 8.1 for more information
Figure 7-19. Solder Heat Shift Distribution
10
5
0
-5
-10
-15
-20
-25
-30
-35
-40
Time 1s/div
0
100 200 300 400 500 600 700 800 900 1000
Hours
D08_
D022
Figure 7-22. Long Term Stability - 1000 hours (VOUT
)
Figure 7-21. 0.1-Hz to 10-Hz Noise (VOUT
)
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8 Parameter Measurement Information
8.1 Solder Heat Shift
The materials used in the manufacture of the REF34xx have differing coefficients of thermal expansion, resulting
in stress on the device die when the part is heated. Mechanical and thermal stress on the device die can cause
the output voltages to shift, degrading the initial accuracy specifications of the product. Reflow soldering is a
common cause of this error.
In order to illustrate this effect, a total of 32 devices were soldered on four printed circuit boards [16 devices on
each printed circuit board (PCB)] using lead-free solder paste and the paste manufacturer suggested reflow
profile. The reflow profile is as shown in Figure 8-1. The printed circuit board is comprised of FR4 material. The
board thickness is 1.65 mm and the area is 114 mm × 152 mm.
300
250
200
150
100
50
0
0
50
100
150
200
250
300
350
400
Time (seconds)
C01
Figure 8-1. Reflow Profile
The reference output voltage is measured before and after the reflow process; the typical shift is displayed in
Figure 8-2. Although all tested units exhibit very low shifts (< 0.01%), higher shifts are also possible depending
on the size, thickness, and material of the printed circuit board. An important note is that the histograms display
the typical shift for exposure to a single reflow profile. Exposure to multiple reflows, as is common on PCBs with
surface-mount components on both sides, causes additional shifts in the output bias voltage. If the PCB is
exposed to multiple reflows, the device must be soldered in the second pass to minimize its exposure to thermal
stress.
50%
40%
30%
20%
10%
0
D017
Solder Heat Shift (%)
Figure 8-2. Solder Heat Shift Distribution, VOUT (%)
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8.2 Long-Term Stability
One of the key parameters of the REF34xx references is long-term stability. Typical characteristic expressed as:
curves shows the typical drift value for the REF34xx is 25 ppm from 0 to 1000 hours. This parameter is
characterized by measuring 32 units at regular intervals for a period of 1000 hours. It is important to understand
that long-term stability is not ensured by design and that the output from the device may shift beyond the typical
25 ppm specification at any time. For systems that require highly stable output voltages over long periods of
time, the designer should consider burning in the devices prior to use to minimize the amount of output drift
exhibited by the reference over time.
10
5
0
-5
-10
-15
-20
-25
-30
-35
-40
0
100 200 300 400 500 600 700 800 900 1000
Hours
D022
Figure 8-3. Long Term Stability - 1000 hours (VOUT
)
8.3 Thermal Hysteresis
Thermal hysteresis is measured with the REF34xx soldered to a PCB, similar to a real-world application.
Thermal hysteresis for the device is defined as the change in output voltage after operating the device at 25°C,
cycling the device through the specified temperature range, and returning to 25°C. The PCB was baked at
150°C for 30 minutes before thermal hysteresis was measured. Hysteresis can be expressed by Equation 1:
≈
∆
«
’
÷
◊
| VPRE - VPOST
VNOM
|
VHYST
=
ì106 ppm
(
)
(1)
where
•
•
•
•
VHYST = thermal hysteresis (in units of ppm)
VNOM = the specified output voltage
VPRE = output voltage measured at 25°C pre-temperature cycling
VPOST = output voltage measured after the device has cycled from 25°C through the specified temperature
range of –40°C to +125°C and returns to 25°C.
Typical thermal hysteresis distribution is as shown in Figure 8-4.
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30%
25%
20%
15%
10%
5%
0
D016
Thermal Hysteresis - Cycle 1 (ppm)
Figure 8-4. Thermal Hysteresis Distribution (VOUT
)
8.4 Power Dissipation
The REF34xx voltage references are capable of source and sink up to 10 mA of load current across the rated
input voltage range. However, when used in applications subject to high ambient temperatures, the input voltage
and load current must be carefully monitored to ensure that the device does not exceeded its maximum power
dissipation rating. The maximum power dissipation of the device can be calculated with Equation 2:
TJ = TA +P ì RqJA
D
(2)
where
•
•
•
•
PD is the device power dissipation
TJ is the device junction temperature
TA is the ambient temperature
RθJA is the package (junction-to-air) thermal resistance
Because of this relationship, acceptable load current in high temperature conditions may be less than the
maximum current-sourcing capability of the device. In no case should the device be operated outside of its
maximum power rating because doing so can result in premature failure or permanent damage to the device.
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8.5 Noise Performance
Typical 0.1-Hz to 10-Hz voltage noise can be seen in Figure 8-5 . Device noise increases with output voltage and
operating temperature. Additional filtering can be used to improve output noise levels, although care must be
taken to ensure the output impedance does not degrade ac performance. Peak-to-peak noise measurement
setup is shown in Figure 8-5.
Time 1s/div
D08_
Figure 8-5. 0.1-Hz to 10-Hz Noise (VOUT
)
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9 Detailed Description
9.1 Overview
The REF34xx is family of low-noise, precision bandgap voltage references that are specifically designed for
excellent initial voltage accuracy and drift. The Section 9.2 is a simplified block diagram of the REF34xx showing
basic band-gap topology.
9.2 Functional Block Diagram
Enable
Blocks
GNDF
GNDS
EN
OUTF
OUTS
IN
Vdd
Digital
Inrush
Current
Limit
Bandgap
core
Buffer
9.3 Feature Description
9.3.1 Supply Voltage
The REF34xx family of references features an extremely low dropout voltage. For loaded conditions, a typical
dropout voltage versus load is shown on the front page. The REF34xx features a low quiescent current that is
extremely stable over changes in both temperature and supply. The typical room temperature quiescent current
is 72 μA, and the maximum quiescent current over temperature is just 95 μA. Supply voltages below the
specified levels can cause the REF34xx to momentarily draw currents greater than the typical quiescent current.
Use a power supply with a fast rising edge and low output impedance to easily prevent this issue.
9.3.2 Low Temperature Drift
The REF34xx is designed for minimal drift error, which is defined as the change in output voltage over
temperature. The drift is calculated using the box method, as described by Equation 3. For this equation, VREF is
VOUT which is the output voltage seen at the junction of OUT_F and OUT_S.
VREF(MAX) - VREF(MIN)
≈
∆
«
’
÷
◊
Drift =
ì 106
VREF ì Temperature Range
(3)
9.3.3 Load Current
The REF34xx family is specified to deliver a current load of ±10 mA per output. The device temperature
increases according to Equation 4:
TJ = TA +P ì RqJA
D
(4)
where
•
•
•
•
TJ = junction temperature (°C),
TA = ambient temperature (°C),
PD = power dissipated (W), and
RθJA = junction-to-ambient thermal resistance (°C/W)
The REF34xx maximum junction temperature must not exceed the absolute maximum rating of 150°C.
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9.4 Device Functional Modes
9.4.1 EN Pin
When the EN pin of the REF34xx is pulled high, the device is in active mode. The device must be in active mode
for normal operation. The REF34xx can be placed in a low-power mode by pulling the ENABLE pin low. When in
shutdown mode, the output of the device becomes high impedance and the quiescent current of the device
reduces to 2 µA in shutdown mode. The EN pin must not be pulled higher than VIN supply voltage. See the
Section 7.5 for logic high and logic low voltage levels.
9.4.2 Negative Reference Voltage
For applications requiring a negative and positive reference voltage, the REF34xx and OPA735 can be used to
provide a dual-supply reference from a 5-V supply. Figure 9-1 shows the REF34xx used to provide a 2.5-V
supply reference voltage. The low drift performance of the REF34xx complements the low offset voltage and
zero drift of the OPA735 to provide an accurate solution for split-supply applications. Take care to match the
temperature coefficients of R1 and R2.
+5 V
3
4
5
6
REF3425
+2.5 V
2
1
R1
10 kΩ
R2
10 kΩ
+5 V
-2.5 V
OPA735
-5 V
Copyright © 2017, Texas Instruments Incorporated
Figure 9-1. REF34xx and OPA735 Create Positive and Negative Reference Voltages
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10 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification, and TI
does not warrant its accuracy or completeness. TI’s customers are responsible for determining
suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.
10.1 Application Information
As this device has many applications and setups, there are many situations that this datasheet can not
characterize in detail. Basic applications includes positive/negative voltage reference and data acquisition
systems. The table below shows the typical application of REF34xx and its companion ADC/DAC.
Table 10-1. Typical Applications and Companion ADC/DAC
Applications
ADC/DAC
PLC - DCS
DAC8881, ADS8332, ADS8568, ADS8317,
ADS8588S, ADS1287
Display Test Equipment
ADS8332
ADUCM360
ADS7279
ADS1112
Field Transmitters - Pressure
Video Surveillance - Thermal Cameras
Medical Blood Glucose Meter
10.2 Typical Application: Basic Voltage Reference Connection
The circuit shown in Figure 10-1 shows the basic configuration for the REF34xx references. Connect bypass
capacitors according to the guidelines in Section 10.2.2.1.
10 ꢀ
10 ꢀ
124 ꢀ
-
ADS1287
REF
Input Signal
1 nF
+
VIN
REF34xx
CIN
1µF
COUT
10 µF
Copyright © 2017, Texas Instruments Incorporated
Figure 10-1. Basic Reference Connection
10.2.1 Design Requirements
A detailed design procedure is described based on a design example. For this design example, use the
parameters listed in Table 10-2 as the input parameters.
Table 10-2. Design Example Parameters
DESIGN PARAMETER
VALUE
Input voltage VIN
5 V
Output voltage VOUT
2.5 V
1 µF
REF34xx input capacitor
REF34xx output capacitor
10 µF
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10.2.2 Detailed Design Procedure
10.2.2.1 Input and Output Capacitors
A 1-μF to 10-μF electrolytic or ceramic capacitor can be connected to the input to improve transient response in
applications where the supply voltage may fluctuate. Connect an additional 0.1-μF ceramic capacitor in parallel
to reduce high frequency supply noise.
A ceramic capacitor of at least a 0.1 μF must be connected to the output to improve stability and help filter out
high frequency noise. An additional 1-μF to 10-μF electrolytic or ceramic capacitor can be added in parallel to
improve transient performance in response to sudden changes in load current; however, keep in mind that doing
so increases the turnon time of the device.
Best performance and stability is attained with low-ESR, low-inductance ceramic chip-type output capacitors
(X5R, X7R, or similar). If using an electrolytic capacitor on the output, place a 0.1-μF ceramic capacitor in
parallel to reduce overall ESR on the output.
10.2.2.2 4-Wire Kelvin Connections
Current flowing through a PCB trace produces an IR voltage drop, and with longer traces, this drop can reach
several millivolts or more, introducing a considerable error into the output voltage of the reference. A 1-inch long,
5-millimeter wide trace of 1-ounce copper has a resistance of approximately 100 mΩ at room temperature; at a
load current of 10 mA, this can introduce a full millivolt of error. In an ideal board layout, the reference must be
mounted as close as possible to the load to minimize the length of the output traces, and, therefore, the error
introduced by voltage drop. However, in applications where this is not possible or convenient, force and sense
connections (sometimes referred to as Kelvin sensing connections) are provided as a means of minimizing the
IR drop and improving accuracy.
Kelvin connections work by providing a set of high impedance voltage-sensing lines to the output and ground
nodes. Because very little current flows through these connections, the IR drop across their traces is negligible,
and the output and ground voltage information can be obtain with minimum IR drop error.
It is always advantageous to use Kelvin connections whenever possible. However, in applications where the IR
drop is negligible or an extra set of traces cannot be routed to the load, the force and sense pins for both VOUT
and GND can simply be tied together, and the device can be used in the same fashion as a normal 3-terminal
reference (as shown in Figure 9-1 ).
10.2.2.3 VIN Slew Rate Considerations
In applications with slow-rising input voltage signals, the reference exhibits overshoot or other transient
anomalies that appear on the output. These phenomena also appear during shutdown as the internal circuitry
loses power.
To avoid such conditions, ensure that the input voltage wave-form has both a rising and falling slew rate close to
6 V/ms.
10.2.2.4 Shutdown/Enable Feature
The REF34xx references can be switched to a low power shut-down mode when a voltage of 0.5 V or lower is
input to the ENABLE pin. Likewise, the reference becomes operational for ENABLE voltages of 1.6 V or higher.
During shutdown, the supply current drops to less than 2 μA, useful in applications that are sensitive to power
consumption.
If using the shutdown feature, ensure that the ENABLE pin voltage does not fall between 0.5 V and 1.6 V
because this causes a large increase in the supply current of the device and may keep the reference from
starting up correctly. If not using the shutdown feature, however, the ENABLE pin can simply be tied to the IN
pin, and the reference remains operational continuously.
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10.2.3 Application Curves
75
74.5
74
2.6
2.5
2.4
2.3
2.2
2.1
2
73.5
73
72.5
72
71.5
71
-50
-25
0
25 50
Temperature (°C)
75
100
125
-40
-15
10
35 60
Temperature (°C)
85
110 125
D004
D013
Figure 10-2. Quiescent Current vs Temperature
Figure 10-3. Quiescent Current Shutdown Mode
11 Power Supply Recommendations
The REF34xx family of references feature an extremely low-dropout voltage. These references can be operated
with a supply of only 50 mV above the output voltage. TI recommends a supply bypass capacitor ranging
between 0.1 µF to 10 µF.
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12 Layout
12.1 Layout Guidelines
Figure 12-1 illustrates an example of a PCB layout for a data acquisition system using the REF34xx. Some key
considerations are:
•
•
•
Connect low-ESR, 0.1-μF ceramic bypass capacitors at IN, OUT_F, VOUT of the REF34xx and REF34xxT.
Decouple other active devices in the system per the device specifications.
Using a solid ground plane helps distribute heat and reduces electromagnetic interference (EMI) noise
pickup.
•
•
Place the external components as close to the device as possible. This configuration prevents parasitic errors
(such as the Seebeck effect) from occurring.
Do not run sensitive analog traces in parallel with digital traces. Avoid crossing digital and analog traces if
possible, and only make perpendicular crossings when absolutely necessary.
12.2 Layout Example
C
1
2
6 OUT_F
5 OUT_S
GND_F
GND_S
REF34XX
EN
IN
3
4
Figure 12-1. REF34xx Layout Example
C
1
2
6 VOUT
NC
GND
5
4
NC
REF34XXT
NC
IN
3
C
Figure 12-2. REF34xxT Layout Example
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13 Device and Documentation Support
13.1 Documentation Support
13.1.1 Related Documentation
For related documentation see the following:
•
INA21x Voltage Output, Low- or High-Side Measurement, Bidirectional, Zero-Drift Series, Current-Shunt
Monitors
•
Low-Drift Bidirectional Single-Supply Low-Side Current Sensing Reference Design
13.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Subscribe to updates to register and receive a weekly digest of any product information that has changed. For
change details, review the revision history included in any revised document.
13.3 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
13.4 Trademarks
TI E2E™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
13.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
13.6 Glossary
TI Glossary
This glossary lists and explains terms, acronyms, and definitions.
14 Mechanical, Packaging, and Orderable Information
The following pages include mechanical packaging and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
www.ti.com
5-Feb-2021
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
PREF3450TQDBVR
ACTIVE
SOT-23
DBV
6
3000 RoHS (In work)
& Non-Green
Call TI
Call TI
-40 to 125
REF3425IDBVR
REF3430IDBVR
REF3433IDBVR
REF3440IDBVR
REF3450IDBVR
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
DBV
DBV
DBV
DBV
DBV
6
6
6
6
6
3000 RoHS & Green
3000 RoHS & Green
3000 RoHS & Green
3000 RoHS & Green
3000 RoHS & Green
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
Level-2-250C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
19ED
1H6D
1H5D
1MJD
1MKD
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
5-Feb-2021
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF REF3425, REF3430, REF3433, REF3440 :
Enhanced Product: REF3425-EP, REF3430-EP, REF3433-EP, REF3440-EP
•
NOTE: Qualified Version Definitions:
Enhanced Product - Supports Defense, Aerospace and Medical Applications
•
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Oct-2020
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
REF3425IDBVR
REF3430IDBVR
REF3433IDBVR
REF3440IDBVR
REF3450IDBVR
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
DBV
DBV
DBV
DBV
DBV
6
6
6
6
6
3000
3000
3000
3000
3000
178.0
178.0
178.0
178.0
178.0
9.0
9.0
9.0
9.0
9.0
3.23
3.23
3.23
3.23
3.23
3.17
3.17
3.17
3.17
3.17
1.37
1.37
1.37
1.37
1.37
4.0
4.0
4.0
4.0
4.0
8.0
8.0
8.0
8.0
8.0
Q3
Q3
Q3
Q3
Q3
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Oct-2020
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
REF3425IDBVR
REF3430IDBVR
REF3433IDBVR
REF3440IDBVR
REF3450IDBVR
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
DBV
DBV
DBV
DBV
DBV
6
6
6
6
6
3000
3000
3000
3000
3000
445.0
445.0
445.0
445.0
445.0
220.0
220.0
220.0
220.0
220.0
345.0
345.0
345.0
345.0
345.0
Pack Materials-Page 2
PACKAGE OUTLINE
DBV0006A
SOT-23 - 1.45 mm max height
S
C
A
L
E
4
.
0
0
0
SMALL OUTLINE TRANSISTOR
C
3.0
2.6
0.1 C
1.75
1.45
B
1.45 MAX
A
PIN 1
INDEX AREA
1
2
6
5
2X 0.95
1.9
3.05
2.75
4
3
0.50
6X
0.25
C A B
0.15
0.00
0.2
(1.1)
TYP
0.25
GAGE PLANE
0.22
0.08
TYP
8
TYP
0
0.6
0.3
TYP
SEATING PLANE
4214840/B 03/2018
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Body dimensions do not include mold flash or protrusion. Mold flash and protrusion shall not exceed 0.15 per side.
4. Leads 1,2,3 may be wider than leads 4,5,6 for package orientation.
5. Refernce JEDEC MO-178.
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EXAMPLE BOARD LAYOUT
DBV0006A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
6X (1.1)
1
6X (0.6)
6
SYMM
5
2
3
2X (0.95)
4
(R0.05) TYP
(2.6)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:15X
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
EXPOSED METAL
EXPOSED METAL
0.07 MIN
ARROUND
0.07 MAX
ARROUND
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4214840/B 03/2018
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
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EXAMPLE STENCIL DESIGN
DBV0006A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
6X (1.1)
1
6X (0.6)
6
SYMM
5
2
3
2X(0.95)
4
(R0.05) TYP
(2.6)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:15X
4214840/B 03/2018
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
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IMPORTANT NOTICE AND DISCLAIMER
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE
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