PCM2912 [TI]
AUDIO CODEC WITH USB INTERFACE, MONO MICROPHONE INPUT AND STEREO HEADPHONE OUTPUT; 带USB接口,单声道麦克风输入和立体声耳机输出音频编解码器![PCM2912](http://pdffile.icpdf.com/pdf1/p00102/img/icpdf/PCM2912_552010_icpdf.jpg)
型号: | PCM2912 |
厂家: | ![]() |
描述: | AUDIO CODEC WITH USB INTERFACE, MONO MICROPHONE INPUT AND STEREO HEADPHONE OUTPUT |
文件: | 总32页 (文件大小:814K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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PCM2912
SLES216–FEBRUARY 2008
AUDIO CODEC WITH USB INTERFACE,
MONO MICROPHONE INPUT AND STEREO HEADPHONE OUTPUT
1
FEATURES
23
•
On-Chip USB Interface:
– Oversampling Digital Filter
–
–
–
–
–
With Full-Speed Transceivers
Fully Compliant with USB 2.0 Specification
Certified By USB-IF
–
–
–
–
–
Pass-Band Ripple: ±0.1 dB
Stop-Band Attenuation: –43 dB
Single-Ended Voltage Output
Analog LPF Included
Partially Programmable Descriptors
Adaptive Isochronous Transfer for
Playback
Sidetone PGA, Output PGA, and HP
Amplifier
–
Asynchronous Isochronous Transfer for
Record
•
Multifunctions:
–
–
Suspend, Playback, and Record Status Flag
–
Bus Powered
Microphone Amplifier, Mute, and Gain
Control
•
•
16-Bit Delta-Sigma ADC and DAC
Sampling Rate:
•
•
•
Pop/Click Noise Free
–
8, 11.025, 16, 22.05, 32, 44.1, 48 kHz
On-Chip Clock Generator:
With Single 6-MHz Clock Source
Mono ADC with Microphone Input
Single Power Supply: 5 V Typ (VBUS
Package: 32-Pin TQFP
)
•
•
–
APPLICATIONS
•
•
•
•
•
•
•
USB Headset
USB Headphone
USB Speaker
USB Featured Consumer Audio Product
USB Audio Interface Box
USB Monitor
–
Analog Performance at VBUS = 5 V:
–
–
–
THD+N: 0.01%
SNR: 92 dB
Dynamic Range: 90 dB
–
Decimation Digital Filter
–
–
Pass-Band Ripple: ±0.05 dB
Video Conference System
Stop-Band Attenuation: –65 dB
DESCRIPTION
–
–
–
–
Single-Ended Voltage Input
Antialiasing Filter Included
Digital HPF Included
The PCM2912 is the Texas Instruments single-chip,
USB stereo audio CODEC with USB 2.0-compliant
full-speed protocol controller and analog front end
(AFE) function for headset application. The USB
protocol controller works with no software code, but
USB descriptors can be modified on request(1). The
PCM2912 employs SpAct™ architecture, TI’s unique
system that recovers the audio clock from USB
packet data. On chip analog PLLs with SpAct enables
independent playback and record sampling rate with
low clock jitters.
Microphone Bias, Microphone Amplifier,
and Input PGA
•
Stereo DAC With Headphone Output
Analog Performance at VBUS = 5.0 V:
–
–
–
–
–
–
–
THD+N: 0.01% (RL > 10 kΩ)
THD+N: 0.02% (RL = 32 Ω)
SNR: 92 dB
Dynamic Range: 90 dB
PO: 13 mW (RL = 32 Ω)
PO: 25 mW (RL = 16 Ω)
(1) The descriptor can be modified by changing a mask; contact
your representative about the details.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
3
SpAct is a trademark of Texas Instruments.
Audio Precision, System Two are trademarks of Audio Precision, Inc..
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2008, Texas Instruments Incorporated
PCM2912
www.ti.com
SLES216–FEBRUARY 2008
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)(1)
(2)
PCM2912
–0.3 to +6.5
±0.1
UNIT
V
Supply voltage
VBUS
Ground voltage differences: BGND, PGND, AGND, HGND, DGND
Input voltage : VCCP, VCCA, VCCL, VCCR, VDD
V
–0.3 to 4
–0.3 to 6.5
–0.3 to 4
–0.3 to 4
±10
V
PLAY, REC.
V
Digital input voltage
D+, D–, XTI, XTO, MMUTE, TEST0, TEST1, POWER, MAMP, SSPND
MBIAS, VIN, VCOM1, VCOM2, VOUTL, VOUTR, FR, FL
V
Analog input voltage
V
Input current (any pins except supplies)
Ambient temperature under bias
Storage temperature
mA
°C
°C
°C
–40 to 125
–55 to 150
150
Junction temperature
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal.
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
5.00
MAX
UNIT
V
VBUS
Supply voltage
4.35
5.25
Analog input voltage, full scale (–0 dB)
Digital input logic family
0.43 VCCA
TTL
Vp-p
Digital iInput clock frequency
Analog output load resistance
Analog output load capacitance
Digital output load capacitance
Operating free-air temperature
5.997
32
6.000
6.003
MHz
Ω
100
10
pF
pF
°C
TA
–25
70
2
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Product Folder Link(s): PCM2912
PCM2912
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SLES216–FEBRUARY 2008
ELECTRICAL CHARACTERISTICS
All specifications at TA = 25°C, VBUS = 5 V, fS = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless otherwise noted
PCM2912PJT
PARAMETER
DIGITAL INPUT/OUTPUT
TEST CONDITIONS
UNIT
MIN
TYP
MAX
Host interface
Apply USB Revision 2.0, full-speed
USB isochronous data format
Audio data format
INPUT LOGIC
VIH
VIL
2
3.3
0.8
Input logic level
VDC
µA
(1)(2)
IIH
VIN = 3.3 V
VIN = 0 V
±10
±10
100
±10
(1) (2)
IIL
Input logic current
(3)
IIH
VIN = 3.3 V
VIN = 0 V
65
µA
(3)
IIL
OUTPUT LOGIC
(1)
VOH
IOH = –10 mA
IOL = 10 mA
IOH = –2 mA
IOL = 2 mA
IOL = 8 mA
VIN = 5 V
2.9
2.8
(1)
VOL
0.3
(4)
VOH
VOL
VOL
Output logic level
VDC
(4)
(5)
0.5
0.5
(5)
IOH
CLOCK FREQUENCY
Input clock frequency, XTI
MICROPHONE BIAS
Output voltage
Output leak current
±10
µA
5.997
6.000
6.003
MHz
0.75 VCCA
VDC
mA
Output current
Output noise
2
5
RL = 1 kΩ
µVrms
(1) Pins 3, 4: D–, D+.
(2) Pins 8, 23, 24, 27, 28: XTI, MAMP, POWER, TEST1, TEST0
(3) Pin 30: MMUTE
(4) Pins 7, 29: XTO, SSPND
(5) Pins 31, 32: REC, PLAY.
Copyright © 2008, Texas Instruments Incorporated
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SLES216–FEBRUARY 2008
ELECTRICAL CHARACTERISTICS (continued)
All specifications at TA = 25°C, VBUS = 5 V, fS = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless otherwise noted
PCM2912PJT
PARAMETER
TEST CONDITIONS
UNIT
MIN
TYP
MAX
ADC CHARACTERISTICS
Resolution
16
1
Bits
Audio data channel
channel
8, 11.025, 16, 22.05, 32, 44.1,
48
Sampling frequency
kHz
DYNAMIC PERFORMANCE(6)
THD+N
VIN = –1 dB of 0.43 VCCA
0.01%
90
0.02%
Dynamic range
S/N ratio
A-weighted
A-weighted
82
84
dB
dB
92
DC ACCURACY
Gain error
±2
±0
±10 % of FSR
% of FSR
Bipolar zero error
ANALOG INPUT
Input voltage
0.43 VCCA
0.5 VCCA
150
Vp-p
V
Center voltage
–3 dB
kHz
dB
Antialiasing filter frequency
response
fIN = 20 kHz
–0.08
MICROPHONE AMPLIFIER
Gain
0
20
30
dB
Input impedance
INPUT PGA
20
1
kΩ
Gain range
–12
dB
dB
Gain step size
DIGITAL FILTER PERFORMANCE
Pass band
0.454 fS
±0.02
Hz
Hz
dB
dB
s
Stop band
0.583 fS
–65
Pass-band ripple
Stop-band attenuation
Delay time
17.4/fS
HPF frequency response
–3 dB
0.078 fS
MHz
(6) fIN = 1 kHz, using Audio Precision™ System Two™, RMS mode with 20 kHz LPF, 400 Hz HPF in calculation. Mic amp = 0 dB, PGA =
0 dB.
4
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PCM2912
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SLES216–FEBRUARY 2008
ELECTRICAL CHARACTERISTICS (continued)
All specifications at TA = 25°C, VBUS = 5 V, fS = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless otherwise noted
PCM2912PJT
PARAMETER
TEST CONDITIONS
UNIT
MIN
TYP
MAX
DAC CHARACTERISTICS
Resolution
16
Bits
Audio data channel
1, 2
channel
8, 11.025, 16, 22.05, 32, 44.1,
48
Sampling frequency
kHz
DYNAMIC PERFORMANCE(7)
RL > 10 kΩ, VOUT = 0 dB of 0.6 VCCA
RL = 32 Ω, VOUT = 0 dB of 0.55 VCCA
EIAJ, A-Weighted
0.01%
0.02%
90
0.02%
0.05%
THD+N
Dynamic range
S/N ratio
82
84
80
dB
dB
dB
EIAJ, A-Weighted
92
Channel separation
DC ACCURACY
RL > 10 kΩ
88
Gain mismatch
channel-to-channel
±2
±10 % of FSR
Gain error
Bipolar zero error
±2
±3
±10 % of FSR
% of FSR
ANALOG OUTPUT
RL > 10 kΩ
RL = 32 Ω
0.6 VCCA
0.55 VCCA
0.5 VCCA
13
Output voltage
Center voltage
Output power
Vp-p
V
RL = 32 Ω
RL = 16 Ω
LINE
mW
25
10
16
kΩ
Ω
Load impedance (AC coupling)
HEADPHONE
–3 dB
32
140
kHz
dB
LPF frequency response
f = 20 kHz
–0.1
SIDETONE PROGRAMMABLE ATTENUATOR
Gain range
–76
–76
0
0
dB
dB
Gain step size
1
1
OUTPUT PROGRAMMABLE ATTENUATOR
Gain range
dB
dB
Gain step size
ANALOG LOOPBACK PERFORMANCE(8)
RL > 10 kΩ, VIN = 0 dB of 0.43 VCCA
RL = 32 Ω, VIN = 0 dB of 0.43 VCCA
EIAJ, A-weighted
0.01%
0.02%
90
0.02%
0.05%
THD+N
Dynamic range
S/N ratio
82
84
dB
dB
EIAJ, A-weighted
92
(7) fOUT = 1 kHz, using Audio Precision ™System Two ™, RMS mode with 20 kHz LPF, 400 Hz HPF. Output attenuator = 0 dB,
Sidetone = Mute.
(8) MIC Amp = 0 dB, Sidetone attenuator = 0 dB, Output attenuator = 0 dB.
Copyright © 2008, Texas Instruments Incorporated
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SLES216–FEBRUARY 2008
ELECTRICAL CHARACTERISTICS (continued)
All specifications at TA = 25°C, VBUS = 5 V, fS = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless otherwise noted
PCM2912PJT
PARAMETER
TEST CONDITIONS
UNIT
MIN
TYP
MAX
DIGITAL FILTER PERFORMANCE
Pass band
0.445 fS
±0.1
Hz
Hz
dB
dB
s
Stop band
0.555 fS
–43
Pass-band ripple
Stop-band attenuation
Delay time
14.3/fS
POWER SUPPLY REQUIREMENTS
VBUS
Voltage range
Bus-powered
4.35
5.0
85
5.25
100
300
500
1
VDC
mA
ADC, DAC operation (RL = 32 Ω)
Suspend mode(9)
Supply current
220
425
0.8
µA
ADC, DAC Operation
Suspend mode(9)
mW
mW
Power dissipation
VCCP,VCCL
VCCR,VCCA
VDD
,
,
Internally generated power
supply voltage(10)
3
3.3
3.6
85
VDC
TEMPERATURE RANGE
Operation temperature
Thermal resistance
(9) Under USB suspend state
(10) Pins 5, 15, 19, 21, 26: VDD, VCCA, VCCL, VCCR, VCCP
–25
°C
θJA
32-pin TQFP
80
°C/W
.
6
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Product Folder Link(s): PCM2912
PCM2912
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SLES216–FEBRUARY 2008
DEVICE INFORMATION
PIN ASSIGNMENTS
PCM2912
(TOP VIEW)
24 23 22 21 20 19 18 17
16
VIN
25
26
27
28
29
30
31
32
PGND
VCCP
15 VCCA
14 NC
TEST1
TEST0
SSPND
MMUTE
REC
13
AGND
PCM2912PJT
(32-pin TQFP)
12
VCOM2
11
VCOM1
10
FR
9
FL
PLAY
1
2
3
4
5
6
7
8
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PCM2912
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SLES216–FEBRUARY 2008
TERMINAL FUNCTIONS
TERMINAL
I/O
DESCRIPTIONS
NAME
PJT
1
BGND
VBUS
D–
–
–
Reference for internal regulator.
Connect to USB power (VBUS
2
)
3
I/O USB differential input/output minus(1)
I/O USB differential input/output plus(1)
D+
4
VDD
5
–
Digital power supply(2)
DGND
XTO
XTI
6
Digital ground
7
O
I
Crystal oscillator output
(3)
8
Crystal oscillator input
FL
9
–
–
–
External filter pin of L-channel (optional)
External filter pin of R-channel (optional)
FR
10
11
VCOM1
Common voltage for ADC, DAC and analog front end (VCCA/2). Decouple capacitor should be connected to
AGND.
VCOM2
AGND
NC
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
–
–
–
–
I
Common voltage for headphone (VCCA/2). Decouple capacitor should be connected to AGND.
Analog ground
Not connected
VCCA
VIN
Analog power supply
ADC microphone input
MBIAS
O
O
–
–
–
O
I
Microphone bias output (0.75 VCCA
)
VOUT
VCCL
L
Headphone output for L-channel
Analog power supply for headphone amplifier of L-channel(2)
Analog ground for headphone amplifier
Analog power supply for headphone amplifier of R-channel(2)
HGND
VCCR
VOUT
R
Headphone output for R-channel
Microphone preamplifier gain control (LOW: Preamplifier off, HIGH: Preamplifier on = +20 dB)(3)
MAMP
POWER
PGND
VCCP
(3)
I
Power consumption declaration select pin (LOW: 100 mA, HIGH: 500 mA)
–
–
I
Analog ground for microphone bias, microphone amplifier, and PGA
Analog power supply for PLL(2)
Test pin. Must be set to HIGH(3)
TEST1
TEST0
SSPND
MMUTE
REC
(3)
I
Test pin. Must be set to LOW
O
I
Suspend flag (LOW: Suspend, HIGH: Operational state)
Microphone mute control, active HIGH (LOW: Mute off, HIGH: Mute on)(4)
Status output for record (LOW: Record, FLASH: Mute on recode, HIGH: Stop)(5)
Status output for playback (LOW: Playback, FLASH: Mute on playback, HIGH: Stop)(5)
O
O
PLAY
(1) LV-TTL level
(2) Connect decouple capacitor to corresponding ground.
(3) 3.3-V CMOS level input.
(4) 3.3-V CMOS level input with internal pulldown.
(5) 5 V tolerant, open-drain.
8
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Product Folder Link(s): PCM2912
PCM2912
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SLES216–FEBRUARY 2008
FUNCTIONAL BLOCK DIAGRAM
V
/V
/V
/V
/V
CCA CCP CCL CCR DD
BGND
AGND/ HGND/PGND/DGND
Power
Manager
SSPND
5 V to 3.3 V
Voltage
Regulator
Vref.
V
BUS
MIC
BIAS
MBIAS
PGA + 30 dB ~ –12 dB
in 1 dB steps
D+
D–
ISO- In
Endpoint
MIC
XCVR
FIFO
AMP
V
IN
ADC
+20/0 dB
Selector
USB SIE
Control
Endpoint
POWER
MAMP
Analog
PLL
V
COM2
V
COM1
MMUTE
Analog
PLL
ATT 0 dB ~ –76 dB
in 1 dB steps with Mute
PLAY
REC.
V
V
L
S
OUT
Selector
DAC
ISO- Out
Endpoint
R
FIFO
OUT
S
HP AMP 15 mW (@32 W)
ATT 0 dB ~ –76 dB
TEST 0
TEST 1
in 1 dB steps with Mute
USB Protocol
Controller
FL
FR
Tracker
®
96 MHz
PLL (x16)
(SpAct
)
6.000 MHz
XTI
XTO
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SLES216–FEBRUARY 2008
TYPICAL PERFORMANCE CURVES OF INTERNAL FILTER
All specifications at TA = 25°C, VBUS = 5 V, fS = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless otherwise noted.
ADC Digital Decimation Filter Frequency Response
OVERALL CHARACTERISTIC
STOP-BAND ATTENUATION
0
-40
-80
0
-20
-40
-60
-120
-160
-80
-100
0
8
16
24
Normalized Frequency - x f
32
0
0.2
0.4
0.6
0.8
1
S
Normalized Frequency - x f
S
Figure 1.
Figure 2.
PASS-BAND RIPPLE
TRANSIENT-BAND RESPONSE
0
-4
-8
0.2
0
-0.2
-0.4
-12
-16
-20
-0.6
-0.8
0.46
0.48
0.50
Normalized Frequency - x f
0.52
0.54
0
0.1
0.2
0.3
0.4
0.5
Normalized Frequency - x f
S
S
Figure 3.
Figure 4.
10
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SLES216–FEBRUARY 2008
TYPICAL PERFORMANCE CURVES OF INTERNAL FILTER (continued)
All specifications at TA = 25°C, VBUS = 5 V, fS = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless otherwise noted.
ADC Digital High-Pass Filter Frequency Response
STOP-BAND CHARACTERISTIC
PASS-BAND CHARACTERISTIC
0
0
-0.2
-20
-0.4
-0.6
-40
-60
-0.8
-1
-80
0
1
2
3
4
-100
Normalized Frequency - x f /1000
S
0
0.1
0.2
0.3
0.4
Normalized Frequency - x f /1000
S
Figure 5.
Figure 6.
ADC Analog Antialiasing Filter Frequency Response
PASS-BAND CHARACTERISTIC
STOP-BAND CHARACTERISTIC
0
0
-0.2
-0.4
-10
-20
-30
-0.6
-0.8
-1
-40
-50
0.01
0.1
1
10
100
1
10
100
1000
10000
f - Frequency - kHz
f - Frequency - kHz
Figure 7.
Figure 8.
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SLES216–FEBRUARY 2008
TYPICAL PERFORMANCE CURVES OF INTERNAL FILTER (continued)
All specifications at TA = 25°C, VBUS = 5 V, fS = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless otherwise noted.
DAC Digital Interpolation Filter Frequency Response
PASS-BAND RIPPLE
STOP-BAND ATTENUATION
0
0.2
0
-20
-40
-0.2
-0.4
-60
-80
-0.6
-0.8
-100
0
1
2
3
4
0
0.1
0.2
0.3
0.4
0.5
Normalized Frequency - x f
Normalized Frequency - x f
S
S
Figure 9.
Figure 10.
TRANSIENT-BAND RESPONSE
0
-4
-8
-12
-16
-20
0.46
0.48
0.50
Normalized Frequency - x f
0.52
0.54
S
Figure 11.
12
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SLES216–FEBRUARY 2008
TYPICAL PERFORMANCE CURVES OF INTERNAL FILTER (continued)
All specifications at TA = 25°C, VBUS = 5 V, fS = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless otherwise noted.
DAC Analog FIR Filter Frequency Response
STOP-BAND CHARACTERISTIC
PASS-BAND CHARACTERISTIC
0
-10
-20
0.2
0
-0.2
-0.4
-0.6
-0.8
-30
-40
-50
0
8
16
24
32
0
0.1
0.2
0.3
0.4
0.5
Normalized Frequency - x f
Normalized Frequency - x f
S
S
Figure 12.
Figure 13.
DAC Analog Low-Pass Filter Frequency Response
STOP-BAND CHARACTERISTIC
0
PASS-BAND CHARACTERISTIC
0
-0.2
-10
-0.4
-0.6
-20
-30
-40
-50
-0.8
-1
0.01
0.1
1
10
100
1
10
100
f - Frequency - kHz
1000
10000
f - Frequency - kHz
Figure 14.
Figure 15.
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SLES216–FEBRUARY 2008
TYPICAL PERFORMANCE CURVES
All specifications at TA = 25°C, VBUS = 5 V, fS = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless otherwise noted.
ADC
DYNAMIC RANGE and SNR vs TEMPERATURE
THD+N at -1 dB vs TEMPERATURE
0.01
96
94
92
90
88
86
0.009
0.008
0.007
0.006
0.005
0.004
0.003
SNR
DYNAMIC RANGE
-50
-25
0
25
50
75
100
-50
-25
0
25
50
- Free-Air Temperature - °C
75
100
T
- Free-Air Temperature - °C
T
A
A
Figure 16.
Figure 17.
DYNAMIC RANGE and SNR vs SUPPLY VOLTAGE
THD+N at -1 dB vs SUPPLY VOLTAGE
0.01
0.009
0.008
0.007
0.006
0.005
0.004
0.003
98
96
94
92
90
SNR
DYNAMIC RANGE
88
86
4.2
4.4
4.6
4.8
5
5.2
5.4
4.2
4.4
4.6
4.8
5
5.2
5.4
V
- Supply Voltage - V
BUS
V
- Supply Voltage - V
BUS
Figure 18.
Figure 19.
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TYPICAL PERFORMANCE CURVES (continued)
All specifications at TA = 25°C, VBUS = 5 V, fS = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless otherwise noted.
THD+N at -1 dB vs SAMPLING FREQUENCY
DYNAMIC RANGE and SNR vs SAMPLING FREQUENCY
98
0.01
0.009
0.008
0.007
0.006
0.005
96
94
SNR
92
90
DYNAMIC RANGE
88
0.004
0.003
86
30
30
35
40
45
- Sampling Frequency - kHz
50
35
40
45
- Sampling Frequency - kHz
50
f
S
f
S
Figure 20.
Figure 21.
DAC
THD+N at 0 dB vs TEMPERATURE
DYNAMIC RANGE and SNR vs TEMPERATURE
96
0.01
0.009
0.008
0.007
0.006
94
92
90
SNR
DYNAMIC RANGE
0.005
0.004
0.003
88
86
-50
-25
0
25
50
75
100
T
- Free-Air Temperature - °C
-50
-25
0
25
50
75
100
A
T
- Free-Air Temperature - °C
A
Figure 22.
Figure 23.
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TYPICAL PERFORMANCE CURVES (continued)
All specifications at TA = 25°C, VBUS = 5 V, fS = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless otherwise noted.
DYNAMIC RANGE and SNR vs SUPPLY VOLTAGE
THD+N at 0 dB vs SUPPLY VOLTAGE
0.01
0.009
0.008
98
96
94
SNR
0.007
0.006
0.005
0.004
0.003
92
90
DYNAMIC RANGE
88
86
4.2
4.4
4.6
4.8
5
5.2
5.4
4.2
4.4
4.6
4.8
5
5.2
5.4
V
- Supply Voltage - V
BUS
V
- Supply Voltage - V
BUS
Figure 24.
Figure 25.
THD+N at 0 dB vs SAMPLING FREQUENCY
DYNAMIC RANGE and SNR vs SAMPLING FREQUENCY
98
0.01
0.009
0.008
0.007
0.006
0.005
0.004
0.003
96
94
92
90
88
86
SNR
DYNAMIC RANGE
30
35
40
45
50
f
- Sampling Frequency - kHz
30
35
40
45
50
S
f
- Sampling Frequency - kHz
S
Figure 26.
Figure 27.
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TYPICAL PERFORMANCE CURVES (continued)
All specifications at TA = 25°C, VBUS = 5 V, fS = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless otherwise noted.
Supply Current
SUPPLY CURRENT vs SUPPLY VOLTAGE
SUPPLY CURRENT vs SAMPLING FREQUENCY
100
0.5
0.4
100
90
80
70
60
50
90
Operational current
Suspend Current
80
70
0.3
0.2
0.1
0.0
60
50
4.2
4.45
4.7 4.95
- Supply Voltage - V
5.2
30
35
40
45
50
V
BUS
f
- Sampling Frequency - kHz
S
Figure 28.
Figure 29.
SUPPLY CURRENT vs TEMPERATURE at SUSPEND MODE
0.40
0.35
USB spec limit for device = 0.3 mA
0.30
0.25
0.20
0.15
0.10
-40
-20
0
20
40
60
- Free-Air Temperature - °C
80
100
T
A
Figure 30.
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USB INTERFACE
Control data and audio data are transferred to the PCM2912 via D+ (pin 4) and D– (pin 3). All data to/from the
PCM2912 are performed in full-speed. The following information is described in the device descriptor. The device
descriptor can be modified on request.
Table 1. Device Descriptor
USB revision
2.0 compliant
Device class
0x00 (device defined interface level)
0x00 (not specified)
0x00 (not specified)
8 byte
Device sub class
Device protocol
Max packet size for endpoint 0
Vendor ID
0x08BB
Product ID
0x2910
Device release number
Number of configurations
Vendor string
0x0100 (1.00)
1
String #1 (refer to Table 3)
String #2 (refer to Table 3)
Not supported
Product string
Serial number
The following information is described in the configuration descriptor. The configuration descriptor can be
modified on request.
Table 2. Configuration Descriptor
Interface
3 interfaces
Power attribute
Max power
0x80 (Bus powered, no remote wakeup)
0x32 (100 mA at POWER=Low) / 0xFA (500mA at POWER = High)
The following information is described in the string descriptor. The string descriptor can be modified on request.
Table 3. String Descriptor
#0
#1
#2
0x0409
Burr-Brown from TI
USB audio CODEC
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Device Configuration
Figure 31 illustrates USB audio function topology. The PCM2912 has three interfaces. Each interface is
constructed by some alternative settings.
Endpoint #0
Default endpoint
FU
Endpoint #1
(IF #1)
IT
TID3
OT
TID6
S
UID4
Analog out
Audio streaming interface
UID5
UID2
UID8
F U
IT
TID1
Analog in
F U
Endpoint #2
(IF #2)
IT
TID7
S
UIDA
OT
TIDB
Audio streaming interface
Standard Audio Control interface (IF #0)
Figure 31. USB Audio Function Topology
Interface #0
Interface #0 is for control interface. Alternative setting #0 is the only possible setting for interface #0. Alternative
setting #0 describes the standard audio control interface. Audio control interface is constructed by a terminal.
The PCM2912 has ten terminals as follows.
•
•
•
•
•
•
•
•
•
•
Input Terminal (Terminal ID#1) for audio analog input for sidetone
Feature Unit (Unit ID#2) for sidetone PGA
Input Terminal (Terminal ID#3) for isochronous-out stream
Mixer Unit (Unit ID#4) for sidetone mixing
Feature Unit (Unit ID#5) for analog output PGA
Output Terminal (Terminal ID#6) for audio analog output
Input Terminal (Terminal ID#7) for audio analog input
Feature Unit (Unit ID#8) for analog input PGA
Mixer Unit (Unit ID#A) for analog input
Output Terminal (Terminal ID#B) for isochronous-in stream
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The Input Terminal #3 is defined as USB stream (terminal type 0x0101). The Input Terminal #3 can accept
2-channel audio streams constructed by Left and Right channels. The Output Terminal #6 is defined as a
speaker (terminal type 0x0301). The Input Terminals #1 and #7 are defined as Microphone (terminal type
0x0201). Physically, these two input terminals are the same input, but logically duplicated. The Output Terminal
#B is defined as a USB stream (terminal type 0x0101). The Output Terminal #B is a single-channel audio stream.
The Mixer Unit #4 mixes up the analog input (sidetone) and the audio data of the DAC. The Mixer Unit #A is
placed in front of the Output Terminal #B. The Mixer Unit #A has no impact on record data. The Mixer Units #4
and #A do not have programming capability.
The Feature Unit #5 supports the following sound control features for analog outputs.
•
•
Volume control
Mute control
The built-in volume controller can be manipulated by an audio-class-specific request from 0 dB to –76 dB in
steps of 1 dB. An individual (L and R) channel can be set for different values. The built-in mute controller can be
manipulated by an audio-class-specific request. Only a master mute control request is acceptable.
The Feature Unit #2 supports the following sound control features for analog input (sidetone).
•
•
Volume control
Mute control
The built-in volume controller can be manipulated by an audio-class-specific request from 0 dB to –76 dB in 1-dB
steps. The only master volume control is acceptable. The built-in mute controller can be manipulated by
audio-class-specific request. The only master mute control request is acceptable.
The Feature Unit #8 supports the following sound control features for analog input (microphone record input).
•
•
Volume control
Mute control
The built-in analog volume controller can be manipulated by an audio-class-specific request from +30 dB to –12
dB in 1-dB steps. The built-in mute controller can be manipulated by an audio-class-specific request. The only
master mute control request is acceptable.
Interface #1
Interface #1 is for audio streaming data-out interface. Interface #1 has the following three alternative settings.
Alternative setting #0 is the zero bandwidth setting. All other alternative settings are operational settings.
ALTERNATIVE
SETTING
DATA FORMAT
TRANSFER MODE
SAMPLING RATE
(kHz)
00
01
Zero band width
8, 11.025, 16, 22.05, 32, 44.1,
48
16 bit
16 bit
Stereo
Mono
2s complement (PCM)
2s complement (PCM)
Adaptive
Adaptive
8, 11.025, 16, 22.05, 32, 44.1,
48
02
Interface #2
Interface #2 is for audio streaming data in interface. Interface #2 has the following two alternative settings.
Alternative setting #0 is the Zero Band Width setting. Alternative setting #1 is an operational setting.
ALTERNATIVE
DATA FORMAT
TRANSFER MODE
SAMPLING RATE (kHz)
SETTING
00
Zero band width
2s complement (PCM)
8, 11.025, 16, 22.05, 32,
44.1, 48
01
16 bit
Mono
Asynchronous
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Endpoints
The PCM2912 has three endpoints as follows.
•
•
•
Control endpoint (EP #0)
Isochronous-out audio data stream endpoint (EP #1)
Isochronous-in audio data stream endpoint (EP #2)
The control endpoint is a default endpoint. The control endpoint is used to control all functions of the PCM2912
by the standard USB request and USB audio-class-specific request from the host. Isochronous-out audio data
stream endpoint is an audio sink endpoint, which receives the PCM audio data. The isochronous-out audio data
stream endpoint accepts the adaptive transfer mode. Isochronous-in audio data stream endpoint is an audio
source endpoint, which transmits the PCM audio data. The isochronous-in audio data stream endpoint uses
synchronous transfer mode.
Internal Regulator
All required power sources are generated by five internal regulators.
Each regulator generates 3.3 V (typical, without load) from VBUS (pin 2). Each regulator has an output pin and
ground return pin as follows, and this pair must be decoupled with an appropriate capacitor. Note that this
capacitance affects inrush-current limitation. One band-gap reference circuit supplies reference voltage for all
regulators. BGND (pin 1) is provided for reference ground of the band-gap reference.
SUPPLIED CIRCUIT
Digital
OUTPUT
RETURN
VDD (pin 5)
DGND (pin 6)
AGND (pin 13)
HGND (pin 20)
HGND (pin 20)
PGND (pin 25)
Analog
VCCA (pin 15)
VCCL (pin 19)
VCCR (pin 21)
VCCP (pin 26)
Headphone (L-ch)
Headphone (R-ch)
PLL
Clock and Reset
The PCM2912 requires a 6-MHz (±500 ppm) clock for USB function and audio function, which can be generated
by a built-in crystal oscillator with a 6-MHz crystal resonator. The 6-MHz crystal resonator must be connected to
XTI (pin 8) and XTO (pin 7) with one high (1-MΩ) resistor and two small capacitors, whose capacitance depends
on the load capacitance of the crystal resonator. An external clock can be supplied from XTI; if an external clock
is supplied, XTO must be left open. Because there is no clock disabling signal, using the external clock supply is
not recommended. SSPND (pin 29) is unable to use clock disabling.
The PCM2912 has an internal power-on-reset circuit, which works automatically when VBUS (pin 2) exceeds 2.5
V, typical (2.2 V–2.7 V), and approximately 700 µs is required until the internal reset is released.
DAC
The PCM2912 has the stereo delta-sigma DAC which uses a 64-fS oversampling technique with 8-fS
oversampling digital filter. DAC outputs are provided through the headphone amplifier, VOUTL (pin 18), and VOUT
R
(pin 22) can provides 13 mW at 32 Ω and 0.6 VCCL/VCCR Vp-p at 10-kΩ load.
ADC
The PCM2912 has the mono delta-sigma ADC which uses a 64-fS oversampling technique with 1/64-fS
decimation digital filter. Microphone input, VIN (pin 16), is fed to ADC through +20-dB microphone amplifier and
PGA which has +30 dB to –12 dB in 1-dB steps.
Microphone Bias
The PCM2912 has the microphone bias generator, which provides low-noise, 0.75-VCCA, 2-mA source current
output with appropriate output impedance for electret-microphone driving. This output, MBIAS (pin 17) should be
bypassed to AGND (pin 13) through an appropriate capacitor for reducing output noise level.
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Microphone Amplifier
The PCM2912 has the low-noise, single-ended mono microphone amplifier with mute function which is controlled
by MUTE (pin 30). The signal gain is selectable by MAMP (pin 23). The noise level at input node is 5 µVrms, and
the input impedance is 20 kΩ.
Input PGA
The PCM2912 has the low-noise input programmable gain amplifier (PGA) for the microphone amplifier
output/ADC input, whose gain range is +30 dB to –12 dB in 1dB/step.
Sidetone Programmable Attenuator
The PCM2912 has the low-noise, sidetone programmable attenuator with mute function for the sidetone signal
path (microphone amplifier output to output PGA input), whose gain range is 0 dB to –76 dB in 1 dB/step.
Output Programmable Attenuator
The PCM2912 has the low-noise output programmable attenuator with mute function for mixed signal, which
affects DAC output signal and sidetone signal. The output PGA gain range is 0 dB to –76 dB in 1 dB/step.
VCOM1 and VCCM2
VCOM2 (pin 12) is provided for the center voltage of a headphone amplifier. VCOM1 (pin 11) is provided for the
center voltage of all other analog circuit. Each VCOM pin must be decoupled with an appropriate capacitor.
Because the headphone output is disconnected when entering the suspend state, determining the capacitance is
important to prevent the pop-noise, especially for the VCOM2 (pin 12). The equivalent resistance of VCOM2 is 500
kΩ, and VCOM1 is 15 kΩ.
Filter Pins
FL (pin 9) and FR (pin 10) are provided to make an LPF to decrease the DAC outband noise.
This is optional.
Side Tone
20 kW
20 kW
10 kW
10 kW
DAC
–
+
V
COM
FR/FL
C
f
Figure 32. Filter Circuit
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INTERFACE SEQUENCE
Power-On, Attach, and Play Back Sequence
The PCM2912 is ready for setup when the reset sequence has finished and the USB bus is attached. After a
connection has been established by setup, the PCM2912 is ready to accept USB audio data. While awaiting the
audio data (idle state), the analog output is set to bipolar zero (BPZ).
When receiving the audio data, the PCM2912 stores the first audio packet, which contained 1-ms audio data, into
the internal storage buffer. The PCM2912 starts playing the audio data when detecting the following Start of
Frame (SOF) packet.
5.0 V
(typ.)
V
(pin 2)
0 V
BUS
2.5 V (typ.)
Set configuration
1st audio data
2nd audio data
Bus reset
Bus Idle
D+(pin 4),
D–(pin 3)
SOF
SOF
SOF
SSPND(pin 29)
BPZ
VOUT L (pin 18),
VOUT R (pin 22)
700 µs
Device setup
1 ms
Internal reset
Ready for setup
Ready for playback
Figure 33. Initial Sequence
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Play Stop and Detach Sequence
When the host finishes or aborts the playing back, the PCM2912 stops the playing after last audio data has
played.
VBUS (pin 2)
Audio data
Audio data
Last audio data
D+ (pin 4),
D–(pin 3)
SOF
SOF
SOF
SOF
SOF
VOUT L (pin 18),
VOUT R (pin 22)
1ms
Detach
Figure 34. Play, Stop, and Detach
Record Sequence
The PCM2912 starts the audio capture into the internal memory after receiving the SET_INTERFACE command.
SET_INTERFACE
IN token Audio data
IN token Audio data
IN token Audio data
D+ (pin 4),
D– (pin 3)
SOF
SOF
SOF
SOF
SOF
VIN (pin 16)
1ms
Figure 35. Record Sequence
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Suspend and Resume Sequence
The PCM2912 enters the suspend state after it sees a constant Idle state on the USB bus after approximately 5
ms. When the PCM2912 enters the suspend state, SSPND flag (pin 29) is asserted. The PCM2912 wakes up
immediately when detecting the non-idle state on the USB bus.
Idle
D+(pin 4),
D–(pin 3)
SSPND (pin 29)
5 ms
Suspend
VOUT L (pin18),
VOUT R (pin22)
Active
2.5 ms
Active
Figure 36. Suspend and Resume
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TYPICAL CIRCUIT CONNECTION
A bus-powered (Hi-power), +20-dB microphone amplifier application example follows.
Headphone
Microphone
R11
R10
R8
R7
R5
C13
C12
C16
C15
C10
R6
R9
C9
C11
C14
POWER
MBIAS
24 23 22 21 20 19 18 17
C17
16
15
14
13
12
11
10
9
PGND
VIN
25
26
27
28
29
30
31
VCCP
C8
VCCA
N.C.
AGND
VCOM2
VCOM1
FR
TEST1
TEST0
PCM2912
C7
C6
SSPND
MMUTE
REC
Mic Mute
C5
C4
FL
32 PLAY
R13
R12
BGND
1
2
3
4
5
6
7
8
C18
L1
C1
R4
REC.
PLAY
X1
C3
R1
R2 R3
C2
USB Connector
D+ GND
VBUS
D
–
NOTE: X1: 6-MHz crystal resonator
C1, C8, C11, C14, C17, C18: 1 µF ceramic
C2, C3: 10 pF to 33 pF (depending on load capacitance of crystal resonator)
C4, C5: 100 pF ceramic
C6, C10: 3.3 µF
C7: 0.1 µF
C9: 0.22 µF electrolytic (depending on required frequency response for microphone input)
C12, C15: 0.022 µF ceramic
C13, C16: 100 µF electrolytic (depending on required frequency response for headphone output)
R1, R2: 22 Ω to 33 Ω
R3: 1.5 kΩ
R4: 1 MΩ
R5: 1 kΩ (depending on microphone characteristic)
R6, R9: 16 Ω
R7, R8, R10, R11: 3.3 kΩ
R12, R13: 820 Ω (depending on LED drive current)
L1: 1 µH (DC resistance <0.6 Ω)
It is possible to change maximum power, if total power of actual application does not require over 100 mA (POWER =
Low to configure as low-power device).
Figure 37. USB Headset Application
NOTE:
The preceding circuit is for information only. Total board design should be considered
in order to meet the USB specification as a USB-compliant product.
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Related Documentation from Texas Instruments
For additional information concerning the PCM2912 device, see TI application report Operating Envronments for
PCM2912 Applications (SLAA387).
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PACKAGE OPTION ADDENDUM
www.ti.com
20-Mar-2008
PACKAGING INFORMATION
Orderable Device
PCM2912PJT
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
TQFP
PJT
32
32
32
32
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
PCM2912PJTG4
PCM2912PJTR
PCM2912PJTRG4
TQFP
TQFP
TQFP
PJT
PJT
PJT
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
1000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
1000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Mar-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) W1 (mm)
(mm) (mm) Quadrant
PCM2912PJTR
TQFP
PJT
32
1000
330.0
16.4
9.6
9.6
1.5
12.0
16.0
Q2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Mar-2008
*All dimensions are nominal
Device
Package Type Package Drawing Pins
TQFP PJT 32
SPQ
Length (mm) Width (mm) Height (mm)
346.0 346.0 33.0
PCM2912PJTR
1000
Pack Materials-Page 2
MECHANICAL DATA
MPQF112 – NOVEMBER 2001
PJT (S-PQFP–N32)
PLASTIC QUAD FLATPACK
0,45
0,30
0,80
M
0,20
0,20
0,09
Gage Plane
32
0,15
0,05
0,25
1
0°– 7°
7,00
9,00
SQ
SQ
0,75
0,45
1,05
0,95
Seating Plane
0,10
1,20
1,00
4203540/A 11/01
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-026
1
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