OPA827AIDG4 [TI]
Low-Noise, High-Precision, JFET-Input OPERATIONAL AMPLIFIER; 低噪声，高精度， JFET输入运算放大器
| 型号： | OPA827AIDG4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | Low-Noise, High-Precision, JFET-Input OPERATIONAL AMPLIFIER |
| 文件： | 总24页 (文件大小：874K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
OPA827
www.ti.com ..................................................................................................................................... SBOS376E–NOVEMBER 2006–REVISED SEPTEMBER 2008
Low-Noise, High-Precision, JFET-Input
OPERATIONAL AMPLIFIER
1
FEATURES
DESCRIPTION
2
•
INPUT VOLTAGE NOISE DENSITY:
The OPA827 series of JFET operational amplifiers
combine outstanding dc precision with excellent ac
performance. These amplifiers offer low offset voltage
(150µV, max), very low drift over temperature
(1.5µV/°C, typ), low bias current (15pA, typ), and very
low 0.1Hz to 10Hz noise (250nVPP, typ). The device
operates over a wide supply voltage range, ±4V to
±18V on a low supply current (4.8mA/Ch, typ).
xx4nV/√Hz at 1kHz
•
INPUT VOLTAGE NOISE:
xx0.1Hz to 10Hz: 250nVPP
•
•
•
•
•
•
•
INPUT BIAS CURRENT: 15pA
INPUT OFFSET VOLTAGE: 150µV (max)
INPUT OFFSET DRIFT: 1.5µV/°C
GAIN BANDWIDTH: 22MHz
Excellent ac characteristics, such as a 22MHz gain
bandwidth product (GBW), a slew rate of 28V/µs, and
precision dc characteristics make the OPA827 series
well-suited for a wide range of applications including
16-bit to 18-bit mixed signal systems, transimpedance
(I/V-conversion) amplifiers, filters, precision ±10V
front ends, and professional audio applications.
The OPA827 is available in both SO-8 and MSOP-8(1)
surface-mount packages, and is specified from –40°C
to +125°C.
SLEW RATE: 28V/µs
QUIESCENT CURRENT: 4.8mA/Ch
WIDE SUPPLY RANGE: ±4V to ±18V
PACKAGES: SO-8 and MSOP-8(1)
MSOP-8 (DGK) package is product preview.
•
(1)
APPLICATIONS
•
•
•
•
•
•
•
•
•
ADC DRIVERS
DAC OUTPUT BUFFERS
TEST EQUIPMENT
MEDICAL EQUIPMENT
PLL FILTERS
SEISMIC APPLICATIONS
TRANSIMPEDANCE AMPLIFIERS
INTEGRATORS
ACTIVE FILTERS
INPUT VOLTAGE NOISE DENSITY
vs FREQUENCY
0.1Hz to 10Hz NOISE
100
10
1
VS = ±18V
0.1
1
10
100
1k
10k
Time (1s/div)
Frequency (Hz)
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
All trademarks are the property of their respective owners.
UNLESS OTHERWISE NOTED this document contains
PRODUCTION DATA information current as of publication date.
Products conform to specifications per the terms of Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2006–2008, Texas Instruments Incorporated
OPA827
SBOS376E–NOVEMBER 2006–REVISED SEPTEMBER 2008..................................................................................................................................... www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
PACKAGE/ORDERING INFORMATION(1)
PRODUCT
Standard Grade
PACKAGE-LEAD
PACKAGE DESIGNATOR
PACKAGE MARKING
OPA827AI
OPA827AI(2)
SO-8
D
OPA827A
NSP
MSOP-8
DGK
High Grade
SO-8
D
OPA827
NSP
OPA827I(2)
MSOP-8
DGK
(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Shaded cells indicate product preview devices.
ABSOLUTE MAXIMUM RATINGS(1)
Over operating free-air temperature range (unless otherwise noted).
PARAMETER
VALUE
UNIT
V
Supply Voltage
VS = (V+) – (V–)
40
Input Voltage(2)
(V–) – 0.5 to (V+) + 0.5
V
Input Current(2)
±10
±VS
mA
V
Differential Input Voltage
Output Short-Circuit(3)
Operating Temperature
Storage Temperature
Junction Temperature
Continuous
TA
TA
TJ
–55 to +150
–65 to +150
+150
°C
°C
°C
V
Human Body Model (HBM)
4000
ESD Ratings
Charged Device Model (CDM)
1000
V
(1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not supported.
(2) Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.5V beyond the supply rails should
be current-limited to 10mA or less.
(3) Short-circuit to VS/2 (ground in symmetrical dual-supply setups).
2
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Product Folder Link(s): OPA827
OPA827
www.ti.com ..................................................................................................................................... SBOS376E–NOVEMBER 2006–REVISED SEPTEMBER 2008
ELECTRICAL CHARACTERISTICS: VS = ±4V to ±18V
Boldface limits apply over the specified temperature range, TA = –40°C to +125°C.
At TA = +25°C, RL = 10kΩ connected to midsupply, VCM = VOUT = midsupply, unless otherwise noted.
STANDARD GRADE
OPA827AI
HIGH GRADE
OPA827I(1)(2)
PARAMETER
OFFSET VOLTAGE
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNIT
Input Offset Voltage
Drift
VOS
dVOS/dT
PSRR
VS = ±15V, VCM = 0V
75
1.5
0.2
150
50
1.5
0.2
75
µV
µV/°C
µV/V
µV/V
vs Power Supply
Over Temperature
INPUT BIAS CURRENT
Input Bias Current
1
1
3
3
IB
IOS
en
±15
±10
250
±50
±5
±15
±10
250
±50
±5
pA
nA
nA
pA
–40°C to +85°C
Over Temperature
Input Offset Current
NOISE
–40°C to +125°C
±50
±50
±50
±50
Input Voltage Noise:
f = 0.1Hz to 10Hz
Input Voltage Noise Density:
f = 1kHz
VS = ±18V, VCM = 0V
nVPP
en
en
VS = ±18V, VCM = 0V
VS = ±18V, VCM = 0V
4
4
nV/√Hz
nV/√Hz
f = 10kHz
3.8
3.8
Input Current Noise Density:
f = 1kHz
in
VS = ±18V, VCM = 0V
2.2
2.2
fA/√Hz
INPUT VOLTAGE RANGE
Common-Mode Voltage
Range
VCM
(V–)+3
104
(V+)–3
(V–)+3
114
(V+)–3
V
Common-Mode Rejection
Ratio
CMRR (V−)+3V ≤ VCM ≤ (V+)−3V, VS < 10V
114
126
120
126
dB
(V−)+3V ≤ VCM ≤ (V+)−3V, VS ≥ 10V
(V−)+3V ≤ VCM ≤ (V+)−3V, VS < 10V
(V−)+3V ≤ VCM ≤ (V+)−3V, VS ≥ 10V
114
100
110
120
100
110
dB
dB
dB
Over Temperature
INPUT IMPEDANCE
Differential
1013
1013
9
9
1013
1013
9
9
Ω
Ω
pF
pF
Common-Mode
OPEN-LOOP GAIN
Open-Loop Voltage Gain
Over Temperature
FREQUENCY RESPONSE
Gain-Bandwidth Product
Slew Rate
AOL (V–)+3V ≤ VO ≤ (V+)–3V, RL = 1kΩ
(V–)+3V ≤ VO ≤ (V+)–3V, RL = 1kΩ
120
126
120
126
dB
dB
114
114
GBW
SR
tS
G = +1
G = –1
22
28
22
28
MHz
V/µs
ns
Settling Time, ±0.01%
0.00075% (16-bit)
10V Step, G = –1, CL = 100pF
10V Step, G = –1, CL = 100pF
Gain = –10
550
850
150
550
850
150
ns
Overload Recovery Time
ns
Total Harmonic Distortion +
Noise
THD+N
G = +1, f = 1kHz
0.00004
–128
0.00004
–128
%
VO = 3VRMS, RL = 600Ω
dB
(1) Shaded cells indicate different specifications from standard grade version of device.
(2) High-grade specifications are preview only.
Copyright © 2006–2008, Texas Instruments Incorporated
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OPA827
SBOS376E–NOVEMBER 2006–REVISED SEPTEMBER 2008..................................................................................................................................... www.ti.com
ELECTRICAL CHARACTERISTICS: VS = ±4V to ±18V (continued)
Boldface limits apply over the specified temperature range, TA = –40°C to +125°C.
At TA = +25°C, RL = 10kΩ connected to midsupply, VCM = VOUT = midsupply, unless otherwise noted.
STANDARD GRADE
OPA827AI
HIGH GRADE
OPA827I(1)(2)
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNIT
OUTPUT
Voltage Output Swing
Over Temperature
Output Current
RL = 1kΩ, AOL > 120dB
RL = 1kΩ, AOL > 114dB
|VS – VOUT| < 3V
(V–)+3
(V+)–3
(V–)+3
(V+)–3
V
V
(V–)+3
(V+)–3
(V–)+3
(V+)–3
IOUT
ISC
CLOAD
ZO
30
30
mA
mA
Short-Circuit Current
Capacitive Load Drive
±65
±65
See Typical Characteristics
See Typical Characteristics
Open-Loop Output
Impedance
POWER SUPPLY
Specified Voltage
VS
IQ
±4
±18
5.2
±4
±18
5.2
V
Quiescent Current
(per amplifier)
IOUT = 0A
4.8
4.8
mA
Over Temperature
TEMPERATURE RANGE
Specified Range
6
6
mA
TA
TA
–40
–55
+125
+150
–40
–55
+125
+150
°C
°C
Operating Range
Thermal Resistance
SO-8, MSOP-8(3)
θJA
150
150
°C/W
(3) MSOP-8 (DGK) package is product preview.
PIN CONFIGURATION
D, DGK(1) PACKAGES
SO-8, MSOP-8(1)
(TOP VIEW)
NC(2)
-In
1
2
3
4
8
7
6
5
NC(2)
V+
+In
Out
V-
NC(2)
(1) MSOP-8 (DGK) package is product preview.
(2) NC denotes no internal connection.
4
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Product Folder Link(s): OPA827
OPA827
www.ti.com ..................................................................................................................................... SBOS376E–NOVEMBER 2006–REVISED SEPTEMBER 2008
TYPICAL CHARACTERISTICS: VS = ±18V
At TA = +25°C, RL = 10kΩ connected to midsupply, VCM = VOUT = midsupply, unless otherwise noted.
INPUT VOLTAGE NOISE DENSITY
vs FREQUENCY
INTEGRATED INPUT VOLTAGE NOISE
vs BANDWIDTH
100
10
1
100
10
VPP
1
VRMS
0.1
0.01
Noise Bandwidth: 0.1Hz
to indicated frequency.
0.1
1
10
100
1k
10k
1
10
100
1k
10k
100k
1M
10M
Bandwidth (Hz)
Frequency (Hz)
Figure 1.
Figure 2.
TOTAL HARMONIC DISTORTION + NOISE RATIO
vs FREQUENCY
TOTAL HARMONIC DISTORTION + NOISE RATIO
vs AMPLITUDE
1
0.1
-40
0.001
-100
VS = ±15V
RL = 600W
1kHz Signal
VS = ±15V
RL = 600W
VOUT = 3VRMS
-60
0.01
-80
0.0001
-120
G = 11
G = 11
0.001
0.0001
0.00001
-100
-120
-140
G = 1
G = 1
0.00001
-140
10
100
1k
10k 20k
0.01
0.1
1
10
100
Frequency (Hz)
Output Voltage Amplitude (VRMS
)
Figure 3.
Figure 4.
0.1Hz to 10Hz NOISE
Time (1s/div)
Figure 5.
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TYPICAL CHARACTERISTICS: VS = ±18V (continued)
At TA = +25°C, RL = 10kΩ connected to midsupply, VCM = VOUT = midsupply, unless otherwise noted.
OFFSET VOLTAGE
PRODUCTION DISTRIBUTION
OFFSET VOLTAGE DRIFT
PRODUCTION DISTRIBUTION
VS = ±15V
-40°C to +125°C
VS = ±15V
Offset Voltage (mV)
Offset Voltage Drift (mV/°C)
Figure 6.
Figure 7.
OFFSET VOLTAGE
vs COMMON-MODE VOLTAGE
OFFSET VOLTAGE
vs COMMON-MODE VOLTAGE
250
100
150
100
50
250
100
150
100
50
10 Typical Units Shown
10 Typical Units Shown
VS = 8V
VS = 36V
0
0
-50
-100
-150
-200
-250
-50
-100
-150
-200
-250
3.0 3.2 3.4 3.6 3.8 4.0 4.2 4.4 4.6
VCM (V)
3
8
13
18
23
4.8 5.0
28
33
VCM (V)
Figure 8.
Figure 9.
OFFSET VOLTAGE DRIFT
vs TEMPERATURE
VOS WARMUP
15
10
5
0
-5
-10
-15
-20
-25
-30
-35
-40
-45
-50
-55
-60
-65
250
100
150
100
50
VS = ±15V
Specified Temperature Range
0
-50
-100
-150
-200
-250
VS = ±15V
20 Typical Units Shown
0
50
100
150
200
250
300
-75 -50 -25
0
25
50
75
100
125 150
Time (s)
Temperature (°C)
Figure 10.
Figure 11.
6
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Product Folder Link(s): OPA827
OPA827
www.ti.com ..................................................................................................................................... SBOS376E–NOVEMBER 2006–REVISED SEPTEMBER 2008
TYPICAL CHARACTERISTICS: VS = ±18V (continued)
At TA = +25°C, RL = 10kΩ connected to midsupply, VCM = VOUT = midsupply, unless otherwise noted.
INPUT BIAS CURRENT AND OFFSET CURRENT
vs SUPPLY VOLTAGE
INPUT BIAS CURRENT
vs COMMON-MODE VOLTAGE
0
-5
20
15
IOS
Specified Common-Mode
Voltage Range
Unit 1
+IB
10
5
-10
-15
-20
-25
0
-IB
Unit 3
-5
-10
-15
-20
Unit 2
4
6
8
10
12
14
16
18
125 150
125 150
-18 -15 -12 -9 -6 -3
0
3
6
9
12 15
18
VS (±V)
VCM (V)
Figure 12.
Figure 13.
NORMALIZED QUIESCENT CURRENT
vs TIME
INPUT BIAS CURRENT vs TEMPERATURE
500
450
400
350
300
250
200
150
100
50
0.05
0
10 Typical Units Shown
-0.05
-0.10
-0.15
-0.20
-0.25
-0.30
-0.35
-0.40
-0.45
+IB
-IB
0
-50
-75 -50 -25
0
25
50
75
100
0
50
100
150
200
250
300
Temperature (°C)
Time (s)
Figure 14.
Figure 15.
QUIESCENT CURRENT
vs TEMPERATURE
QUIESCENT CURRENT
vs SUPPLY VOLTAGE
6.0
5.5
5.0
4.5
4.0
3.5
5.00
4.95
4.90
4.85
4.80
4.75
4.70
4.65
4.60
VS = ±18V
VS = ±5V
-75 -50 -25
0
25
50
75
100
8
13
18
23
28
33
38
Temperature (°C)
VS (V)
Figure 16.
Figure 17.
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TYPICAL CHARACTERISTICS: VS = ±18V (continued)
At TA = +25°C, RL = 10kΩ connected to midsupply, VCM = VOUT = midsupply, unless otherwise noted.
OUTPUT VOLTAGE SWING
vs OUTPUT CURRENT
OUTPUT VOLTAGE SWING
vs OUTPUT CURRENT
5
4
16
12
8
VS = ±5V
VS = ±18V
-55°C
-40°C
3
2
4
1
+150°C
+125°C
+25°C
+150°C +125°C +85°C
0
0
+85°C
-40°C
-40°C
-55°C
+25°C
-1
-2
-3
-4
-5
-4
-8
-12
-16
-55°C
20
30
40
50
60
70
48
53
58
63
68
73
73
Output Current (mA)
Output Current (mA)
Figure 18.
Figure 19.
POWER-SUPPLY REJECTION RATIO
vs FREQUENCY
COMMON-MODE REJECTION RATIO
vs FREQUENCY
180
160
140
120
100
80
140
120
100
80
Referred to Input
VS ³ 10V
Positive
Negative
60
60
40
40
20
0
20
0.1
1
10
100
1k
10k 100k 1M
0.1
1
10
100
1k
10k 100k 1M
10M 100M
10M 100M
Frequency (Hz)
Frequency (Hz)
Figure 20.
Figure 21.
POWER-SUPPLY REJECTION RATIO
vs TEMPERATURE
COMMON-MODE REJECTION RATIO
vs TEMPERATURE
0.30
0.25
0.20
0.15
0.10
0.05
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
-0.2
-0.4
-75 -50 -25
0
25
50
75
100
-75 -50 -25
0
25
50
75
100 125
125 150
150
Temperature (°C)
Temperature (°C)
Figure 22.
Figure 23.
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TYPICAL CHARACTERISTICS: VS = ±18V (continued)
At TA = +25°C, RL = 10kΩ connected to midsupply, VCM = VOUT = midsupply, unless otherwise noted.
OPEN-LOOP GAIN AND PHASE
vs FREQUENCY
CLOSED-LOOP GAIN
vs FREQUENCY
50
40
140
120
100
80
0
G = +101
30
-45
-90
-135
-180
G = +11
G = +1
20
Phase
10
60
0
40
-10
-20
-30
20
0
Gain
1M 10M
-20
100
1k
10k
100k
1M
10M
100M
1
10
100
1k
10k 100k
100M
Frequency (Hz)
Frequency (Hz)
Figure 24.
Figure 25.
OPEN-LOOP GAIN
vs TEMPERATURE
OPEN-LOOP OUTPUT IMPEDANCE
vs FREQUENCY
1.2
1.0
0.8
0.6
0.4
0.2
1000
100
10
RL = 1kW
1
100
1k
10k
100k
1M
10M
-75 -50 -25
0
25
50
75
100
100M
125 150
Temperature (°C)
Frequency (Hz)
Figure 26.
Figure 27.
SMALL-SIGNAL OVERSHOOT
vs CAPACITIVE LOAD
NO PHASE REVERSAL
70
60
50
40
30
20
10
0
100mV Output Step
G = +1
Output
G = -1
+18V
OPA827
Output
-18V
37VPP
Sine Wave
(±18.5V)
0.5ms/div
0
100 200 300 400 500 600 700 800 900
Capacitive Load (pF)
1000
Figure 28.
Figure 29.
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TYPICAL CHARACTERISTICS: VS = ±18V (continued)
At TA = +25°C, RL = 10kΩ connected to midsupply, VCM = VOUT = midsupply, unless otherwise noted.
POSITIVE OVERLOAD RECOVERY
NEGATIVE OVERLOAD RECOVERY
G = -10
G = -10
VOUT
VIN
0V
0V
10kW
10kW
1kW
1kW
VIN
VOUT
OPA827
VOUT
OPA827
VIN
VIN
VOUT
Time (0.5ms/div)
Time (0.5ms/div)
Figure 30.
Figure 31.
SMALL-SIGNAL STEP RESPONSE
SMALL-SIGNAL STEP RESPONSE
G = +1
RL = 1kW
CL = 100pF
C1
5.6pF
+18V
OPA827
-18V
R1
R2
1kW
1kW
+18V
OPA827
-18V
CL
RL
CL
G = -1
CL = 100pF
Time (0.1ms/div)
Time (0.1ms/div)
Figure 32.
Figure 33.
LARGE-SIGNAL STEP RESPONSE
LARGE-SIGNAL STEP RESPONSE
G = +1
RL = 1kW
CL = 100pF
Time (0.5ms/div)
Time (0.5ms/div)
Figure 34.
Figure 35.
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TYPICAL CHARACTERISTICS: VS = ±18V (continued)
At TA = +25°C, RL = 10kΩ connected to midsupply, VCM = VOUT = midsupply, unless otherwise noted.
LARGE-SIGNAL POSITIVE SETTLING TIME
(10VPP, CL = 100pF)
LARGE-SIGNAL POSITIVE SETTLING TIME
(10VPP, CL = 10pF)
1.0
0.8
0.010
1.0
0.8
0.010
0.008
0.006
0.004
0.002
0
0.008
0.006
0.004
0.002
0
0.6
0.6
0.4
0.4
16-Bit
Settling
16-Bit
Settling
0.2
0.2
0
0
-0.2
-0.4
-0.6
-0.8
-1.0
-0.002
-0.004
-0.006
-0.008
-0.010
-0.2
-0.4
-0.6
-0.8
-1.0
-0.002
-0.004
-0.006
-0.008
-0.010
(±1/2 LSB =
±0.00075%)
(±1/2 LSB =
±0.00075%)
0
100 200 300 400 500 600 700 800 900 1000
Time (ns)
0
100 200 300 400 500 600 700 800 900 1000
Time (ns)
Figure 36.
Figure 37.
LARGE-SIGNAL NEGATIVE SETTLING TIME
(10VPP, CL = 100pF)
LARGE-SIGNAL NEGATIVE SETTLING TIME
(10VPP, CL = 10pF)
1.0
0.8
0.010
1.0
0.8
0.010
0.008
0.006
0.004
0.002
0
0.008
0.006
0.004
0.002
0
0.6
0.6
0.4
0.4
16-Bit
Settling
16-Bit
Settling
0.2
0.2
0
0
-0.2
-0.4
-0.6
-0.8
-1.0
-0.002
-0.004
-0.006
-0.008
-0.010
-0.2
-0.4
-0.6
-0.8
-1.0
-0.002
-0.004
-0.006
-0.008
-0.010
(±1/2 LSB =
±0.00075%)
(±1/2 LSB =
±0.00075%)
0
100 200 300 400 500 600 700 800 900 1000
Time (ns)
0
100 200 300 400 500 600 700 800 900 1000
Time (ns)
Figure 38.
Figure 39.
SHORT-CIRCUIT CURRENT
vs TEMPERATURE
80
60
Sourcing
40
20
0
-20
-40
-60
-80
Sinking
-75
-25
25
75
125
175
Temperature (°C)
Figure 40.
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APPLICATION INFORMATION
The OPA827 is
a
unity-gain stable, precision
The equation in Figure 41 shows the calculation of
the total circuit noise, with these parameters:
operational amplifier with very low noise, input bias
current, and input offset voltage. Applications with
noisy or high impedance power supplies require
decoupling capacitors placed close to the device pins.
In most cases, 0.1µF capacitors are adequate.
•
•
•
•
•
en = voltage noise
in = current noise
RS = source impedance
k = Boltzmann's constant = 1.38 × 10–23 J/K
T = temperature in kelvins
OPERATING VOLTAGE
The OPA827 series of op amps can be used with
single or dual supplies from an operating range of
VS = +8V (±4V) and up to VS = +36V (±18V). This
device does not require symmetrical supplies; it only
requires a minimum supply voltage of 8V. Supply
voltages higher than +40V (±20V) can permanently
damage the device; see the Absolute Maximum
Ratings table. Key parameters are specified over the
operating temperature range, TA = –40°C to +125°C.
Key parameters that vary over the supply voltage or
temperature range are shown in the Typical
Characteristics section of this data sheet.
For more details on calculating noise, see the Basic
Noise Calculations section.
10k
EO
OPA211
1k
RS
100
OPA827
Resistor Noise
10
NOISE PERFORMANCE
EO2 = en2 + (in RS)2 + 4kTRS
1
Figure 41 shows the total circuit noise for varying
source impedances with the operational amplifier in a
unity-gain configuration (with no feedback resistor
network and therefore no additional noise
contributions). The OPA827 (GBW = 22MHz) and
OPA211 (GBW = 80MHz) are both shown in this
example with total circuit noise calculated. The op
100
1k
10k
100k
1M
Source Resistance, RS (W)
Figure 41. Noise Performance of the OPA827 and
OPA211 in Unity-Gain Buffer Configuration
amp itself contributes both
a
voltage noise
BASIC NOISE CALCULATIONS
component and a current noise component. The
voltage noise is commonly modeled as a time-varying
component of the offset voltage. The current noise is
modeled as the time-varying component of the input
bias current and reacts with the source resistance to
create a voltage component of noise. Therefore, the
lowest noise op amp for a given application depends
on the source impedance. For low source impedance,
current noise is negligible, and voltage noise
generally dominates. The OPA827 family has both
low voltage noise and lower current noise because of
the FET input of the op amp. Very low current noise
allows for excellent noise performance with source
impedances greater than 10kΩ. The OPA211 has
lower voltage noise and higher current noise. The low
voltage noise makes the OPA211 a better choice for
low source impedances (less than 2kΩ). For high
source impedance, current noise may dominate, and
makes the OPA827 series amplifier the better choice.
Low-noise circuit design requires careful analysis of
all noise sources. External noise sources can
dominate in many cases; consider the effect of
source resistance on overall op amp noise
performance. Total noise of the circuit is the
root-sum-square
components.
combination
of
all
noise
The resistive portion of the source impedance
produces thermal noise proportional to the square
root of the resistance. This function is plotted in
Figure 41. The source impedance is usually fixed;
consequently, select the op amp and the feedback
resistors to minimize the respective contributions to
the total noise.
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Figure 42 illustrates both noninverting (A) and
inverting (B) op amp circuit configurations with gain.
In circuit configurations with gain, the feedback
network resistors also contribute noise. The current
noise of the op amp reacts with the feedback
resistors to create additional noise components.
The feedback resistor values can generally be
chosen to make these noise sources negligible. Note
that low impedance feedback resistors will load the
output of the amplifier. The equations for total noise
are shown for both configurations.
A) Noise in Noninverting Gain Configuration
Noise at the output:
R2
2
2
R2
R1
R2
R1
2
EO
R1
=
1 +
en2 + e12 + e22 + (inR2)2 + eS2 + (inRS)2 1 +
EO
R2
Where eS = Ö4kTRS
e1 = Ö4kTR1
´
= thermal noise of RS
1 +
R1
RS
R2
R1
´
= thermal noise of R1
VS
e2 = Ö4kTR2 = thermal noise of R2
B) Noise in Inverting Gain Configuration
Noise at the output:
R2
2
R2
2
EO
2
=
1 +
en2 + e12 + e22 + (inR2)2 + eS
R1
R1 + RS
EO
RS
R2
Where eS = Ö4kTRS
e1 = Ö4kTR1
´
= thermal noise of RS
= thermal noise of R1
R1 + RS
VS
R2
´
R1 + RS
e2 = Ö4kTR2 = thermal noise of R2
For the OPA827 series op amps at 1kHz, en = 4nV/ÖHz and in = 2.2fA/ÖHz.
Figure 42. Noise Calculation in Gain Configurations
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TOTAL HARMONIC DISTORTION
MEASUREMENTS
of the circuit. The closed-loop gain is unchanged, but
the feedback available for error correction is reduced
by a factor of 101, thus extending the resolution by
101. Note that the input signal and load applied to the
op amp are the same as with conventional feedback
without R3. The value of R3 should be kept small to
minimize its effect on the distortion measurements.
The OPA827 series op amps have excellent distortion
characteristics. THD + Noise is below 0.0001%
(G = +1, VO = 3VRMS) throughout the audio frequency
range, 20Hz to 20kHz, with a 600Ω load (see
Figure 3).
The validity of this technique can be verified by
duplicating measurements at high gain and/or high
frequency where the distortion is within the
measurement capability of the test equipment.
Measurements for this data sheet were made with an
Audio Precision System Two distortion/noise
analyzer, which greatly simplifies such repetitive
The distortion produced by the OPA827 series is
below the measurement limit of many commercially
available testers. However, a special test circuit
(illustrated in Figure 43) can be used to extend the
measurement capabilities.
Op amp distortion can be considered an internal error
source that can be referred to the input. Figure 43
shows a circuit that causes the op amp distortion to
be 101 times greater than that distortion normally
produced by the op amp. The addition of R3 to the
measurements. This
measurement
technique,
however, can be performed with manual distortion
measurement instruments.
otherwise
standard
noninverting
amplifier
configuration alters the feedback factor or noise gain
R1
R2
SIGNAL DISTORTION
R1
R2
R3
GAIN
1
GAIN
101
¥
1kW
10W
11W
R3
OPA827
VO = 3VRMS
11
101
100W 1kW
R2
R1
Signal Gain = 1+
R2
Distortion Gain = 1+
R1 II R3
Generator
Output
Analyzer
Input
Audio Precision
System Two(1)
RL
600W
with PC Controller
NOTE: (1) Measurement BW = 80kHz.
Figure 43. Distortion Test Circuit
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CAPACITIVE LOAD AND STABILITY
The combination of gain bandwidth product (GBW)
and near constant open loop output impedance (ZO)
VIN
over frequency gives the OPA827 the ability to drive
large capacitive loads. Figure 44 shows the OPA827
connected in a buffer configuration (G = +1) while
driving a 2.2µF ceramic capacitor (with an ESR value
of approximately 0Ω). The small overshoot and fast
settling time are results of good phase margin. This
VOUT
feature provides superior performance compared to
the competition. Figure 44 and Figure 45 were taken
without any resistive load in parallel to shorten the
20ms/div
ringing time.
In Figure 45, the OPA827 is driving a 2.2µF tantalum
Figure 44. OPA827 Driving 2.2µF Ceramic
capacitor. A relatively small ESR that is internal to the
Capacitor
capacitor additionally improves phase margin and
provides an output waveform with no ringing and
minimal overshoot. Figure 45 shows a stable system
that can be used in almost any application.
VIN
Capacitive load drive depends on the gain and
overshoot requirements of the application. Capacitive
loads limit the bandwidth of the amplifier. Increasing
the gain enhances the ability of the amplifier to drive
greater capacitive loads (see Figure 28).
VOUT
PHASE-REVERSAL PROTECTION
The OPA827 family has internal phase-reversal
protection. Many FET-input op amps exhibit a phase
reversal when the input is driven beyond its linear
20ms/div
common-mode range. This condition is most often
encountered in noninverting circuits when the input is
Figure 45. OPA827 Driving 2.2µF Tantalum
driven beyond the specified common-mode voltage
Capacitor
range, causing the output to reverse into the opposite
rail. The input circuitry of the OPA827 prevents phase
reversal with excessive common-mode voltage;
instead, the output limits into the appropriate rail (see
Figure 29).
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TRANSIMPEDANCE AMPLIFIER
Bandwidth (f–3dB) calculated by Equation 2:
UGBW
2pRF(CTOT
The gain bandwidth, low voltage noise, and current
noise of the OPA827 series make them ideal wide
f
=
Hz
-3dB
)
(2)
bandwidth
transimpedance
amplifiers
in
a
These equations result in maximum transimpedance
bandwidth. For additional information, refer to
photo-conductive application. High transimpedance
gains with feedback resistors greater than 100kΩ
benefit from the low input current noise (2.2fA/Hz) of
the JFET input. Low voltage noise is important
because photodiode capacitance causes the effective
noise gain in the circuit to increase at high
frequencies. Total input capacitance of the circuit
limits the overall gain bandwidth of the amplifier and
is addressed below. Figure 46 shows a photodiode
transimpedance application.
Application
Bulletin
SBOA055,
Compensate
Transimpedance Amplifiers Intuitively, available for
download at www.ti.com.
(1)
CF
< 1pF
RF
1MW
Key Transimpedance Points
(2)
CSTRAY
•
The total input capacitance (CTOT) consists of the
photodiode junction capacitance, and both the
common-mode and differential input capacitance
of the operational amplifier.
+VS
•
•
The desired transimpedance gain, VOUT = IDRF.
The Unity Gain Bandwidth Product (UGBW)
(22MHz for the OPA827).
OPA827
VOUT = IDRF
ID
CTOT
With these three variables set, the feedback capacitor
value (CF) can be calculated to ensure stability.
CSTRAY is the parasitic capacitance of the PCB and
passive components, which is approximately 0.5pF.
-VS
NOTES:(1) CF is optional to prevent gain peaking.
(2) CSTRAY is the stray capacitance of RF
(typically, 2pF for a surface-mount resistor).
To ensure 45° phase margin, the minimal amount of
feedback capacitance can be calculated using
Equation 1:
Figure 46. Transimpedance Amplifier
1
(8pCTOTRFUGBW
1+ 1+
CF
(
4pR UGBW) (
)
F
(1)
V+
IN+
IN-
OUT
V-
Figure 47. Equivalent Schematic (Single Channel)
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PHASE-LOCK LOOP
An operational amplifier with inherently low voltage
offset helps reduce this source of error. Also, any
noise produced by the operational amplifiers
modulates the voltage applied to the VCO and limits
the spectral purity of the oscillator output. The VCO
generates noise-related, random phase variations of
its own, but this characteristic becomes worse when
the input voltage source noise is included. This noise
appears as random sideband energy that can limit
system performance. The very low flicker noise (1/f)
and current noise (In) of the OPA827 help to
minimize the operational amplifier contribution to the
phase noise.
The OPA827 is well-suited for phase-lock loop (PLL)
applications because of the low voltage offset, low
noise, and wide gain bandwidth. Figure 48 illustrates
an example of the OPA827 in this application. The
first amplifier (OPA827) provides the loop low-pass,
active filter function, while the second amplifier
(OPA211) serves as a scaling amplifier. This second
stage amplifies the dc error voltage to the appropriate
level before it is applied to the voltage-controlled
oscillator (VCO).
Operational amplifiers used in PLL applications are
often required to have low voltage offset. As with
other dc levels generated in the loop, a voltage offset
applied to the VCO is interpreted as a phase error.
Offset Voltage Generator
(Frequency Adjustment)
Scaling
Amplifier
Low-Pass Filter
Current
Source
Input Signal Phase Dector
Output Signal
OPA827
OPA211
VCO
Current
Source
Level Adjustment and
Buffer Amplifier
Divider
1/N
Figure 48. PLL Application
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OPA827 USED AS AN I/V CONVERTER
The DAC output impedance as seen looking into the
IOUT terminal changes versus code. The low offset
voltage of the OPA827 minimizes the error
propagated from the DAC.
The OPA827 series of operation amplifiers have low
current noise and offset voltage that make these
devices a great choice for an I/V converter. The
DAC8811 is a single channel, current output, 16-bit
digital-to-analog converter (DAC). The IOUT terminal
of the DAC is held at a virtual GND potential by the
use of the OPA827 as an external I/V converter op
amp. The R-2R ladder is connected to an external
reference input (VREF) that determines the DAC
full-scale current. The external reference voltage can
vary in a range of –15V to +15V, thus providing
bipolar IOUT current operation. By using the OPA827
as an external I/V converter in conjunction with the
internal DAC8811 RFB resistor, output voltage ranges
of –VREF to +VREF can be generated.
For a current-to-voltage design (see Figure 49), the
DAC8811 IOUT pin and the inverting node of the
OPA827 should be as short as possible and adhere
to good PCB layout design. For each code change on
the output of the DAC, there is a step function. If the
parasitic capacitance is excessive at the inverting
node, then gain peaking is possible. For circuit
stability, two compensation capacitors, C1 and C2(4pF
to 20pF typical) can be added to the design.
Some applications require full four-quadrant
multiplying capabilities or a bipolar output swing. As
shown in Figure 49, the OPA827 is added as a
summing amp and has a gain of 2x that widens the
output span to 20V. A four-quadrant multiplying circuit
is implemented by using a 10V offset of the reference
voltage to bias the OPA827.
When using an external I/V converter and the
DAC8811 RFB resistor, the DAC output voltage is
given by Equation 3.
-VREF ´ CODE
VOUT
=
65536
(3)
NOTE: CODE is the digital input into the DAC.
10kW
10kW
C2
5kW
VDD
RFB
VOUT
OPA827
C1
VREF
DAC8811
+10V
IOUT
OPA827
-10V £ VOUT £ +10V
GND
Figure 49. I/V Converter
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PACKAGE OPTION ADDENDUM
www.ti.com
27-Oct-2008
PACKAGING INFORMATION
Orderable Device
OPA827AID
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOIC
D
8
8
8
8
75 Green (RoHS & CU NIPDAU Level-2-260C-UNLIM
no Sb/Br)
OPA827AIDG4
OPA827AIDR
SOIC
SOIC
SOIC
D
D
D
75 Green (RoHS & CU NIPDAU Level-2-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
OPA827AIDRG4
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
1-Oct-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) W1 (mm)
(mm) (mm) Quadrant
OPA827AIDR
SOIC
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
1-Oct-2008
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SOIC
SPQ
Length (mm) Width (mm) Height (mm)
346.0 346.0 29.0
OPA827AIDR
D
8
2500
Pack Materials-Page 2
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