OPA330_1 [TI]

50mV VOS, 0.25mV/°C, 35mA CMOS OPERATIONAL AMPLIFIERS Zerø-Drift Series; 50mV的VOS ,长:0.25mV / A ℃, 35毫安CMOS运算放大器ZERA漂移系列
OPA330_1
型号: OPA330_1
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

50mV VOS, 0.25mV/°C, 35mA CMOS OPERATIONAL AMPLIFIERS Zerø-Drift Series
50mV的VOS ,长:0.25mV / A ℃, 35毫安CMOS运算放大器ZERA漂移系列

运算放大器
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OPA330  
OPA2330  
OPA4330  
www.ti.com  
SBOS432D AUGUST 2008REVISED JUNE 2010  
50mV V , 0.25mV/°C, 35mA  
OS  
CMOS OPERATIONAL AMPLIFIERS  
Zerø-Drift Series  
Check for Samples: OPA330, OPA2330, OPA4330  
1
FEATURES  
DESCRIPTION  
23  
UNMATCHED PRICE PERFORMANCE  
LOW OFFSET VOLTAGE: 50mV (max)  
ZERO DRIFT: 0.25mV/°C (max)  
The OPA330 series of CMOS operational amplifiers  
offer precision performance at a very competitive  
price. These devices are members of the Zerø-Drift  
family of amplifiers which use  
a
proprietary  
LOW NOISE: 1.1mVPP, 0.1Hz to 10Hz  
QUIESCENT CURRENT: 35mA (max)  
SUPPLY VOLTAGE: 1.8V to 5.5V  
RAIL-TO-RAIL INPUT/OUTPUT  
auto-calibration technique to simultaneously provide  
low offset voltage (50mV max) and near-zero drift  
over time and temperature at only 35mA (max) of  
quiescent current. The OPA330 family features  
rail-to-rail input and output in addition to near flat 1/f  
noise, making this amplifier ideal for many  
applications and much easier to design into a system.  
These devices are optimized for low-voltage  
operation as low as +1.8V (±0.9V) and up to +5.5V  
(±2.75V).  
INTERNAL EMI FILTERING  
microSIZE PACKAGES: WCSP, SC70, QFN  
APPLICATIONS  
BATTERY-POWERED INSTRUMENTS  
TEMPERATURE MEASUREMENTS  
TRANSDUCER APPLICATIONS  
ELECTRONIC SCALES  
MEDICAL INSTRUMENTATION  
HANDHELD TEST EQUIPMENT  
CURRENT SENSE  
The OPA330 (single version) is available in the  
WCSP-5, SC70-5, SOT23-5, and SOIC-8 packages.  
The OPA2330 (dual version) is offered in DFN-8  
(3mm × 3mm), MSOP-8, and SOIC-8 packages. The  
OPA4330 is offered in the standard SOIC-14 and  
TSSOP-14 packages, as well as in the space-saving  
VQFN-14 package. All versions are specified for  
operation from –40°C to +125°C.  
PRODUCT FAMILY PACKAGE COMPARISON  
PACKAGE-LEADS  
NO OF  
DEVICE  
OPA330  
OPA2330  
OPA4330  
CHANNELS  
WCSP  
SOIC  
SOT23  
SC70  
MSOP  
QFN  
TSSOP  
1
2
4
5
8
8
5
5
8
8
14  
14  
14  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
3
NanoStar, NanoFree are trademarks of Texas Instruments Incorporated.  
All other trademarks are the property of their respective owners.  
UNLESS OTHERWISE NOTED this document contains  
PRODUCTION DATA information current as of publication date.  
Products conform to specifications per the terms of Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2008–2010, Texas Instruments Incorporated  
 
 
 
OPA330  
OPA2330  
OPA4330  
SBOS432D AUGUST 2008REVISED JUNE 2010  
www.ti.com  
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with  
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.  
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more  
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.  
PACKAGE INFORMATION(1)  
PRODUCT  
PACKAGE-LEAD  
SOT23-5  
SC70-5  
PACKAGE DESIGNATOR  
PACKAGE MARKING  
OCFQ  
DBV  
DCK  
D
CHL  
OPA330  
SOIC-8  
O330A  
WCSP-5  
SOIC-8  
YFF  
D
OEH  
O2330A  
OCGQ  
OPA2330  
DFN-8  
DRB  
DGK  
D
MSOP-8  
SOIC-14  
TSSOP-14  
QFN-14(2)  
OCGQ  
O4330A  
O4330A  
4330A  
OPA4330  
OPA4330  
PW  
RGY  
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or visit the  
device product folder at ti.com.  
(2) Product preview device.  
ABSOLUTE MAXIMUM RATINGS(1)  
Over operating free-air temperature range, unless otherwise noted.  
OPA330, OPA2330, OPA4330  
UNIT  
V
Supply Voltage, VS = (V+) – (V–)  
Signal Input Terminals, Voltage(2)  
Signal Input Terminals, Current(2)  
Output Short-Circuit(3)  
+7  
(V–) –0.3 to (V+) + 0.3  
±10  
V
mA  
Continuous  
–40 to +150  
–65 to +150  
+150  
Operating Temperature  
°C  
°C  
°C  
V
Storage Temperature  
Junction Temperature  
Human Body Model (HBM)  
4000  
ESD  
Ratings:  
Charged Device Model (CDM)  
1000  
V
Machine Model (MM)  
400  
V
(1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may  
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond  
those specified is not supported.  
(2) Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.3V beyond the supply rails should  
be current limited to 10mA or less.  
(3) Short-circuit to ground, one amplifier per package.  
THERMAL INFORMATION  
OPA330AIYFF  
THERMAL METRIC(1)  
YFF  
5 PINS  
130  
54  
UNITS  
qJA  
Junction-to-ambient thermal resistance  
qJCtop  
qJB  
Junction-to-case (top) thermal resistance  
Junction-to-board thermal resistance  
51  
°C/W  
yJT  
Junction-to-top characterization parameter  
Junction-to-board characterization parameter  
Junction-to-case (bottom) thermal resistance  
1
yJB  
50  
qJCbot  
n/a  
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.  
2
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Copyright © 2008–2010, Texas Instruments Incorporated  
Product Folder Link(s): OPA330 OPA2330 OPA4330  
 
 
OPA330  
OPA2330  
OPA4330  
www.ti.com  
SBOS432D AUGUST 2008REVISED JUNE 2010  
ELECTRICAL CHARACTERISTICS: VS = +1.8V to +5.5V  
Boldface limits apply over the specified temperature range, TA = –40°C to +125°C.  
At TA = +25°C, RL = 10kconnected to midsupply, VCM = VOUT = midsupply, unless otherwise noted.  
OPA330, OPA2330, OPA4330  
PARAMETER  
TEST CONDITIONS  
VS = +5V  
MIN  
TYP  
MAX  
UNIT  
OFFSET VOLTAGE  
Input Offset Voltage  
vs Temperature  
VOS  
dVOS/dT  
PSRR  
8
0.02  
1
50  
0.25  
10  
mV  
mV/°C  
mV/V  
vs Power Supply  
VS = +1.8V to +5.5V  
(1)  
Long-Term Stability(1)  
Channel Separation, dc  
INPUT BIAS CURRENT  
Input Bias Current  
See  
0.1  
mV/V  
IB  
IOS  
en  
±200  
±70  
±500  
±300  
pA  
pA  
pA  
pA  
pA  
Input Bias Current: OPA330YFF, OPA4330  
over Temperature  
±300  
±400  
±140  
Input Offset Current  
±1000  
±600  
Input Offset Current: OPA330YFF, OPA4330  
NOISE  
Input Voltage Noise Density  
Input Voltage Noise  
f = 1kHz  
f = 0.01Hz to 1Hz  
f = 0.1Hz to 10Hz  
f = 10Hz  
55  
0.3  
1.1  
100  
nV/Hz  
mVPP  
Input Voltage Noise  
mVPP  
Input Current Noise  
in  
fA/Hz  
INPUT VOLTAGE RANGE  
Common-Mode Voltage Range  
Common-Mode Rejection Ratio  
VCM  
(V–) – 0.1  
(V+) + 0.1  
V
CMRR  
(V–) – 0.1V < VCM < (V+) + 0.1V  
100  
115  
115  
dB  
Common-Mode Rejection Ratio:  
OPA330YFF, OPA4330  
(V–) – 0.1V < VCM < (V+) + 0.1V, VS = 5.5V  
100  
dB  
INPUT CAPACITANCE  
Differential  
2
4
pF  
pF  
Common-Mode  
OPEN-LOOP GAIN  
(V–) + 100mV < VO < (V+) – 100mV,  
Open-Loop Voltage Gain  
AOL  
100  
115  
dB  
RL = 10k  
FREQUENCY RESPONSE  
Gain-Bandwidth Product  
Slew Rate  
GBW  
SR  
CL = 100pF  
G = +1  
350  
kHz  
0.16  
V/ms  
OUTPUT  
Voltage Output Swing from Rail  
Short-Circuit Current  
Capacitive Load Drive  
Open-Loop Output Impedance  
POWER SUPPLY  
30  
100  
mV  
ISC  
CL  
±5  
mA  
See Typical Characteristics  
2
f = 350kHz, IO = 0  
kΩ  
Specified Voltage Range  
Quiescent Current Per Amplifier  
Turn-On Time  
VS  
1.8  
5.5  
35  
V
IQ  
IO = 0  
21  
mA  
ms  
VS = +5V  
100  
(1) 300-hour life test at +150°C demonstrated randomly distributed variation of approximately 1mV.  
Copyright © 2008–2010, Texas Instruments Incorporated  
Submit Documentation Feedback  
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Product Folder Link(s): OPA330 OPA2330 OPA4330  
 
 
 
OPA330  
OPA2330  
OPA4330  
SBOS432D AUGUST 2008REVISED JUNE 2010  
www.ti.com  
ELECTRICAL CHARACTERISTICS: VS = +1.8V to +5.5V (continued)  
Boldface limits apply over the specified temperature range, TA = –40°C to +125°C.  
At TA = +25°C, RL = 10kconnected to midsupply, VCM = VOUT = midsupply, unless otherwise noted.  
OPA330, OPA2330, OPA4330  
PARAMETER  
TEMPERATURE RANGE  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
Specified Range  
Operating Range  
Storage Range  
Thermal Resistance  
SOT23-5  
–40  
–40  
–65  
+125  
+150  
+150  
°C  
°C  
°C  
qJA  
°C/W  
°C/W  
°C/W  
°C/W  
°C/W  
°C/W  
200  
150  
50  
MSOP-8, SOIC-8, TSSOP-14  
DFN-8  
SC70-5  
250  
130  
WCSP-5  
PIN CONFIGURATIONS  
OPA330  
SOT23-5  
(TOP VIEW)  
OPA330  
SC70-5  
(TOP VIEW)  
OUT  
V-  
1
2
3
5
4
V+  
+IN  
V-  
1
2
3
5
4
V+  
+IN  
-IN  
-IN  
OUT  
OPA330  
SOIC-8  
(TOP VIEW)  
OPA330  
WCSP-5  
(TOP VIEW)  
C3  
C1  
NC(1)  
V+  
NC(1)  
1
8
7
6
5
OUT  
VS-  
VS+  
IN-  
B2  
-IN  
+IN  
V-  
2
3
4
OUT  
NC(1)  
A3  
A1  
IN+  
(1) NC denotes no internal connection.  
4
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Copyright © 2008–2010, Texas Instruments Incorporated  
Product Folder Link(s): OPA330 OPA2330 OPA4330  
 
 
OPA330  
OPA2330  
OPA4330  
www.ti.com  
SBOS432D AUGUST 2008REVISED JUNE 2010  
PIN CONFIGURATIONS, CONTINUED  
OPA2330  
SOIC-8, MSOP-8  
(TOP VIEW)  
OPA2330  
DFN-8  
(TOP VIEW)  
OUT A  
-IN A  
+IN A  
V-  
1
2
3
4
8
7
6
5
V+  
OUT A  
-IN A  
+IN A  
V-  
1
2
3
4
8
7
6
5
V+  
A
Exposed  
Thermal  
Die Pad  
on  
OUT B  
-IN B  
+IN B  
OUT B  
-IN B  
+IN B  
B
Underside(2)  
OPA4330  
SOIC-14  
(TOP VIEW)  
OPA4330  
QFN-14  
(TOP VIEW)  
1
2
3
4
5
6
7
OUT A  
-IN A  
+IN A  
V+  
14  
OUT D  
13 -IN D  
12 +IN D  
11 V-  
A
D
13  
12  
2
3
4
5
6
-IN A  
+IN A  
V+  
-IN D  
+IN D  
Exposed  
Thermal Die  
Pad on  
10  
9
+IN B  
-IN B  
OUT B  
+IN C  
-IN C  
OUT C  
B
C
11 V-  
(2)  
Underside  
10  
9
+IN B  
-IN B  
+IN C  
8
-IN C  
OPA4330  
TSSOP-14  
(TOP VIEW)  
OUT A  
-IN A  
+IN A  
V+  
1
2
3
4
5
6
7
14 OUT D  
13 -IN D  
12 +IN D  
11 V-  
(2) Connect thermal die pad to V–.  
10  
9
+IN C  
-IN C  
OUT C  
+IN B  
-IN B  
OUT B  
8
Copyright © 2008–2010, Texas Instruments Incorporated  
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Product Folder Link(s): OPA330 OPA2330 OPA4330  
OPA330  
OPA2330  
OPA4330  
SBOS432D AUGUST 2008REVISED JUNE 2010  
www.ti.com  
TYPICAL CHARACTERISTICS  
At TA = +25°C, CL = 0pF, RL = 10kconnected to midsupply, VCM = VOUT = midsupply, unless otherwise noted.  
OFFSET VOLTAGE PRODUCTION DISTRIBUTION  
OPEN-LOOP GAIN vs FREQUENCY  
120  
100  
80  
250  
200  
150  
100  
50  
Phase  
60  
40  
Gain  
20  
0
0
-50  
-100  
-20  
10  
100  
1k  
10k  
100k  
1M  
Frequency (Hz)  
Offset Voltage (mV)  
Figure 1.  
Figure 2.  
COMMON-MODE REJECTION RATIO vs FREQUENCY  
POWER-SUPPLY REJECTION RATIO vs FREQUENCY  
140  
120  
+PSRR  
120  
100  
80  
60  
40  
20  
0
100  
80  
60  
40  
20  
0
-PSRR  
1
10  
100  
1k  
10k  
100k  
1M  
1
10  
100  
1k  
10k  
100k  
1M  
Frequency (Hz)  
Frequency (Hz)  
Figure 3.  
Figure 4.  
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT  
INPUT BIAS CURRENT vs COMMON-MODE VOLTAGE  
3
2
210  
VS = ±2.75V  
VS = ±0.9V  
205  
200  
195  
190  
-IB  
-40°C  
1
+25°C  
+125°C  
0
+25°C  
-40°C  
-190  
-195  
-200  
-205  
-210  
-1  
-2  
-3  
+125°C  
+25°C  
+IB  
-40°C  
0
1
2
3
4
5
6
7
8
9
10  
0
1
2
3
4
5
Output Current (mA)  
Common-Mode Voltage (V)  
Figure 5.  
Figure 6.  
6
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Copyright © 2008–2010, Texas Instruments Incorporated  
Product Folder Link(s): OPA330 OPA2330 OPA4330  
 
OPA330  
OPA2330  
OPA4330  
www.ti.com  
SBOS432D AUGUST 2008REVISED JUNE 2010  
TYPICAL CHARACTERISTICS (continued)  
At TA = +25°C, CL = 0pF, RL = 10kconnected to midsupply, VCM = VOUT = midsupply, unless otherwise noted.  
INPUT BIAS CURRENT vs TEMPERATURE  
QUIESCENT CURRENT vs TEMPERATURE  
250  
200  
150  
100  
50  
25  
20  
15  
10  
5
-IB  
VS = 5.5V  
-IB  
VS = 1.8V  
VS = 5.5V  
VS = 1.8V  
0
-50  
-100  
-150  
-200  
-250  
+IB  
+IB  
0
-50  
-25  
0
25  
50  
75  
100  
125  
-50  
-25  
0
25  
50  
75  
100  
125  
Temperature (°C)  
Temperature (°C)  
Figure 7.  
Figure 8.  
LARGE-SIGNAL STEP RESPONSE  
SMALL-SIGNAL STEP RESPONSE  
G = 1  
RL = 10kW  
G = +1  
RL = 10kW  
Time (50ms/div)  
Time (5ms/div)  
Figure 9.  
Figure 10.  
POSITIVE OVER-VOLTAGE RECOVERY  
NEGATIVE OVER-VOLTAGE RECOVERY  
0
Input  
Input  
Output  
0
0
10kW  
10kW  
+2.5V  
+2.5V  
1kW  
1kW  
0
Output  
OPA330  
OPA330  
-2.5V  
-2.5V  
Time (50ms/div)  
Time (50ms/div)  
Figure 11.  
Figure 12.  
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Product Folder Link(s): OPA330 OPA2330 OPA4330  
OPA330  
OPA2330  
OPA4330  
SBOS432D AUGUST 2008REVISED JUNE 2010  
www.ti.com  
TYPICAL CHARACTERISTICS (continued)  
At TA = +25°C, CL = 0pF, RL = 10kconnected to midsupply, VCM = VOUT = midsupply, unless otherwise noted.  
SETTLING TIME vs CLOSED-LOOP GAIN  
SMALL-SIGNAL OVERSHOOT vs LOAD CAPACITANCE  
600  
500  
400  
300  
200  
100  
0
40  
4V Step  
35  
30  
25  
20  
15  
10  
5
0.001%  
0.01%  
0
1
10  
100  
10  
100  
1000  
Gain (dB)  
Load Capacitance (pF)  
Figure 13.  
Figure 14.  
CURRENT AND VOLTAGE NOISE SPECTRAL DENSITY  
vs FREQUENCY  
0.1Hz TO 10Hz NOISE  
1000  
100  
10  
1000  
Continues with no 1/f (flicker) noise.  
Current Noise  
100  
Voltage Noise  
10  
1
10  
100  
1k  
10k  
1s/div  
Frequency (Hz)  
Figure 15.  
Figure 16.  
INPUT BIAS CURRENT vs INPUT DIFFERENTIAL VOLTAGE  
50  
Normal Operating Range  
40  
(see the Input Differential  
Voltage section in the  
Applications Information)  
30  
20  
10  
0
-10  
-20  
-30  
Over-Driven Condition  
Over-Driven Condition  
200 400 600 800  
-40  
-50  
-1V -800 -600 -400 -200  
0
Input Differential Voltage (mV)  
Figure 17.  
8
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Product Folder Link(s): OPA330 OPA2330 OPA4330  
 
OPA330  
OPA2330  
OPA4330  
www.ti.com  
SBOS432D AUGUST 2008REVISED JUNE 2010  
APPLICATIONS INFORMATION  
The OPA330, OPA2330, and OPA4330 are unity-gain  
stable, precision operational amplifiers free from  
unexpected output and phase reversal. The use of  
proprietary Zerø-Drift circuitry gives the benefit of low  
input offset voltage over time and temperature, as  
well as lowering the 1/f noise component. As a result  
of the high PSRR, these devices work well in  
applications that run directly from battery power  
without regulation. The OPA330 family is optimized  
for low-voltage, single-supply operation. These  
miniature, high-precision, low quiescent current  
amplifiers offer high-impedance inputs that have a  
common-mode range 100mV beyond the supplies  
and a rail-to-rail output that swings within 100mV of  
the supplies under normal test conditions. The  
OPA330 series are precision amplifiers for  
cost-sensitive applications.  
INPUT DIFFERENTIAL VOLTAGE  
The typical input bias current of the OPA330 during  
normal operation is approximately 200pA. In  
over-driven conditions, the bias current can increase  
significantly (see Figure 17).The most common cause  
of an over-driven condition occurs when the op amp  
is outside of the linear range of operation. When the  
output of the op amp is driven to one of the supply  
rails the feedback loop requirements cannot be  
satisfied and a differential input voltage develops  
across the input pins. This differential input voltage  
results in activation of parasitic diodes inside the front  
end input chopping switches that combine with 10kΩ  
electromagnetic interference (EMI) filter resistors to  
create the equivalent circuit shown in Figure 19.  
Notice that the input bias current remains within  
specification within the linear region.  
OPERATING VOLTAGE  
10kW  
Clamp  
The OPA330 series op amps can be used with single  
+In  
or dual supplies from an operating range of VS  
=
CORE  
+1.8V (±0.9V) up to +5.5V (±2.75V). Supply voltages  
greater than +7V can permanently damage the  
device. See the Absolute Maximum Ratings table.  
Key parameters that vary over the supply voltage or  
temperature range are shown in the Typical  
Characteristics section of this data sheet.  
-In  
10kW  
Figure 19. Equivalent Input Circuit  
INTERNAL OFFSET CORRECTION  
INPUT VOLTAGE  
The OPA330, OPA2330, and OPA4330 op amps use  
an auto-calibration technique with a time-continuous  
125kHz op amp in the signal path. This amplifier is  
The OPA330, OPA2330, and OPA4330 input  
common-mode voltage range extends 0.1V beyond  
the supply rails. The OPA330 is designed to cover  
the full range without the troublesome transition  
region found in some other rail-to-rail amplifiers.  
zero-corrected every 8ms using  
a
proprietary  
technique. Upon power-up, the amplifier requires  
approximately 100ms to achieve specified VOS  
accuracy. This design has no aliasing or flicker noise.  
Typically, input bias current is about 200pA; however,  
input voltages exceeding the power supplies can  
cause excessive current to flow into or out of the  
input pins. Momentary voltages greater than the  
power supply can be tolerated if the input current is  
limited to 10mA. This limitation is easily accomplished  
with an input resistor, as shown in Figure 18.  
EMI SUSCEPTIBILITY AND INPUT FILTERING  
Operational amplifiers vary in their susceptibility to  
EMI. If conducted EMI enters the operational  
amplifier, the dc offset observed at the amplifier  
output may shift from its nominal value while the EMI  
is present. This shift is a result of signal rectification  
associated with the internal semiconductor junctions.  
While all operational amplifier pin functions can be  
affected by EMI, the input pins are likely to be the  
most susceptible. The OPA330 operational amplifier  
family incorporates an internal input low-pass filter  
that reduces the amplifier response to EMI. Both  
common-mode and differential mode filtering are  
provided by the input filter. The filter is designed for a  
cutoff frequency of approximately 8MHz (–3dB), with  
a roll-off of 20dB per decade.  
Current-limiting resistor  
required if input voltage  
exceeds supply rails by  
³ 0.3V.  
+5V  
IOVERLOAD  
10mA max  
VOUT  
OPA330  
VIN  
5kW  
Figure 18. Input Current Protection  
Copyright © 2008–2010, Texas Instruments Incorporated  
Submit Documentation Feedback  
9
Product Folder Link(s): OPA330 OPA2330 OPA4330  
 
 
OPA330  
OPA2330  
OPA4330  
SBOS432D AUGUST 2008REVISED JUNE 2010  
www.ti.com  
ACHIEVING OUTPUT SWING TO THE OP  
AMP NEGATIVE RAIL  
The OPA330, OPA2330, and OPA4330 have an  
output stage that allows the output voltage to be  
pulled to its negative supply rail, or slightly below,  
using the technique previously described. This  
technique only works with some types of output  
stages. The OPA330, OPA2330, and OPA4330 have  
been characterized to perform with this technique; the  
recommended resistor value is approximately 20k.  
Note that this configuration will increase the current  
consumption by several hundreds of microamps.  
Accuracy is excellent down to 0V and as low as  
–2mV. Limiting and nonlinearity occurs below –2mV,  
but excellent accuracy returns as the output is again  
driven above –2mV. Lowering the resistance of the  
pull-down resistor will allow the op amp to swing even  
further below the negative rail. Resistances as low as  
10kcan be used to achieve excellent accuracy  
down to –10mV.  
Some applications require output voltage swings from  
0V to a positive full-scale voltage (such as +2.5V)  
with excellent accuracy. With most single-supply op  
amps, problems arise when the output signal  
approaches 0V, near the lower output swing limit of a  
single-supply op amp. A good single-supply op amp  
may swing close to single-supply ground, but will not  
reach ground. The output of the OPA330, OPA2330,  
and OPA4330 can be made to swing to ground, or  
slightly below, on a single-supply power source. To  
do so requires the use of another resistor and an  
additional, more negative, power supply than the op  
amp negative supply. A pull-down resistor may be  
connected between the output and the additional  
negative supply to pull the output down below the  
value that the output would otherwise achieve, as  
shown in Figure 20.  
APPLICATION CIRCUITS  
Figure 21 shows the basic configuration for a bridge  
amplifier.  
V+ = +5V  
A
low-side current shunt monitor is shown in  
OPA330  
VOUT  
Figure 22.  
VIN  
RP = 20kW  
VEX  
R1  
Op Amp V- = GND  
-5V  
+5V  
Additional  
Negative  
Supply  
R
R
R
R
VOUT  
OPA330  
Figure 20. For VOUT Range to Ground  
R1  
VREF  
Figure 21. Single Op Amp Bridge Amplifier  
3V  
REF3130  
+5V  
Load  
R1  
R2  
4.99kW  
49.9kW  
R6  
RN  
71.5kW  
V
56W  
RSHUNT  
ILOAD  
OPA330  
1W  
I2C  
R3  
R4  
48.7kW  
RN  
ADS1100  
4.99kW  
56W  
R7  
1.18kW  
(PGA Gain = 4)  
FS = 3.0V  
Stray Ground-Loop Resistance  
NOTE: 1% resistors provide adequate common-mode rejection at small ground-loop errors.  
Figure 22. Low-Side Current Monitor  
10  
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Product Folder Link(s): OPA330 OPA2330 OPA4330  
 
 
 
 
OPA330  
OPA2330  
OPA4330  
www.ti.com  
SBOS432D AUGUST 2008REVISED JUNE 2010  
RN are operational resistors used to isolate the  
ADS1100 from the noise of the digital I2C bus.  
Because the ADS1100 is a 16-bit converter, a precise  
reference is essential for maximum accuracy. If  
absolute accuracy is not required, and the 5V power  
supply is sufficiently stable, the REF3130 may be  
omitted.  
Following these guidelines reduces the likelihood of  
junctions being at different temperatures, which can  
cause thermoelectric voltages of 0.1mV/°C or higher,  
depending on materials used.  
OPA330 WCSP  
The OPA330 YFF package is a lead- (Pb-) free,  
die-level, wafer chip-scale package (WCSP). Unlike  
devices that are in plastic packages, these devices  
have no molding compound, lead frame, wire bonds,  
or leads. Using standard surface-mount assembly  
procedures, the WCSP can be mounted to a printed  
circuit board (PCB) without additional underfill.  
Figure 24 and Figure 25 detail the pinout and  
package marking, respectively. See the NanoStar™  
and NanoFree™ 300mm Solder Bump WCSP  
Application Note (SBVA017) for more detailed  
information on package characteristics and PCB  
design.  
Figure 23 shows the OPA330 in a typical thermistor  
circuit.  
100kW  
1MW  
1MW  
60kW  
3V  
NTC  
Thermistor  
OPA330  
Figure 23. Thermistor Measurement  
YFF PACKAGE  
WCSP-5  
(TOP VIEW)  
GENERAL LAYOUT GUIDELINES  
C3  
C1  
OUT  
VS-  
VS+  
IN-  
Attention to good layout practice is always  
recommended. Keep traces short and, when  
possible, use a printed circuit board (PCB) ground  
plane with surface-mount components placed as  
close to the device pins as possible. Place a 0.1mF  
capacitor closely across the supply pins. These  
guidelines should be applied throughout the analog  
circuit to improve performance and provide benefits  
such as reducing the electromagnetic interference  
(EMI) susceptibility.  
B2  
A3  
A1  
IN+  
(Bump side down;  
not to scale)  
Figure 24. WCSP Pin Description  
For lowest offset voltage and precision performance,  
circuit layout and mechanical conditions should be  
optimized. Avoid temperature gradients that create  
thermoelectric (Seebeck) effects in the thermocouple  
junctions formed from connecting dissimilar  
conductors. These thermally-generated potentials can  
be made to cancel by assuring they are equal on  
both input terminals. Other layout and design  
considerations include:  
YFF PACKAGE  
WCSP-5 Enlarged Image  
(Top View)  
Package Marking Code:  
Actual Size:  
YMD = year/month/day  
TBD = indicates OPA330AIYFF  
S = for engineering purposes only  
Exact Size (max):  
0,862 mm x 1,156 mm  
Use low thermoelectric-coefficient conditions  
(avoid dissimilar metals).  
Thermally isolate components from power  
supplies or other heat sources.  
Shield op amp and input circuitry from air  
currents, such as cooling fans.  
(Bump side down)  
Figure 25. YFF Package Marking  
Copyright © 2008–2010, Texas Instruments Incorporated  
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Product Folder Link(s): OPA330 OPA2330 OPA4330  
 
 
 
OPA330  
OPA2330  
OPA4330  
SBOS432D AUGUST 2008REVISED JUNE 2010  
www.ti.com  
PHOTOSENSITIVITY  
The QFN and DFN package can be easily mounted  
using standard PCB assembly techniques. See  
Application Note QFN/SON PCB Attachment  
(SLUA271) and Application Report Quad Flatpack  
No-Lead Logic Packages (SCBA017), both available  
for download at www.ti.com.  
Although the OPA330 YFF package has a protective  
backside coating that reduces the amount of light  
exposure on the die, unless fully shielded, ambient  
light can reach the active region of the device. Input  
bias current for the package is specified in the  
absence of light. Depending on the amount of light  
exposure in a given application, an increase in bias  
current, and possible increases in offset voltage  
should be expected. Fluorescent lighting may  
introduce noise or hum because of the time-varying  
light output. Best layout practices include end-product  
packaging that provides shielding from possible light  
sources during operation.  
The exposed leadframe die pad on the bottom of  
the package should be connected to V–.  
QFN AND DFN LAYOUT GUIDELINES  
The leadframe die pad should be soldered to a  
thermal pad on the PCB. A mechanical data sheet  
showing an example layout is attached at the end of  
this data sheet. Refinements to this layout may be  
required based on assembly process requirements.  
Mechanical drawings located at the end of this data  
sheet list the physical dimensions for the package  
and pad. The five holes in the landing pattern are  
optional, and are intended for use with thermal vias  
that connect the leadframe die pad to the heatsink  
area on the PCB.  
QFN AND DFN PACKAGES  
The OPA4330 is offered in a QFN package. The  
OPA2330 is available in a DFN-8 package (also  
known as SON), which is a QFN package with lead  
contacts on only two sides of the bottom of the  
package. These leadless, near-chip-scale packages  
maximize board space and enhance thermal and  
electrical characteristics through an exposed pad.  
QFN and DFN packages are physically small, have a  
smaller routing area, improved thermal performance,  
and improved electrical parasitics, with a pinout  
scheme that is consistent with other commonly-used  
packages, such as SOIC and MSOP. Additionally, the  
absence of external leads eliminates bent-lead  
issues.  
Soldering the exposed pad significantly improves  
board-level reliability during temperature cycling, key  
push, package shear, and similar board-level tests.  
Even with applications that have low-power  
dissipation, the exposed pad must be soldered to the  
PCB to provide structural integrity and long-term  
reliability.  
12  
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Copyright © 2008–2010, Texas Instruments Incorporated  
Product Folder Link(s): OPA330 OPA2330 OPA4330  
OPA330  
OPA2330  
OPA4330  
www.ti.com  
SBOS432D AUGUST 2008REVISED JUNE 2010  
REVISION HISTORY  
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.  
Changes from Revision C (October 2009) to Revision D  
Page  
Added last Applications bullet ............................................................................................................................................... 1  
Deleted footnote 1 from Product Family Package Comparison table ................................................................................... 1  
Deleted footnote 2 and shading from all packages except QFN-14; moved WCSP-5, SOIC-14, and TSSOP-14  
packages to Production Data status; and added package marking information to Package Information table ................... 2  
Added OPA330YFF, OPA4330 Input Bias Current parameter to Electrical Characteristics table ....................................... 3  
Added Input Voltage Range, OPA330YFF, OPA4330 Common-Mode Rejection Ratio parameter to Electrical  
Characteristics table ............................................................................................................................................................. 3  
Moved TSSOP-14 thermal resistance to MSOP-8, SOIC-8 thermal resistance parameter in Electrical Characteristics  
table ...................................................................................................................................................................................... 4  
Deleted SOIC-14 and QFN-14 rows from Temperature Range section in Electrical Characteristics table .......................... 4  
Changes from Revision B (September, 2009) to Revision C  
Page  
Changed maximum quiescent current value (Features list, document title) to 35mA ........................................................... 1  
Changed maximum value for Quiescent Current per Amplifier specification ....................................................................... 3  
Added Application Circuits section ..................................................................................................................................... 10  
Copyright © 2008–2010, Texas Instruments Incorporated  
Submit Documentation Feedback  
13  
Product Folder Link(s): OPA330 OPA2330 OPA4330  
PACKAGE OPTION ADDENDUM  
www.ti.com  
22-Jul-2010  
PACKAGING INFORMATION  
Status (1)  
Eco Plan (2)  
MSL Peak Temp (3)  
Samples  
Orderable Device  
Package Type Package  
Drawing  
Pins  
Package Qty  
Lead/  
Ball Finish  
(Requires Login)  
OPA2330AID  
OPA2330AIDG4  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
SOIC  
SOIC  
D
8
8
8
8
8
8
8
8
8
8
8
8
8
5
5
5
5
75  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU Level-1-260C-UNLIM  
Contact TI Distributor  
or Sales Office  
D
75  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
Contact TI Distributor  
or Sales Office  
OPA2330AIDGKR  
OPA2330AIDGKRG4  
OPA2330AIDGKT  
OPA2330AIDGKTG4  
OPA2330AIDR  
MSOP  
MSOP  
MSOP  
MSOP  
SOIC  
DGK  
DGK  
DGK  
DGK  
D
2500  
2500  
250  
Green (RoHS  
& no Sb/Br)  
Purchase Samples  
Green (RoHS  
& no Sb/Br)  
Purchase Samples  
Green (RoHS  
& no Sb/Br)  
Request Free Samples  
Request Free Samples  
Request Free Samples  
Request Free Samples  
Request Free Samples  
250  
Green (RoHS  
& no Sb/Br)  
2500  
3000  
3000  
250  
Green (RoHS  
& no Sb/Br)  
OPA2330AIDRBR  
OPA2330AIDRBRG4  
OPA2330AIDRBT  
OPA2330AIDRBTG4  
OPA2330AIDRG4  
OPA330AID  
SON  
DRB  
DRB  
DRB  
DRB  
D
Green (RoHS  
& no Sb/Br)  
SON  
Green (RoHS  
& no Sb/Br)  
SON  
Green (RoHS  
& no Sb/Br)  
Contact TI Distributor  
or Sales Office  
SON  
250  
Green (RoHS  
& no Sb/Br)  
Contact TI Distributor  
or Sales Office  
SOIC  
2500  
75  
Green (RoHS  
& no Sb/Br)  
Request Free Samples  
SOIC  
D
Green (RoHS  
& no Sb/Br)  
Contact TI Distributor  
or Sales Office  
OPA330AIDBVR  
OPA330AIDBVRG4  
OPA330AIDBVT  
OPA330AIDBVTG4  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
DBV  
DBV  
DBV  
DBV  
3000  
3000  
250  
Green (RoHS  
& no Sb/Br)  
Purchase Samples  
Green (RoHS  
& no Sb/Br)  
Purchase Samples  
Green (RoHS  
& no Sb/Br)  
Request Free Samples  
Request Free Samples  
250  
Green (RoHS  
& no Sb/Br)  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
22-Jul-2010  
Status (1)  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
Eco Plan (2)  
MSL Peak Temp (3)  
Samples  
Orderable Device  
Package Type Package  
Drawing  
Pins  
Package Qty  
Lead/  
Ball Finish  
(Requires Login)  
OPA330AIDCKR  
OPA330AIDCKRG4  
OPA330AIDCKT  
OPA330AIDCKTG4  
OPA330AIDG4  
SC70  
SC70  
SC70  
SC70  
SOIC  
SOIC  
SOIC  
DCK  
DCK  
DCK  
DCK  
D
5
5
5
5
8
8
8
3000  
3000  
250  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU Level-1-260C-UNLIM  
Request Free Samples  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
Request Free Samples  
Request Free Samples  
Request Free Samples  
Green (RoHS  
& no Sb/Br)  
250  
Green (RoHS  
& no Sb/Br)  
75  
Green (RoHS  
& no Sb/Br)  
Contact TI Distributor  
or Sales Office  
OPA330AIDR  
D
2500  
2500  
Green (RoHS  
& no Sb/Br)  
Request Free Samples  
OPA330AIDRG4  
D
Green (RoHS  
& no Sb/Br)  
Request Free Samples  
OPA330AIYFFR  
OPA330AIYFFT  
OPA4330AID  
PREVIEW  
PREVIEW  
ACTIVE  
DSBGA  
DSBGA  
SOIC  
YFF  
YFF  
D
5
5
3000  
250  
50  
TBD  
TBD  
Call TI  
Call TI  
Call TI  
Call TI  
Samples Not Available  
Samples Not Available  
Purchase Samples  
14  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU Level-2-260C-1 YEAR  
CU NIPDAU Level-2-260C-1 YEAR  
CU NIPDAU Level-2-260C-1 YEAR  
CU NIPDAU Level-2-260C-1 YEAR  
OPA4330AIDR  
OPA4330AIPW  
OPA4330AIPWR  
ACTIVE  
ACTIVE  
ACTIVE  
SOIC  
D
14  
14  
14  
2500  
90  
Green (RoHS  
& no Sb/Br)  
Request Free Samples  
Purchase Samples  
TSSOP  
TSSOP  
PW  
PW  
Green (RoHS  
& no Sb/Br)  
2000  
Green (RoHS  
& no Sb/Br)  
Request Free Samples  
OPA4330AIRGYR  
OPA4330AIRGYT  
PREVIEW  
PREVIEW  
VQFN  
VQFN  
RGY  
RGY  
14  
14  
3000  
250  
TBD  
TBD  
Call TI  
Call TI  
Call TI  
Call TI  
Samples Not Available  
Samples Not Available  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability  
information and additional product content details.  
Addendum-Page 2  
PACKAGE OPTION ADDENDUM  
www.ti.com  
22-Jul-2010  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that  
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between  
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight  
in homogeneous material)  
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 3  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
30-Jul-2010  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
OPA2330AIDGKR  
OPA2330AIDGKT  
OPA2330AIDR  
MSOP  
MSOP  
SOIC  
DGK  
DGK  
D
8
8
2500  
250  
330.0  
180.0  
330.0  
330.0  
180.0  
179.0  
179.0  
179.0  
179.0  
330.0  
330.0  
330.0  
12.4  
12.4  
12.4  
12.4  
12.4  
8.4  
5.3  
5.3  
6.4  
3.3  
3.3  
3.2  
3.2  
2.2  
2.2  
6.4  
6.5  
6.9  
3.3  
3.3  
5.2  
3.3  
3.3  
3.2  
3.2  
2.5  
2.5  
5.2  
9.0  
5.6  
1.3  
1.3  
2.1  
1.1  
1.1  
1.4  
1.4  
1.2  
1.2  
2.1  
2.1  
1.6  
8.0  
8.0  
8.0  
8.0  
8.0  
4.0  
4.0  
4.0  
4.0  
8.0  
8.0  
8.0  
12.0  
12.0  
12.0  
12.0  
12.0  
8.0  
Q1  
Q1  
Q1  
Q2  
Q2  
Q3  
Q3  
Q3  
Q3  
Q1  
Q1  
Q1  
8
2500  
3000  
250  
OPA2330AIDRBR  
OPA2330AIDRBT  
OPA330AIDBVR  
OPA330AIDBVT  
OPA330AIDCKR  
OPA330AIDCKT  
OPA330AIDR  
SON  
DRB  
DRB  
DBV  
DBV  
DCK  
DCK  
D
8
SON  
8
SOT-23  
SOT-23  
SC70  
5
3000  
250  
5
8.4  
8.0  
5
3000  
250  
8.4  
8.0  
SC70  
5
8.4  
8.0  
SOIC  
8
2500  
2500  
2000  
12.4  
16.4  
12.4  
12.0  
16.0  
12.0  
OPA4330AIDR  
SOIC  
D
14  
14  
OPA4330AIPWR  
TSSOP  
PW  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
30-Jul-2010  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
OPA2330AIDGKR  
OPA2330AIDGKT  
OPA2330AIDR  
MSOP  
MSOP  
SOIC  
DGK  
DGK  
D
8
8
2500  
250  
346.0  
203.0  
346.0  
346.0  
190.5  
203.0  
203.0  
203.0  
203.0  
346.0  
346.0  
346.0  
346.0  
203.0  
346.0  
346.0  
212.7  
203.0  
203.0  
203.0  
203.0  
346.0  
346.0  
346.0  
35.0  
35.0  
29.0  
29.0  
31.8  
35.0  
35.0  
35.0  
35.0  
29.0  
33.0  
29.0  
8
2500  
3000  
250  
OPA2330AIDRBR  
OPA2330AIDRBT  
OPA330AIDBVR  
OPA330AIDBVT  
OPA330AIDCKR  
OPA330AIDCKT  
OPA330AIDR  
SON  
DRB  
DRB  
DBV  
DBV  
DCK  
DCK  
D
8
SON  
8
SOT-23  
SOT-23  
SC70  
5
3000  
250  
5
5
3000  
250  
SC70  
5
SOIC  
8
2500  
2500  
2000  
OPA4330AIDR  
SOIC  
D
14  
14  
OPA4330AIPWR  
TSSOP  
PW  
Pack Materials-Page 2  
MECHANICAL DATA  
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999  
PW (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE PACKAGE  
14 PINS SHOWN  
0,30  
0,19  
M
0,10  
0,65  
14  
8
0,15 NOM  
4,50  
4,30  
6,60  
6,20  
Gage Plane  
0,25  
1
7
0°8°  
A
0,75  
0,50  
Seating Plane  
0,10  
0,15  
0,05  
1,20 MAX  
PINS **  
8
14  
16  
20  
24  
28  
DIM  
3,10  
2,90  
5,10  
4,90  
5,10  
4,90  
6,60  
6,40  
7,90  
9,80  
9,60  
A MAX  
A MIN  
7,70  
4040064/F 01/97  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.  
D. Falls within JEDEC MO-153  
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