MAX4594DCKR [TI]
SINGLE-CHANNEL 10-зSPST ANALOG SWITCH; 单通道10 - зSPST模拟开关型号: | MAX4594DCKR |
厂家: | TEXAS INSTRUMENTS |
描述: | SINGLE-CHANNEL 10-зSPST ANALOG SWITCH |
文件: | 总14页 (文件大小:186K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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ꢆꢇ ꢈꢉ ꢊ ꢋꢌꢍꢎꢁꢈꢈ ꢋꢊ ꢏ ꢐ ꢌW ꢆꢑ ꢆꢒ ꢁꢈꢁ ꢊꢓ ꢉ ꢆ ꢔꢇ ꢒꢍ ꢎ
www.ti.com
SLLS639 − JANUARY 2005
Description
Features
D
D
D
D
D
D
D
D
D
D
Low ON-State Resistance (10 W)
ON-State Resistance Flatness (1.5 W)
Control Inputs Are 5.5-V Tolerant
Low Charge Injection (5 pC Max)
300-MHz −3-dB Bandwidth at 255C
Low Total Harmonic Distortion (THD) (0.05%)
2-V to 5.5-V Single-Supply Operation
Specified at 5-V and 3.3-V Nodes
−80-dB OFF Isolation at 1 MHz
The MAX4594 is a single-pole single-throw (SPST)
analog switch that is designed to operate from 2 V to
5.5 V. This device can handle both digital and analog
signals, and signals up to V can be transmitted in either
+
direction.
Applications
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
D
D
Sample-and-Hold Circuits
D
0.5-nA Max OFF Leakage
Battery-Powered Equipment
(Cellular Phones, PDAs)
D
ESD Performance Tested Per JESD 22
− 2000-V Human-Body Model
(A114-B, Class II)
D
D
D
Audio and Video Signal Routing
Communication Circuits
PCMCIA Cards
− 1000-V Charged-Device Model (C101)
D
TTL/CMOS-Logic Compatible
Summary of Characteristics
V = 5 V, T = 25°C
+
A
SOT-23 OR SC-70 PACKAGE
(TOP VIEW)
Single Pole
Single Throw
(SPST)
Configuration
COM
NO
1
5
4
V
+
Number of channels
1
10 Ω
2
3
ON-state resistance (r
)
on
GND
IN
ON-state resistance flatness (r
)
1.5 Ω
on(flat)
Turn-on/turn-off time (t /t
)
35 ns/40 ns
5 pC
ON OFF
Charge injection (Q )
C
Bandwidth (BW)
300 MHz
−80 dB at 1 MHz
0.05%
OFF isolation (O
ISO
)
FUNCTION TABLE
Total harmonic distortion (THD)
Leakagecurrent(I /I
NO TO COM,
COM TO NO
IN
)
0.05 nA
COM(OFF) NO(OFF)
L
OFF
ON
Power-supply current (I )
+
1 µA
H
Package option
5-pin SOT-23 or SC-70
ORDERING INFORMATION
(1)
PACKAGE
(2)
T
ORDERABLE PART NUMBER
MAX4594DBVR
MAX4594DCKR
TOP-SIDE MARKING
A
SOT (SOT-23) − DBV
SOT (SC−70) − DCK
Tape and reel
Tape and reel
6SA_
SA_
−40°C to 85°C
(1)
(2)
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package.
DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
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Copyright 2005, Texas Instruments Incorporated
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www.ti.com
SLLS639 − JANUARY 2005
Pin Configurations
Available in Other Pin Configurations
COM
NC
1
5
4
V
+
2
3
COM
NO
1
5
4
V
GND
IN
+
2
3
MAX4595
GND
IN
1
2
3
1
2
3
V
V
+
5
4
5
4
IN
IN
+
MAX4594
COM
GND
COM
GND
NO
NC
MAX4596
MAX4597
(1)(2)
Absolute Minimum and Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
(3)
V
V
Supply voltage range
−0.3
6
V
+
NO
(3)(4)
Analog voltage range
−0.3
−50
−20
V
+
+ 0.3
V
V
COM
I
K
Analog port diode current
On-state switch current
V
, V
NO COM
< 0
mA
mA
I
I
NO
COM
V , V
NO COM
= 0 to V
20
+
+
I
I
On-state switch current
(pulsed at 1 ms, 10% duty cycle)
NO
COM
V
, V
= 0 to V
−40
40
6
mA
NO COM
(3)(4)
V
I
Digital input voltage range
−0.3
−50
V
I
I
I
Digital input clamp current
V < 0
I
mA
mA
mA
IK
Continuous current through V
100
+
+
Continuous current through GND
−100
GND
DBV package
DCK package
206
252
150
(5)
θ
Package thermal impedance
°C/W
°C
JA
T
stg
Storage temperature range
−65
(1)
Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade
device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified
is not implied.
(2)
(3)
(4)
(5)
The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
All voltages are with respect to ground, unless otherwise specified.
The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
The package thermal impedance is calculated in accordance with JESD 51-7.
2
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ꢆ
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SLLS639 − JANUARY 2005
(1)
Electrical Characteristics for 5-V Supply
V
+
= 4.5 V to 5.5 V, V = 2.4 V, V = 0.8 V, T = −40°C to 85°C (unless otherwise noted)
IH
IL
A
PARAMETER
TEST CONDITIONS
MIN
MAX UNIT
SYMBOL
T
A
V
+
TYP
Analog Switch
Analog signal
range
V
V
,
COM
NO
0
V
+
V
25°C
6.5
0.5
10
12
ON-state
resistance
V
I
= 3.5 V,
Switch ON,
See Figure 13
NO
r
4.5 V
4.5 V
Ω
on
= 10 mA,
Full
COM
ON-state
resistance
flatness
25°C
Full
1.5
2
V
I
= 1.5 V, 2.5 V, 3.5 V,
= 10 mA,
Switch ON,
See Figure 13
NO
r
Ω
on(flat)
COM
NO
OFF leakage
current
V
= 1 V, V
or
= 4.5 V, V
= 4.5 V,
= 1 V,
25°C
Full
−0.5
−5
0.01
0.01
0.5
5
NO
COM
Switch OFF,
See Figure 14
I
5.5 V
5.5 V
nA
nA
NO(OFF)
V
V
NO
COM
COM
OFF leakage
current
= 1 V, V
= 4.5 V,
= 4.5 V, V = 1 V,
NO
25°C
Full
−0.5
−5
0.5
5
COM
NO
Switch OFF,
See Figure 14
or
I
COM(OFF)
V
V
COM
= 1 V, V
COM
= 1 V,
NO
NO
25°C
−1
0.01
0.01
1
NO
ON leakage
current
or
Switch ON,
See Figure 15
V
= 4.5 V, V
or
= 1 V, 4.5 V, V
= 4.5 V,
I
5.5 V
5.5 V
nA
nA
COM
NO(ON)
Full
25°C
Full
−10
−1
10
1
V
V
= Open,
= 1 V,
NO
NO
COM
= 1 V, V
or
= 4.5 V, V
COM
COM
ON leakage
current
Switch ON,
See Figure 15
I
V
= 4.5 V,
NO
COM(ON)
COM
COM
or
−10
10
V
= 1 V, 4.5 V, V
NO
= Open,
Digital Control Input (IN)
Input logic high
Input logic low
V
Full
Full
2.4
0
5.5
0.8
1
V
V
IH
V
IL
25°C
Full
−1
−1
0.03
Input leakage
current
I
, I
IH IL
V = V or 0
5 V
µA
I
+
1
(1)
The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
3
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SLLS639 − JANUARY 2005
(1)
Electrical Characteristics for 5-V Supply (continued)
V
+
= 4.5 V to 5.5 V, T = −40°C to 85°C (unless otherwise noted)
A
PARAMETER
TEST CONDITIONS
MIN
MAX UNIT
SYMBOL
T
V
TYP
20
A
+
Dynamic
25°C
Full
5 V
35
V
R
= 3 V,
= 300 Ω,
C = 35 pF,
L
NO
L
Turn-on time
t
ns
ON
See Figure 17
C = 35 pF,
L
4.5 V to 5.5 V
5 V
45
25°C
Full
25
40
V
R
= 3 V,
= 300 Ω,
COM
Turn-off time
t
ns
OFF
See Figure 17
C = 1 nF,
L
4.5 V to 5.5 V
50
L
V
R
= 0,
= 0,
GEN
Charge injection
Q
25°C
25°C
25°C
25°C
5 V
5 V
5 V
5 V
2
8
5
pC
pF
pF
pF
C
See Figure 20
GEN
NO
V
= 0 V,
Switch OFF,
See Figure 16
NO
f = 1 MHz,
C
NO(OFF)
OFF capacitance
COM
OFF capacitance
V
= 0 V,
Switch OFF,
See Figure 16
COM
f = 1 MHz,
C
8
COM(OFF)
NO
V
= 0 V,
Switch ON,
See Figure 16
NO
f = 1 MHz,
C
20
NO(ON))
ON capacitance
COM
ON capacitance
V
= 0 V,
Switch ON,
See Figure 16
COM
f = 1 MHz,
C
25°C
25°C
25°C
25°C
5 V
5 V
5 V
5 V
20
3
pF
pF
COM(ON)
Digital input
capacitance
C
I
V = 0 V,
I
See Figure 16
R
= 50 Ω,
Switch ON,
See Figure 18
L
Bandwidth
BW
300
−80
MHz
dB
Signal = 0 dBm,
R
= 50 Ω, V
= 1 V
,
Switch OFF,
See Figure 19
L
NO
RMS
OFF isolation
O
ISO
f = 1 MHz, C = 5 pF,
L
Total harmonic
distortion
R
= 600 Ω, C = 50 pF,
f = 20 Hz to 20 kHz,
See Figure 21
L
L
THD
25°C
5 V
0.05
%
V
= 5 V
SOURCE
p-p,
Supply
Positive supply
current
I
+
V = V or GND,
Switch ON or OFF
Full
5.5 V
1
µA
I
+
(1)
The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
4
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SLLS639 − JANUARY 2005
(1)
Electrical Characteristics for 3-V Supply
V
+
= 2.7 V to 3.6 V, T = −40°C to 85°C (unless otherwise noted)
A
PARAMETER
TEST CONDITIONS
MIN
MAX UNIT
SYMBOL
T
A
V
+
TYP
Analog Switch
Analog signal
range
V
V
,
COM
NO
0
V
+
V
25°C
10
20
25
ON-state
resistance
V
I
= 1.5 V,
Switch ON,
See Figure 13
NO
r
on
2.7 V
Ω
= 10 mA,
Full
COM
Digital Control Input (IN)
Input logic high
Input logic low
V
Full
Full
2
0
5.5
0.8
1
V
V
IH
V
IL
25°C
Full
−1
−1
0.03
Input leakage
current
I
, I
IH IL
V = V or 0
3.6 V
3 V
µA
I
+
1
Dynamic
25°C
Full
25
30
45
55
50
60
V
R
= 2 V,
= 300 Ω,
C = 35 pF,
L
NO
L
Turn-on time
t
ns
ON
See Figure 17
C = 35 pF,
L
2.7 V to 3.6 V
3 V
25°C
Full
V
R
= 2 V,
= 300 Ω,
COM
L
Turn-off time
t
ns
OFF
See Figure 17
C = 1 nF,
L
2.7 V to 3.6 V
V
R
= 0,
= 0,
GEN
GEN
Charge injection
Q
25°C
3 V
2
4
pC
C
See Figure 20
Supply
Positive supply
current
I
+
V = V or GND,
Switch ON or OFF
Full
3.6 V
1
µA
I
+
(1)
The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
5
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SLLS639 − JANUARY 2005
TYPICAL PERFORMANCE
10
8
8
6
4
2
0
T
A
= 25_C
V
= 3 V
= 5 V
855C
+
255C
6
4
–405C
V
+
2
0
0
1
2
3
4
5
3
5
0
1
2
3
4
5
V
(V)
COM
V
(V)
COM
Figure 1. r vs V
on
COM
Figure 2. r vs V
(V = 5 V)
+
on
COM
1.0
0.8
0.6
0.4
0.2
0.0
10
8
I
/I
COM(ON) NO(ON)
–405C
255C
6
I
/I
NO(OFF) COM(OFF)
4
855C
2
0
0
1
2
−40°C
25°C
A
85°C
V
(V)
T (°C)
COM
Figure 4. Leakage Current vs Temperature
Figure 3. r vs V
(V = 3 V)
+
on
COM
(V = 5 V)
+
0.5
0.0
20
18
16
14
12
10
8
t
ON
5
5
t
OFF
V
= 3 V
+
−0.5
−1.0
−1.5
−2.0
−2.5
−3.0
V
= 5 V
+
5
1
6
0
1
2
3
4
0
1
2
3
4
5
6
V
+
(V)
Bias Voltage (V)
Figure 6. t
and t
vs Supply Voltage
Figure 5. Charge-Injection (Q ) vs V
ON
OFF
C
COM
6
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SLLS639 − JANUARY 2005
TYPICAL PERFORMANCE
12
3
2
1
0
11
10
9
V
IH
t
ON
8
V
IL
7
t
OFF
6
−40°C
25°C
(5C)
85°C
0
1
2
3
4
5
6
T
V
+
(V)
A
Figure 7. t
and t
vs Temperature (V = 5 V)
Figure 8. Logic-Level Threshold vs V
ON
OFF
+
+
0.0
−0.5
−1.0
−1.5
−2.0
−2.5
−3.0
−3.5
0
−10
−20
−30
−40
−50
−60
−70
−80
−90
−100
−4.0
0.1
1
10
Frequency (MHz)
100
1000
0.1
1
10
100
1000
Frequency (MHz)
Figure 9. Bandwidth (Gain vs Frequency)
Figure 10. Off Isolation vs Frequency
(V = 5 V)
+
10
9
8
7
6
5
4
3
2
1
0
0.20
V
= 5 V
+
0.15
0.10
0.05
0.00
V
V
= 3 V
= 5 V
+
V
+
= 3 V
+
−40°C
25°C
85°C
0.1
1
10
Frequency (MHz)
100
1000
T
A
(5C)
Figure 12. Total Harmonic Distortion vs
Frequency
Figure 11. Power-Supply Current vs
Temperature
7
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ꢍ
ꢎꢁ
ꢈꢈ
ꢋꢊ
ꢏ
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ꢌW ꢆ ꢑꢆ ꢒ ꢁꢈ ꢁꢊ ꢓꢉ ꢆꢔ ꢇ ꢒꢍ ꢎ
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SLLS639 − JANUARY 2005
PIN DESCRIPTION
PIN
NUMBER
NAME
DESCRIPTION
1
2
3
4
5
COM
NO
Common
Normally open
GND
IN
Digital ground
Digital control pin to connect COM to NO
Power supply
V
+
PARAMETER DESCRIPTION
SYMBOL
DESCRIPTION
V
Voltage at COM
Voltage at NO
COM
NO
V
r
r
Resistance between COM and NO ports when the channel is ON
on
Difference between the maximum and minimum value of r in a channel over the specified range of conditions
on
on(flat)
I
I
Leakage current measured at the NO port, with the corresponding channel (NO to COM) in the OFF state
NO(OFF)
Leakage current measured at the NO port, with the corresponding channel (NO to COM) in the ON state and the output (COM)
open
NO(ON)
I
Leakage current measured at the COM port, with the corresponding channel (COM to NO) in the OFF state
COM(OFF)
Leakage current measured at the COM port, with the corresponding channel (COM to NO) in the ON state and the output (NO)
open
I
COM(ON)
V
Minimum input voltage for logic high for the control input (IN)
Maximum input voltage for logic low for the control input (IN)
Voltage at the control input (IN)
IH
IL
I
V
V
I , I
IH IL
Leakage current measured at the control input (IN)
Turn-on time for the switch. This parameter is measured under the specified range of conditions and by the propagation delay
between the digital control (IN) signal and analog output (COM or NO) signal when the switch is turning ON.
t
ON
Turn-off time for the switch. This parameter is measured under the specified range of conditions and by the propagation delay
between the digital control (IN) signal and analog output (COM or NO) signal when the switch is turning OFF.
t
OFF
Charge injection is a measurement of unwanted signal coupling from the control (IN) input to the analog (NO or COM) output.
This is measured in coulomb (C) and measured by the total charge induced due to switching of the control input.
Q
C
Charge injection, Q = C × ∆V
, C is the load capacitance, and ∆V is the change in analog output voltage.
C
L
COM
L
COM
C
C
Capacitance at the NO port when the corresponding channel (NO to COM) is OFF
Capacitance at the NO port when the corresponding channel (NO to COM) is ON
Capacitance at the COM port when the corresponding channel (COM to NO) is OFF
Capacitance at the COM port when the corresponding channel (COM to NO) is ON
Capacitance of control input (IN)
NO(OFF)
NO(ON)
C
COM(OFF)
C
COM(ON)
C
I
OFF isolation of the switch is a measurement of OFF-state switch impedance. This is measured in dB in a specific frequency,
with the corresponding channel (NO to COM) in the OFF state.
O
ISO
BW
Bandwidth of the switch. This is the frequency in which the gain of an ON channel is −3 dB below the DC gain.
Total harmonic distortion describes the signal distortion caused by the analog switch. This is defined as the ratio of root mean
square (RMS) value of the second, third, and higher harmonic to the absolute magnitude of the fundamental harmonic.
THD
I
+
Static power-supply current with the control (IN) pin at V or GND
+
8
ꢀ ꢁꢂ ꢃ ꢄꢅ ꢃ
ꢆꢇ ꢈꢉ ꢊ ꢋꢌꢍꢎꢁꢈꢈ ꢋꢊ ꢏ ꢐ ꢌW ꢆꢑ ꢆꢒ ꢁꢈꢁ ꢊꢓ ꢉ ꢆ ꢔꢇ ꢒꢍ ꢎ
www.ti.com
SLLS639 − JANUARY 2005
PARAMETER MEASUREMENT INFORMATION
V
+
V
NO
IN
NO
COM
V
COM
+
Channel ON
VCOM * VNO
r
+
W
on
ICOM
I
COM
V
I
V = V or V
I IH IL
+
GND
Figure 13. ON-State Resistance (r
)
on
V
+
V
NO
IN
NO
OFF-State Leakage Current
Channel OFF
COM
V
COM
+
+
V = V or V
I IH IL
V
I
+
GND
Figure 14. OFF-State Leakage Current (I
, I
)
COM(OFF) NO(OFF)
V
+
V
NO
IN
NO
COM
ON-State Leakage Current
Channel ON
V
COM
+
V = V or V
I IH IL
V
I
+
GND
Figure 15. ON-State Leakage Current (I
, I
)
COM(ON) NO(ON)
9
ꢀ ꢁ ꢂꢃ ꢄ ꢅ ꢃ
ꢆ ꢇꢈꢉ ꢊ ꢋꢌꢍ ꢎꢁ ꢈꢈ ꢋꢊ ꢏ ꢐ ꢌW ꢆ ꢑꢆ ꢒ ꢁꢈ ꢁꢊ ꢓꢉ ꢆꢔ ꢇ ꢒꢍ ꢎ
www.ti.com
SLLS639 − JANUARY 2005
V
+
V
V
NO
NO
Capacitance
Meter
V
= 0 V
BIAS
V = V or V
I
IH IL
COM
IN
COM
Capacitance is measured at NO,
COM, and IN inputs during ON
and OFF conditions.
V
BIAS
V
I
GND
Figure 16. Capacitance (C , C
, C
, C
, C
)
I
COM(OFF) COM(ON) NO(OFF) NO(ON)
V
+
TEST
R
L
C
L
NO
V
NO
t
300 Ω
300 Ω
35 pF
35 pF
ON
(3)
COM
IN
V
COM
(2)
C
L
R
L
t
OFF
V
I
V
0
Logic
Input
(V )
I
+
50%
50%
Logic
Input
GND
(1)
t
t
ON
OFF
Switch
Output
90%
90%
(V
)
COM
(1)
(2)
(3)
All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t < 5 ns, t < 5 ns.
O
r
f
C
includes probe and jig capacitance.
L
See Electrical Characteristics for V
.
COM
Figure 17. Turn-On (t ) and Turn-Off Time (t
)
ON
OFF
V
+
Network Analyzer
50 W
V
NO
NO
IN
Channel ON: NO to COM
V = V or GND
V
COM
COM
I
+
Source
Signal
Network Analyzer Setup
V
Source Power = 0 dBm
(632-mV P-P at 50-W load)
I
50 W
+
GND
DC Bias = 350 mV
Figure 18. Bandwidth (BW)
10
ꢀ ꢁꢂ ꢃ ꢄꢅ ꢃ
ꢆꢇ ꢈꢉ ꢊ ꢋꢌꢍꢎꢁꢈꢈ ꢋꢊ ꢏ ꢐ ꢌW ꢆꢑ ꢆꢒ ꢁꢈꢁ ꢊꢓ ꢉ ꢆ ꢔꢇ ꢒꢍ ꢎ
www.ti.com
SLLS639 − JANUARY 2005
V
+
Network Analyzer
50 W
Channel OFF: NO to COM
V = V or GND
V
NO
IN
NO
I
+
V
COM
COM
Source
Signal
Network Analyzer Setup
Source Voltage = 1 V
DC Bias = 350 mV
RMS
V
I
50 W
+
GND
Figure 19. OFF Isolation (O
)
ISO
V
IH
V
+
Logic
Input
OFF
ON
OFF
V
(V
I)
IL
R
GEN
NO
IN
COM
V
COM
+
V
COM
∆V
COM
V
GEN
(1)
C
L
V
= 0 to V
= 0
= 1 nF
GEN
+
V
I
R
C
GEN
L
Logic
(2)
GND
Q = C ×∆V
V = V or V
I IH IL
C L COM
Input
(1)
(2)
C
includes probe and jig capacitance.
L
All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t < 5 ns, t < 5 ns.
O
r
f
Figure 20. Charge Injection (Q )
C
Channel ON: COM to NO
V = V /2 or −V /2
R
L
C
L
= 600 Ω
I
+
+
V
= V P-P
+
f
= 20 Hz to 20 kHz
= 50 pF
SOURCE
SOURCE
V /2
+
Audio Analyzer
NO
Source
Signal
COM
IN
(1)
C
L
600 W
V
I
GND
600 W
−V /2
+
(1)
C
L
includes probe and jig capacitance.
Figure 21. Total Harmonic Distortion (THD)
11
MECHANICAL DATA
MPDS025C – FEBRUARY 1997 – REVISED FEBRUARY 2002
DCK (R-PDSO-G5)
PLASTIC SMALL-OUTLINE PACKAGE
0,30
0,15
M
0,10
0,65
5
4
0,13 NOM
1,40 2,40
1,10 1,80
1
3
Gage Plane
2,15
1,85
0,15
0°–8°
0,46
0,26
Seating Plane
0,10
1,10
0,80
0,10
0,00
4093553-2/D 01/02
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion.
D. Falls within JEDEC MO-203
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